effect
stringclasses 48
values | original_source_type
stringlengths 0
23k
| opens_and_abbrevs
listlengths 2
92
| isa_cross_project_example
bool 1
class | source_definition
stringlengths 9
57.9k
| partial_definition
stringlengths 7
23.3k
| is_div
bool 2
classes | is_type
null | is_proof
bool 2
classes | completed_definiton
stringlengths 1
250k
| dependencies
dict | effect_flags
sequencelengths 0
2
| ideal_premises
sequencelengths 0
236
| mutual_with
sequencelengths 0
11
| file_context
stringlengths 0
407k
| interleaved
bool 1
class | is_simply_typed
bool 2
classes | file_name
stringlengths 5
48
| vconfig
dict | is_simple_lemma
null | source_type
stringlengths 10
23k
| proof_features
sequencelengths 0
1
| name
stringlengths 8
95
| source
dict | verbose_type
stringlengths 1
7.42k
| source_range
dict |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
FStar.Tactics.Effect.Tac | val printout_failure (err: string) : Tac unit | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let printout_failure (err : string) : Tac unit =
printout_result "ainfo" (EFailure err) | val printout_failure (err: string) : Tac unit
let printout_failure (err: string) : Tac unit = | true | null | false | printout_result "ainfo" (EFailure err) | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"Prims.string",
"FStar.InteractiveHelpers.Output.printout_result",
"FStar.InteractiveHelpers.Output.EFailure",
"Prims.unit"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t)
let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix ""
let proposition_to_printout (ge:genv) (prefix:string) (p:proposition) : Tac string =
term_to_printout ge prefix p
let propositions_to_printout (ge:genv) (prefix:string) (pl:list proposition) : Tac string =
let prop_to_printout i p =
let prefix' = prefix ^ ":prop" ^ string_of_int i in
proposition_to_printout ge prefix' p
in
let str = string_to_printout (prefix ^ ":num") (string_of_int (List.Tot.length pl)) in
let concat_prop s_i p : Tac (string & int) =
let s, i = s_i in
s ^ prop_to_printout i p, i+1
in
let str, _ = fold_left concat_prop (str,0) pl in
str
let error_message_to_printout (prefix : string) (message : option string) : Tot string =
let msg = match message with | Some msg -> msg | _ -> "" in
string_to_printout (prefix ^ ":error") msg
/// Utility type and function to communicate the results to emacs.
noeq type export_result =
| ESuccess : ge:genv -> a:assertions -> export_result
| EFailure : err:string -> export_result
let result_to_printout (prefix:string) (res:export_result) :
Tac string =
let str = prefix ^ ":BEGIN\n" in
(* Note that the emacs commands will always look for fields for the error message
* and the pre/post assertions, so we need to generate them, even though they
* might be empty. *)
let err, ge, pres, posts =
match res with
| ESuccess ge a -> None, ge, a.pres, a.posts
| EFailure err ->
let ge = mk_init_genv (top_env ()) in (* dummy environment - will not be used *)
Some err, ge, [], []
in
(* Error message *)
let str = str ^ error_message_to_printout prefix err in
(* Assertions *)
let str = str ^ propositions_to_printout ge (prefix ^ ":pres") pres in
let str = str ^ propositions_to_printout ge (prefix ^ ":posts") posts in
str ^ prefix ^ ":END\n" ^ "%FIH:FSTAR_META:END%"
let printout_result (prefix:string) (res:export_result) :
Tac unit =
print (result_to_printout prefix res)
/// The function to use to export the results in case of success
let printout_success (ge:genv) (a:assertions) : Tac unit =
printout_result "ainfo" (ESuccess ge a)
/// The function to use to communicate failure in case of error | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val printout_failure (err: string) : Tac unit | [] | FStar.InteractiveHelpers.Output.printout_failure | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | err: Prims.string -> FStar.Tactics.Effect.Tac Prims.unit | {
"end_col": 40,
"end_line": 154,
"start_col": 2,
"start_line": 154
} |
FStar.Tactics.Effect.Tac | val term_to_printout (ge: genv) (prefix: string) (t: term) : Tac string | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t) | val term_to_printout (ge: genv) (prefix: string) (t: term) : Tac string
let term_to_printout (ge: genv) (prefix: string) (t: term) : Tac string = | true | null | false | let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t) | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"FStar.InteractiveHelpers.Base.genv",
"Prims.string",
"FStar.Reflection.Types.term",
"FStar.InteractiveHelpers.Output.string_to_printout",
"FStar.Tactics.V1.Builtins.term_to_string",
"FStar.Reflection.V1.Derived.mk_e_app",
"FStar.Tactics.V1.Derived.mk_abs",
"Prims.list",
"FStar.Tactics.Util.map",
"FStar.Pervasives.Native.tuple2",
"FStar.Reflection.Types.bv",
"FStar.Reflection.Types.typ",
"FStar.Tactics.V1.Builtins.pack",
"FStar.Reflection.V1.Data.Tv_Var",
"FStar.Reflection.Types.binder",
"FStar.List.Tot.Base.map",
"FStar.Reflection.V1.Derived.mk_binder",
"FStar.InteractiveHelpers.ExploreTerm.abs_free_in"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n" | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val term_to_printout (ge: genv) (prefix: string) (t: term) : Tac string | [] | FStar.InteractiveHelpers.Output.term_to_printout | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | ge: FStar.InteractiveHelpers.Base.genv -> prefix: Prims.string -> t: FStar.Reflection.Types.term
-> FStar.Tactics.Effect.Tac Prims.string | {
"end_col": 46,
"end_line": 92,
"start_col": 70,
"start_line": 85
} |
FStar.Tactics.Effect.Tac | val printout_result (prefix: string) (res: export_result) : Tac unit | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let printout_result (prefix:string) (res:export_result) :
Tac unit =
print (result_to_printout prefix res) | val printout_result (prefix: string) (res: export_result) : Tac unit
let printout_result (prefix: string) (res: export_result) : Tac unit = | true | null | false | print (result_to_printout prefix res) | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"Prims.string",
"FStar.InteractiveHelpers.Output.export_result",
"FStar.Tactics.V1.Builtins.print",
"Prims.unit",
"FStar.InteractiveHelpers.Output.result_to_printout"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t)
let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix ""
let proposition_to_printout (ge:genv) (prefix:string) (p:proposition) : Tac string =
term_to_printout ge prefix p
let propositions_to_printout (ge:genv) (prefix:string) (pl:list proposition) : Tac string =
let prop_to_printout i p =
let prefix' = prefix ^ ":prop" ^ string_of_int i in
proposition_to_printout ge prefix' p
in
let str = string_to_printout (prefix ^ ":num") (string_of_int (List.Tot.length pl)) in
let concat_prop s_i p : Tac (string & int) =
let s, i = s_i in
s ^ prop_to_printout i p, i+1
in
let str, _ = fold_left concat_prop (str,0) pl in
str
let error_message_to_printout (prefix : string) (message : option string) : Tot string =
let msg = match message with | Some msg -> msg | _ -> "" in
string_to_printout (prefix ^ ":error") msg
/// Utility type and function to communicate the results to emacs.
noeq type export_result =
| ESuccess : ge:genv -> a:assertions -> export_result
| EFailure : err:string -> export_result
let result_to_printout (prefix:string) (res:export_result) :
Tac string =
let str = prefix ^ ":BEGIN\n" in
(* Note that the emacs commands will always look for fields for the error message
* and the pre/post assertions, so we need to generate them, even though they
* might be empty. *)
let err, ge, pres, posts =
match res with
| ESuccess ge a -> None, ge, a.pres, a.posts
| EFailure err ->
let ge = mk_init_genv (top_env ()) in (* dummy environment - will not be used *)
Some err, ge, [], []
in
(* Error message *)
let str = str ^ error_message_to_printout prefix err in
(* Assertions *)
let str = str ^ propositions_to_printout ge (prefix ^ ":pres") pres in
let str = str ^ propositions_to_printout ge (prefix ^ ":posts") posts in
str ^ prefix ^ ":END\n" ^ "%FIH:FSTAR_META:END%"
let printout_result (prefix:string) (res:export_result) : | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val printout_result (prefix: string) (res: export_result) : Tac unit | [] | FStar.InteractiveHelpers.Output.printout_result | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | prefix: Prims.string -> res: FStar.InteractiveHelpers.Output.export_result
-> FStar.Tactics.Effect.Tac Prims.unit | {
"end_col": 39,
"end_line": 146,
"start_col": 2,
"start_line": 146
} |
FStar.Tactics.Effect.Tac | val propositions_to_printout (ge: genv) (prefix: string) (pl: list proposition) : Tac string | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let propositions_to_printout (ge:genv) (prefix:string) (pl:list proposition) : Tac string =
let prop_to_printout i p =
let prefix' = prefix ^ ":prop" ^ string_of_int i in
proposition_to_printout ge prefix' p
in
let str = string_to_printout (prefix ^ ":num") (string_of_int (List.Tot.length pl)) in
let concat_prop s_i p : Tac (string & int) =
let s, i = s_i in
s ^ prop_to_printout i p, i+1
in
let str, _ = fold_left concat_prop (str,0) pl in
str | val propositions_to_printout (ge: genv) (prefix: string) (pl: list proposition) : Tac string
let propositions_to_printout (ge: genv) (prefix: string) (pl: list proposition) : Tac string = | true | null | false | let prop_to_printout i p =
let prefix' = prefix ^ ":prop" ^ string_of_int i in
proposition_to_printout ge prefix' p
in
let str = string_to_printout (prefix ^ ":num") (string_of_int (List.Tot.length pl)) in
let concat_prop s_i p : Tac (string & int) =
let s, i = s_i in
s ^ prop_to_printout i p, i + 1
in
let str, _ = fold_left concat_prop (str, 0) pl in
str | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"FStar.InteractiveHelpers.Base.genv",
"Prims.string",
"Prims.list",
"FStar.InteractiveHelpers.Propositions.proposition",
"Prims.int",
"FStar.Pervasives.Native.tuple2",
"FStar.Tactics.Util.fold_left",
"FStar.Pervasives.Native.Mktuple2",
"Prims.op_Addition",
"Prims.op_Hat",
"FStar.InteractiveHelpers.Output.string_to_printout",
"Prims.string_of_int",
"FStar.List.Tot.Base.length",
"FStar.InteractiveHelpers.Output.proposition_to_printout"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t)
let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix ""
let proposition_to_printout (ge:genv) (prefix:string) (p:proposition) : Tac string =
term_to_printout ge prefix p | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val propositions_to_printout (ge: genv) (prefix: string) (pl: list proposition) : Tac string | [] | FStar.InteractiveHelpers.Output.propositions_to_printout | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
ge: FStar.InteractiveHelpers.Base.genv ->
prefix: Prims.string ->
pl: Prims.list FStar.InteractiveHelpers.Propositions.proposition
-> FStar.Tactics.Effect.Tac Prims.string | {
"end_col": 5,
"end_line": 113,
"start_col": 91,
"start_line": 102
} |
Prims.Tot | val error_message_to_printout (prefix: string) (message: option string) : Tot string | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let error_message_to_printout (prefix : string) (message : option string) : Tot string =
let msg = match message with | Some msg -> msg | _ -> "" in
string_to_printout (prefix ^ ":error") msg | val error_message_to_printout (prefix: string) (message: option string) : Tot string
let error_message_to_printout (prefix: string) (message: option string) : Tot string = | false | null | false | let msg =
match message with
| Some msg -> msg
| _ -> ""
in
string_to_printout (prefix ^ ":error") msg | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [
"total"
] | [
"Prims.string",
"FStar.Pervasives.Native.option",
"FStar.InteractiveHelpers.Output.string_to_printout",
"Prims.op_Hat"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t)
let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix ""
let proposition_to_printout (ge:genv) (prefix:string) (p:proposition) : Tac string =
term_to_printout ge prefix p
let propositions_to_printout (ge:genv) (prefix:string) (pl:list proposition) : Tac string =
let prop_to_printout i p =
let prefix' = prefix ^ ":prop" ^ string_of_int i in
proposition_to_printout ge prefix' p
in
let str = string_to_printout (prefix ^ ":num") (string_of_int (List.Tot.length pl)) in
let concat_prop s_i p : Tac (string & int) =
let s, i = s_i in
s ^ prop_to_printout i p, i+1
in
let str, _ = fold_left concat_prop (str,0) pl in
str | false | true | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val error_message_to_printout (prefix: string) (message: option string) : Tot string | [] | FStar.InteractiveHelpers.Output.error_message_to_printout | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | prefix: Prims.string -> message: FStar.Pervasives.Native.option Prims.string -> Prims.string | {
"end_col": 44,
"end_line": 117,
"start_col": 88,
"start_line": 115
} |
FStar.Tactics.Effect.Tac | val proposition_to_printout (ge: genv) (prefix: string) (p: proposition) : Tac string | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let proposition_to_printout (ge:genv) (prefix:string) (p:proposition) : Tac string =
term_to_printout ge prefix p | val proposition_to_printout (ge: genv) (prefix: string) (p: proposition) : Tac string
let proposition_to_printout (ge: genv) (prefix: string) (p: proposition) : Tac string = | true | null | false | term_to_printout ge prefix p | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"FStar.InteractiveHelpers.Base.genv",
"Prims.string",
"FStar.InteractiveHelpers.Propositions.proposition",
"FStar.InteractiveHelpers.Output.term_to_printout"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t)
let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix "" | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val proposition_to_printout (ge: genv) (prefix: string) (p: proposition) : Tac string | [] | FStar.InteractiveHelpers.Output.proposition_to_printout | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
ge: FStar.InteractiveHelpers.Base.genv ->
prefix: Prims.string ->
p: FStar.InteractiveHelpers.Propositions.proposition
-> FStar.Tactics.Effect.Tac Prims.string | {
"end_col": 30,
"end_line": 100,
"start_col": 2,
"start_line": 100
} |
FStar.Tactics.Effect.Tac | val pp_tac: Prims.unit -> Tac unit | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let pp_tac () : Tac unit =
print ("post-processing: " ^ (term_to_string (cur_goal ())));
dump "";
trefl() | val pp_tac: Prims.unit -> Tac unit
let pp_tac () : Tac unit = | true | null | false | print ("post-processing: " ^ (term_to_string (cur_goal ())));
dump "";
trefl () | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"Prims.unit",
"FStar.Tactics.V1.Derived.trefl",
"FStar.Tactics.V1.Builtins.dump",
"FStar.Tactics.V1.Builtins.print",
"Prims.string",
"Prims.op_Hat",
"FStar.Tactics.V1.Builtins.term_to_string",
"FStar.Reflection.Types.term",
"FStar.Tactics.V1.Derived.cur_goal",
"FStar.Reflection.Types.typ"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t)
let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix ""
let proposition_to_printout (ge:genv) (prefix:string) (p:proposition) : Tac string =
term_to_printout ge prefix p
let propositions_to_printout (ge:genv) (prefix:string) (pl:list proposition) : Tac string =
let prop_to_printout i p =
let prefix' = prefix ^ ":prop" ^ string_of_int i in
proposition_to_printout ge prefix' p
in
let str = string_to_printout (prefix ^ ":num") (string_of_int (List.Tot.length pl)) in
let concat_prop s_i p : Tac (string & int) =
let s, i = s_i in
s ^ prop_to_printout i p, i+1
in
let str, _ = fold_left concat_prop (str,0) pl in
str
let error_message_to_printout (prefix : string) (message : option string) : Tot string =
let msg = match message with | Some msg -> msg | _ -> "" in
string_to_printout (prefix ^ ":error") msg
/// Utility type and function to communicate the results to emacs.
noeq type export_result =
| ESuccess : ge:genv -> a:assertions -> export_result
| EFailure : err:string -> export_result
let result_to_printout (prefix:string) (res:export_result) :
Tac string =
let str = prefix ^ ":BEGIN\n" in
(* Note that the emacs commands will always look for fields for the error message
* and the pre/post assertions, so we need to generate them, even though they
* might be empty. *)
let err, ge, pres, posts =
match res with
| ESuccess ge a -> None, ge, a.pres, a.posts
| EFailure err ->
let ge = mk_init_genv (top_env ()) in (* dummy environment - will not be used *)
Some err, ge, [], []
in
(* Error message *)
let str = str ^ error_message_to_printout prefix err in
(* Assertions *)
let str = str ^ propositions_to_printout ge (prefix ^ ":pres") pres in
let str = str ^ propositions_to_printout ge (prefix ^ ":posts") posts in
str ^ prefix ^ ":END\n" ^ "%FIH:FSTAR_META:END%"
let printout_result (prefix:string) (res:export_result) :
Tac unit =
print (result_to_printout prefix res)
/// The function to use to export the results in case of success
let printout_success (ge:genv) (a:assertions) : Tac unit =
printout_result "ainfo" (ESuccess ge a)
/// The function to use to communicate failure in case of error
let printout_failure (err : string) : Tac unit =
printout_result "ainfo" (EFailure err)
let _debug_print_var (name : string) (t : term) : Tac unit =
print ("_debug_print_var: " ^ name ^ ": " ^ term_to_string t);
begin match safe_tc (top_env ()) t with
| Some ty -> print ("type: " ^ term_to_string ty)
| _ -> ()
end;
print ("qualifier: " ^ term_construct t);
begin match inspect t with
| Tv_Var bv ->
let b : bv_view = inspect_bv bv in
print ("Tv_Var: ppname: " ^ name_of_bv bv ^
"; index: " ^ (string_of_int b.bv_index))
| _ -> ()
end;
print "end of _debug_print_var"
/// We use the following to solve goals requiring a unification variable (for
/// which we might not have a candidate, or for which the candidate may not
/// typecheck correctly). We can't use the tactic ``tadmit`` for the simple
/// reason that it generates a warning which may mess up with the subsequent
/// parsing of the data generated by the tactics.
// TODO: actually, there already exists Prims.magic
assume val magic_witness (#a : Type) : a
let tadmit_no_warning () : Tac unit =
apply (`magic_witness) | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val pp_tac: Prims.unit -> Tac unit | [] | FStar.InteractiveHelpers.Output.pp_tac | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | _: Prims.unit -> FStar.Tactics.Effect.Tac Prims.unit | {
"end_col": 9,
"end_line": 186,
"start_col": 2,
"start_line": 184
} |
FStar.Tactics.Effect.Tac | val _debug_print_var (name: string) (t: term) : Tac unit | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let _debug_print_var (name : string) (t : term) : Tac unit =
print ("_debug_print_var: " ^ name ^ ": " ^ term_to_string t);
begin match safe_tc (top_env ()) t with
| Some ty -> print ("type: " ^ term_to_string ty)
| _ -> ()
end;
print ("qualifier: " ^ term_construct t);
begin match inspect t with
| Tv_Var bv ->
let b : bv_view = inspect_bv bv in
print ("Tv_Var: ppname: " ^ name_of_bv bv ^
"; index: " ^ (string_of_int b.bv_index))
| _ -> ()
end;
print "end of _debug_print_var" | val _debug_print_var (name: string) (t: term) : Tac unit
let _debug_print_var (name: string) (t: term) : Tac unit = | true | null | false | print ("_debug_print_var: " ^ name ^ ": " ^ term_to_string t);
(match safe_tc (top_env ()) t with
| Some ty -> print ("type: " ^ term_to_string ty)
| _ -> ());
print ("qualifier: " ^ term_construct t);
(match inspect t with
| Tv_Var bv ->
let b:bv_view = inspect_bv bv in
print ("Tv_Var: ppname: " ^ name_of_bv bv ^ "; index: " ^ (string_of_int b.bv_index))
| _ -> ());
print "end of _debug_print_var" | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"Prims.string",
"FStar.Reflection.Types.term",
"FStar.Tactics.V1.Builtins.print",
"Prims.unit",
"FStar.Reflection.Types.bv",
"Prims.op_Hat",
"Prims.string_of_int",
"FStar.Reflection.V1.Data.__proj__Mkbv_view__item__bv_index",
"FStar.Tactics.V1.Derived.name_of_bv",
"FStar.Reflection.V1.Data.bv_view",
"FStar.Reflection.V1.Builtins.inspect_bv",
"FStar.Reflection.V1.Data.term_view",
"FStar.Tactics.V1.Builtins.inspect",
"FStar.InteractiveHelpers.Base.term_construct",
"FStar.Tactics.V1.Builtins.term_to_string",
"FStar.Pervasives.Native.option",
"FStar.InteractiveHelpers.ExploreTerm.safe_tc",
"FStar.Reflection.Types.env",
"FStar.Tactics.V1.Builtins.top_env"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t)
let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix ""
let proposition_to_printout (ge:genv) (prefix:string) (p:proposition) : Tac string =
term_to_printout ge prefix p
let propositions_to_printout (ge:genv) (prefix:string) (pl:list proposition) : Tac string =
let prop_to_printout i p =
let prefix' = prefix ^ ":prop" ^ string_of_int i in
proposition_to_printout ge prefix' p
in
let str = string_to_printout (prefix ^ ":num") (string_of_int (List.Tot.length pl)) in
let concat_prop s_i p : Tac (string & int) =
let s, i = s_i in
s ^ prop_to_printout i p, i+1
in
let str, _ = fold_left concat_prop (str,0) pl in
str
let error_message_to_printout (prefix : string) (message : option string) : Tot string =
let msg = match message with | Some msg -> msg | _ -> "" in
string_to_printout (prefix ^ ":error") msg
/// Utility type and function to communicate the results to emacs.
noeq type export_result =
| ESuccess : ge:genv -> a:assertions -> export_result
| EFailure : err:string -> export_result
let result_to_printout (prefix:string) (res:export_result) :
Tac string =
let str = prefix ^ ":BEGIN\n" in
(* Note that the emacs commands will always look for fields for the error message
* and the pre/post assertions, so we need to generate them, even though they
* might be empty. *)
let err, ge, pres, posts =
match res with
| ESuccess ge a -> None, ge, a.pres, a.posts
| EFailure err ->
let ge = mk_init_genv (top_env ()) in (* dummy environment - will not be used *)
Some err, ge, [], []
in
(* Error message *)
let str = str ^ error_message_to_printout prefix err in
(* Assertions *)
let str = str ^ propositions_to_printout ge (prefix ^ ":pres") pres in
let str = str ^ propositions_to_printout ge (prefix ^ ":posts") posts in
str ^ prefix ^ ":END\n" ^ "%FIH:FSTAR_META:END%"
let printout_result (prefix:string) (res:export_result) :
Tac unit =
print (result_to_printout prefix res)
/// The function to use to export the results in case of success
let printout_success (ge:genv) (a:assertions) : Tac unit =
printout_result "ainfo" (ESuccess ge a)
/// The function to use to communicate failure in case of error
let printout_failure (err : string) : Tac unit =
printout_result "ainfo" (EFailure err) | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val _debug_print_var (name: string) (t: term) : Tac unit | [] | FStar.InteractiveHelpers.Output._debug_print_var | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | name: Prims.string -> t: FStar.Reflection.Types.term -> FStar.Tactics.Effect.Tac Prims.unit | {
"end_col": 33,
"end_line": 170,
"start_col": 2,
"start_line": 157
} |
FStar.Tactics.Effect.Tac | val opt_term_to_printout (ge: genv) (prefix: string) (t: option term) : Tac string | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix "" | val opt_term_to_printout (ge: genv) (prefix: string) (t: option term) : Tac string
let opt_term_to_printout (ge: genv) (prefix: string) (t: option term) : Tac string = | true | null | false | match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix "" | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"FStar.InteractiveHelpers.Base.genv",
"Prims.string",
"FStar.Pervasives.Native.option",
"FStar.Reflection.Types.term",
"FStar.InteractiveHelpers.Output.term_to_printout",
"FStar.InteractiveHelpers.Output.string_to_printout"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t) | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val opt_term_to_printout (ge: genv) (prefix: string) (t: option term) : Tac string | [] | FStar.InteractiveHelpers.Output.opt_term_to_printout | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
ge: FStar.InteractiveHelpers.Base.genv ->
prefix: Prims.string ->
t: FStar.Pervasives.Native.option FStar.Reflection.Types.term
-> FStar.Tactics.Effect.Tac Prims.string | {
"end_col": 40,
"end_line": 97,
"start_col": 2,
"start_line": 95
} |
FStar.Tactics.Effect.Tac | val result_to_printout (prefix: string) (res: export_result) : Tac string | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let result_to_printout (prefix:string) (res:export_result) :
Tac string =
let str = prefix ^ ":BEGIN\n" in
(* Note that the emacs commands will always look for fields for the error message
* and the pre/post assertions, so we need to generate them, even though they
* might be empty. *)
let err, ge, pres, posts =
match res with
| ESuccess ge a -> None, ge, a.pres, a.posts
| EFailure err ->
let ge = mk_init_genv (top_env ()) in (* dummy environment - will not be used *)
Some err, ge, [], []
in
(* Error message *)
let str = str ^ error_message_to_printout prefix err in
(* Assertions *)
let str = str ^ propositions_to_printout ge (prefix ^ ":pres") pres in
let str = str ^ propositions_to_printout ge (prefix ^ ":posts") posts in
str ^ prefix ^ ":END\n" ^ "%FIH:FSTAR_META:END%" | val result_to_printout (prefix: string) (res: export_result) : Tac string
let result_to_printout (prefix: string) (res: export_result) : Tac string = | true | null | false | let str = prefix ^ ":BEGIN\n" in
let err, ge, pres, posts =
match res with
| ESuccess ge a -> None, ge, a.pres, a.posts
| EFailure err ->
let ge = mk_init_genv (top_env ()) in
Some err, ge, [], []
in
let str = str ^ error_message_to_printout prefix err in
let str = str ^ propositions_to_printout ge (prefix ^ ":pres") pres in
let str = str ^ propositions_to_printout ge (prefix ^ ":posts") posts in
str ^ prefix ^ ":END\n" ^ "%FIH:FSTAR_META:END%" | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"Prims.string",
"FStar.InteractiveHelpers.Output.export_result",
"FStar.Pervasives.Native.option",
"FStar.InteractiveHelpers.Base.genv",
"Prims.list",
"FStar.InteractiveHelpers.Propositions.proposition",
"Prims.op_Hat",
"FStar.InteractiveHelpers.Output.propositions_to_printout",
"FStar.InteractiveHelpers.Output.error_message_to_printout",
"FStar.Pervasives.Native.tuple4",
"FStar.InteractiveHelpers.Propositions.assertions",
"FStar.Pervasives.Native.Mktuple4",
"FStar.Pervasives.Native.None",
"FStar.InteractiveHelpers.Propositions.__proj__Mkassertions__item__pres",
"FStar.InteractiveHelpers.Propositions.__proj__Mkassertions__item__posts",
"FStar.Pervasives.Native.Some",
"Prims.Nil",
"FStar.InteractiveHelpers.Base.mk_init_genv",
"FStar.Reflection.Types.env",
"FStar.Tactics.V1.Builtins.top_env"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts
(*** Convert propositions to string *)
/// Originally: we output the ``eterm_info`` and let the emacs commands do some
/// filtering and formatting. Now, we convert ``eterm_info`` to a ``assertions``.
/// Note that we also convert all the information to a string that we export at
/// once in order for the output not to be polluted by any other messages
/// (warning messages from F*, for example).
let string_to_printout (prefix data:string) : Tot string =
prefix ^ ":\n" ^ data ^ "\n"
let term_to_printout (ge:genv) (prefix:string) (t:term) : Tac string =
(* We need to look for abstract variables and abstract them away *)
let abs = abs_free_in ge t in
let abs_binders = List.Tot.map (fun (bv, t) -> mk_binder bv t) abs in
let abs_terms = map (fun (bv, _) -> pack (Tv_Var bv)) abs in
let t = mk_abs abs_binders t in
let t = mk_e_app t abs_terms in
string_to_printout prefix (term_to_string t)
let opt_term_to_printout (ge:genv) (prefix:string) (t:option term) : Tac string =
match t with
| Some t' -> term_to_printout ge prefix t'
| None -> string_to_printout prefix ""
let proposition_to_printout (ge:genv) (prefix:string) (p:proposition) : Tac string =
term_to_printout ge prefix p
let propositions_to_printout (ge:genv) (prefix:string) (pl:list proposition) : Tac string =
let prop_to_printout i p =
let prefix' = prefix ^ ":prop" ^ string_of_int i in
proposition_to_printout ge prefix' p
in
let str = string_to_printout (prefix ^ ":num") (string_of_int (List.Tot.length pl)) in
let concat_prop s_i p : Tac (string & int) =
let s, i = s_i in
s ^ prop_to_printout i p, i+1
in
let str, _ = fold_left concat_prop (str,0) pl in
str
let error_message_to_printout (prefix : string) (message : option string) : Tot string =
let msg = match message with | Some msg -> msg | _ -> "" in
string_to_printout (prefix ^ ":error") msg
/// Utility type and function to communicate the results to emacs.
noeq type export_result =
| ESuccess : ge:genv -> a:assertions -> export_result
| EFailure : err:string -> export_result | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val result_to_printout (prefix: string) (res: export_result) : Tac string | [] | FStar.InteractiveHelpers.Output.result_to_printout | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | prefix: Prims.string -> res: FStar.InteractiveHelpers.Output.export_result
-> FStar.Tactics.Effect.Tac Prims.string | {
"end_col": 50,
"end_line": 142,
"start_col": 14,
"start_line": 125
} |
FStar.Tactics.Effect.Tac | val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions) | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the
* pre-assertions). *)
print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
(* Generate the substitution *)
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
(* The current substitution is valid for the post-assertions: derive from it
* a substitution valid for the pre-assertions (just cut it where the bv
* shadowed by the return value appears). Note that because we might introduce
* dummy variables for the return value, it is not valid just to ignore
* the last substitution pair. *)
let pre_subst =
if Some? shadowed_bv then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) =
"(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n"
in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg then
begin
print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst)
end;
(* Apply *)
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts | val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es = | true | null | false | print_dbg dbg ("subst_shadowed_with_abs_in_assertions:\n" ^ genv_to_string ge);
let ge1, subst = generate_shadowed_subst ge in
let post_subst = map (fun (src, ty, tgt) -> (src, ty), pack (Tv_Var tgt)) subst in
let pre_subst =
if Some? shadowed_bv
then fst (_split_subst_at_bv (Some?.v shadowed_bv) post_subst)
else post_subst
in
let subst_to_string subst : Tac string =
let to_string ((x, ty), y) = "(" ^ abv_to_string x ^ " -> " ^ term_to_string y ^ ")\n" in
let str = map to_string subst in
List.Tot.fold_left (fun x y -> x ^ y) "" str
in
if dbg
then
(print_dbg dbg ("- pre_subst:\n" ^ subst_to_string pre_subst);
print_dbg dbg ("- post_subst:\n" ^ subst_to_string post_subst));
let apply = (fun s -> map (fun t -> apply_subst ge1.env t s)) in
let pres = apply pre_subst es.pres in
let posts = apply post_subst es.posts in
ge1, mk_assertions pres posts | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [] | [
"Prims.bool",
"FStar.InteractiveHelpers.Base.genv",
"FStar.Pervasives.Native.option",
"FStar.Reflection.Types.bv",
"FStar.InteractiveHelpers.Propositions.assertions",
"Prims.list",
"FStar.Pervasives.Native.tuple3",
"FStar.Reflection.Types.typ",
"FStar.Pervasives.Native.Mktuple2",
"FStar.InteractiveHelpers.Propositions.mk_assertions",
"FStar.Pervasives.Native.tuple2",
"FStar.Reflection.Types.term",
"FStar.InteractiveHelpers.Propositions.__proj__Mkassertions__item__posts",
"FStar.InteractiveHelpers.Propositions.__proj__Mkassertions__item__pres",
"FStar.Tactics.Util.map",
"FStar.InteractiveHelpers.Base.apply_subst",
"FStar.InteractiveHelpers.Base.__proj__Mkgenv__item__env",
"Prims.unit",
"FStar.InteractiveHelpers.Base.print_dbg",
"Prims.string",
"Prims.op_Hat",
"FStar.List.Tot.Base.fold_left",
"FStar.Tactics.V1.Builtins.term_to_string",
"FStar.InteractiveHelpers.Base.abv_to_string",
"FStar.Pervasives.Native.uu___is_Some",
"FStar.Pervasives.Native.fst",
"FStar.InteractiveHelpers.Output._split_subst_at_bv",
"FStar.Pervasives.Native.__proj__Some__item__v",
"FStar.Tactics.V1.Builtins.pack",
"FStar.Reflection.V1.Data.Tv_Var",
"FStar.InteractiveHelpers.Base.generate_shadowed_subst",
"FStar.InteractiveHelpers.Base.genv_to_string"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2
val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions)
let subst_shadowed_with_abs_in_assertions dbg ge shadowed_bv es =
(* When generating the substitution, we need to pay attention to the fact that
* the returned value potentially bound by a let may shadow another variable.
* We need to take this into account for the post-assertions (but not the | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val subst_shadowed_with_abs_in_assertions : bool -> genv -> option bv -> assertions -> Tac (genv & assertions) | [] | FStar.InteractiveHelpers.Output.subst_shadowed_with_abs_in_assertions | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} |
dbg: Prims.bool ->
ge: FStar.InteractiveHelpers.Base.genv ->
shadowed_bv: FStar.Pervasives.Native.option FStar.Reflection.Types.bv ->
es: FStar.InteractiveHelpers.Propositions.assertions
-> FStar.Tactics.Effect.Tac
(FStar.InteractiveHelpers.Base.genv * FStar.InteractiveHelpers.Propositions.assertions) | {
"end_col": 31,
"end_line": 73,
"start_col": 2,
"start_line": 44
} |
Prims.Tot | val _split_subst_at_bv (#a #b: Type) (x: bv) (subst: list ((bv & a) & b))
: Tot (list ((bv & a) & b) & list ((bv & a) & b)) (decreases subst) | [
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Propositions",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.ExploreTerm",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers.Base",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Tactics",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.List",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.InteractiveHelpers",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b))
(decreases subst) =
match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src then
[], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2 | val _split_subst_at_bv (#a #b: Type) (x: bv) (subst: list ((bv & a) & b))
: Tot (list ((bv & a) & b) & list ((bv & a) & b)) (decreases subst)
let rec _split_subst_at_bv (#a #b: Type) (x: bv) (subst: list ((bv & a) & b))
: Tot (list ((bv & a) & b) & list ((bv & a) & b)) (decreases subst) = | false | null | false | match subst with
| [] -> [], []
| ((src, ty), tgt) :: subst' ->
if bv_eq x src
then [], subst'
else
let s1, s2 = _split_subst_at_bv x subst' in
((src, ty), tgt) :: s1, s2 | {
"checked_file": "FStar.InteractiveHelpers.Output.fst.checked",
"dependencies": [
"prims.fst.checked",
"FStar.Tactics.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.List.Tot.fst.checked",
"FStar.List.fst.checked",
"FStar.InteractiveHelpers.Propositions.fst.checked",
"FStar.InteractiveHelpers.ExploreTerm.fst.checked",
"FStar.InteractiveHelpers.Base.fst.checked"
],
"interface_file": false,
"source_file": "FStar.InteractiveHelpers.Output.fst"
} | [
"total",
""
] | [
"FStar.Reflection.Types.bv",
"Prims.list",
"FStar.Pervasives.Native.tuple2",
"FStar.Pervasives.Native.Mktuple2",
"Prims.Nil",
"FStar.InteractiveHelpers.Base.bv_eq",
"Prims.bool",
"Prims.Cons",
"FStar.InteractiveHelpers.Output._split_subst_at_bv"
] | [] | module FStar.InteractiveHelpers.Output
open FStar.List
open FStar.Tactics
open FStar.Mul
open FStar.InteractiveHelpers.Base
open FStar.InteractiveHelpers.ExploreTerm
open FStar.InteractiveHelpers.Propositions
/// Facilities to output results to the IDE/emacs/whatever.
/// Contains datatypes and functions to carry information.
#push-options "--z3rlimit 15 --fuel 0 --ifuel 1"
(*** Convert terms to string *)
/// The important point is to handle variable shadowing properly, so that the
/// generated term is meaningful in the user context, or at least that it is clear
/// to the user that some variables are shadowed.
/// Introduce fresh variables for the variables shadowed in the current environment
/// and substitute them in the terms. Note that as the binding of the value returned
/// by a function application might shadow one of its parameters, we need to treat
/// differently the pre-assertions and the post-assertions. Moreover, we need to
/// keep track of which variables are shadowed for every assertion.
let rec _split_subst_at_bv (#a #b : Type) (x : bv) (subst : list ((bv & a) & b)) :
Tot (list ((bv & a) & b) & list ((bv & a) & b)) | false | false | FStar.InteractiveHelpers.Output.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 1,
"max_fuel": 0,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": true,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 15,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val _split_subst_at_bv (#a #b: Type) (x: bv) (subst: list ((bv & a) & b))
: Tot (list ((bv & a) & b) & list ((bv & a) & b)) (decreases subst) | [
"recursion"
] | FStar.InteractiveHelpers.Output._split_subst_at_bv | {
"file_name": "ulib/experimental/FStar.InteractiveHelpers.Output.fst",
"git_rev": "f4cbb7a38d67eeb13fbdb2f4fb8a44a65cbcdc1f",
"git_url": "https://github.com/FStarLang/FStar.git",
"project_name": "FStar"
} | x: FStar.Reflection.Types.bv -> subst: Prims.list ((FStar.Reflection.Types.bv * a) * b)
-> Prims.Tot
(Prims.list ((FStar.Reflection.Types.bv * a) * b) *
Prims.list ((FStar.Reflection.Types.bv * a) * b)) | {
"end_col": 32,
"end_line": 36,
"start_col": 2,
"start_line": 29
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let size_block_w_256 = 16 | let size_block_w_256 = | false | null | false | 16 | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0 | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val size_block_w_256 : Prims.int | [] | Vale.SHA.SHA_helpers.size_block_w_256 | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Prims.int | {
"end_col": 25,
"end_line": 21,
"start_col": 23,
"start_line": 21
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let block_w = m:seq word {length m = size_block_w_256} | let block_w = | false | null | false | m: seq word {length m = size_block_w_256} | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"FStar.Seq.Base.seq",
"Vale.SHA.SHA_helpers.word",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"FStar.Seq.Base.length",
"Vale.SHA.SHA_helpers.size_block_w_256"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length = | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val block_w : Type0 | [] | Vale.SHA.SHA_helpers.block_w | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Type0 | {
"end_col": 55,
"end_line": 25,
"start_col": 15,
"start_line": 25
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let size_k_w_256 = 64 | let size_k_w_256 = | false | null | false | 64 | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0" | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val size_k_w_256 : Prims.int | [] | Vale.SHA.SHA_helpers.size_k_w_256 | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Prims.int | {
"end_col": 28,
"end_line": 18,
"start_col": 26,
"start_line": 18
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let block_length =
4 (*word_length a*) * size_block_w_256 | let block_length = | false | null | false | 4 * size_block_w_256 | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"FStar.Mul.op_Star",
"Vale.SHA.SHA_helpers.size_block_w_256"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *) | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val block_length : Prims.int | [] | Vale.SHA.SHA_helpers.block_length | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Prims.int | {
"end_col": 40,
"end_line": 24,
"start_col": 2,
"start_line": 24
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let counter = nat | let counter = | false | null | false | nat | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"Prims.nat"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256 | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val counter : Type0 | [] | Vale.SHA.SHA_helpers.counter | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Type0 | {
"end_col": 17,
"end_line": 26,
"start_col": 14,
"start_line": 26
} |
|
FStar.Pervasives.Lemma | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let ws_partial_reveal = opaque_revealer (`%ws_partial) ws_partial ws_partial_def | let ws_partial_reveal = | false | null | true | opaque_revealer (`%ws_partial) ws_partial ws_partial_def | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"lemma"
] | [
"Vale.Def.Opaque_s.opaque_revealer",
"Vale.SHA.SHA_helpers.counter",
"Vale.SHA.SHA_helpers.block_w",
"Vale.Def.Types_s.quad32",
"Vale.SHA.SHA_helpers.ws_partial",
"Vale.SHA.SHA_helpers.ws_partial_def"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash
let update_multi_opaque_vale (hash:hash256) (blocks:bytes) : hash256 =
if length blocks % size_k_w_256 = 0 then let b:bytes_blocks = blocks in update_multi_opaque hash b else hash
val make_hash (abef cdgh:quad32) : Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abef.hi3 /\
hash.[1] == nat32_to_word abef.hi2 /\
hash.[2] == nat32_to_word cdgh.hi3 /\
hash.[3] == nat32_to_word cdgh.hi2 /\
hash.[4] == nat32_to_word abef.lo1 /\
hash.[5] == nat32_to_word abef.lo0 /\
hash.[6] == nat32_to_word cdgh.lo1 /\
hash.[7] == nat32_to_word cdgh.lo0
)
val make_ordered_hash (abcd efgh:quad32): Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abcd.lo0 /\
hash.[1] == nat32_to_word abcd.lo1 /\
hash.[2] == nat32_to_word abcd.hi2 /\
hash.[3] == nat32_to_word abcd.hi3 /\
hash.[4] == nat32_to_word efgh.lo0 /\
hash.[5] == nat32_to_word efgh.lo1 /\
hash.[6] == nat32_to_word efgh.hi2 /\
hash.[7] == nat32_to_word efgh.hi3
)
// Top-level proof for the SHA256_rnds2 instruction
val lemma_sha256_rnds2 (abef cdgh xmm0:quad32) (t:counter) (block:block_w) (hash_in:hash256) : Lemma
(requires t + 1 < size_k_w_256 /\
xmm0.lo0 == add_wrap (word_to_nat32 k.[t]) (ws_opaque block t) /\
xmm0.lo1 == add_wrap (word_to_nat32 k.[t+1]) (ws_opaque block (t+1)) /\
make_hash abef cdgh == Spec.Loops.repeat_range 0 t (shuffle_core_opaque block) hash_in
)
(ensures make_hash (sha256_rnds2_spec cdgh abef xmm0) abef ==
Spec.Loops.repeat_range 0 (t+2) (shuffle_core_opaque block) hash_in)
(* Proof work for the SHA256_msg* instructions *)
let ws_quad32 (t:counter) (block:block_w) : quad32 =
if t < size_k_w_256 - 3 then
Mkfour (ws_opaque block t)
(ws_opaque block (t+1))
(ws_opaque block (t+2))
(ws_opaque block (t+3))
else
Mkfour 0 0 0 0
val ws_partial_def (t:counter) (block:block_w) : quad32 | false | false | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val ws_partial_reveal : _: Prims.unit
-> FStar.Pervasives.Lemma
(ensures Vale.SHA.SHA_helpers.ws_partial == Vale.SHA.SHA_helpers.ws_partial_def) | [] | Vale.SHA.SHA_helpers.ws_partial_reveal | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | _: Prims.unit
-> FStar.Pervasives.Lemma
(ensures Vale.SHA.SHA_helpers.ws_partial == Vale.SHA.SHA_helpers.ws_partial_def) | {
"end_col": 92,
"end_line": 114,
"start_col": 36,
"start_line": 114
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let hash256 = m:Seq.seq word {Seq.length m = 8} | let hash256 = | false | null | false | m: Seq.seq word {Seq.length m = 8} | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"FStar.Seq.Base.seq",
"Vale.SHA.SHA_helpers.word",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"FStar.Seq.Base.length"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val hash256 : Type0 | [] | Vale.SHA.SHA_helpers.hash256 | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Type0 | {
"end_col": 47,
"end_line": 28,
"start_col": 14,
"start_line": 28
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let ws_partial = opaque_make ws_partial_def | let ws_partial = | false | null | false | opaque_make ws_partial_def | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"Vale.Def.Opaque_s.opaque_make",
"Vale.SHA.SHA_helpers.counter",
"Vale.SHA.SHA_helpers.block_w",
"Vale.Def.Types_s.quad32",
"Vale.SHA.SHA_helpers.ws_partial_def"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash
let update_multi_opaque_vale (hash:hash256) (blocks:bytes) : hash256 =
if length blocks % size_k_w_256 = 0 then let b:bytes_blocks = blocks in update_multi_opaque hash b else hash
val make_hash (abef cdgh:quad32) : Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abef.hi3 /\
hash.[1] == nat32_to_word abef.hi2 /\
hash.[2] == nat32_to_word cdgh.hi3 /\
hash.[3] == nat32_to_word cdgh.hi2 /\
hash.[4] == nat32_to_word abef.lo1 /\
hash.[5] == nat32_to_word abef.lo0 /\
hash.[6] == nat32_to_word cdgh.lo1 /\
hash.[7] == nat32_to_word cdgh.lo0
)
val make_ordered_hash (abcd efgh:quad32): Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abcd.lo0 /\
hash.[1] == nat32_to_word abcd.lo1 /\
hash.[2] == nat32_to_word abcd.hi2 /\
hash.[3] == nat32_to_word abcd.hi3 /\
hash.[4] == nat32_to_word efgh.lo0 /\
hash.[5] == nat32_to_word efgh.lo1 /\
hash.[6] == nat32_to_word efgh.hi2 /\
hash.[7] == nat32_to_word efgh.hi3
)
// Top-level proof for the SHA256_rnds2 instruction
val lemma_sha256_rnds2 (abef cdgh xmm0:quad32) (t:counter) (block:block_w) (hash_in:hash256) : Lemma
(requires t + 1 < size_k_w_256 /\
xmm0.lo0 == add_wrap (word_to_nat32 k.[t]) (ws_opaque block t) /\
xmm0.lo1 == add_wrap (word_to_nat32 k.[t+1]) (ws_opaque block (t+1)) /\
make_hash abef cdgh == Spec.Loops.repeat_range 0 t (shuffle_core_opaque block) hash_in
)
(ensures make_hash (sha256_rnds2_spec cdgh abef xmm0) abef ==
Spec.Loops.repeat_range 0 (t+2) (shuffle_core_opaque block) hash_in)
(* Proof work for the SHA256_msg* instructions *)
let ws_quad32 (t:counter) (block:block_w) : quad32 =
if t < size_k_w_256 - 3 then
Mkfour (ws_opaque block t)
(ws_opaque block (t+1))
(ws_opaque block (t+2))
(ws_opaque block (t+3))
else
Mkfour 0 0 0 0 | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val ws_partial : _: Vale.SHA.SHA_helpers.counter -> _: Vale.SHA.SHA_helpers.block_w -> Vale.Def.Types_s.quad32 | [] | Vale.SHA.SHA_helpers.ws_partial | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | _: Vale.SHA.SHA_helpers.counter -> _: Vale.SHA.SHA_helpers.block_w -> Vale.Def.Types_s.quad32 | {
"end_col": 62,
"end_line": 113,
"start_col": 36,
"start_line": 113
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 } | let bytes_blocks = | false | null | false | l: bytes{Seq.length l % block_length = 0} | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"Vale.SHA.SHA_helpers.bytes",
"Prims.b2t",
"Prims.op_Equality",
"Prims.int",
"Prims.op_Modulus",
"FStar.Seq.Base.length",
"Vale.SHA.SHA_helpers.byte",
"Vale.SHA.SHA_helpers.block_length"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *) | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val bytes_blocks : Type0 | [] | Vale.SHA.SHA_helpers.bytes_blocks | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Type0 | {
"end_col": 45,
"end_line": 38,
"start_col": 2,
"start_line": 38
} |
|
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash | let repeat_range_vale (max: nat{max < size_k_w_256}) (block: block_w) (hash: hash256) = | false | null | false | Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"Vale.SHA.SHA_helpers.size_k_w_256",
"Vale.SHA.SHA_helpers.block_w",
"Vale.SHA.SHA_helpers.hash256",
"Spec.Loops.repeat_range",
"Vale.SHA.SHA_helpers.shuffle_core_opaque"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256 | false | false | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val repeat_range_vale : max: Prims.nat{max < Vale.SHA.SHA_helpers.size_k_w_256} ->
block: Vale.SHA.SHA_helpers.block_w ->
hash: Vale.SHA.SHA_helpers.hash256
-> Vale.SHA.SHA_helpers.hash256 | [] | Vale.SHA.SHA_helpers.repeat_range_vale | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
max: Prims.nat{max < Vale.SHA.SHA_helpers.size_k_w_256} ->
block: Vale.SHA.SHA_helpers.block_w ->
hash: Vale.SHA.SHA_helpers.hash256
-> Vale.SHA.SHA_helpers.hash256 | {
"end_col": 64,
"end_line": 56,
"start_col": 2,
"start_line": 56
} |
|
Prims.Tot | val update_multi_opaque_vale (hash: hash256) (blocks: bytes) : hash256 | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let update_multi_opaque_vale (hash:hash256) (blocks:bytes) : hash256 =
if length blocks % size_k_w_256 = 0 then let b:bytes_blocks = blocks in update_multi_opaque hash b else hash | val update_multi_opaque_vale (hash: hash256) (blocks: bytes) : hash256
let update_multi_opaque_vale (hash: hash256) (blocks: bytes) : hash256 = | false | null | false | if length blocks % size_k_w_256 = 0
then
let b:bytes_blocks = blocks in
update_multi_opaque hash b
else hash | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"Vale.SHA.SHA_helpers.hash256",
"Vale.SHA.SHA_helpers.bytes",
"Prims.op_Equality",
"Prims.int",
"Prims.op_Modulus",
"FStar.Seq.Base.length",
"Vale.SHA.SHA_helpers.byte",
"Vale.SHA.SHA_helpers.size_k_w_256",
"Vale.SHA.SHA_helpers.update_multi_opaque",
"Vale.SHA.SHA_helpers.bytes_blocks",
"Prims.bool"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_multi_opaque_vale (hash: hash256) (blocks: bytes) : hash256 | [] | Vale.SHA.SHA_helpers.update_multi_opaque_vale | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | hash: Vale.SHA.SHA_helpers.hash256 -> blocks: Vale.SHA.SHA_helpers.bytes
-> Vale.SHA.SHA_helpers.hash256 | {
"end_col": 110,
"end_line": 61,
"start_col": 2,
"start_line": 61
} |
Prims.Tot | val ws_quad32 (t: counter) (block: block_w) : quad32 | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let ws_quad32 (t:counter) (block:block_w) : quad32 =
if t < size_k_w_256 - 3 then
Mkfour (ws_opaque block t)
(ws_opaque block (t+1))
(ws_opaque block (t+2))
(ws_opaque block (t+3))
else
Mkfour 0 0 0 0 | val ws_quad32 (t: counter) (block: block_w) : quad32
let ws_quad32 (t: counter) (block: block_w) : quad32 = | false | null | false | if t < size_k_w_256 - 3
then
Mkfour (ws_opaque block t)
(ws_opaque block (t + 1))
(ws_opaque block (t + 2))
(ws_opaque block (t + 3))
else Mkfour 0 0 0 0 | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"Vale.SHA.SHA_helpers.counter",
"Vale.SHA.SHA_helpers.block_w",
"Prims.op_LessThan",
"Prims.op_Subtraction",
"Vale.SHA.SHA_helpers.size_k_w_256",
"Vale.Def.Words_s.Mkfour",
"Vale.Def.Types_s.nat32",
"Vale.SHA.SHA_helpers.ws_opaque",
"Prims.op_Addition",
"Prims.bool",
"Vale.Def.Types_s.quad32"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash
let update_multi_opaque_vale (hash:hash256) (blocks:bytes) : hash256 =
if length blocks % size_k_w_256 = 0 then let b:bytes_blocks = blocks in update_multi_opaque hash b else hash
val make_hash (abef cdgh:quad32) : Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abef.hi3 /\
hash.[1] == nat32_to_word abef.hi2 /\
hash.[2] == nat32_to_word cdgh.hi3 /\
hash.[3] == nat32_to_word cdgh.hi2 /\
hash.[4] == nat32_to_word abef.lo1 /\
hash.[5] == nat32_to_word abef.lo0 /\
hash.[6] == nat32_to_word cdgh.lo1 /\
hash.[7] == nat32_to_word cdgh.lo0
)
val make_ordered_hash (abcd efgh:quad32): Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abcd.lo0 /\
hash.[1] == nat32_to_word abcd.lo1 /\
hash.[2] == nat32_to_word abcd.hi2 /\
hash.[3] == nat32_to_word abcd.hi3 /\
hash.[4] == nat32_to_word efgh.lo0 /\
hash.[5] == nat32_to_word efgh.lo1 /\
hash.[6] == nat32_to_word efgh.hi2 /\
hash.[7] == nat32_to_word efgh.hi3
)
// Top-level proof for the SHA256_rnds2 instruction
val lemma_sha256_rnds2 (abef cdgh xmm0:quad32) (t:counter) (block:block_w) (hash_in:hash256) : Lemma
(requires t + 1 < size_k_w_256 /\
xmm0.lo0 == add_wrap (word_to_nat32 k.[t]) (ws_opaque block t) /\
xmm0.lo1 == add_wrap (word_to_nat32 k.[t+1]) (ws_opaque block (t+1)) /\
make_hash abef cdgh == Spec.Loops.repeat_range 0 t (shuffle_core_opaque block) hash_in
)
(ensures make_hash (sha256_rnds2_spec cdgh abef xmm0) abef ==
Spec.Loops.repeat_range 0 (t+2) (shuffle_core_opaque block) hash_in)
(* Proof work for the SHA256_msg* instructions *) | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val ws_quad32 (t: counter) (block: block_w) : quad32 | [] | Vale.SHA.SHA_helpers.ws_quad32 | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | t: Vale.SHA.SHA_helpers.counter -> block: Vale.SHA.SHA_helpers.block_w -> Vale.Def.Types_s.quad32 | {
"end_col": 21,
"end_line": 110,
"start_col": 4,
"start_line": 104
} |
FStar.Pervasives.Lemma | val lemma_repeat_range_0_vale (block: block_w) (hash: hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash | val lemma_repeat_range_0_vale (block: block_w) (hash: hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash)
let lemma_repeat_range_0_vale (block: block_w) (hash: hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) = | false | null | true | Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"lemma"
] | [
"Vale.SHA.SHA_helpers.block_w",
"Vale.SHA.SHA_helpers.hash256",
"Spec.Loops.repeat_range_base",
"Vale.SHA.SHA_helpers.shuffle_core_opaque",
"Prims.unit",
"Prims.l_True",
"Prims.squash",
"Prims.eq2",
"Spec.Loops.repeat_range",
"Prims.Nil",
"FStar.Pervasives.pattern"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256) | false | false | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val lemma_repeat_range_0_vale (block: block_w) (hash: hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) | [] | Vale.SHA.SHA_helpers.lemma_repeat_range_0_vale | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | block: Vale.SHA.SHA_helpers.block_w -> hash: Vale.SHA.SHA_helpers.hash256
-> FStar.Pervasives.Lemma
(ensures
Spec.Loops.repeat_range 0 0 (Vale.SHA.SHA_helpers.shuffle_core_opaque block) hash == hash) | {
"end_col": 65,
"end_line": 59,
"start_col": 2,
"start_line": 59
} |
Prims.Tot | val quads_to_block (qs: seq quad32) : block_w | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let quads_to_block (qs:seq quad32) : block_w
=
let nat32_seq = Vale.Def.Words.Seq_s.seq_four_to_seq_LE qs in
let f (n:nat{n < 16}) : word = nat32_to_word (if n < length nat32_seq then nat32_seq.[n] else 0) in
init 16 f | val quads_to_block (qs: seq quad32) : block_w
let quads_to_block (qs: seq quad32) : block_w = | false | null | false | let nat32_seq = Vale.Def.Words.Seq_s.seq_four_to_seq_LE qs in
let f (n: nat{n < 16}) : word =
nat32_to_word (if n < length nat32_seq then nat32_seq.[ n ] else 0)
in
init 16 f | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"FStar.Seq.Base.seq",
"Vale.Def.Types_s.quad32",
"FStar.Seq.Base.init",
"Vale.SHA.SHA_helpers.word",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"Vale.SHA.SHA_helpers.nat32_to_word",
"FStar.Seq.Base.length",
"Vale.Def.Types_s.nat32",
"Vale.SHA.SHA_helpers.op_String_Access",
"Prims.bool",
"Vale.Def.Words_s.nat32",
"Prims.eq2",
"Prims.int",
"Prims.op_Multiply",
"Vale.Def.Words_s.four",
"Vale.Def.Words.Seq_s.seq_four_to_seq_LE",
"Vale.SHA.SHA_helpers.block_w"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash
let update_multi_opaque_vale (hash:hash256) (blocks:bytes) : hash256 =
if length blocks % size_k_w_256 = 0 then let b:bytes_blocks = blocks in update_multi_opaque hash b else hash
val make_hash (abef cdgh:quad32) : Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abef.hi3 /\
hash.[1] == nat32_to_word abef.hi2 /\
hash.[2] == nat32_to_word cdgh.hi3 /\
hash.[3] == nat32_to_word cdgh.hi2 /\
hash.[4] == nat32_to_word abef.lo1 /\
hash.[5] == nat32_to_word abef.lo0 /\
hash.[6] == nat32_to_word cdgh.lo1 /\
hash.[7] == nat32_to_word cdgh.lo0
)
val make_ordered_hash (abcd efgh:quad32): Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abcd.lo0 /\
hash.[1] == nat32_to_word abcd.lo1 /\
hash.[2] == nat32_to_word abcd.hi2 /\
hash.[3] == nat32_to_word abcd.hi3 /\
hash.[4] == nat32_to_word efgh.lo0 /\
hash.[5] == nat32_to_word efgh.lo1 /\
hash.[6] == nat32_to_word efgh.hi2 /\
hash.[7] == nat32_to_word efgh.hi3
)
// Top-level proof for the SHA256_rnds2 instruction
val lemma_sha256_rnds2 (abef cdgh xmm0:quad32) (t:counter) (block:block_w) (hash_in:hash256) : Lemma
(requires t + 1 < size_k_w_256 /\
xmm0.lo0 == add_wrap (word_to_nat32 k.[t]) (ws_opaque block t) /\
xmm0.lo1 == add_wrap (word_to_nat32 k.[t+1]) (ws_opaque block (t+1)) /\
make_hash abef cdgh == Spec.Loops.repeat_range 0 t (shuffle_core_opaque block) hash_in
)
(ensures make_hash (sha256_rnds2_spec cdgh abef xmm0) abef ==
Spec.Loops.repeat_range 0 (t+2) (shuffle_core_opaque block) hash_in)
(* Proof work for the SHA256_msg* instructions *)
let ws_quad32 (t:counter) (block:block_w) : quad32 =
if t < size_k_w_256 - 3 then
Mkfour (ws_opaque block t)
(ws_opaque block (t+1))
(ws_opaque block (t+2))
(ws_opaque block (t+3))
else
Mkfour 0 0 0 0
val ws_partial_def (t:counter) (block:block_w) : quad32
[@"opaque_to_smt"] let ws_partial = opaque_make ws_partial_def
irreducible let ws_partial_reveal = opaque_revealer (`%ws_partial) ws_partial ws_partial_def
// Top-level proof for the SHA256_msg1 instruction
val lemma_sha256_msg1 (dst src:quad32) (t:counter) (block:block_w) : Lemma
(requires 16 <= t /\ t < size_k_w_256 /\
dst == ws_quad32 (t-16) block /\
src.lo0 == ws_opaque block (t-12))
(ensures sha256_msg1_spec dst src == ws_partial t block)
// Top-level proof for the SHA256_msg2 instruction
val lemma_sha256_msg2 (src1 src2:quad32) (t:counter) (block:block_w) : Lemma
(requires 16 <= t /\ t < size_k_w_256 - 3 /\
(let step1 = ws_partial t block in
let t_minus_7 = ws_quad32 (t-7) block in
src1 == add_wrap_quad32 step1 t_minus_7 /\
src2.hi2 == ws_opaque block (t-2) /\
src2.hi3 == ws_opaque block (t-1)))
(ensures sha256_msg2_spec src1 src2 == ws_quad32 t block)
(* Abbreviations and lemmas for the code itself *)
let k_reqs (k_seq:seq quad32) : prop0 =
length k_seq == size_k_w_256 / 4 /\
(forall i . {:pattern (index k_seq i)} 0 <= i /\ i < (size_k_w_256/4) ==>
(k_seq.[i]).lo0 == word_to_nat32 (k.[4 * i]) /\
(k_seq.[i]).lo1 == word_to_nat32 (k.[4 * i + 1]) /\
(k_seq.[i]).hi2 == word_to_nat32 (k.[4 * i + 2]) /\
(k_seq.[i]).hi3 == word_to_nat32 (k.[4 * i + 3])) | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val quads_to_block (qs: seq quad32) : block_w | [] | Vale.SHA.SHA_helpers.quads_to_block | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | qs: FStar.Seq.Base.seq Vale.Def.Types_s.quad32 -> Vale.SHA.SHA_helpers.block_w | {
"end_col": 11,
"end_line": 148,
"start_col": 3,
"start_line": 145
} |
Prims.Tot | val update_multi_quads (s: seq quad32) (hash_orig: hash256) : Tot (hash256) (decreases (length s)) | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let rec update_multi_quads (s:seq quad32) (hash_orig:hash256) : Tot (hash256) (decreases (length s))
=
if length s < 4 then
hash_orig
else
let prefix, qs = split s (length s - 4) in
let h_prefix = update_multi_quads prefix hash_orig in
let hash = update_block h_prefix (quads_to_block qs) in
hash | val update_multi_quads (s: seq quad32) (hash_orig: hash256) : Tot (hash256) (decreases (length s))
let rec update_multi_quads (s: seq quad32) (hash_orig: hash256)
: Tot (hash256) (decreases (length s)) = | false | null | false | if length s < 4
then hash_orig
else
let prefix, qs = split s (length s - 4) in
let h_prefix = update_multi_quads prefix hash_orig in
let hash = update_block h_prefix (quads_to_block qs) in
hash | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total",
""
] | [
"FStar.Seq.Base.seq",
"Vale.Def.Types_s.quad32",
"Vale.SHA.SHA_helpers.hash256",
"Prims.op_LessThan",
"FStar.Seq.Base.length",
"Prims.bool",
"Vale.SHA.SHA_helpers.update_block",
"Vale.SHA.SHA_helpers.quads_to_block",
"Vale.SHA.SHA_helpers.update_multi_quads",
"FStar.Pervasives.Native.tuple2",
"FStar.Seq.Properties.split",
"Prims.op_Subtraction"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash
let update_multi_opaque_vale (hash:hash256) (blocks:bytes) : hash256 =
if length blocks % size_k_w_256 = 0 then let b:bytes_blocks = blocks in update_multi_opaque hash b else hash
val make_hash (abef cdgh:quad32) : Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abef.hi3 /\
hash.[1] == nat32_to_word abef.hi2 /\
hash.[2] == nat32_to_word cdgh.hi3 /\
hash.[3] == nat32_to_word cdgh.hi2 /\
hash.[4] == nat32_to_word abef.lo1 /\
hash.[5] == nat32_to_word abef.lo0 /\
hash.[6] == nat32_to_word cdgh.lo1 /\
hash.[7] == nat32_to_word cdgh.lo0
)
val make_ordered_hash (abcd efgh:quad32): Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abcd.lo0 /\
hash.[1] == nat32_to_word abcd.lo1 /\
hash.[2] == nat32_to_word abcd.hi2 /\
hash.[3] == nat32_to_word abcd.hi3 /\
hash.[4] == nat32_to_word efgh.lo0 /\
hash.[5] == nat32_to_word efgh.lo1 /\
hash.[6] == nat32_to_word efgh.hi2 /\
hash.[7] == nat32_to_word efgh.hi3
)
// Top-level proof for the SHA256_rnds2 instruction
val lemma_sha256_rnds2 (abef cdgh xmm0:quad32) (t:counter) (block:block_w) (hash_in:hash256) : Lemma
(requires t + 1 < size_k_w_256 /\
xmm0.lo0 == add_wrap (word_to_nat32 k.[t]) (ws_opaque block t) /\
xmm0.lo1 == add_wrap (word_to_nat32 k.[t+1]) (ws_opaque block (t+1)) /\
make_hash abef cdgh == Spec.Loops.repeat_range 0 t (shuffle_core_opaque block) hash_in
)
(ensures make_hash (sha256_rnds2_spec cdgh abef xmm0) abef ==
Spec.Loops.repeat_range 0 (t+2) (shuffle_core_opaque block) hash_in)
(* Proof work for the SHA256_msg* instructions *)
let ws_quad32 (t:counter) (block:block_w) : quad32 =
if t < size_k_w_256 - 3 then
Mkfour (ws_opaque block t)
(ws_opaque block (t+1))
(ws_opaque block (t+2))
(ws_opaque block (t+3))
else
Mkfour 0 0 0 0
val ws_partial_def (t:counter) (block:block_w) : quad32
[@"opaque_to_smt"] let ws_partial = opaque_make ws_partial_def
irreducible let ws_partial_reveal = opaque_revealer (`%ws_partial) ws_partial ws_partial_def
// Top-level proof for the SHA256_msg1 instruction
val lemma_sha256_msg1 (dst src:quad32) (t:counter) (block:block_w) : Lemma
(requires 16 <= t /\ t < size_k_w_256 /\
dst == ws_quad32 (t-16) block /\
src.lo0 == ws_opaque block (t-12))
(ensures sha256_msg1_spec dst src == ws_partial t block)
// Top-level proof for the SHA256_msg2 instruction
val lemma_sha256_msg2 (src1 src2:quad32) (t:counter) (block:block_w) : Lemma
(requires 16 <= t /\ t < size_k_w_256 - 3 /\
(let step1 = ws_partial t block in
let t_minus_7 = ws_quad32 (t-7) block in
src1 == add_wrap_quad32 step1 t_minus_7 /\
src2.hi2 == ws_opaque block (t-2) /\
src2.hi3 == ws_opaque block (t-1)))
(ensures sha256_msg2_spec src1 src2 == ws_quad32 t block)
(* Abbreviations and lemmas for the code itself *)
let k_reqs (k_seq:seq quad32) : prop0 =
length k_seq == size_k_w_256 / 4 /\
(forall i . {:pattern (index k_seq i)} 0 <= i /\ i < (size_k_w_256/4) ==>
(k_seq.[i]).lo0 == word_to_nat32 (k.[4 * i]) /\
(k_seq.[i]).lo1 == word_to_nat32 (k.[4 * i + 1]) /\
(k_seq.[i]).hi2 == word_to_nat32 (k.[4 * i + 2]) /\
(k_seq.[i]).hi3 == word_to_nat32 (k.[4 * i + 3]))
let quads_to_block (qs:seq quad32) : block_w
=
let nat32_seq = Vale.Def.Words.Seq_s.seq_four_to_seq_LE qs in
let f (n:nat{n < 16}) : word = nat32_to_word (if n < length nat32_seq then nat32_seq.[n] else 0) in
init 16 f
val lemma_quads_to_block (qs:seq quad32) : Lemma
(requires length qs == 4)
(ensures
(let block = quads_to_block qs in
forall i . {:pattern (index qs i)} 0 <= i /\ i < 4 ==>
(qs.[i]).lo0 == ws_opaque block (4 * i + 0) /\
(qs.[i]).lo1 == ws_opaque block (4 * i + 1) /\
(qs.[i]).hi2 == ws_opaque block (4 * i + 2) /\
(qs.[i]).hi3 == ws_opaque block (4 * i + 3) /\
qs.[i] == ws_quad32 (4 * i) block))
(*
#push-options "--z3rlimit 20 --max_fuel 1"
let lemma_quads_to_block (qs:seq quad32) : Lemma
(requires length qs == 4)
(ensures (let block = quads_to_block qs in
forall i . {:pattern (index qs i)} 0 <= i /\ i < 4 ==>
(qs.[i]).lo0 == ws_opaque block (4 * i + 0) /\
(qs.[i]).lo1 == ws_opaque block (4 * i + 1) /\
(qs.[i]).hi2 == ws_opaque block (4 * i + 2) /\
(qs.[i]).hi3 == ws_opaque block (4 * i + 3) /\
qs.[i] == ws_quad32 (4 * i) block))
=
//reveal_opaque ws;
()
#pop-options
*)
val update_block (hash:hash256) (block:block_w): hash256
val update_lemma (src1 src2 src1' src2' h0 h1:quad32) (block:block_w) : Lemma
(requires (let hash_orig = make_hash h0 h1 in
make_hash src1 src2 ==
Spec.Loops.repeat_range 0 size_k_w_256 (shuffle_core_opaque block) hash_orig /\
src1' == add_wrap_quad32 src1 h0 /\
src2' == add_wrap_quad32 src2 h1))
(ensures (let hash_orig = make_hash h0 h1 in
make_hash src1' src2' == update_block hash_orig block))
let rec update_multi_quads (s:seq quad32) (hash_orig:hash256) : Tot (hash256) (decreases (length s)) | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val update_multi_quads (s: seq quad32) (hash_orig: hash256) : Tot (hash256) (decreases (length s)) | [
"recursion"
] | Vale.SHA.SHA_helpers.update_multi_quads | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | s: FStar.Seq.Base.seq Vale.Def.Types_s.quad32 -> hash_orig: Vale.SHA.SHA_helpers.hash256
-> Prims.Tot Vale.SHA.SHA_helpers.hash256 | {
"end_col": 8,
"end_line": 196,
"start_col": 2,
"start_line": 190
} |
Prims.Tot | val le_bytes_to_hash (b: seq nat8) : hash256 | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let le_bytes_to_hash (b:seq nat8) : hash256 =
if length b <> 32 then
(let f (n:nat{n < 8}) : word = nat32_to_word 0 in
init 8 f)
else (
let open Vale.Def.Words.Seq_s in
Vale.Lib.Seqs_s.seq_map nat32_to_word (seq_nat8_to_seq_nat32_LE b)
) | val le_bytes_to_hash (b: seq nat8) : hash256
let le_bytes_to_hash (b: seq nat8) : hash256 = | false | null | false | if length b <> 32
then
(let f (n: nat{n < 8}) : word = nat32_to_word 0 in
init 8 f)
else
(let open Vale.Def.Words.Seq_s in
Vale.Lib.Seqs_s.seq_map nat32_to_word (seq_nat8_to_seq_nat32_LE b)) | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"FStar.Seq.Base.seq",
"Vale.Def.Words_s.nat8",
"Prims.op_disEquality",
"Prims.int",
"FStar.Seq.Base.length",
"FStar.Seq.Base.init",
"Vale.SHA.SHA_helpers.word",
"Prims.nat",
"Prims.b2t",
"Prims.op_LessThan",
"Vale.SHA.SHA_helpers.nat32_to_word",
"Prims.bool",
"Vale.Lib.Seqs_s.seq_map",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words.Seq_s.seq_nat8_to_seq_nat32_LE",
"Vale.SHA.SHA_helpers.hash256"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash
let update_multi_opaque_vale (hash:hash256) (blocks:bytes) : hash256 =
if length blocks % size_k_w_256 = 0 then let b:bytes_blocks = blocks in update_multi_opaque hash b else hash
val make_hash (abef cdgh:quad32) : Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abef.hi3 /\
hash.[1] == nat32_to_word abef.hi2 /\
hash.[2] == nat32_to_word cdgh.hi3 /\
hash.[3] == nat32_to_word cdgh.hi2 /\
hash.[4] == nat32_to_word abef.lo1 /\
hash.[5] == nat32_to_word abef.lo0 /\
hash.[6] == nat32_to_word cdgh.lo1 /\
hash.[7] == nat32_to_word cdgh.lo0
)
val make_ordered_hash (abcd efgh:quad32): Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abcd.lo0 /\
hash.[1] == nat32_to_word abcd.lo1 /\
hash.[2] == nat32_to_word abcd.hi2 /\
hash.[3] == nat32_to_word abcd.hi3 /\
hash.[4] == nat32_to_word efgh.lo0 /\
hash.[5] == nat32_to_word efgh.lo1 /\
hash.[6] == nat32_to_word efgh.hi2 /\
hash.[7] == nat32_to_word efgh.hi3
)
// Top-level proof for the SHA256_rnds2 instruction
val lemma_sha256_rnds2 (abef cdgh xmm0:quad32) (t:counter) (block:block_w) (hash_in:hash256) : Lemma
(requires t + 1 < size_k_w_256 /\
xmm0.lo0 == add_wrap (word_to_nat32 k.[t]) (ws_opaque block t) /\
xmm0.lo1 == add_wrap (word_to_nat32 k.[t+1]) (ws_opaque block (t+1)) /\
make_hash abef cdgh == Spec.Loops.repeat_range 0 t (shuffle_core_opaque block) hash_in
)
(ensures make_hash (sha256_rnds2_spec cdgh abef xmm0) abef ==
Spec.Loops.repeat_range 0 (t+2) (shuffle_core_opaque block) hash_in)
(* Proof work for the SHA256_msg* instructions *)
let ws_quad32 (t:counter) (block:block_w) : quad32 =
if t < size_k_w_256 - 3 then
Mkfour (ws_opaque block t)
(ws_opaque block (t+1))
(ws_opaque block (t+2))
(ws_opaque block (t+3))
else
Mkfour 0 0 0 0
val ws_partial_def (t:counter) (block:block_w) : quad32
[@"opaque_to_smt"] let ws_partial = opaque_make ws_partial_def
irreducible let ws_partial_reveal = opaque_revealer (`%ws_partial) ws_partial ws_partial_def
// Top-level proof for the SHA256_msg1 instruction
val lemma_sha256_msg1 (dst src:quad32) (t:counter) (block:block_w) : Lemma
(requires 16 <= t /\ t < size_k_w_256 /\
dst == ws_quad32 (t-16) block /\
src.lo0 == ws_opaque block (t-12))
(ensures sha256_msg1_spec dst src == ws_partial t block)
// Top-level proof for the SHA256_msg2 instruction
val lemma_sha256_msg2 (src1 src2:quad32) (t:counter) (block:block_w) : Lemma
(requires 16 <= t /\ t < size_k_w_256 - 3 /\
(let step1 = ws_partial t block in
let t_minus_7 = ws_quad32 (t-7) block in
src1 == add_wrap_quad32 step1 t_minus_7 /\
src2.hi2 == ws_opaque block (t-2) /\
src2.hi3 == ws_opaque block (t-1)))
(ensures sha256_msg2_spec src1 src2 == ws_quad32 t block)
(* Abbreviations and lemmas for the code itself *)
let k_reqs (k_seq:seq quad32) : prop0 =
length k_seq == size_k_w_256 / 4 /\
(forall i . {:pattern (index k_seq i)} 0 <= i /\ i < (size_k_w_256/4) ==>
(k_seq.[i]).lo0 == word_to_nat32 (k.[4 * i]) /\
(k_seq.[i]).lo1 == word_to_nat32 (k.[4 * i + 1]) /\
(k_seq.[i]).hi2 == word_to_nat32 (k.[4 * i + 2]) /\
(k_seq.[i]).hi3 == word_to_nat32 (k.[4 * i + 3]))
let quads_to_block (qs:seq quad32) : block_w
=
let nat32_seq = Vale.Def.Words.Seq_s.seq_four_to_seq_LE qs in
let f (n:nat{n < 16}) : word = nat32_to_word (if n < length nat32_seq then nat32_seq.[n] else 0) in
init 16 f
val lemma_quads_to_block (qs:seq quad32) : Lemma
(requires length qs == 4)
(ensures
(let block = quads_to_block qs in
forall i . {:pattern (index qs i)} 0 <= i /\ i < 4 ==>
(qs.[i]).lo0 == ws_opaque block (4 * i + 0) /\
(qs.[i]).lo1 == ws_opaque block (4 * i + 1) /\
(qs.[i]).hi2 == ws_opaque block (4 * i + 2) /\
(qs.[i]).hi3 == ws_opaque block (4 * i + 3) /\
qs.[i] == ws_quad32 (4 * i) block))
(*
#push-options "--z3rlimit 20 --max_fuel 1"
let lemma_quads_to_block (qs:seq quad32) : Lemma
(requires length qs == 4)
(ensures (let block = quads_to_block qs in
forall i . {:pattern (index qs i)} 0 <= i /\ i < 4 ==>
(qs.[i]).lo0 == ws_opaque block (4 * i + 0) /\
(qs.[i]).lo1 == ws_opaque block (4 * i + 1) /\
(qs.[i]).hi2 == ws_opaque block (4 * i + 2) /\
(qs.[i]).hi3 == ws_opaque block (4 * i + 3) /\
qs.[i] == ws_quad32 (4 * i) block))
=
//reveal_opaque ws;
()
#pop-options
*)
val update_block (hash:hash256) (block:block_w): hash256
val update_lemma (src1 src2 src1' src2' h0 h1:quad32) (block:block_w) : Lemma
(requires (let hash_orig = make_hash h0 h1 in
make_hash src1 src2 ==
Spec.Loops.repeat_range 0 size_k_w_256 (shuffle_core_opaque block) hash_orig /\
src1' == add_wrap_quad32 src1 h0 /\
src2' == add_wrap_quad32 src2 h1))
(ensures (let hash_orig = make_hash h0 h1 in
make_hash src1' src2' == update_block hash_orig block))
let rec update_multi_quads (s:seq quad32) (hash_orig:hash256) : Tot (hash256) (decreases (length s))
=
if length s < 4 then
hash_orig
else
let prefix, qs = split s (length s - 4) in
let h_prefix = update_multi_quads prefix hash_orig in
let hash = update_block h_prefix (quads_to_block qs) in
hash
val lemma_update_multi_equiv_vale (hash hash':hash256) (quads:seq quad32) (r_quads:seq quad32)
(nat8s:seq nat8) (blocks:seq byte) :
Lemma (requires length quads % 4 == 0 /\
r_quads == reverse_bytes_nat32_quad32_seq quads /\
nat8s == le_seq_quad32_to_bytes quads /\
blocks == seq_nat8_to_seq_uint8 nat8s /\
hash' == update_multi_quads r_quads hash)
(ensures
length blocks % size_k_w_256 == 0 /\
hash' == update_multi_opaque_vale hash blocks)
val lemma_update_multi_quads (s:seq quad32) (hash_orig:hash256) (bound:nat) : Lemma
(requires bound + 4 <= length s)
(ensures (let prefix_LE = slice s 0 bound in
let prefix_BE = reverse_bytes_nat32_quad32_seq prefix_LE in
let h_prefix = update_multi_quads prefix_BE hash_orig in
let block_quads_LE = slice s bound (bound + 4) in
let block_quads_BE = reverse_bytes_nat32_quad32_seq block_quads_LE in
let input_LE = slice s 0 (bound+4) in
let input_BE = reverse_bytes_nat32_quad32_seq input_LE in
let h = update_block h_prefix (quads_to_block block_quads_BE) in
h == update_multi_quads input_BE hash_orig)) | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val le_bytes_to_hash (b: seq nat8) : hash256 | [] | Vale.SHA.SHA_helpers.le_bytes_to_hash | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | b: FStar.Seq.Base.seq Vale.Def.Words_s.nat8 -> Vale.SHA.SHA_helpers.hash256 | {
"end_col": 3,
"end_line": 229,
"start_col": 2,
"start_line": 223
} |
Prims.Tot | val k_reqs (k_seq: seq quad32) : prop0 | [
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.UInt32",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Hash.Definitions",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.Agile.Hash",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2.Lemmas",
"short_module": null
},
{
"abbrev": false,
"full_module": "Spec.SHA2",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Seq",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words.Seq_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Words_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Types_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.X64.CryptoInstructions_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Opaque_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Def.Prop_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.SHA",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let k_reqs (k_seq:seq quad32) : prop0 =
length k_seq == size_k_w_256 / 4 /\
(forall i . {:pattern (index k_seq i)} 0 <= i /\ i < (size_k_w_256/4) ==>
(k_seq.[i]).lo0 == word_to_nat32 (k.[4 * i]) /\
(k_seq.[i]).lo1 == word_to_nat32 (k.[4 * i + 1]) /\
(k_seq.[i]).hi2 == word_to_nat32 (k.[4 * i + 2]) /\
(k_seq.[i]).hi3 == word_to_nat32 (k.[4 * i + 3])) | val k_reqs (k_seq: seq quad32) : prop0
let k_reqs (k_seq: seq quad32) : prop0 = | false | null | false | length k_seq == size_k_w_256 / 4 /\
(forall i. {:pattern (index k_seq i)}
0 <= i /\ i < (size_k_w_256 / 4) ==>
(k_seq.[ i ]).lo0 == word_to_nat32 (k.[ 4 * i ]) /\
(k_seq.[ i ]).lo1 == word_to_nat32 (k.[ 4 * i + 1 ]) /\
(k_seq.[ i ]).hi2 == word_to_nat32 (k.[ 4 * i + 2 ]) /\
(k_seq.[ i ]).hi3 == word_to_nat32 (k.[ 4 * i + 3 ])) | {
"checked_file": "Vale.SHA.SHA_helpers.fsti.checked",
"dependencies": [
"Vale.X64.CryptoInstructions_s.fsti.checked",
"Vale.Lib.Seqs_s.fst.checked",
"Vale.Def.Words_s.fsti.checked",
"Vale.Def.Words.Seq_s.fsti.checked",
"Vale.Def.Types_s.fst.checked",
"Vale.Def.Prop_s.fst.checked",
"Vale.Def.Opaque_s.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"Spec.Loops.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"FStar.UInt8.fsti.checked",
"FStar.Seq.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.SHA.SHA_helpers.fsti"
} | [
"total"
] | [
"FStar.Seq.Base.seq",
"Vale.Def.Types_s.quad32",
"Prims.l_and",
"Prims.eq2",
"Prims.int",
"FStar.Seq.Base.length",
"Prims.op_Division",
"Vale.SHA.SHA_helpers.size_k_w_256",
"Prims.l_Forall",
"Prims.b2t",
"Prims.op_GreaterThanOrEqual",
"Prims.op_LessThan",
"Prims.l_imp",
"Prims.op_LessThanOrEqual",
"Vale.Def.Words_s.nat32",
"Vale.Def.Words_s.__proj__Mkfour__item__lo0",
"Vale.Def.Types_s.nat32",
"Vale.SHA.SHA_helpers.op_String_Access",
"Vale.SHA.SHA_helpers.word_to_nat32",
"Vale.SHA.SHA_helpers.word",
"Vale.SHA.SHA_helpers.k",
"FStar.Mul.op_Star",
"Vale.Def.Words_s.__proj__Mkfour__item__lo1",
"Prims.op_Addition",
"Vale.Def.Words_s.__proj__Mkfour__item__hi2",
"Vale.Def.Words_s.__proj__Mkfour__item__hi3",
"FStar.Seq.Base.index",
"Vale.Def.Prop_s.prop0"
] | [] | module Vale.SHA.SHA_helpers
open FStar.Mul
open Vale.Def.Prop_s
open Vale.Def.Opaque_s
open Vale.X64.CryptoInstructions_s
open Vale.Def.Types_s
open Vale.Def.Words_s
open Vale.Def.Words.Seq_s
open FStar.Seq
open Vale.Arch.Types
unfold let (.[]) = FStar.Seq.index
#reset-options "--max_fuel 0 --max_ifuel 0"
// Specialize these definitions (from Spec.SHA2.fst) for SHA256
unfold let size_k_w_256 = 64
val word:Type0
(* Number of words for a block size *)
let size_block_w_256 = 16
(* Define the size block in bytes *)
let block_length =
4 (*word_length a*) * size_block_w_256
let block_w = m:seq word {length m = size_block_w_256}
let counter = nat
val k : (s:seq word {length s = size_k_w_256})
let hash256 = m:Seq.seq word {Seq.length m = 8}
val reveal_word (u:unit) : Lemma (word == Lib.IntTypes.uint32)
(* Input data. *)
type byte = UInt8.t
type bytes = Seq.seq byte
(* Input data, multiple of a block length. *)
let bytes_blocks =
l:bytes { Seq.length l % block_length = 0 }
// Hide various SHA2 definitions
val ws_opaque (b:block_w) (t:counter{t < size_k_w_256}):nat32
val shuffle_core_opaque (block:block_w) (hash:hash256) (t:counter{t < size_k_w_256}):hash256
val update_multi_opaque (hash:hash256) (blocks:bytes_blocks):hash256
val update_multi_transparent (hash:hash256) (blocks:bytes_blocks):hash256
// Hide some functions that operate on words & bytes
val word_to_nat32 (x:word) : nat32
val nat32_to_word (x:nat32) : word
val byte_to_nat8 (b:byte) : nat8
val nat8_to_byte (b:nat8) : byte
// Work around some limitations in Vale's support for dependent types
//unfold let bytes_blocks256 = bytes_blocks SHA2_256
let repeat_range_vale (max:nat { max < size_k_w_256}) (block:block_w) (hash:hash256) =
Spec.Loops.repeat_range 0 max (shuffle_core_opaque block) hash
let lemma_repeat_range_0_vale (block:block_w) (hash:hash256)
: Lemma (Spec.Loops.repeat_range 0 0 (shuffle_core_opaque block) hash == hash) =
Spec.Loops.repeat_range_base 0 (shuffle_core_opaque block) hash
let update_multi_opaque_vale (hash:hash256) (blocks:bytes) : hash256 =
if length blocks % size_k_w_256 = 0 then let b:bytes_blocks = blocks in update_multi_opaque hash b else hash
val make_hash (abef cdgh:quad32) : Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abef.hi3 /\
hash.[1] == nat32_to_word abef.hi2 /\
hash.[2] == nat32_to_word cdgh.hi3 /\
hash.[3] == nat32_to_word cdgh.hi2 /\
hash.[4] == nat32_to_word abef.lo1 /\
hash.[5] == nat32_to_word abef.lo0 /\
hash.[6] == nat32_to_word cdgh.lo1 /\
hash.[7] == nat32_to_word cdgh.lo0
)
val make_ordered_hash (abcd efgh:quad32): Pure (hash256)
(requires True)
(ensures fun hash ->
length hash == 8 /\
hash.[0] == nat32_to_word abcd.lo0 /\
hash.[1] == nat32_to_word abcd.lo1 /\
hash.[2] == nat32_to_word abcd.hi2 /\
hash.[3] == nat32_to_word abcd.hi3 /\
hash.[4] == nat32_to_word efgh.lo0 /\
hash.[5] == nat32_to_word efgh.lo1 /\
hash.[6] == nat32_to_word efgh.hi2 /\
hash.[7] == nat32_to_word efgh.hi3
)
// Top-level proof for the SHA256_rnds2 instruction
val lemma_sha256_rnds2 (abef cdgh xmm0:quad32) (t:counter) (block:block_w) (hash_in:hash256) : Lemma
(requires t + 1 < size_k_w_256 /\
xmm0.lo0 == add_wrap (word_to_nat32 k.[t]) (ws_opaque block t) /\
xmm0.lo1 == add_wrap (word_to_nat32 k.[t+1]) (ws_opaque block (t+1)) /\
make_hash abef cdgh == Spec.Loops.repeat_range 0 t (shuffle_core_opaque block) hash_in
)
(ensures make_hash (sha256_rnds2_spec cdgh abef xmm0) abef ==
Spec.Loops.repeat_range 0 (t+2) (shuffle_core_opaque block) hash_in)
(* Proof work for the SHA256_msg* instructions *)
let ws_quad32 (t:counter) (block:block_w) : quad32 =
if t < size_k_w_256 - 3 then
Mkfour (ws_opaque block t)
(ws_opaque block (t+1))
(ws_opaque block (t+2))
(ws_opaque block (t+3))
else
Mkfour 0 0 0 0
val ws_partial_def (t:counter) (block:block_w) : quad32
[@"opaque_to_smt"] let ws_partial = opaque_make ws_partial_def
irreducible let ws_partial_reveal = opaque_revealer (`%ws_partial) ws_partial ws_partial_def
// Top-level proof for the SHA256_msg1 instruction
val lemma_sha256_msg1 (dst src:quad32) (t:counter) (block:block_w) : Lemma
(requires 16 <= t /\ t < size_k_w_256 /\
dst == ws_quad32 (t-16) block /\
src.lo0 == ws_opaque block (t-12))
(ensures sha256_msg1_spec dst src == ws_partial t block)
// Top-level proof for the SHA256_msg2 instruction
val lemma_sha256_msg2 (src1 src2:quad32) (t:counter) (block:block_w) : Lemma
(requires 16 <= t /\ t < size_k_w_256 - 3 /\
(let step1 = ws_partial t block in
let t_minus_7 = ws_quad32 (t-7) block in
src1 == add_wrap_quad32 step1 t_minus_7 /\
src2.hi2 == ws_opaque block (t-2) /\
src2.hi3 == ws_opaque block (t-1)))
(ensures sha256_msg2_spec src1 src2 == ws_quad32 t block)
(* Abbreviations and lemmas for the code itself *) | false | true | Vale.SHA.SHA_helpers.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val k_reqs (k_seq: seq quad32) : prop0 | [] | Vale.SHA.SHA_helpers.k_reqs | {
"file_name": "vale/code/crypto/sha/Vale.SHA.SHA_helpers.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | k_seq: FStar.Seq.Base.seq Vale.Def.Types_s.quad32 -> Vale.Def.Prop_s.prop0 | {
"end_col": 53,
"end_line": 142,
"start_col": 2,
"start_line": 137
} |
Prims.Tot | val linv_ctx (a: LSeq.lseq uint64 0) : Type0 | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True | val linv_ctx (a: LSeq.lseq uint64 0) : Type0
let linv_ctx (a: LSeq.lseq uint64 0) : Type0 = | false | null | false | True | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [
"total"
] | [
"Lib.Sequence.lseq",
"Lib.IntTypes.uint64",
"Prims.l_True"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0" | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val linv_ctx (a: LSeq.lseq uint64 0) : Type0 | [] | Hacl.Impl.K256.Finv.linv_ctx | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | a: Lib.Sequence.lseq Lib.IntTypes.uint64 0 -> Type0 | {
"end_col": 50,
"end_line": 24,
"start_col": 46,
"start_line": 24
} |
Prims.Tot | val mk_to_k256_prime_comm_monoid:BE.to_comm_monoid U64 5ul 0ul | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
} | val mk_to_k256_prime_comm_monoid:BE.to_comm_monoid U64 5ul 0ul
let mk_to_k256_prime_comm_monoid:BE.to_comm_monoid U64 5ul 0ul = | false | null | false | {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl
} | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [
"total"
] | [
"Hacl.Impl.Exponentiation.Definitions.Mkto_comm_monoid",
"Lib.IntTypes.U64",
"FStar.UInt32.uint_to_t",
"Spec.K256.PointOps.felem",
"Hacl.Spec.K256.Finv.nat_mod_comm_monoid",
"Hacl.Impl.K256.Finv.linv_ctx",
"Hacl.Impl.K256.Finv.linv",
"Hacl.Impl.K256.Finv.refl"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_to_k256_prime_comm_monoid:BE.to_comm_monoid U64 5ul 0ul | [] | Hacl.Impl.K256.Finv.mk_to_k256_prime_comm_monoid | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.Impl.Exponentiation.Definitions.to_comm_monoid Lib.IntTypes.U64
(FStar.UInt32.uint_to_t 5 <: FStar.UInt32.t)
(FStar.UInt32.uint_to_t 0 <: FStar.UInt32.t) | {
"end_col": 17,
"end_line": 43,
"start_col": 2,
"start_line": 39
} |
FStar.HyperStack.ST.Stack | val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b)) | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let fsquare_times out a b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 a) (v b);
BE.lexp_pow2 5ul 0ul mk_k256_prime_concrete_ops (null uint64) a b out | val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b))
let fsquare_times out a b = | true | null | false | let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 a) (v b);
BE.lexp_pow2 5ul 0ul mk_k256_prime_concrete_ops (null uint64) a b out | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [] | [
"Hacl.K256.Field.felem",
"Lib.IntTypes.size_t",
"Hacl.Impl.Exponentiation.lexp_pow2",
"Lib.IntTypes.U64",
"FStar.UInt32.__uint_to_t",
"Hacl.Impl.K256.Finv.mk_k256_prime_concrete_ops",
"Lib.Buffer.null",
"Lib.Buffer.MUT",
"Lib.IntTypes.uint64",
"Prims.unit",
"Spec.Exponentiation.exp_pow2_lemma",
"Spec.K256.PointOps.felem",
"Hacl.Spec.K256.Finv.mk_nat_mod_concrete_ops",
"Hacl.K256.Field.feval",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract
val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = fsqr xx x
inline_for_extraction noextract
let mk_k256_prime_concrete_ops : BE.concrete_ops U64 5ul 0ul = {
BE.to = mk_to_k256_prime_comm_monoid;
BE.lone = one_mod;
BE.lmul = mul_mod;
BE.lsqr = sqr_mod;
}
val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b))
[@CInline]
let fsquare_times_in_place out b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 out) (v b);
BE.lexp_pow2_in_place 5ul 0ul mk_k256_prime_concrete_ops (null uint64) out b
val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b)) | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b)) | [] | Hacl.Impl.K256.Finv.fsquare_times | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | out: Hacl.K256.Field.felem -> a: Hacl.K256.Field.felem -> b: Lib.IntTypes.size_t
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 71,
"end_line": 95,
"start_col": 27,
"start_line": 92
} |
Prims.Tot | val mk_k256_prime_concrete_ops:BE.concrete_ops U64 5ul 0ul | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mk_k256_prime_concrete_ops : BE.concrete_ops U64 5ul 0ul = {
BE.to = mk_to_k256_prime_comm_monoid;
BE.lone = one_mod;
BE.lmul = mul_mod;
BE.lsqr = sqr_mod;
} | val mk_k256_prime_concrete_ops:BE.concrete_ops U64 5ul 0ul
let mk_k256_prime_concrete_ops:BE.concrete_ops U64 5ul 0ul = | false | null | false | { BE.to = mk_to_k256_prime_comm_monoid; BE.lone = one_mod; BE.lmul = mul_mod; BE.lsqr = sqr_mod } | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [
"total"
] | [
"Hacl.Impl.Exponentiation.Definitions.Mkconcrete_ops",
"Lib.IntTypes.U64",
"FStar.UInt32.uint_to_t",
"FStar.Ghost.hide",
"Hacl.Impl.Exponentiation.Definitions.to_comm_monoid",
"Hacl.Impl.K256.Finv.mk_to_k256_prime_comm_monoid",
"Hacl.Impl.K256.Finv.one_mod",
"Hacl.Impl.K256.Finv.mul_mod",
"Hacl.Impl.K256.Finv.sqr_mod"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract
val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = fsqr xx x
inline_for_extraction noextract | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mk_k256_prime_concrete_ops:BE.concrete_ops U64 5ul 0ul | [] | Hacl.Impl.K256.Finv.mk_k256_prime_concrete_ops | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.Impl.Exponentiation.Definitions.concrete_ops Lib.IntTypes.U64
(FStar.UInt32.uint_to_t 5 <: FStar.UInt32.t)
(FStar.UInt32.uint_to_t 0 <: FStar.UInt32.t) | {
"end_col": 20,
"end_line": 67,
"start_col": 2,
"start_line": 64
} |
FStar.HyperStack.ST.Stack | val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b)) | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let fsquare_times_in_place out b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 out) (v b);
BE.lexp_pow2_in_place 5ul 0ul mk_k256_prime_concrete_ops (null uint64) out b | val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b))
let fsquare_times_in_place out b = | true | null | false | let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 out) (v b);
BE.lexp_pow2_in_place 5ul 0ul mk_k256_prime_concrete_ops (null uint64) out b | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [] | [
"Hacl.K256.Field.felem",
"Lib.IntTypes.size_t",
"Hacl.Impl.Exponentiation.lexp_pow2_in_place",
"Lib.IntTypes.U64",
"FStar.UInt32.__uint_to_t",
"Hacl.Impl.K256.Finv.mk_k256_prime_concrete_ops",
"Lib.Buffer.null",
"Lib.Buffer.MUT",
"Lib.IntTypes.uint64",
"Prims.unit",
"Spec.Exponentiation.exp_pow2_lemma",
"Spec.K256.PointOps.felem",
"Hacl.Spec.K256.Finv.mk_nat_mod_concrete_ops",
"Hacl.K256.Field.feval",
"Lib.IntTypes.v",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract
val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = fsqr xx x
inline_for_extraction noextract
let mk_k256_prime_concrete_ops : BE.concrete_ops U64 5ul 0ul = {
BE.to = mk_to_k256_prime_comm_monoid;
BE.lone = one_mod;
BE.lmul = mul_mod;
BE.lsqr = sqr_mod;
}
val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b)) | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b)) | [] | Hacl.Impl.K256.Finv.fsquare_times_in_place | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | out: Hacl.K256.Field.felem -> b: Lib.IntTypes.size_t -> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 78,
"end_line": 81,
"start_col": 34,
"start_line": 78
} |
Prims.Tot | val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let sqr_mod ctx x xx = fsqr xx x | val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = | false | null | false | fsqr xx x | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [
"total"
] | [
"Lib.Buffer.lbuffer",
"Lib.IntTypes.uint_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"FStar.UInt32.__uint_to_t",
"Hacl.K256.Field.fsqr",
"Prims.unit"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid | [] | Hacl.Impl.K256.Finv.sqr_mod | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.Impl.Exponentiation.Definitions.lsqr_st Lib.IntTypes.U64
5ul
0ul
Hacl.Impl.K256.Finv.mk_to_k256_prime_comm_monoid | {
"end_col": 32,
"end_line": 59,
"start_col": 23,
"start_line": 59
} |
Prims.Tot | val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let mul_mod ctx x y xy = fmul xy x y | val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = | false | null | false | fmul xy x y | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [
"total"
] | [
"Lib.Buffer.lbuffer",
"Lib.IntTypes.uint_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"FStar.UInt32.__uint_to_t",
"Hacl.K256.Field.fmul",
"Prims.unit"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid | [] | Hacl.Impl.K256.Finv.mul_mod | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.Impl.Exponentiation.Definitions.lmul_st Lib.IntTypes.U64
5ul
0ul
Hacl.Impl.K256.Finv.mk_to_k256_prime_comm_monoid | {
"end_col": 36,
"end_line": 54,
"start_col": 25,
"start_line": 54
} |
Prims.Tot | val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0) | val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = | false | null | false | make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0) | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [
"total"
] | [
"Lib.Buffer.lbuffer",
"Lib.IntTypes.uint_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"FStar.UInt32.__uint_to_t",
"Hacl.K256.Field.make_u52_5",
"FStar.Pervasives.Native.Mktuple5",
"Lib.IntTypes.uint64",
"Lib.IntTypes.u64",
"Prims.unit"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid | [] | Hacl.Impl.K256.Finv.one_mod | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Hacl.Impl.Exponentiation.Definitions.lone_st Lib.IntTypes.U64
5ul
0ul
Hacl.Impl.K256.Finv.mk_to_k256_prime_comm_monoid | {
"end_col": 72,
"end_line": 49,
"start_col": 22,
"start_line": 49
} |
Prims.GTot | val refl (a: LSeq.lseq uint64 5 {linv a}) : GTot S.felem | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4]) | val refl (a: LSeq.lseq uint64 5 {linv a}) : GTot S.felem
let refl (a: LSeq.lseq uint64 5 {linv a}) : GTot S.felem = | false | null | false | let open Lib.Sequence in feval5 (a.[ 0 ], a.[ 1 ], a.[ 2 ], a.[ 3 ], a.[ 4 ]) | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [
"sometrivial"
] | [
"Lib.Sequence.lseq",
"Lib.IntTypes.uint64",
"Hacl.Impl.K256.Finv.linv",
"Hacl.Spec.K256.Field52.Definitions.feval5",
"FStar.Pervasives.Native.Mktuple5",
"Lib.Sequence.op_String_Access",
"Spec.K256.PointOps.felem"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val refl (a: LSeq.lseq uint64 5 {linv a}) : GTot S.felem | [] | Hacl.Impl.K256.Finv.refl | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | a: Lib.Sequence.lseq Lib.IntTypes.uint64 5 {Hacl.Impl.K256.Finv.linv a}
-> Prims.GTot Spec.K256.PointOps.felem | {
"end_col": 40,
"end_line": 34,
"start_col": 2,
"start_line": 33
} |
Prims.Tot | val linv (a: LSeq.lseq uint64 5) : Type0 | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4]) | val linv (a: LSeq.lseq uint64 5) : Type0
let linv (a: LSeq.lseq uint64 5) : Type0 = | false | null | false | let open Lib.Sequence in inv_lazy_reduced2_5 (a.[ 0 ], a.[ 1 ], a.[ 2 ], a.[ 3 ], a.[ 4 ]) | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [
"total"
] | [
"Lib.Sequence.lseq",
"Lib.IntTypes.uint64",
"Hacl.K256.Field.inv_lazy_reduced2_5",
"FStar.Pervasives.Native.Mktuple5",
"Lib.Sequence.op_String_Access"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val linv (a: LSeq.lseq uint64 5) : Type0 | [] | Hacl.Impl.K256.Finv.linv | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | a: Lib.Sequence.lseq Lib.IntTypes.uint64 5 -> Type0 | {
"end_col": 53,
"end_line": 29,
"start_col": 2,
"start_line": 28
} |
FStar.HyperStack.ST.Stack | val fexp_223 (x3 x44 x88 tmp:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h x44 /\ live h x88 /\ live h tmp /\
disjoint x3 x44 /\ disjoint x3 x88 /\ disjoint x3 tmp /\
disjoint x44 x88 /\ disjoint x44 tmp /\ disjoint x88 tmp /\
inv_lazy_reduced2 h x3 /\ inv_lazy_reduced2 h x44)
(ensures fun h0 _ h1 -> modifies (loc x88 |+| loc tmp) h0 h1 /\
(let _x3 = feval h0 x3 in
let _x44 = feval h0 x44 in
let _x88 = S.fmul (SI.fsquare_times _x44 44) _x44 in
let _x176 = S.fmul (SI.fsquare_times _x88 88) _x88 in
let _x220 = S.fmul (SI.fsquare_times _x176 44) _x44 in
let _x223 = S.fmul (SI.fsquare_times _x220 3) _x3 in
feval h1 tmp == _x223 /\ feval h1 x88 == _x88 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x88)) | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let fexp_223 x3 x44 x88 tmp =
let h7 = ST.get () in
fsquare_times x88 x44 44ul;
fmul x88 x88 x44; // x88 = S.fmul (fsquare_times x44 44) x44
let h8 = ST.get () in
assert (feval h8 x88 == S.fmul (SI.fsquare_times (feval h7 x44) 44) (feval h7 x44));
fsquare_times tmp x88 88ul;
fmul tmp tmp x88; // tmp = x176 = S.fmul (fsquare_times x88 88) x88
let h9 = ST.get () in
assert (feval h9 tmp == S.fmul (SI.fsquare_times (feval h8 x88) 88) (feval h8 x88));
fsquare_times_in_place tmp 44ul;
fmul tmp tmp x44; // tmp = x220 = S.fmul (fsquare_times x176 44) x44
let h10 = ST.get () in
assert (feval h10 tmp == S.fmul (SI.fsquare_times (feval h9 tmp) 44) (feval h7 x44));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x223 = S.fmul (fsquare_times x220 3) x3
let h11 = ST.get () in
assert (feval h11 tmp == S.fmul (SI.fsquare_times (feval h10 tmp) 3) (feval h7 x3)) | val fexp_223 (x3 x44 x88 tmp:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h x44 /\ live h x88 /\ live h tmp /\
disjoint x3 x44 /\ disjoint x3 x88 /\ disjoint x3 tmp /\
disjoint x44 x88 /\ disjoint x44 tmp /\ disjoint x88 tmp /\
inv_lazy_reduced2 h x3 /\ inv_lazy_reduced2 h x44)
(ensures fun h0 _ h1 -> modifies (loc x88 |+| loc tmp) h0 h1 /\
(let _x3 = feval h0 x3 in
let _x44 = feval h0 x44 in
let _x88 = S.fmul (SI.fsquare_times _x44 44) _x44 in
let _x176 = S.fmul (SI.fsquare_times _x88 88) _x88 in
let _x220 = S.fmul (SI.fsquare_times _x176 44) _x44 in
let _x223 = S.fmul (SI.fsquare_times _x220 3) _x3 in
feval h1 tmp == _x223 /\ feval h1 x88 == _x88 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x88))
let fexp_223 x3 x44 x88 tmp = | true | null | false | let h7 = ST.get () in
fsquare_times x88 x44 44ul;
fmul x88 x88 x44;
let h8 = ST.get () in
assert (feval h8 x88 == S.fmul (SI.fsquare_times (feval h7 x44) 44) (feval h7 x44));
fsquare_times tmp x88 88ul;
fmul tmp tmp x88;
let h9 = ST.get () in
assert (feval h9 tmp == S.fmul (SI.fsquare_times (feval h8 x88) 88) (feval h8 x88));
fsquare_times_in_place tmp 44ul;
fmul tmp tmp x44;
let h10 = ST.get () in
assert (feval h10 tmp == S.fmul (SI.fsquare_times (feval h9 tmp) 44) (feval h7 x44));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3;
let h11 = ST.get () in
assert (feval h11 tmp == S.fmul (SI.fsquare_times (feval h10 tmp) 3) (feval h7 x3)) | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [] | [
"Hacl.K256.Field.felem",
"Prims._assert",
"Prims.eq2",
"Spec.K256.PointOps.felem",
"Hacl.K256.Field.feval",
"Spec.K256.PointOps.fmul",
"Hacl.Spec.K256.Finv.fsquare_times",
"Prims.unit",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fmul",
"Hacl.Impl.K256.Finv.fsquare_times_in_place",
"FStar.UInt32.__uint_to_t",
"Hacl.Impl.K256.Finv.fsquare_times"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract
val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = fsqr xx x
inline_for_extraction noextract
let mk_k256_prime_concrete_ops : BE.concrete_ops U64 5ul 0ul = {
BE.to = mk_to_k256_prime_comm_monoid;
BE.lone = one_mod;
BE.lmul = mul_mod;
BE.lsqr = sqr_mod;
}
val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b))
[@CInline]
let fsquare_times_in_place out b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 out) (v b);
BE.lexp_pow2_in_place 5ul 0ul mk_k256_prime_concrete_ops (null uint64) out b
val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b))
[@CInline]
let fsquare_times out a b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 a) (v b);
BE.lexp_pow2 5ul 0ul mk_k256_prime_concrete_ops (null uint64) a b out
inline_for_extraction noextract
val fexp_44 (x2 x3 x22 x44 tmp:felem) : Stack unit
(requires fun h ->
live h x2 /\ live h x3 /\ live h x22 /\ live h x44 /\ live h tmp /\
disjoint x2 x3 /\ disjoint x2 x22 /\ disjoint x2 x44 /\
disjoint x2 tmp /\ disjoint x3 x22 /\ disjoint x3 x44 /\
disjoint x3 tmp /\ disjoint x22 x44 /\ disjoint x22 tmp /\
disjoint x44 tmp /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h x3)
(ensures fun h0 _ h1 -> modifies (loc x22 |+| loc x44 |+| loc tmp) h0 h1 /\
(let _x2 = feval h0 x2 in
let _x3 = feval h0 x3 in
let _x6 = S.fmul (SI.fsquare_times _x3 3) _x3 in
let _x9 = S.fmul (SI.fsquare_times _x6 3) _x3 in
let _x11 = S.fmul (SI.fsquare_times _x9 2) _x2 in
let _x22 = S.fmul (SI.fsquare_times _x11 11) _x11 in
let _x44 = S.fmul (SI.fsquare_times _x22 22) _x22 in
feval h1 tmp == _x11 /\ feval h1 x22 == _x22 /\ feval h1 x44 == _x44 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x22 /\ inv_lazy_reduced2 h1 x44))
let fexp_44 x2 x3 x22 x44 tmp =
let h2 = ST.get () in
fsquare_times tmp x3 3ul;
fmul tmp tmp x3; // tmp = x6 = S.fmul (fsquare_times x3 3) x3
let h3 = ST.get () in
assert (feval h3 tmp == S.fmul (SI.fsquare_times (feval h2 x3) 3) (feval h2 x3));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x9 = S.fmul (fsquare_times x6 3) x3
let h4 = ST.get () in
assert (feval h4 tmp == S.fmul (SI.fsquare_times (feval h3 tmp) 3) (feval h2 x3));
fsquare_times_in_place tmp 2ul;
fmul tmp tmp x2; // tmp = x11 = S.fmul (fsquare_times x9 2) x2
let h5 = ST.get () in
assert (feval h5 tmp == S.fmul (SI.fsquare_times (feval h4 tmp) 2) (feval h2 x2));
fsquare_times x22 tmp 11ul;
fmul x22 x22 tmp; // x22 = S.fmul (fsquare_times x11 11) x11
let h6 = ST.get () in
assert (feval h6 x22 == S.fmul (SI.fsquare_times (feval h5 tmp) 11) (feval h5 tmp));
fsquare_times x44 x22 22ul;
fmul x44 x44 x22; // x44 = S.fmul (fsquare_times x22 22) x22
let h7 = ST.get () in
assert (feval h7 x44 == S.fmul (SI.fsquare_times (feval h6 x22) 22) (feval h6 x22))
inline_for_extraction noextract
val fexp_223 (x3 x44 x88 tmp:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h x44 /\ live h x88 /\ live h tmp /\
disjoint x3 x44 /\ disjoint x3 x88 /\ disjoint x3 tmp /\
disjoint x44 x88 /\ disjoint x44 tmp /\ disjoint x88 tmp /\
inv_lazy_reduced2 h x3 /\ inv_lazy_reduced2 h x44)
(ensures fun h0 _ h1 -> modifies (loc x88 |+| loc tmp) h0 h1 /\
(let _x3 = feval h0 x3 in
let _x44 = feval h0 x44 in
let _x88 = S.fmul (SI.fsquare_times _x44 44) _x44 in
let _x176 = S.fmul (SI.fsquare_times _x88 88) _x88 in
let _x220 = S.fmul (SI.fsquare_times _x176 44) _x44 in
let _x223 = S.fmul (SI.fsquare_times _x220 3) _x3 in
feval h1 tmp == _x223 /\ feval h1 x88 == _x88 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x88)) | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val fexp_223 (x3 x44 x88 tmp:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h x44 /\ live h x88 /\ live h tmp /\
disjoint x3 x44 /\ disjoint x3 x88 /\ disjoint x3 tmp /\
disjoint x44 x88 /\ disjoint x44 tmp /\ disjoint x88 tmp /\
inv_lazy_reduced2 h x3 /\ inv_lazy_reduced2 h x44)
(ensures fun h0 _ h1 -> modifies (loc x88 |+| loc tmp) h0 h1 /\
(let _x3 = feval h0 x3 in
let _x44 = feval h0 x44 in
let _x88 = S.fmul (SI.fsquare_times _x44 44) _x44 in
let _x176 = S.fmul (SI.fsquare_times _x88 88) _x88 in
let _x220 = S.fmul (SI.fsquare_times _x176 44) _x44 in
let _x223 = S.fmul (SI.fsquare_times _x220 3) _x3 in
feval h1 tmp == _x223 /\ feval h1 x88 == _x88 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x88)) | [] | Hacl.Impl.K256.Finv.fexp_223 | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
x3: Hacl.K256.Field.felem ->
x44: Hacl.K256.Field.felem ->
x88: Hacl.K256.Field.felem ->
tmp: Hacl.K256.Field.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 85,
"end_line": 182,
"start_col": 29,
"start_line": 162
} |
FStar.HyperStack.ST.Stack | val fexp_44 (x2 x3 x22 x44 tmp:felem) : Stack unit
(requires fun h ->
live h x2 /\ live h x3 /\ live h x22 /\ live h x44 /\ live h tmp /\
disjoint x2 x3 /\ disjoint x2 x22 /\ disjoint x2 x44 /\
disjoint x2 tmp /\ disjoint x3 x22 /\ disjoint x3 x44 /\
disjoint x3 tmp /\ disjoint x22 x44 /\ disjoint x22 tmp /\
disjoint x44 tmp /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h x3)
(ensures fun h0 _ h1 -> modifies (loc x22 |+| loc x44 |+| loc tmp) h0 h1 /\
(let _x2 = feval h0 x2 in
let _x3 = feval h0 x3 in
let _x6 = S.fmul (SI.fsquare_times _x3 3) _x3 in
let _x9 = S.fmul (SI.fsquare_times _x6 3) _x3 in
let _x11 = S.fmul (SI.fsquare_times _x9 2) _x2 in
let _x22 = S.fmul (SI.fsquare_times _x11 11) _x11 in
let _x44 = S.fmul (SI.fsquare_times _x22 22) _x22 in
feval h1 tmp == _x11 /\ feval h1 x22 == _x22 /\ feval h1 x44 == _x44 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x22 /\ inv_lazy_reduced2 h1 x44)) | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let fexp_44 x2 x3 x22 x44 tmp =
let h2 = ST.get () in
fsquare_times tmp x3 3ul;
fmul tmp tmp x3; // tmp = x6 = S.fmul (fsquare_times x3 3) x3
let h3 = ST.get () in
assert (feval h3 tmp == S.fmul (SI.fsquare_times (feval h2 x3) 3) (feval h2 x3));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x9 = S.fmul (fsquare_times x6 3) x3
let h4 = ST.get () in
assert (feval h4 tmp == S.fmul (SI.fsquare_times (feval h3 tmp) 3) (feval h2 x3));
fsquare_times_in_place tmp 2ul;
fmul tmp tmp x2; // tmp = x11 = S.fmul (fsquare_times x9 2) x2
let h5 = ST.get () in
assert (feval h5 tmp == S.fmul (SI.fsquare_times (feval h4 tmp) 2) (feval h2 x2));
fsquare_times x22 tmp 11ul;
fmul x22 x22 tmp; // x22 = S.fmul (fsquare_times x11 11) x11
let h6 = ST.get () in
assert (feval h6 x22 == S.fmul (SI.fsquare_times (feval h5 tmp) 11) (feval h5 tmp));
fsquare_times x44 x22 22ul;
fmul x44 x44 x22; // x44 = S.fmul (fsquare_times x22 22) x22
let h7 = ST.get () in
assert (feval h7 x44 == S.fmul (SI.fsquare_times (feval h6 x22) 22) (feval h6 x22)) | val fexp_44 (x2 x3 x22 x44 tmp:felem) : Stack unit
(requires fun h ->
live h x2 /\ live h x3 /\ live h x22 /\ live h x44 /\ live h tmp /\
disjoint x2 x3 /\ disjoint x2 x22 /\ disjoint x2 x44 /\
disjoint x2 tmp /\ disjoint x3 x22 /\ disjoint x3 x44 /\
disjoint x3 tmp /\ disjoint x22 x44 /\ disjoint x22 tmp /\
disjoint x44 tmp /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h x3)
(ensures fun h0 _ h1 -> modifies (loc x22 |+| loc x44 |+| loc tmp) h0 h1 /\
(let _x2 = feval h0 x2 in
let _x3 = feval h0 x3 in
let _x6 = S.fmul (SI.fsquare_times _x3 3) _x3 in
let _x9 = S.fmul (SI.fsquare_times _x6 3) _x3 in
let _x11 = S.fmul (SI.fsquare_times _x9 2) _x2 in
let _x22 = S.fmul (SI.fsquare_times _x11 11) _x11 in
let _x44 = S.fmul (SI.fsquare_times _x22 22) _x22 in
feval h1 tmp == _x11 /\ feval h1 x22 == _x22 /\ feval h1 x44 == _x44 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x22 /\ inv_lazy_reduced2 h1 x44))
let fexp_44 x2 x3 x22 x44 tmp = | true | null | false | let h2 = ST.get () in
fsquare_times tmp x3 3ul;
fmul tmp tmp x3;
let h3 = ST.get () in
assert (feval h3 tmp == S.fmul (SI.fsquare_times (feval h2 x3) 3) (feval h2 x3));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3;
let h4 = ST.get () in
assert (feval h4 tmp == S.fmul (SI.fsquare_times (feval h3 tmp) 3) (feval h2 x3));
fsquare_times_in_place tmp 2ul;
fmul tmp tmp x2;
let h5 = ST.get () in
assert (feval h5 tmp == S.fmul (SI.fsquare_times (feval h4 tmp) 2) (feval h2 x2));
fsquare_times x22 tmp 11ul;
fmul x22 x22 tmp;
let h6 = ST.get () in
assert (feval h6 x22 == S.fmul (SI.fsquare_times (feval h5 tmp) 11) (feval h5 tmp));
fsquare_times x44 x22 22ul;
fmul x44 x44 x22;
let h7 = ST.get () in
assert (feval h7 x44 == S.fmul (SI.fsquare_times (feval h6 x22) 22) (feval h6 x22)) | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [] | [
"Hacl.K256.Field.felem",
"Prims._assert",
"Prims.eq2",
"Spec.K256.PointOps.felem",
"Hacl.K256.Field.feval",
"Spec.K256.PointOps.fmul",
"Hacl.Spec.K256.Finv.fsquare_times",
"Prims.unit",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fmul",
"Hacl.Impl.K256.Finv.fsquare_times",
"FStar.UInt32.__uint_to_t",
"Hacl.Impl.K256.Finv.fsquare_times_in_place"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract
val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = fsqr xx x
inline_for_extraction noextract
let mk_k256_prime_concrete_ops : BE.concrete_ops U64 5ul 0ul = {
BE.to = mk_to_k256_prime_comm_monoid;
BE.lone = one_mod;
BE.lmul = mul_mod;
BE.lsqr = sqr_mod;
}
val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b))
[@CInline]
let fsquare_times_in_place out b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 out) (v b);
BE.lexp_pow2_in_place 5ul 0ul mk_k256_prime_concrete_ops (null uint64) out b
val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b))
[@CInline]
let fsquare_times out a b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 a) (v b);
BE.lexp_pow2 5ul 0ul mk_k256_prime_concrete_ops (null uint64) a b out
inline_for_extraction noextract
val fexp_44 (x2 x3 x22 x44 tmp:felem) : Stack unit
(requires fun h ->
live h x2 /\ live h x3 /\ live h x22 /\ live h x44 /\ live h tmp /\
disjoint x2 x3 /\ disjoint x2 x22 /\ disjoint x2 x44 /\
disjoint x2 tmp /\ disjoint x3 x22 /\ disjoint x3 x44 /\
disjoint x3 tmp /\ disjoint x22 x44 /\ disjoint x22 tmp /\
disjoint x44 tmp /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h x3)
(ensures fun h0 _ h1 -> modifies (loc x22 |+| loc x44 |+| loc tmp) h0 h1 /\
(let _x2 = feval h0 x2 in
let _x3 = feval h0 x3 in
let _x6 = S.fmul (SI.fsquare_times _x3 3) _x3 in
let _x9 = S.fmul (SI.fsquare_times _x6 3) _x3 in
let _x11 = S.fmul (SI.fsquare_times _x9 2) _x2 in
let _x22 = S.fmul (SI.fsquare_times _x11 11) _x11 in
let _x44 = S.fmul (SI.fsquare_times _x22 22) _x22 in
feval h1 tmp == _x11 /\ feval h1 x22 == _x22 /\ feval h1 x44 == _x44 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x22 /\ inv_lazy_reduced2 h1 x44)) | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val fexp_44 (x2 x3 x22 x44 tmp:felem) : Stack unit
(requires fun h ->
live h x2 /\ live h x3 /\ live h x22 /\ live h x44 /\ live h tmp /\
disjoint x2 x3 /\ disjoint x2 x22 /\ disjoint x2 x44 /\
disjoint x2 tmp /\ disjoint x3 x22 /\ disjoint x3 x44 /\
disjoint x3 tmp /\ disjoint x22 x44 /\ disjoint x22 tmp /\
disjoint x44 tmp /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h x3)
(ensures fun h0 _ h1 -> modifies (loc x22 |+| loc x44 |+| loc tmp) h0 h1 /\
(let _x2 = feval h0 x2 in
let _x3 = feval h0 x3 in
let _x6 = S.fmul (SI.fsquare_times _x3 3) _x3 in
let _x9 = S.fmul (SI.fsquare_times _x6 3) _x3 in
let _x11 = S.fmul (SI.fsquare_times _x9 2) _x2 in
let _x22 = S.fmul (SI.fsquare_times _x11 11) _x11 in
let _x44 = S.fmul (SI.fsquare_times _x22 22) _x22 in
feval h1 tmp == _x11 /\ feval h1 x22 == _x22 /\ feval h1 x44 == _x44 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x22 /\ inv_lazy_reduced2 h1 x44)) | [] | Hacl.Impl.K256.Finv.fexp_44 | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
x2: Hacl.K256.Field.felem ->
x3: Hacl.K256.Field.felem ->
x22: Hacl.K256.Field.felem ->
x44: Hacl.K256.Field.felem ->
tmp: Hacl.K256.Field.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 85,
"end_line": 142,
"start_col": 31,
"start_line": 117
} |
FStar.HyperStack.ST.Stack | val fsqrt (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.fsqrt (feval h0 f) /\
inv_lazy_reduced2 h1 out) | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let fsqrt out f =
let h0 = ST.get () in
SI.fsqrt_is_fsqrt_lemma (feval h0 f);
push_frame ();
let x2 = create_felem () in
fexp_223_23 out x2 f;
let h1 = ST.get () in
fsquare_times_in_place out 6ul;
fmul out out x2; // out = r = S.fmul (fsquare_times r 6) x2
let h2 = ST.get () in
assert (feval h2 out == S.fmul (SI.fsquare_times (feval h1 out) 6) (feval h1 x2));
fsquare_times_in_place out 2ul;
let h3 = ST.get () in
assert (feval h3 out == SI.fsquare_times (feval h2 out) 2);
assert (feval h3 out == S.fsqrt (feval h0 f) /\ inv_lazy_reduced2 h3 out);
pop_frame () | val fsqrt (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.fsqrt (feval h0 f) /\
inv_lazy_reduced2 h1 out)
let fsqrt out f = | true | null | false | let h0 = ST.get () in
SI.fsqrt_is_fsqrt_lemma (feval h0 f);
push_frame ();
let x2 = create_felem () in
fexp_223_23 out x2 f;
let h1 = ST.get () in
fsquare_times_in_place out 6ul;
fmul out out x2;
let h2 = ST.get () in
assert (feval h2 out == S.fmul (SI.fsquare_times (feval h1 out) 6) (feval h1 x2));
fsquare_times_in_place out 2ul;
let h3 = ST.get () in
assert (feval h3 out == SI.fsquare_times (feval h2 out) 2);
assert (feval h3 out == S.fsqrt (feval h0 f) /\ inv_lazy_reduced2 h3 out);
pop_frame () | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [] | [
"Hacl.K256.Field.felem",
"FStar.HyperStack.ST.pop_frame",
"Prims.unit",
"Prims._assert",
"Prims.l_and",
"Prims.eq2",
"Spec.K256.PointOps.felem",
"Hacl.K256.Field.feval",
"Spec.K256.PointOps.fsqrt",
"Hacl.K256.Field.inv_lazy_reduced2",
"Hacl.Spec.K256.Finv.fsquare_times",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.Impl.K256.Finv.fsquare_times_in_place",
"FStar.UInt32.__uint_to_t",
"Spec.K256.PointOps.fmul",
"Hacl.K256.Field.fmul",
"Hacl.Impl.K256.Finv.fexp_223_23",
"Hacl.K256.Field.create_felem",
"FStar.HyperStack.ST.push_frame",
"Hacl.Spec.K256.Finv.fsqrt_is_fsqrt_lemma"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract
val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = fsqr xx x
inline_for_extraction noextract
let mk_k256_prime_concrete_ops : BE.concrete_ops U64 5ul 0ul = {
BE.to = mk_to_k256_prime_comm_monoid;
BE.lone = one_mod;
BE.lmul = mul_mod;
BE.lsqr = sqr_mod;
}
val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b))
[@CInline]
let fsquare_times_in_place out b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 out) (v b);
BE.lexp_pow2_in_place 5ul 0ul mk_k256_prime_concrete_ops (null uint64) out b
val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b))
[@CInline]
let fsquare_times out a b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 a) (v b);
BE.lexp_pow2 5ul 0ul mk_k256_prime_concrete_ops (null uint64) a b out
inline_for_extraction noextract
val fexp_44 (x2 x3 x22 x44 tmp:felem) : Stack unit
(requires fun h ->
live h x2 /\ live h x3 /\ live h x22 /\ live h x44 /\ live h tmp /\
disjoint x2 x3 /\ disjoint x2 x22 /\ disjoint x2 x44 /\
disjoint x2 tmp /\ disjoint x3 x22 /\ disjoint x3 x44 /\
disjoint x3 tmp /\ disjoint x22 x44 /\ disjoint x22 tmp /\
disjoint x44 tmp /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h x3)
(ensures fun h0 _ h1 -> modifies (loc x22 |+| loc x44 |+| loc tmp) h0 h1 /\
(let _x2 = feval h0 x2 in
let _x3 = feval h0 x3 in
let _x6 = S.fmul (SI.fsquare_times _x3 3) _x3 in
let _x9 = S.fmul (SI.fsquare_times _x6 3) _x3 in
let _x11 = S.fmul (SI.fsquare_times _x9 2) _x2 in
let _x22 = S.fmul (SI.fsquare_times _x11 11) _x11 in
let _x44 = S.fmul (SI.fsquare_times _x22 22) _x22 in
feval h1 tmp == _x11 /\ feval h1 x22 == _x22 /\ feval h1 x44 == _x44 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x22 /\ inv_lazy_reduced2 h1 x44))
let fexp_44 x2 x3 x22 x44 tmp =
let h2 = ST.get () in
fsquare_times tmp x3 3ul;
fmul tmp tmp x3; // tmp = x6 = S.fmul (fsquare_times x3 3) x3
let h3 = ST.get () in
assert (feval h3 tmp == S.fmul (SI.fsquare_times (feval h2 x3) 3) (feval h2 x3));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x9 = S.fmul (fsquare_times x6 3) x3
let h4 = ST.get () in
assert (feval h4 tmp == S.fmul (SI.fsquare_times (feval h3 tmp) 3) (feval h2 x3));
fsquare_times_in_place tmp 2ul;
fmul tmp tmp x2; // tmp = x11 = S.fmul (fsquare_times x9 2) x2
let h5 = ST.get () in
assert (feval h5 tmp == S.fmul (SI.fsquare_times (feval h4 tmp) 2) (feval h2 x2));
fsquare_times x22 tmp 11ul;
fmul x22 x22 tmp; // x22 = S.fmul (fsquare_times x11 11) x11
let h6 = ST.get () in
assert (feval h6 x22 == S.fmul (SI.fsquare_times (feval h5 tmp) 11) (feval h5 tmp));
fsquare_times x44 x22 22ul;
fmul x44 x44 x22; // x44 = S.fmul (fsquare_times x22 22) x22
let h7 = ST.get () in
assert (feval h7 x44 == S.fmul (SI.fsquare_times (feval h6 x22) 22) (feval h6 x22))
inline_for_extraction noextract
val fexp_223 (x3 x44 x88 tmp:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h x44 /\ live h x88 /\ live h tmp /\
disjoint x3 x44 /\ disjoint x3 x88 /\ disjoint x3 tmp /\
disjoint x44 x88 /\ disjoint x44 tmp /\ disjoint x88 tmp /\
inv_lazy_reduced2 h x3 /\ inv_lazy_reduced2 h x44)
(ensures fun h0 _ h1 -> modifies (loc x88 |+| loc tmp) h0 h1 /\
(let _x3 = feval h0 x3 in
let _x44 = feval h0 x44 in
let _x88 = S.fmul (SI.fsquare_times _x44 44) _x44 in
let _x176 = S.fmul (SI.fsquare_times _x88 88) _x88 in
let _x220 = S.fmul (SI.fsquare_times _x176 44) _x44 in
let _x223 = S.fmul (SI.fsquare_times _x220 3) _x3 in
feval h1 tmp == _x223 /\ feval h1 x88 == _x88 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x88))
let fexp_223 x3 x44 x88 tmp =
let h7 = ST.get () in
fsquare_times x88 x44 44ul;
fmul x88 x88 x44; // x88 = S.fmul (fsquare_times x44 44) x44
let h8 = ST.get () in
assert (feval h8 x88 == S.fmul (SI.fsquare_times (feval h7 x44) 44) (feval h7 x44));
fsquare_times tmp x88 88ul;
fmul tmp tmp x88; // tmp = x176 = S.fmul (fsquare_times x88 88) x88
let h9 = ST.get () in
assert (feval h9 tmp == S.fmul (SI.fsquare_times (feval h8 x88) 88) (feval h8 x88));
fsquare_times_in_place tmp 44ul;
fmul tmp tmp x44; // tmp = x220 = S.fmul (fsquare_times x176 44) x44
let h10 = ST.get () in
assert (feval h10 tmp == S.fmul (SI.fsquare_times (feval h9 tmp) 44) (feval h7 x44));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x223 = S.fmul (fsquare_times x220 3) x3
let h11 = ST.get () in
assert (feval h11 tmp == S.fmul (SI.fsquare_times (feval h10 tmp) 3) (feval h7 x3))
val fexp_223_23 (out x2 f:felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ live h x2 /\
disjoint out f /\ disjoint out x2 /\ disjoint f x2 /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc x2) h0 h1 /\
inv_lazy_reduced2 h1 out /\ inv_lazy_reduced2 h1 x2 /\
(feval h1 out, feval h1 x2) == SI.fexp_223_23 (feval h0 f))
[@CInline]
let fexp_223_23 out x2 f =
push_frame ();
let x3 = create_felem () in
let x22 = create_felem () in
let x44 = create_felem () in
let x88 = create_felem () in
let h0 = ST.get () in
fsquare_times x2 f 1ul;
fmul x2 x2 f; // x2 = S.fmul (fsquare_times f 1) f
let h1 = ST.get () in
assert (feval h1 x2 == S.fmul (SI.fsquare_times (feval h0 f) 1) (feval h0 f));
assert (modifies (loc x2) h0 h1);
fsquare_times x3 x2 1ul;
fmul x3 x3 f; // x3 = S.fmul (fsquare_times x2 1) f
let h2 = ST.get () in
assert (feval h2 x3 == S.fmul (SI.fsquare_times (feval h1 x2) 1) (feval h0 f));
assert (modifies (loc x3) h1 h2);
fexp_44 x2 x3 x22 x44 out;
fexp_223 x3 x44 x88 out;
let h3 = ST.get () in
assert (modifies (loc x22 |+| loc x44 |+| loc x88 |+| loc out) h2 h3);
fsquare_times_in_place out 23ul;
fmul out out x22; // out = r = S.fmul (fsquare_times x223 23) x22
let h4 = ST.get () in
assert (feval h4 out == S.fmul (SI.fsquare_times (feval h3 out) 23) (feval h3 x22));
pop_frame ()
val finv (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.finv (feval h0 f) /\
inv_lazy_reduced2 h1 out)
[@CInline]
let finv out f =
let h0 = ST.get () in
SI.finv_is_finv_lemma (feval h0 f);
push_frame ();
let x2 = create_felem () in
fexp_223_23 out x2 f;
let h1 = ST.get () in
fsquare_times_in_place out 5ul;
fmul out out f; // out = r = S.fmul (fsquare_times r 5) f
let h2 = ST.get () in
assert (feval h2 out == S.fmul (SI.fsquare_times (feval h1 out) 5) (feval h0 f));
fsquare_times_in_place out 3ul;
fmul out out x2; // out = r = S.fmul (fsquare_times r 3) x2
let h3 = ST.get () in
assert (feval h3 out == S.fmul (SI.fsquare_times (feval h2 out) 3) (feval h1 x2));
fsquare_times_in_place out 2ul;
fmul out out f; // out = r = S.fmul (fsquare_times r 2) f
let h4 = ST.get () in
assert (feval h4 out == S.fmul (SI.fsquare_times (feval h3 out) 2) (feval h0 f));
assert (feval h4 out == S.finv (feval h0 f) /\ inv_lazy_reduced2 h4 out);
pop_frame ()
val fsqrt (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.fsqrt (feval h0 f) /\
inv_lazy_reduced2 h1 out) | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val fsqrt (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.fsqrt (feval h0 f) /\
inv_lazy_reduced2 h1 out) | [] | Hacl.Impl.K256.Finv.fsqrt | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | out: Hacl.K256.Field.felem -> f: Hacl.K256.Field.felem -> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 14,
"end_line": 288,
"start_col": 17,
"start_line": 271
} |
FStar.HyperStack.ST.Stack | val finv (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.finv (feval h0 f) /\
inv_lazy_reduced2 h1 out) | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let finv out f =
let h0 = ST.get () in
SI.finv_is_finv_lemma (feval h0 f);
push_frame ();
let x2 = create_felem () in
fexp_223_23 out x2 f;
let h1 = ST.get () in
fsquare_times_in_place out 5ul;
fmul out out f; // out = r = S.fmul (fsquare_times r 5) f
let h2 = ST.get () in
assert (feval h2 out == S.fmul (SI.fsquare_times (feval h1 out) 5) (feval h0 f));
fsquare_times_in_place out 3ul;
fmul out out x2; // out = r = S.fmul (fsquare_times r 3) x2
let h3 = ST.get () in
assert (feval h3 out == S.fmul (SI.fsquare_times (feval h2 out) 3) (feval h1 x2));
fsquare_times_in_place out 2ul;
fmul out out f; // out = r = S.fmul (fsquare_times r 2) f
let h4 = ST.get () in
assert (feval h4 out == S.fmul (SI.fsquare_times (feval h3 out) 2) (feval h0 f));
assert (feval h4 out == S.finv (feval h0 f) /\ inv_lazy_reduced2 h4 out);
pop_frame () | val finv (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.finv (feval h0 f) /\
inv_lazy_reduced2 h1 out)
let finv out f = | true | null | false | let h0 = ST.get () in
SI.finv_is_finv_lemma (feval h0 f);
push_frame ();
let x2 = create_felem () in
fexp_223_23 out x2 f;
let h1 = ST.get () in
fsquare_times_in_place out 5ul;
fmul out out f;
let h2 = ST.get () in
assert (feval h2 out == S.fmul (SI.fsquare_times (feval h1 out) 5) (feval h0 f));
fsquare_times_in_place out 3ul;
fmul out out x2;
let h3 = ST.get () in
assert (feval h3 out == S.fmul (SI.fsquare_times (feval h2 out) 3) (feval h1 x2));
fsquare_times_in_place out 2ul;
fmul out out f;
let h4 = ST.get () in
assert (feval h4 out == S.fmul (SI.fsquare_times (feval h3 out) 2) (feval h0 f));
assert (feval h4 out == S.finv (feval h0 f) /\ inv_lazy_reduced2 h4 out);
pop_frame () | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [] | [
"Hacl.K256.Field.felem",
"FStar.HyperStack.ST.pop_frame",
"Prims.unit",
"Prims._assert",
"Prims.l_and",
"Prims.eq2",
"Spec.K256.PointOps.felem",
"Hacl.K256.Field.feval",
"Spec.K256.PointOps.finv",
"Hacl.K256.Field.inv_lazy_reduced2",
"Spec.K256.PointOps.fmul",
"Hacl.Spec.K256.Finv.fsquare_times",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fmul",
"Hacl.Impl.K256.Finv.fsquare_times_in_place",
"FStar.UInt32.__uint_to_t",
"Hacl.Impl.K256.Finv.fexp_223_23",
"Hacl.K256.Field.create_felem",
"FStar.HyperStack.ST.push_frame",
"Hacl.Spec.K256.Finv.finv_is_finv_lemma"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract
val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = fsqr xx x
inline_for_extraction noextract
let mk_k256_prime_concrete_ops : BE.concrete_ops U64 5ul 0ul = {
BE.to = mk_to_k256_prime_comm_monoid;
BE.lone = one_mod;
BE.lmul = mul_mod;
BE.lsqr = sqr_mod;
}
val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b))
[@CInline]
let fsquare_times_in_place out b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 out) (v b);
BE.lexp_pow2_in_place 5ul 0ul mk_k256_prime_concrete_ops (null uint64) out b
val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b))
[@CInline]
let fsquare_times out a b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 a) (v b);
BE.lexp_pow2 5ul 0ul mk_k256_prime_concrete_ops (null uint64) a b out
inline_for_extraction noextract
val fexp_44 (x2 x3 x22 x44 tmp:felem) : Stack unit
(requires fun h ->
live h x2 /\ live h x3 /\ live h x22 /\ live h x44 /\ live h tmp /\
disjoint x2 x3 /\ disjoint x2 x22 /\ disjoint x2 x44 /\
disjoint x2 tmp /\ disjoint x3 x22 /\ disjoint x3 x44 /\
disjoint x3 tmp /\ disjoint x22 x44 /\ disjoint x22 tmp /\
disjoint x44 tmp /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h x3)
(ensures fun h0 _ h1 -> modifies (loc x22 |+| loc x44 |+| loc tmp) h0 h1 /\
(let _x2 = feval h0 x2 in
let _x3 = feval h0 x3 in
let _x6 = S.fmul (SI.fsquare_times _x3 3) _x3 in
let _x9 = S.fmul (SI.fsquare_times _x6 3) _x3 in
let _x11 = S.fmul (SI.fsquare_times _x9 2) _x2 in
let _x22 = S.fmul (SI.fsquare_times _x11 11) _x11 in
let _x44 = S.fmul (SI.fsquare_times _x22 22) _x22 in
feval h1 tmp == _x11 /\ feval h1 x22 == _x22 /\ feval h1 x44 == _x44 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x22 /\ inv_lazy_reduced2 h1 x44))
let fexp_44 x2 x3 x22 x44 tmp =
let h2 = ST.get () in
fsquare_times tmp x3 3ul;
fmul tmp tmp x3; // tmp = x6 = S.fmul (fsquare_times x3 3) x3
let h3 = ST.get () in
assert (feval h3 tmp == S.fmul (SI.fsquare_times (feval h2 x3) 3) (feval h2 x3));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x9 = S.fmul (fsquare_times x6 3) x3
let h4 = ST.get () in
assert (feval h4 tmp == S.fmul (SI.fsquare_times (feval h3 tmp) 3) (feval h2 x3));
fsquare_times_in_place tmp 2ul;
fmul tmp tmp x2; // tmp = x11 = S.fmul (fsquare_times x9 2) x2
let h5 = ST.get () in
assert (feval h5 tmp == S.fmul (SI.fsquare_times (feval h4 tmp) 2) (feval h2 x2));
fsquare_times x22 tmp 11ul;
fmul x22 x22 tmp; // x22 = S.fmul (fsquare_times x11 11) x11
let h6 = ST.get () in
assert (feval h6 x22 == S.fmul (SI.fsquare_times (feval h5 tmp) 11) (feval h5 tmp));
fsquare_times x44 x22 22ul;
fmul x44 x44 x22; // x44 = S.fmul (fsquare_times x22 22) x22
let h7 = ST.get () in
assert (feval h7 x44 == S.fmul (SI.fsquare_times (feval h6 x22) 22) (feval h6 x22))
inline_for_extraction noextract
val fexp_223 (x3 x44 x88 tmp:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h x44 /\ live h x88 /\ live h tmp /\
disjoint x3 x44 /\ disjoint x3 x88 /\ disjoint x3 tmp /\
disjoint x44 x88 /\ disjoint x44 tmp /\ disjoint x88 tmp /\
inv_lazy_reduced2 h x3 /\ inv_lazy_reduced2 h x44)
(ensures fun h0 _ h1 -> modifies (loc x88 |+| loc tmp) h0 h1 /\
(let _x3 = feval h0 x3 in
let _x44 = feval h0 x44 in
let _x88 = S.fmul (SI.fsquare_times _x44 44) _x44 in
let _x176 = S.fmul (SI.fsquare_times _x88 88) _x88 in
let _x220 = S.fmul (SI.fsquare_times _x176 44) _x44 in
let _x223 = S.fmul (SI.fsquare_times _x220 3) _x3 in
feval h1 tmp == _x223 /\ feval h1 x88 == _x88 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x88))
let fexp_223 x3 x44 x88 tmp =
let h7 = ST.get () in
fsquare_times x88 x44 44ul;
fmul x88 x88 x44; // x88 = S.fmul (fsquare_times x44 44) x44
let h8 = ST.get () in
assert (feval h8 x88 == S.fmul (SI.fsquare_times (feval h7 x44) 44) (feval h7 x44));
fsquare_times tmp x88 88ul;
fmul tmp tmp x88; // tmp = x176 = S.fmul (fsquare_times x88 88) x88
let h9 = ST.get () in
assert (feval h9 tmp == S.fmul (SI.fsquare_times (feval h8 x88) 88) (feval h8 x88));
fsquare_times_in_place tmp 44ul;
fmul tmp tmp x44; // tmp = x220 = S.fmul (fsquare_times x176 44) x44
let h10 = ST.get () in
assert (feval h10 tmp == S.fmul (SI.fsquare_times (feval h9 tmp) 44) (feval h7 x44));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x223 = S.fmul (fsquare_times x220 3) x3
let h11 = ST.get () in
assert (feval h11 tmp == S.fmul (SI.fsquare_times (feval h10 tmp) 3) (feval h7 x3))
val fexp_223_23 (out x2 f:felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ live h x2 /\
disjoint out f /\ disjoint out x2 /\ disjoint f x2 /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc x2) h0 h1 /\
inv_lazy_reduced2 h1 out /\ inv_lazy_reduced2 h1 x2 /\
(feval h1 out, feval h1 x2) == SI.fexp_223_23 (feval h0 f))
[@CInline]
let fexp_223_23 out x2 f =
push_frame ();
let x3 = create_felem () in
let x22 = create_felem () in
let x44 = create_felem () in
let x88 = create_felem () in
let h0 = ST.get () in
fsquare_times x2 f 1ul;
fmul x2 x2 f; // x2 = S.fmul (fsquare_times f 1) f
let h1 = ST.get () in
assert (feval h1 x2 == S.fmul (SI.fsquare_times (feval h0 f) 1) (feval h0 f));
assert (modifies (loc x2) h0 h1);
fsquare_times x3 x2 1ul;
fmul x3 x3 f; // x3 = S.fmul (fsquare_times x2 1) f
let h2 = ST.get () in
assert (feval h2 x3 == S.fmul (SI.fsquare_times (feval h1 x2) 1) (feval h0 f));
assert (modifies (loc x3) h1 h2);
fexp_44 x2 x3 x22 x44 out;
fexp_223 x3 x44 x88 out;
let h3 = ST.get () in
assert (modifies (loc x22 |+| loc x44 |+| loc x88 |+| loc out) h2 h3);
fsquare_times_in_place out 23ul;
fmul out out x22; // out = r = S.fmul (fsquare_times x223 23) x22
let h4 = ST.get () in
assert (feval h4 out == S.fmul (SI.fsquare_times (feval h3 out) 23) (feval h3 x22));
pop_frame ()
val finv (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.finv (feval h0 f) /\
inv_lazy_reduced2 h1 out) | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val finv (out f: felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ disjoint out f /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\
feval h1 out == S.finv (feval h0 f) /\
inv_lazy_reduced2 h1 out) | [] | Hacl.Impl.K256.Finv.finv | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | out: Hacl.K256.Field.felem -> f: Hacl.K256.Field.felem -> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 14,
"end_line": 259,
"start_col": 16,
"start_line": 236
} |
FStar.HyperStack.ST.Stack | val fexp_223_23 (out x2 f:felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ live h x2 /\
disjoint out f /\ disjoint out x2 /\ disjoint f x2 /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc x2) h0 h1 /\
inv_lazy_reduced2 h1 out /\ inv_lazy_reduced2 h1 x2 /\
(feval h1 out, feval h1 x2) == SI.fexp_223_23 (feval h0 f)) | [
{
"abbrev": true,
"full_module": "Hacl.Impl.Exponentiation",
"short_module": "BE"
},
{
"abbrev": true,
"full_module": "Spec.Exponentiation",
"short_module": "SE"
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Finv",
"short_module": "SI"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "Lib.Sequence",
"short_module": "LSeq"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let fexp_223_23 out x2 f =
push_frame ();
let x3 = create_felem () in
let x22 = create_felem () in
let x44 = create_felem () in
let x88 = create_felem () in
let h0 = ST.get () in
fsquare_times x2 f 1ul;
fmul x2 x2 f; // x2 = S.fmul (fsquare_times f 1) f
let h1 = ST.get () in
assert (feval h1 x2 == S.fmul (SI.fsquare_times (feval h0 f) 1) (feval h0 f));
assert (modifies (loc x2) h0 h1);
fsquare_times x3 x2 1ul;
fmul x3 x3 f; // x3 = S.fmul (fsquare_times x2 1) f
let h2 = ST.get () in
assert (feval h2 x3 == S.fmul (SI.fsquare_times (feval h1 x2) 1) (feval h0 f));
assert (modifies (loc x3) h1 h2);
fexp_44 x2 x3 x22 x44 out;
fexp_223 x3 x44 x88 out;
let h3 = ST.get () in
assert (modifies (loc x22 |+| loc x44 |+| loc x88 |+| loc out) h2 h3);
fsquare_times_in_place out 23ul;
fmul out out x22; // out = r = S.fmul (fsquare_times x223 23) x22
let h4 = ST.get () in
assert (feval h4 out == S.fmul (SI.fsquare_times (feval h3 out) 23) (feval h3 x22));
pop_frame () | val fexp_223_23 (out x2 f:felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ live h x2 /\
disjoint out f /\ disjoint out x2 /\ disjoint f x2 /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc x2) h0 h1 /\
inv_lazy_reduced2 h1 out /\ inv_lazy_reduced2 h1 x2 /\
(feval h1 out, feval h1 x2) == SI.fexp_223_23 (feval h0 f))
let fexp_223_23 out x2 f = | true | null | false | push_frame ();
let x3 = create_felem () in
let x22 = create_felem () in
let x44 = create_felem () in
let x88 = create_felem () in
let h0 = ST.get () in
fsquare_times x2 f 1ul;
fmul x2 x2 f;
let h1 = ST.get () in
assert (feval h1 x2 == S.fmul (SI.fsquare_times (feval h0 f) 1) (feval h0 f));
assert (modifies (loc x2) h0 h1);
fsquare_times x3 x2 1ul;
fmul x3 x3 f;
let h2 = ST.get () in
assert (feval h2 x3 == S.fmul (SI.fsquare_times (feval h1 x2) 1) (feval h0 f));
assert (modifies (loc x3) h1 h2);
fexp_44 x2 x3 x22 x44 out;
fexp_223 x3 x44 x88 out;
let h3 = ST.get () in
assert (modifies (loc x22 |+| loc x44 |+| loc x88 |+| loc out) h2 h3);
fsquare_times_in_place out 23ul;
fmul out out x22;
let h4 = ST.get () in
assert (feval h4 out == S.fmul (SI.fsquare_times (feval h3 out) 23) (feval h3 x22));
pop_frame () | {
"checked_file": "Hacl.Impl.K256.Finv.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"Spec.Exponentiation.fsti.checked",
"prims.fst.checked",
"Lib.Sequence.fsti.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Finv.fst.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.Exponentiation.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.Finv.fst"
} | [] | [
"Hacl.K256.Field.felem",
"FStar.HyperStack.ST.pop_frame",
"Prims.unit",
"Prims._assert",
"Prims.eq2",
"Spec.K256.PointOps.felem",
"Hacl.K256.Field.feval",
"Spec.K256.PointOps.fmul",
"Hacl.Spec.K256.Finv.fsquare_times",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fmul",
"Hacl.Impl.K256.Finv.fsquare_times_in_place",
"FStar.UInt32.__uint_to_t",
"Lib.Buffer.modifies",
"Lib.Buffer.op_Bar_Plus_Bar",
"Lib.Buffer.loc",
"Lib.Buffer.MUT",
"Lib.IntTypes.uint64",
"Hacl.Impl.K256.Finv.fexp_223",
"Hacl.Impl.K256.Finv.fexp_44",
"Hacl.Impl.K256.Finv.fsquare_times",
"Hacl.K256.Field.create_felem",
"FStar.HyperStack.ST.push_frame"
] | [] | module Hacl.Impl.K256.Finv
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
open Hacl.K256.Field
module ST = FStar.HyperStack.ST
module LSeq = Lib.Sequence
module S = Spec.K256
module SI = Hacl.Spec.K256.Finv
module SE = Spec.Exponentiation
module BE = Hacl.Impl.Exponentiation
#set-options "--z3rlimit 50 --fuel 0 --ifuel 0"
unfold
let linv_ctx (a:LSeq.lseq uint64 0) : Type0 = True
unfold
let linv (a:LSeq.lseq uint64 5) : Type0 =
let open Lib.Sequence in
inv_lazy_reduced2_5 (a.[0],a.[1],a.[2],a.[3],a.[4])
unfold
let refl (a:LSeq.lseq uint64 5{linv a}) : GTot S.felem =
let open Lib.Sequence in
feval5 (a.[0],a.[1],a.[2],a.[3],a.[4])
inline_for_extraction noextract
let mk_to_k256_prime_comm_monoid : BE.to_comm_monoid U64 5ul 0ul = {
BE.a_spec = S.felem;
BE.comm_monoid = SI.nat_mod_comm_monoid;
BE.linv_ctx = linv_ctx;
BE.linv = linv;
BE.refl = refl;
}
inline_for_extraction noextract
val one_mod : BE.lone_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let one_mod ctx one = make_u52_5 one (u64 1, u64 0, u64 0, u64 0, u64 0)
inline_for_extraction noextract
val mul_mod : BE.lmul_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let mul_mod ctx x y xy = fmul xy x y
inline_for_extraction noextract
val sqr_mod : BE.lsqr_st U64 5ul 0ul mk_to_k256_prime_comm_monoid
let sqr_mod ctx x xx = fsqr xx x
inline_for_extraction noextract
let mk_k256_prime_concrete_ops : BE.concrete_ops U64 5ul 0ul = {
BE.to = mk_to_k256_prime_comm_monoid;
BE.lone = one_mod;
BE.lmul = mul_mod;
BE.lsqr = sqr_mod;
}
val fsquare_times_in_place (out:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ inv_lazy_reduced2 h out)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 out) (v b))
[@CInline]
let fsquare_times_in_place out b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 out) (v b);
BE.lexp_pow2_in_place 5ul 0ul mk_k256_prime_concrete_ops (null uint64) out b
val fsquare_times (out a:felem) (b:size_t) : Stack unit
(requires fun h ->
live h out /\ live h a /\ disjoint out a /\
inv_lazy_reduced2 h a)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ inv_lazy_reduced2 h1 out /\
feval h1 out == SI.fsquare_times (feval h0 a) (v b))
[@CInline]
let fsquare_times out a b =
let h0 = ST.get () in
SE.exp_pow2_lemma SI.mk_nat_mod_concrete_ops (feval h0 a) (v b);
BE.lexp_pow2 5ul 0ul mk_k256_prime_concrete_ops (null uint64) a b out
inline_for_extraction noextract
val fexp_44 (x2 x3 x22 x44 tmp:felem) : Stack unit
(requires fun h ->
live h x2 /\ live h x3 /\ live h x22 /\ live h x44 /\ live h tmp /\
disjoint x2 x3 /\ disjoint x2 x22 /\ disjoint x2 x44 /\
disjoint x2 tmp /\ disjoint x3 x22 /\ disjoint x3 x44 /\
disjoint x3 tmp /\ disjoint x22 x44 /\ disjoint x22 tmp /\
disjoint x44 tmp /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h x3)
(ensures fun h0 _ h1 -> modifies (loc x22 |+| loc x44 |+| loc tmp) h0 h1 /\
(let _x2 = feval h0 x2 in
let _x3 = feval h0 x3 in
let _x6 = S.fmul (SI.fsquare_times _x3 3) _x3 in
let _x9 = S.fmul (SI.fsquare_times _x6 3) _x3 in
let _x11 = S.fmul (SI.fsquare_times _x9 2) _x2 in
let _x22 = S.fmul (SI.fsquare_times _x11 11) _x11 in
let _x44 = S.fmul (SI.fsquare_times _x22 22) _x22 in
feval h1 tmp == _x11 /\ feval h1 x22 == _x22 /\ feval h1 x44 == _x44 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x22 /\ inv_lazy_reduced2 h1 x44))
let fexp_44 x2 x3 x22 x44 tmp =
let h2 = ST.get () in
fsquare_times tmp x3 3ul;
fmul tmp tmp x3; // tmp = x6 = S.fmul (fsquare_times x3 3) x3
let h3 = ST.get () in
assert (feval h3 tmp == S.fmul (SI.fsquare_times (feval h2 x3) 3) (feval h2 x3));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x9 = S.fmul (fsquare_times x6 3) x3
let h4 = ST.get () in
assert (feval h4 tmp == S.fmul (SI.fsquare_times (feval h3 tmp) 3) (feval h2 x3));
fsquare_times_in_place tmp 2ul;
fmul tmp tmp x2; // tmp = x11 = S.fmul (fsquare_times x9 2) x2
let h5 = ST.get () in
assert (feval h5 tmp == S.fmul (SI.fsquare_times (feval h4 tmp) 2) (feval h2 x2));
fsquare_times x22 tmp 11ul;
fmul x22 x22 tmp; // x22 = S.fmul (fsquare_times x11 11) x11
let h6 = ST.get () in
assert (feval h6 x22 == S.fmul (SI.fsquare_times (feval h5 tmp) 11) (feval h5 tmp));
fsquare_times x44 x22 22ul;
fmul x44 x44 x22; // x44 = S.fmul (fsquare_times x22 22) x22
let h7 = ST.get () in
assert (feval h7 x44 == S.fmul (SI.fsquare_times (feval h6 x22) 22) (feval h6 x22))
inline_for_extraction noextract
val fexp_223 (x3 x44 x88 tmp:felem) : Stack unit
(requires fun h ->
live h x3 /\ live h x44 /\ live h x88 /\ live h tmp /\
disjoint x3 x44 /\ disjoint x3 x88 /\ disjoint x3 tmp /\
disjoint x44 x88 /\ disjoint x44 tmp /\ disjoint x88 tmp /\
inv_lazy_reduced2 h x3 /\ inv_lazy_reduced2 h x44)
(ensures fun h0 _ h1 -> modifies (loc x88 |+| loc tmp) h0 h1 /\
(let _x3 = feval h0 x3 in
let _x44 = feval h0 x44 in
let _x88 = S.fmul (SI.fsquare_times _x44 44) _x44 in
let _x176 = S.fmul (SI.fsquare_times _x88 88) _x88 in
let _x220 = S.fmul (SI.fsquare_times _x176 44) _x44 in
let _x223 = S.fmul (SI.fsquare_times _x220 3) _x3 in
feval h1 tmp == _x223 /\ feval h1 x88 == _x88 /\
inv_lazy_reduced2 h1 tmp /\ inv_lazy_reduced2 h1 x88))
let fexp_223 x3 x44 x88 tmp =
let h7 = ST.get () in
fsquare_times x88 x44 44ul;
fmul x88 x88 x44; // x88 = S.fmul (fsquare_times x44 44) x44
let h8 = ST.get () in
assert (feval h8 x88 == S.fmul (SI.fsquare_times (feval h7 x44) 44) (feval h7 x44));
fsquare_times tmp x88 88ul;
fmul tmp tmp x88; // tmp = x176 = S.fmul (fsquare_times x88 88) x88
let h9 = ST.get () in
assert (feval h9 tmp == S.fmul (SI.fsquare_times (feval h8 x88) 88) (feval h8 x88));
fsquare_times_in_place tmp 44ul;
fmul tmp tmp x44; // tmp = x220 = S.fmul (fsquare_times x176 44) x44
let h10 = ST.get () in
assert (feval h10 tmp == S.fmul (SI.fsquare_times (feval h9 tmp) 44) (feval h7 x44));
fsquare_times_in_place tmp 3ul;
fmul tmp tmp x3; // tmp = x223 = S.fmul (fsquare_times x220 3) x3
let h11 = ST.get () in
assert (feval h11 tmp == S.fmul (SI.fsquare_times (feval h10 tmp) 3) (feval h7 x3))
val fexp_223_23 (out x2 f:felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ live h x2 /\
disjoint out f /\ disjoint out x2 /\ disjoint f x2 /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc x2) h0 h1 /\
inv_lazy_reduced2 h1 out /\ inv_lazy_reduced2 h1 x2 /\
(feval h1 out, feval h1 x2) == SI.fexp_223_23 (feval h0 f))
[@CInline] | false | false | Hacl.Impl.K256.Finv.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 50,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val fexp_223_23 (out x2 f:felem) : Stack unit
(requires fun h ->
live h out /\ live h f /\ live h x2 /\
disjoint out f /\ disjoint out x2 /\ disjoint f x2 /\
inv_lazy_reduced2 h f)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc x2) h0 h1 /\
inv_lazy_reduced2 h1 out /\ inv_lazy_reduced2 h1 x2 /\
(feval h1 out, feval h1 x2) == SI.fexp_223_23 (feval h0 f)) | [] | Hacl.Impl.K256.Finv.fexp_223_23 | {
"file_name": "code/k256/Hacl.Impl.K256.Finv.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | out: Hacl.K256.Field.felem -> x2: Hacl.K256.Field.felem -> f: Hacl.K256.Field.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 14,
"end_line": 224,
"start_col": 2,
"start_line": 196
} |
FStar.HyperStack.ST.Stack | val ab_plus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (3,3,3,3,6) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fadd
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c) | [
{
"abbrev": false,
"full_module": "Hacl.Impl.K256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Field52.Lemmas",
"short_module": "BL"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let ab_plus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c);
fadd c tmp c;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (2,2,2,2,4));
fnormalize_weak c c;
BL.normalize_weak5_lemma (2,2,2,2,4) (as_felem5 h2 c) | val ab_plus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (3,3,3,3,6) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fadd
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_plus_cd a b c d tmp = | true | null | false | fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fadd5_lemma (1, 1, 1, 1, 2) (1, 1, 1, 1, 2) (as_felem5 h1 tmp) (as_felem5 h1 c);
fadd c tmp c;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (2, 2, 2, 2, 4));
fnormalize_weak c c;
BL.normalize_weak5_lemma (2, 2, 2, 2, 4) (as_felem5 h2 c) | {
"checked_file": "Hacl.Impl.K256.PointAdd.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Field52.Lemmas.fsti.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.K256.Point.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.PointAdd.fst"
} | [] | [
"Hacl.K256.Field.felem",
"Hacl.Spec.K256.Field52.Lemmas.normalize_weak5_lemma",
"FStar.Pervasives.Native.Mktuple5",
"Prims.nat",
"Hacl.K256.Field.as_felem5",
"Prims.unit",
"Hacl.K256.Field.fnormalize_weak",
"Prims._assert",
"Hacl.Spec.K256.Field52.Definitions.felem_fits5",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fadd",
"Hacl.Spec.K256.Field52.Lemmas.fadd5_lemma",
"Hacl.K256.Field.inv_lazy_reduced2",
"Hacl.K256.Field.fmul"
] | [] | module Hacl.Impl.K256.PointAdd
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
module ST = FStar.HyperStack.ST
module S = Spec.K256
module BL = Hacl.Spec.K256.Field52.Lemmas
open Hacl.K256.Field
open Hacl.Impl.K256.Point
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
inline_for_extraction noextract
val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10))
let point_add_xy_pairs x1 y1 x2 y2 xx yy tmp xy_pairs =
let h0 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x1) (as_felem5 h0 y1);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x2) (as_felem5 h0 y2);
fadd xy_pairs x1 y1;
fadd tmp x2 y2;
let h1 = ST.get () in
assert (felem_fits5 (as_felem5 h1 xy_pairs) (2,2,2,2,4));
assert (felem_fits5 (as_felem5 h1 tmp) (2,2,2,2,4));
fmul xy_pairs xy_pairs tmp;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 xy_pairs) (1,1,1,1,2));
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h2 xx) (as_felem5 h2 yy);
fadd tmp xx yy;
let h3 = ST.get () in
assert (felem_fits5 (as_felem5 h3 tmp) (2,2,2,2,4));
fsub xy_pairs xy_pairs tmp (u64 4);
let h4 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (2,2,2,2,4) (as_felem5 h3 xy_pairs) (as_felem5 h3 tmp) (u64 4);
assert (felem_fits5 (as_felem5 h4 xy_pairs) (9,9,9,9,10))
inline_for_extraction noextract
val ab_plus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (3,3,3,3,6) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fadd
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c) | false | false | Hacl.Impl.K256.PointAdd.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val ab_plus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (3,3,3,3,6) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fadd
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c) | [] | Hacl.Impl.K256.PointAdd.ab_plus_cd | {
"file_name": "code/k256/Hacl.Impl.K256.PointAdd.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
a: Hacl.K256.Field.felem ->
b: Hacl.K256.Field.felem ->
c: Hacl.K256.Field.felem ->
d: Hacl.K256.Field.felem ->
tmp: Hacl.K256.Field.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 55,
"end_line": 92,
"start_col": 2,
"start_line": 82
} |
FStar.HyperStack.ST.Stack | val ab_minus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (1,1,1,1,2) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fsub
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c) | [
{
"abbrev": false,
"full_module": "Hacl.Impl.K256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Field52.Lemmas",
"short_module": "BL"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let ab_minus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fsub5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c) (u64 2);
fsub c tmp c (u64 2);
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (5,5,5,5,6));
fnormalize_weak c c;
BL.normalize_weak5_lemma (5,5,5,5,6) (as_felem5 h2 c) | val ab_minus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (1,1,1,1,2) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fsub
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_minus_cd a b c d tmp = | true | null | false | fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fsub5_lemma (1, 1, 1, 1, 2) (1, 1, 1, 1, 2) (as_felem5 h1 tmp) (as_felem5 h1 c) (u64 2);
fsub c tmp c (u64 2);
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (5, 5, 5, 5, 6));
fnormalize_weak c c;
BL.normalize_weak5_lemma (5, 5, 5, 5, 6) (as_felem5 h2 c) | {
"checked_file": "Hacl.Impl.K256.PointAdd.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Field52.Lemmas.fsti.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.K256.Point.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.PointAdd.fst"
} | [] | [
"Hacl.K256.Field.felem",
"Hacl.Spec.K256.Field52.Lemmas.normalize_weak5_lemma",
"FStar.Pervasives.Native.Mktuple5",
"Prims.nat",
"Hacl.K256.Field.as_felem5",
"Prims.unit",
"Hacl.K256.Field.fnormalize_weak",
"Prims._assert",
"Hacl.Spec.K256.Field52.Definitions.felem_fits5",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fsub",
"Lib.IntTypes.u64",
"Hacl.Spec.K256.Field52.Lemmas.fsub5_lemma",
"Hacl.K256.Field.inv_lazy_reduced2",
"Hacl.K256.Field.fmul"
] | [] | module Hacl.Impl.K256.PointAdd
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
module ST = FStar.HyperStack.ST
module S = Spec.K256
module BL = Hacl.Spec.K256.Field52.Lemmas
open Hacl.K256.Field
open Hacl.Impl.K256.Point
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
inline_for_extraction noextract
val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10))
let point_add_xy_pairs x1 y1 x2 y2 xx yy tmp xy_pairs =
let h0 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x1) (as_felem5 h0 y1);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x2) (as_felem5 h0 y2);
fadd xy_pairs x1 y1;
fadd tmp x2 y2;
let h1 = ST.get () in
assert (felem_fits5 (as_felem5 h1 xy_pairs) (2,2,2,2,4));
assert (felem_fits5 (as_felem5 h1 tmp) (2,2,2,2,4));
fmul xy_pairs xy_pairs tmp;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 xy_pairs) (1,1,1,1,2));
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h2 xx) (as_felem5 h2 yy);
fadd tmp xx yy;
let h3 = ST.get () in
assert (felem_fits5 (as_felem5 h3 tmp) (2,2,2,2,4));
fsub xy_pairs xy_pairs tmp (u64 4);
let h4 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (2,2,2,2,4) (as_felem5 h3 xy_pairs) (as_felem5 h3 tmp) (u64 4);
assert (felem_fits5 (as_felem5 h4 xy_pairs) (9,9,9,9,10))
inline_for_extraction noextract
val ab_plus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (3,3,3,3,6) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fadd
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_plus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c);
fadd c tmp c;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (2,2,2,2,4));
fnormalize_weak c c;
BL.normalize_weak5_lemma (2,2,2,2,4) (as_felem5 h2 c)
inline_for_extraction noextract
val ab_minus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (1,1,1,1,2) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fsub
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c) | false | false | Hacl.Impl.K256.PointAdd.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val ab_minus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (1,1,1,1,2) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fsub
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c) | [] | Hacl.Impl.K256.PointAdd.ab_minus_cd | {
"file_name": "code/k256/Hacl.Impl.K256.PointAdd.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
a: Hacl.K256.Field.felem ->
b: Hacl.K256.Field.felem ->
c: Hacl.K256.Field.felem ->
d: Hacl.K256.Field.felem ->
tmp: Hacl.K256.Field.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 55,
"end_line": 124,
"start_col": 2,
"start_line": 114
} |
FStar.HyperStack.ST.Stack | val yy_mp_bzz3 (zz yy tmp1 yy_m_bzz3 yy_p_bzz3:felem) : Stack unit
(requires fun h ->
live h zz /\ live h yy /\ live h tmp1 /\
live h yy_m_bzz3 /\ live h yy_p_bzz3 /\
disjoint zz yy /\ disjoint zz tmp1 /\ disjoint zz yy_m_bzz3 /\
disjoint zz yy_p_bzz3 /\ disjoint yy tmp1 /\ disjoint yy yy_m_bzz3 /\
disjoint yy yy_p_bzz3 /\ disjoint tmp1 yy_m_bzz3 /\
disjoint tmp1 yy_p_bzz3 /\ disjoint yy_m_bzz3 yy_p_bzz3 /\
inv_lazy_reduced2 h zz /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 ->
modifies (loc tmp1 |+| loc yy_m_bzz3 |+| loc yy_p_bzz3) h0 h1 /\
(let bzz3 = S.fmul (S.fmul 3 S.b) (feval h0 zz) in
feval h1 yy_m_bzz3 = S.fsub (feval h0 yy) bzz3 /\
feval h1 yy_p_bzz3 = S.fadd (feval h0 yy) bzz3 /\
felem_fits5 (as_felem5 h1 yy_m_bzz3) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h1 yy_p_bzz3) (2,2,2,2,4))) | [
{
"abbrev": false,
"full_module": "Hacl.Impl.K256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Field52.Lemmas",
"short_module": "BL"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let yy_mp_bzz3 zz yy tmp1 yy_m_bzz3 yy_p_bzz3 =
fmul_3b_normalize_weak tmp1 zz; //tmp1 = bzz3 = (3*b)*zz
let h1 = ST.get () in
// assert (felem_fits5 (as_felem5 h1 tmp1) (1,1,1,1,2));
fsub yy_m_bzz3 yy tmp1 (u64 2); //yy_m_bzz3 = yy-bzz3
let h2 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 yy) (as_felem5 h1 tmp1) (u64 2);
// assert (felem_fits5 (as_felem5 h5 yy_m_bzz3) (5,5,5,5,6));
fadd yy_p_bzz3 yy tmp1; //yy_p_bzz3 = yy+bzz3
let h3 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 yy) (as_felem5 h1 tmp1) | val yy_mp_bzz3 (zz yy tmp1 yy_m_bzz3 yy_p_bzz3:felem) : Stack unit
(requires fun h ->
live h zz /\ live h yy /\ live h tmp1 /\
live h yy_m_bzz3 /\ live h yy_p_bzz3 /\
disjoint zz yy /\ disjoint zz tmp1 /\ disjoint zz yy_m_bzz3 /\
disjoint zz yy_p_bzz3 /\ disjoint yy tmp1 /\ disjoint yy yy_m_bzz3 /\
disjoint yy yy_p_bzz3 /\ disjoint tmp1 yy_m_bzz3 /\
disjoint tmp1 yy_p_bzz3 /\ disjoint yy_m_bzz3 yy_p_bzz3 /\
inv_lazy_reduced2 h zz /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 ->
modifies (loc tmp1 |+| loc yy_m_bzz3 |+| loc yy_p_bzz3) h0 h1 /\
(let bzz3 = S.fmul (S.fmul 3 S.b) (feval h0 zz) in
feval h1 yy_m_bzz3 = S.fsub (feval h0 yy) bzz3 /\
feval h1 yy_p_bzz3 = S.fadd (feval h0 yy) bzz3 /\
felem_fits5 (as_felem5 h1 yy_m_bzz3) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h1 yy_p_bzz3) (2,2,2,2,4)))
let yy_mp_bzz3 zz yy tmp1 yy_m_bzz3 yy_p_bzz3 = | true | null | false | fmul_3b_normalize_weak tmp1 zz;
let h1 = ST.get () in
fsub yy_m_bzz3 yy tmp1 (u64 2);
let h2 = ST.get () in
BL.fsub5_lemma (1, 1, 1, 1, 2) (1, 1, 1, 1, 2) (as_felem5 h1 yy) (as_felem5 h1 tmp1) (u64 2);
fadd yy_p_bzz3 yy tmp1;
let h3 = ST.get () in
BL.fadd5_lemma (1, 1, 1, 1, 2) (1, 1, 1, 1, 2) (as_felem5 h1 yy) (as_felem5 h1 tmp1) | {
"checked_file": "Hacl.Impl.K256.PointAdd.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Field52.Lemmas.fsti.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.K256.Point.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.PointAdd.fst"
} | [] | [
"Hacl.K256.Field.felem",
"Hacl.Spec.K256.Field52.Lemmas.fadd5_lemma",
"FStar.Pervasives.Native.Mktuple5",
"Prims.nat",
"Hacl.K256.Field.as_felem5",
"Prims.unit",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fadd",
"Hacl.Spec.K256.Field52.Lemmas.fsub5_lemma",
"Lib.IntTypes.u64",
"Hacl.K256.Field.fsub",
"Hacl.K256.Field.fmul_3b_normalize_weak"
] | [] | module Hacl.Impl.K256.PointAdd
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
module ST = FStar.HyperStack.ST
module S = Spec.K256
module BL = Hacl.Spec.K256.Field52.Lemmas
open Hacl.K256.Field
open Hacl.Impl.K256.Point
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
inline_for_extraction noextract
val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10))
let point_add_xy_pairs x1 y1 x2 y2 xx yy tmp xy_pairs =
let h0 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x1) (as_felem5 h0 y1);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x2) (as_felem5 h0 y2);
fadd xy_pairs x1 y1;
fadd tmp x2 y2;
let h1 = ST.get () in
assert (felem_fits5 (as_felem5 h1 xy_pairs) (2,2,2,2,4));
assert (felem_fits5 (as_felem5 h1 tmp) (2,2,2,2,4));
fmul xy_pairs xy_pairs tmp;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 xy_pairs) (1,1,1,1,2));
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h2 xx) (as_felem5 h2 yy);
fadd tmp xx yy;
let h3 = ST.get () in
assert (felem_fits5 (as_felem5 h3 tmp) (2,2,2,2,4));
fsub xy_pairs xy_pairs tmp (u64 4);
let h4 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (2,2,2,2,4) (as_felem5 h3 xy_pairs) (as_felem5 h3 tmp) (u64 4);
assert (felem_fits5 (as_felem5 h4 xy_pairs) (9,9,9,9,10))
inline_for_extraction noextract
val ab_plus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (3,3,3,3,6) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fadd
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_plus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c);
fadd c tmp c;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (2,2,2,2,4));
fnormalize_weak c c;
BL.normalize_weak5_lemma (2,2,2,2,4) (as_felem5 h2 c)
inline_for_extraction noextract
val ab_minus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (1,1,1,1,2) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fsub
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_minus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fsub5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c) (u64 2);
fsub c tmp c (u64 2);
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (5,5,5,5,6));
fnormalize_weak c c;
BL.normalize_weak5_lemma (5,5,5,5,6) (as_felem5 h2 c)
inline_for_extraction noextract
val yy_mp_bzz3 (zz yy tmp1 yy_m_bzz3 yy_p_bzz3:felem) : Stack unit
(requires fun h ->
live h zz /\ live h yy /\ live h tmp1 /\
live h yy_m_bzz3 /\ live h yy_p_bzz3 /\
disjoint zz yy /\ disjoint zz tmp1 /\ disjoint zz yy_m_bzz3 /\
disjoint zz yy_p_bzz3 /\ disjoint yy tmp1 /\ disjoint yy yy_m_bzz3 /\
disjoint yy yy_p_bzz3 /\ disjoint tmp1 yy_m_bzz3 /\
disjoint tmp1 yy_p_bzz3 /\ disjoint yy_m_bzz3 yy_p_bzz3 /\
inv_lazy_reduced2 h zz /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 ->
modifies (loc tmp1 |+| loc yy_m_bzz3 |+| loc yy_p_bzz3) h0 h1 /\
(let bzz3 = S.fmul (S.fmul 3 S.b) (feval h0 zz) in
feval h1 yy_m_bzz3 = S.fsub (feval h0 yy) bzz3 /\
feval h1 yy_p_bzz3 = S.fadd (feval h0 yy) bzz3 /\
felem_fits5 (as_felem5 h1 yy_m_bzz3) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h1 yy_p_bzz3) (2,2,2,2,4))) | false | false | Hacl.Impl.K256.PointAdd.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val yy_mp_bzz3 (zz yy tmp1 yy_m_bzz3 yy_p_bzz3:felem) : Stack unit
(requires fun h ->
live h zz /\ live h yy /\ live h tmp1 /\
live h yy_m_bzz3 /\ live h yy_p_bzz3 /\
disjoint zz yy /\ disjoint zz tmp1 /\ disjoint zz yy_m_bzz3 /\
disjoint zz yy_p_bzz3 /\ disjoint yy tmp1 /\ disjoint yy yy_m_bzz3 /\
disjoint yy yy_p_bzz3 /\ disjoint tmp1 yy_m_bzz3 /\
disjoint tmp1 yy_p_bzz3 /\ disjoint yy_m_bzz3 yy_p_bzz3 /\
inv_lazy_reduced2 h zz /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 ->
modifies (loc tmp1 |+| loc yy_m_bzz3 |+| loc yy_p_bzz3) h0 h1 /\
(let bzz3 = S.fmul (S.fmul 3 S.b) (feval h0 zz) in
feval h1 yy_m_bzz3 = S.fsub (feval h0 yy) bzz3 /\
feval h1 yy_p_bzz3 = S.fadd (feval h0 yy) bzz3 /\
felem_fits5 (as_felem5 h1 yy_m_bzz3) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h1 yy_p_bzz3) (2,2,2,2,4))) | [] | Hacl.Impl.K256.PointAdd.yy_mp_bzz3 | {
"file_name": "code/k256/Hacl.Impl.K256.PointAdd.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
zz: Hacl.K256.Field.felem ->
yy: Hacl.K256.Field.felem ->
tmp1: Hacl.K256.Field.felem ->
yy_m_bzz3: Hacl.K256.Field.felem ->
yy_p_bzz3: Hacl.K256.Field.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 78,
"end_line": 158,
"start_col": 2,
"start_line": 147
} |
FStar.HyperStack.ST.Stack | val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10)) | [
{
"abbrev": false,
"full_module": "Hacl.Impl.K256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Field52.Lemmas",
"short_module": "BL"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_add_xy_pairs x1 y1 x2 y2 xx yy tmp xy_pairs =
let h0 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x1) (as_felem5 h0 y1);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x2) (as_felem5 h0 y2);
fadd xy_pairs x1 y1;
fadd tmp x2 y2;
let h1 = ST.get () in
assert (felem_fits5 (as_felem5 h1 xy_pairs) (2,2,2,2,4));
assert (felem_fits5 (as_felem5 h1 tmp) (2,2,2,2,4));
fmul xy_pairs xy_pairs tmp;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 xy_pairs) (1,1,1,1,2));
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h2 xx) (as_felem5 h2 yy);
fadd tmp xx yy;
let h3 = ST.get () in
assert (felem_fits5 (as_felem5 h3 tmp) (2,2,2,2,4));
fsub xy_pairs xy_pairs tmp (u64 4);
let h4 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (2,2,2,2,4) (as_felem5 h3 xy_pairs) (as_felem5 h3 tmp) (u64 4);
assert (felem_fits5 (as_felem5 h4 xy_pairs) (9,9,9,9,10)) | val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10))
let point_add_xy_pairs x1 y1 x2 y2 xx yy tmp xy_pairs = | true | null | false | let h0 = ST.get () in
BL.fadd5_lemma (1, 1, 1, 1, 2) (1, 1, 1, 1, 2) (as_felem5 h0 x1) (as_felem5 h0 y1);
BL.fadd5_lemma (1, 1, 1, 1, 2) (1, 1, 1, 1, 2) (as_felem5 h0 x2) (as_felem5 h0 y2);
fadd xy_pairs x1 y1;
fadd tmp x2 y2;
let h1 = ST.get () in
assert (felem_fits5 (as_felem5 h1 xy_pairs) (2, 2, 2, 2, 4));
assert (felem_fits5 (as_felem5 h1 tmp) (2, 2, 2, 2, 4));
fmul xy_pairs xy_pairs tmp;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 xy_pairs) (1, 1, 1, 1, 2));
BL.fadd5_lemma (1, 1, 1, 1, 2) (1, 1, 1, 1, 2) (as_felem5 h2 xx) (as_felem5 h2 yy);
fadd tmp xx yy;
let h3 = ST.get () in
assert (felem_fits5 (as_felem5 h3 tmp) (2, 2, 2, 2, 4));
fsub xy_pairs xy_pairs tmp (u64 4);
let h4 = ST.get () in
BL.fsub5_lemma (1, 1, 1, 1, 2) (2, 2, 2, 2, 4) (as_felem5 h3 xy_pairs) (as_felem5 h3 tmp) (u64 4);
assert (felem_fits5 (as_felem5 h4 xy_pairs) (9, 9, 9, 9, 10)) | {
"checked_file": "Hacl.Impl.K256.PointAdd.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Field52.Lemmas.fsti.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.K256.Point.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.PointAdd.fst"
} | [] | [
"Hacl.K256.Field.felem",
"Prims._assert",
"Hacl.Spec.K256.Field52.Definitions.felem_fits5",
"Hacl.K256.Field.as_felem5",
"FStar.Pervasives.Native.Mktuple5",
"Prims.nat",
"Prims.unit",
"Hacl.Spec.K256.Field52.Lemmas.fsub5_lemma",
"Lib.IntTypes.u64",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fsub",
"Hacl.K256.Field.fadd",
"Hacl.Spec.K256.Field52.Lemmas.fadd5_lemma",
"Hacl.K256.Field.fmul"
] | [] | module Hacl.Impl.K256.PointAdd
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
module ST = FStar.HyperStack.ST
module S = Spec.K256
module BL = Hacl.Spec.K256.Field52.Lemmas
open Hacl.K256.Field
open Hacl.Impl.K256.Point
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
inline_for_extraction noextract
val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10)) | false | false | Hacl.Impl.K256.PointAdd.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 100,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10)) | [] | Hacl.Impl.K256.PointAdd.point_add_xy_pairs | {
"file_name": "code/k256/Hacl.Impl.K256.PointAdd.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
x1: Hacl.K256.Field.felem ->
y1: Hacl.K256.Field.felem ->
x2: Hacl.K256.Field.felem ->
y2: Hacl.K256.Field.felem ->
xx: Hacl.K256.Field.felem ->
yy: Hacl.K256.Field.felem ->
tmp: Hacl.K256.Field.felem ->
xy_pairs: Hacl.K256.Field.felem
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 59,
"end_line": 60,
"start_col": 55,
"start_line": 40
} |
FStar.HyperStack.ST.Stack | val point_add (out p q:point) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q)) | [
{
"abbrev": false,
"full_module": "Hacl.Impl.K256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Field52.Lemmas",
"short_module": "BL"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_add out p q =
push_frame ();
let tmp = create (9ul *! nlimb) (u64 0) in
point_add_no_alloc out p q tmp;
pop_frame () | val point_add (out p q:point) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q))
let point_add out p q = | true | null | false | push_frame ();
let tmp = create (9ul *! nlimb) (u64 0) in
point_add_no_alloc out p q tmp;
pop_frame () | {
"checked_file": "Hacl.Impl.K256.PointAdd.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Field52.Lemmas.fsti.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.K256.Point.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.PointAdd.fst"
} | [] | [
"Hacl.Impl.K256.Point.point",
"FStar.HyperStack.ST.pop_frame",
"Prims.unit",
"Hacl.Impl.K256.PointAdd.point_add_no_alloc",
"Lib.Buffer.lbuffer_t",
"Lib.Buffer.MUT",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Lib.IntTypes.mul",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"FStar.UInt32.uint_to_t",
"FStar.UInt32.t",
"Hacl.K256.Field.nlimb",
"Lib.Buffer.create",
"Lib.IntTypes.uint64",
"Lib.IntTypes.op_Star_Bang",
"FStar.UInt32.__uint_to_t",
"Lib.IntTypes.u64",
"Lib.Buffer.lbuffer",
"FStar.HyperStack.ST.push_frame"
] | [] | module Hacl.Impl.K256.PointAdd
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
module ST = FStar.HyperStack.ST
module S = Spec.K256
module BL = Hacl.Spec.K256.Field52.Lemmas
open Hacl.K256.Field
open Hacl.Impl.K256.Point
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
inline_for_extraction noextract
val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10))
let point_add_xy_pairs x1 y1 x2 y2 xx yy tmp xy_pairs =
let h0 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x1) (as_felem5 h0 y1);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x2) (as_felem5 h0 y2);
fadd xy_pairs x1 y1;
fadd tmp x2 y2;
let h1 = ST.get () in
assert (felem_fits5 (as_felem5 h1 xy_pairs) (2,2,2,2,4));
assert (felem_fits5 (as_felem5 h1 tmp) (2,2,2,2,4));
fmul xy_pairs xy_pairs tmp;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 xy_pairs) (1,1,1,1,2));
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h2 xx) (as_felem5 h2 yy);
fadd tmp xx yy;
let h3 = ST.get () in
assert (felem_fits5 (as_felem5 h3 tmp) (2,2,2,2,4));
fsub xy_pairs xy_pairs tmp (u64 4);
let h4 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (2,2,2,2,4) (as_felem5 h3 xy_pairs) (as_felem5 h3 tmp) (u64 4);
assert (felem_fits5 (as_felem5 h4 xy_pairs) (9,9,9,9,10))
inline_for_extraction noextract
val ab_plus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (3,3,3,3,6) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fadd
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_plus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c);
fadd c tmp c;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (2,2,2,2,4));
fnormalize_weak c c;
BL.normalize_weak5_lemma (2,2,2,2,4) (as_felem5 h2 c)
inline_for_extraction noextract
val ab_minus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (1,1,1,1,2) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fsub
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_minus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fsub5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c) (u64 2);
fsub c tmp c (u64 2);
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (5,5,5,5,6));
fnormalize_weak c c;
BL.normalize_weak5_lemma (5,5,5,5,6) (as_felem5 h2 c)
inline_for_extraction noextract
val yy_mp_bzz3 (zz yy tmp1 yy_m_bzz3 yy_p_bzz3:felem) : Stack unit
(requires fun h ->
live h zz /\ live h yy /\ live h tmp1 /\
live h yy_m_bzz3 /\ live h yy_p_bzz3 /\
disjoint zz yy /\ disjoint zz tmp1 /\ disjoint zz yy_m_bzz3 /\
disjoint zz yy_p_bzz3 /\ disjoint yy tmp1 /\ disjoint yy yy_m_bzz3 /\
disjoint yy yy_p_bzz3 /\ disjoint tmp1 yy_m_bzz3 /\
disjoint tmp1 yy_p_bzz3 /\ disjoint yy_m_bzz3 yy_p_bzz3 /\
inv_lazy_reduced2 h zz /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 ->
modifies (loc tmp1 |+| loc yy_m_bzz3 |+| loc yy_p_bzz3) h0 h1 /\
(let bzz3 = S.fmul (S.fmul 3 S.b) (feval h0 zz) in
feval h1 yy_m_bzz3 = S.fsub (feval h0 yy) bzz3 /\
feval h1 yy_p_bzz3 = S.fadd (feval h0 yy) bzz3 /\
felem_fits5 (as_felem5 h1 yy_m_bzz3) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h1 yy_p_bzz3) (2,2,2,2,4)))
let yy_mp_bzz3 zz yy tmp1 yy_m_bzz3 yy_p_bzz3 =
fmul_3b_normalize_weak tmp1 zz; //tmp1 = bzz3 = (3*b)*zz
let h1 = ST.get () in
// assert (felem_fits5 (as_felem5 h1 tmp1) (1,1,1,1,2));
fsub yy_m_bzz3 yy tmp1 (u64 2); //yy_m_bzz3 = yy-bzz3
let h2 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 yy) (as_felem5 h1 tmp1) (u64 2);
// assert (felem_fits5 (as_felem5 h5 yy_m_bzz3) (5,5,5,5,6));
fadd yy_p_bzz3 yy tmp1; //yy_p_bzz3 = yy+bzz3
let h3 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 yy) (as_felem5 h1 tmp1)
// assert (felem_fits5 (as_felem5 h6 yy_p_bzz3) (2,2,2,2,4));
#set-options "--z3rlimit 300"
inline_for_extraction noextract
val point_add_no_alloc (out p q:point) (tmp:lbuffer uint64 (9ul *! nlimb)) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\ live h tmp /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
disjoint p tmp /\ disjoint q tmp /\ disjoint out tmp /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc tmp) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q))
let point_add_no_alloc out p q tmp =
let x1, y1, z1 = getx p, gety p, getz p in
let x2, y2, z2 = getx q, gety q, getz q in
let x3, y3, z3 = getx out, gety out, getz out in
let xx = sub tmp 0ul nlimb in
let yy = sub tmp nlimb nlimb in
let zz = sub tmp (2ul *! nlimb) nlimb in
let xy_pairs = sub tmp (3ul *! nlimb) nlimb in
let yz_pairs = sub tmp (4ul *! nlimb) nlimb in
let xz_pairs = sub tmp (5ul *! nlimb) nlimb in
let yy_m_bzz3 = sub tmp (6ul *! nlimb) nlimb in
let yy_p_bzz3 = sub tmp (7ul *! nlimb) nlimb in
let tmp1 = sub tmp (8ul *! nlimb) nlimb in
let h0 = ST.get () in
fmul xx x1 x2; //xx = x1*x2
fmul yy y1 y2; //yy = y1*y2
fmul zz z1 z2; //zz = z1*z2
let h1 = ST.get () in
// assert (inv_lazy_reduced2 h1 xx);
// assert (inv_lazy_reduced2 h1 yy);
// assert (inv_lazy_reduced2 h1 zz);
point_add_xy_pairs x1 y1 x2 y2 xx yy tmp1 xy_pairs; //xy_pairs = (x1+y1)*(x2+y2)-(xx+yy)
point_add_xy_pairs y1 z1 y2 z2 yy zz tmp1 yz_pairs; //yz_pairs = (y1+z1)*(y2+z2)-(yy+zz)
point_add_xy_pairs x1 z1 x2 z2 xx zz tmp1 xz_pairs; //xz_pairs = (x1+z1)*(x2+z2)-(xx+zz)
let h2 = ST.get () in
// assert (felem_fits5 (as_felem5 h2 xy_pairs) (9,9,9,9,10));
// assert (felem_fits5 (as_felem5 h2 yz_pairs) (9,9,9,9,10));
// assert (felem_fits5 (as_felem5 h2 xz_pairs) (9,9,9,9,10));
yy_mp_bzz3 zz yy tmp1 yy_m_bzz3 yy_p_bzz3;
fmul_3b_normalize_weak x3 yz_pairs; //x3 = byz3 = (3*b)*yz_pairs
let h7 = ST.get () in
// assert (felem_fits5 (as_felem5 h7 x3) (1,1,1,1,2));
fmul_small_num z3 xx (u64 3); //z3 = xx3 = 3*xx
let h8 = ST.get () in
BL.fmul15_lemma (1,1,1,1,2) 3 (as_felem5 h7 xx) (u64 3);
// assert (felem_fits5 (as_felem5 h8 z3) (3,3,3,3,6));
fmul_3b_normalize_weak y3 z3; //y3 = bxx9 = (3*b)*xx3
let h9 = ST.get () in
// assert (felem_fits5 (as_felem5 h9 y3) (1,1,1,1,2));
ab_minus_cd xy_pairs yy_m_bzz3 x3 xz_pairs tmp1; //x3 = (xy_pairs*yy_m_bzz3-byz3*xz_pairs)
ab_plus_cd yy_p_bzz3 yy_m_bzz3 y3 xz_pairs tmp1; //y3 = (yy_p_bzz3*yy_m_bzz3+bxx9*xz_pairs)
ab_plus_cd yz_pairs yy_p_bzz3 z3 xy_pairs tmp1 //z3 = (yz_pairs*yy_p_bzz3+xx3*xy_pairs)
val point_add (out p q:point) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q)) | false | false | Hacl.Impl.K256.PointAdd.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_add (out p q:point) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q)) | [] | Hacl.Impl.K256.PointAdd.point_add | {
"file_name": "code/k256/Hacl.Impl.K256.PointAdd.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | out: Hacl.Impl.K256.Point.point -> p: Hacl.Impl.K256.Point.point -> q: Hacl.Impl.K256.Point.point
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 14,
"end_line": 241,
"start_col": 2,
"start_line": 238
} |
FStar.HyperStack.ST.Stack | val point_add_no_alloc (out p q:point) (tmp:lbuffer uint64 (9ul *! nlimb)) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\ live h tmp /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
disjoint p tmp /\ disjoint q tmp /\ disjoint out tmp /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc tmp) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q)) | [
{
"abbrev": false,
"full_module": "Hacl.Impl.K256.Point",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.K256.Field",
"short_module": null
},
{
"abbrev": true,
"full_module": "Hacl.Spec.K256.Field52.Lemmas",
"short_module": "BL"
},
{
"abbrev": true,
"full_module": "Spec.K256",
"short_module": "S"
},
{
"abbrev": true,
"full_module": "FStar.HyperStack.ST",
"short_module": "ST"
},
{
"abbrev": false,
"full_module": "Lib.Buffer",
"short_module": null
},
{
"abbrev": false,
"full_module": "Lib.IntTypes",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack.ST",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.HyperStack",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "Hacl.Impl.K256",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let point_add_no_alloc out p q tmp =
let x1, y1, z1 = getx p, gety p, getz p in
let x2, y2, z2 = getx q, gety q, getz q in
let x3, y3, z3 = getx out, gety out, getz out in
let xx = sub tmp 0ul nlimb in
let yy = sub tmp nlimb nlimb in
let zz = sub tmp (2ul *! nlimb) nlimb in
let xy_pairs = sub tmp (3ul *! nlimb) nlimb in
let yz_pairs = sub tmp (4ul *! nlimb) nlimb in
let xz_pairs = sub tmp (5ul *! nlimb) nlimb in
let yy_m_bzz3 = sub tmp (6ul *! nlimb) nlimb in
let yy_p_bzz3 = sub tmp (7ul *! nlimb) nlimb in
let tmp1 = sub tmp (8ul *! nlimb) nlimb in
let h0 = ST.get () in
fmul xx x1 x2; //xx = x1*x2
fmul yy y1 y2; //yy = y1*y2
fmul zz z1 z2; //zz = z1*z2
let h1 = ST.get () in
// assert (inv_lazy_reduced2 h1 xx);
// assert (inv_lazy_reduced2 h1 yy);
// assert (inv_lazy_reduced2 h1 zz);
point_add_xy_pairs x1 y1 x2 y2 xx yy tmp1 xy_pairs; //xy_pairs = (x1+y1)*(x2+y2)-(xx+yy)
point_add_xy_pairs y1 z1 y2 z2 yy zz tmp1 yz_pairs; //yz_pairs = (y1+z1)*(y2+z2)-(yy+zz)
point_add_xy_pairs x1 z1 x2 z2 xx zz tmp1 xz_pairs; //xz_pairs = (x1+z1)*(x2+z2)-(xx+zz)
let h2 = ST.get () in
// assert (felem_fits5 (as_felem5 h2 xy_pairs) (9,9,9,9,10));
// assert (felem_fits5 (as_felem5 h2 yz_pairs) (9,9,9,9,10));
// assert (felem_fits5 (as_felem5 h2 xz_pairs) (9,9,9,9,10));
yy_mp_bzz3 zz yy tmp1 yy_m_bzz3 yy_p_bzz3;
fmul_3b_normalize_weak x3 yz_pairs; //x3 = byz3 = (3*b)*yz_pairs
let h7 = ST.get () in
// assert (felem_fits5 (as_felem5 h7 x3) (1,1,1,1,2));
fmul_small_num z3 xx (u64 3); //z3 = xx3 = 3*xx
let h8 = ST.get () in
BL.fmul15_lemma (1,1,1,1,2) 3 (as_felem5 h7 xx) (u64 3);
// assert (felem_fits5 (as_felem5 h8 z3) (3,3,3,3,6));
fmul_3b_normalize_weak y3 z3; //y3 = bxx9 = (3*b)*xx3
let h9 = ST.get () in
// assert (felem_fits5 (as_felem5 h9 y3) (1,1,1,1,2));
ab_minus_cd xy_pairs yy_m_bzz3 x3 xz_pairs tmp1; //x3 = (xy_pairs*yy_m_bzz3-byz3*xz_pairs)
ab_plus_cd yy_p_bzz3 yy_m_bzz3 y3 xz_pairs tmp1; //y3 = (yy_p_bzz3*yy_m_bzz3+bxx9*xz_pairs)
ab_plus_cd yz_pairs yy_p_bzz3 z3 xy_pairs tmp1 | val point_add_no_alloc (out p q:point) (tmp:lbuffer uint64 (9ul *! nlimb)) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\ live h tmp /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
disjoint p tmp /\ disjoint q tmp /\ disjoint out tmp /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc tmp) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q))
let point_add_no_alloc out p q tmp = | true | null | false | let x1, y1, z1 = getx p, gety p, getz p in
let x2, y2, z2 = getx q, gety q, getz q in
let x3, y3, z3 = getx out, gety out, getz out in
let xx = sub tmp 0ul nlimb in
let yy = sub tmp nlimb nlimb in
let zz = sub tmp (2ul *! nlimb) nlimb in
let xy_pairs = sub tmp (3ul *! nlimb) nlimb in
let yz_pairs = sub tmp (4ul *! nlimb) nlimb in
let xz_pairs = sub tmp (5ul *! nlimb) nlimb in
let yy_m_bzz3 = sub tmp (6ul *! nlimb) nlimb in
let yy_p_bzz3 = sub tmp (7ul *! nlimb) nlimb in
let tmp1 = sub tmp (8ul *! nlimb) nlimb in
let h0 = ST.get () in
fmul xx x1 x2;
fmul yy y1 y2;
fmul zz z1 z2;
let h1 = ST.get () in
point_add_xy_pairs x1 y1 x2 y2 xx yy tmp1 xy_pairs;
point_add_xy_pairs y1 z1 y2 z2 yy zz tmp1 yz_pairs;
point_add_xy_pairs x1 z1 x2 z2 xx zz tmp1 xz_pairs;
let h2 = ST.get () in
yy_mp_bzz3 zz yy tmp1 yy_m_bzz3 yy_p_bzz3;
fmul_3b_normalize_weak x3 yz_pairs;
let h7 = ST.get () in
fmul_small_num z3 xx (u64 3);
let h8 = ST.get () in
BL.fmul15_lemma (1, 1, 1, 1, 2) 3 (as_felem5 h7 xx) (u64 3);
fmul_3b_normalize_weak y3 z3;
let h9 = ST.get () in
ab_minus_cd xy_pairs yy_m_bzz3 x3 xz_pairs tmp1;
ab_plus_cd yy_p_bzz3 yy_m_bzz3 y3 xz_pairs tmp1;
ab_plus_cd yz_pairs yy_p_bzz3 z3 xy_pairs tmp1 | {
"checked_file": "Hacl.Impl.K256.PointAdd.fst.checked",
"dependencies": [
"Spec.K256.fst.checked",
"prims.fst.checked",
"Lib.IntTypes.fsti.checked",
"Lib.Buffer.fsti.checked",
"Hacl.Spec.K256.Field52.Lemmas.fsti.checked",
"Hacl.K256.Field.fsti.checked",
"Hacl.Impl.K256.Point.fsti.checked",
"FStar.UInt32.fsti.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked",
"FStar.HyperStack.ST.fsti.checked",
"FStar.HyperStack.fst.checked"
],
"interface_file": false,
"source_file": "Hacl.Impl.K256.PointAdd.fst"
} | [] | [
"Hacl.Impl.K256.Point.point",
"Lib.Buffer.lbuffer",
"Lib.IntTypes.uint64",
"Lib.IntTypes.op_Star_Bang",
"Lib.IntTypes.U32",
"Lib.IntTypes.PUB",
"FStar.UInt32.__uint_to_t",
"Hacl.K256.Field.nlimb",
"Hacl.K256.Field.felem",
"Hacl.Impl.K256.PointAdd.ab_plus_cd",
"Prims.unit",
"Hacl.Impl.K256.PointAdd.ab_minus_cd",
"FStar.Monotonic.HyperStack.mem",
"FStar.HyperStack.ST.get",
"Hacl.K256.Field.fmul_3b_normalize_weak",
"Hacl.Spec.K256.Field52.Lemmas.fmul15_lemma",
"FStar.Pervasives.Native.Mktuple5",
"Prims.nat",
"Hacl.K256.Field.as_felem5",
"Lib.IntTypes.u64",
"Hacl.K256.Field.fmul_small_num",
"Hacl.Impl.K256.PointAdd.yy_mp_bzz3",
"Hacl.Impl.K256.PointAdd.point_add_xy_pairs",
"Hacl.K256.Field.fmul",
"Lib.Buffer.lbuffer_t",
"Lib.Buffer.MUT",
"Lib.IntTypes.int_t",
"Lib.IntTypes.U64",
"Lib.IntTypes.SEC",
"Lib.Buffer.sub",
"FStar.Pervasives.Native.tuple3",
"FStar.Pervasives.Native.Mktuple3",
"Hacl.Impl.K256.Point.getz",
"Hacl.Impl.K256.Point.gety",
"Hacl.Impl.K256.Point.getx"
] | [] | module Hacl.Impl.K256.PointAdd
open FStar.HyperStack
open FStar.HyperStack.ST
open FStar.Mul
open Lib.IntTypes
open Lib.Buffer
module ST = FStar.HyperStack.ST
module S = Spec.K256
module BL = Hacl.Spec.K256.Field52.Lemmas
open Hacl.K256.Field
open Hacl.Impl.K256.Point
#set-options "--z3rlimit 100 --fuel 0 --ifuel 0"
inline_for_extraction noextract
val point_add_xy_pairs (x1 y1 x2 y2 xx yy tmp xy_pairs:felem) : Stack unit
(requires fun h ->
live h x1 /\ live h y1 /\ live h x2 /\ live h y2 /\
live h xx /\ live h yy /\ live h tmp /\ live h xy_pairs /\
eq_or_disjoint x1 y1 /\ eq_or_disjoint x2 y2 /\ eq_or_disjoint xx yy /\
disjoint x1 xy_pairs /\ disjoint y1 xy_pairs /\ disjoint x2 xy_pairs /\ disjoint y2 xy_pairs /\
disjoint x1 tmp /\ disjoint y1 tmp /\ disjoint x2 tmp /\ disjoint y2 tmp /\
disjoint xx xy_pairs /\ disjoint yy xy_pairs /\ disjoint xx tmp /\ disjoint yy tmp /\
disjoint xy_pairs tmp /\
inv_lazy_reduced2 h x1 /\ inv_lazy_reduced2 h y1 /\ inv_lazy_reduced2 h x2 /\ inv_lazy_reduced2 h y2 /\
inv_lazy_reduced2 h xx /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 -> modifies (loc xy_pairs |+| loc tmp) h0 h1 /\
feval h1 xy_pairs =
S.fsub
(S.fmul (S.fadd (feval h0 x1) (feval h0 y1)) (S.fadd (feval h0 x2) (feval h0 y2)))
(S.fadd (feval h0 xx) (feval h0 yy)) /\
felem_fits5 (as_felem5 h1 xy_pairs) (9,9,9,9,10))
let point_add_xy_pairs x1 y1 x2 y2 xx yy tmp xy_pairs =
let h0 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x1) (as_felem5 h0 y1);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h0 x2) (as_felem5 h0 y2);
fadd xy_pairs x1 y1;
fadd tmp x2 y2;
let h1 = ST.get () in
assert (felem_fits5 (as_felem5 h1 xy_pairs) (2,2,2,2,4));
assert (felem_fits5 (as_felem5 h1 tmp) (2,2,2,2,4));
fmul xy_pairs xy_pairs tmp;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 xy_pairs) (1,1,1,1,2));
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h2 xx) (as_felem5 h2 yy);
fadd tmp xx yy;
let h3 = ST.get () in
assert (felem_fits5 (as_felem5 h3 tmp) (2,2,2,2,4));
fsub xy_pairs xy_pairs tmp (u64 4);
let h4 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (2,2,2,2,4) (as_felem5 h3 xy_pairs) (as_felem5 h3 tmp) (u64 4);
assert (felem_fits5 (as_felem5 h4 xy_pairs) (9,9,9,9,10))
inline_for_extraction noextract
val ab_plus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (3,3,3,3,6) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fadd
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_plus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c);
fadd c tmp c;
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (2,2,2,2,4));
fnormalize_weak c c;
BL.normalize_weak5_lemma (2,2,2,2,4) (as_felem5 h2 c)
inline_for_extraction noextract
val ab_minus_cd (a b c d tmp:felem) : Stack unit
(requires fun h ->
live h a /\ live h b /\ live h c /\ live h d /\ live h tmp /\
disjoint a b /\ disjoint c d /\ eq_or_disjoint a b /\ eq_or_disjoint a d /\
disjoint a tmp /\ disjoint b tmp /\ disjoint c tmp /\ disjoint d tmp /\
felem_fits5 (as_felem5 h a) (9,9,9,9,10) /\
felem_fits5 (as_felem5 h b) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h c) (1,1,1,1,2) /\
felem_fits5 (as_felem5 h d) (9,9,9,9,10))
(ensures fun h0 _ h1 -> modifies (loc c |+| loc tmp) h0 h1 /\
feval h1 c ==
S.fsub
(S.fmul (feval h0 a) (feval h0 b))
(S.fmul (feval h0 c) (feval h0 d)) /\
inv_lazy_reduced2 h1 c)
let ab_minus_cd a b c d tmp =
fmul tmp a b;
fmul c c d;
let h1 = ST.get () in
assert (inv_lazy_reduced2 h1 tmp);
assert (inv_lazy_reduced2 h1 c);
BL.fsub5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 tmp) (as_felem5 h1 c) (u64 2);
fsub c tmp c (u64 2);
let h2 = ST.get () in
assert (felem_fits5 (as_felem5 h2 c) (5,5,5,5,6));
fnormalize_weak c c;
BL.normalize_weak5_lemma (5,5,5,5,6) (as_felem5 h2 c)
inline_for_extraction noextract
val yy_mp_bzz3 (zz yy tmp1 yy_m_bzz3 yy_p_bzz3:felem) : Stack unit
(requires fun h ->
live h zz /\ live h yy /\ live h tmp1 /\
live h yy_m_bzz3 /\ live h yy_p_bzz3 /\
disjoint zz yy /\ disjoint zz tmp1 /\ disjoint zz yy_m_bzz3 /\
disjoint zz yy_p_bzz3 /\ disjoint yy tmp1 /\ disjoint yy yy_m_bzz3 /\
disjoint yy yy_p_bzz3 /\ disjoint tmp1 yy_m_bzz3 /\
disjoint tmp1 yy_p_bzz3 /\ disjoint yy_m_bzz3 yy_p_bzz3 /\
inv_lazy_reduced2 h zz /\ inv_lazy_reduced2 h yy)
(ensures fun h0 _ h1 ->
modifies (loc tmp1 |+| loc yy_m_bzz3 |+| loc yy_p_bzz3) h0 h1 /\
(let bzz3 = S.fmul (S.fmul 3 S.b) (feval h0 zz) in
feval h1 yy_m_bzz3 = S.fsub (feval h0 yy) bzz3 /\
feval h1 yy_p_bzz3 = S.fadd (feval h0 yy) bzz3 /\
felem_fits5 (as_felem5 h1 yy_m_bzz3) (5,5,5,5,6) /\
felem_fits5 (as_felem5 h1 yy_p_bzz3) (2,2,2,2,4)))
let yy_mp_bzz3 zz yy tmp1 yy_m_bzz3 yy_p_bzz3 =
fmul_3b_normalize_weak tmp1 zz; //tmp1 = bzz3 = (3*b)*zz
let h1 = ST.get () in
// assert (felem_fits5 (as_felem5 h1 tmp1) (1,1,1,1,2));
fsub yy_m_bzz3 yy tmp1 (u64 2); //yy_m_bzz3 = yy-bzz3
let h2 = ST.get () in
BL.fsub5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 yy) (as_felem5 h1 tmp1) (u64 2);
// assert (felem_fits5 (as_felem5 h5 yy_m_bzz3) (5,5,5,5,6));
fadd yy_p_bzz3 yy tmp1; //yy_p_bzz3 = yy+bzz3
let h3 = ST.get () in
BL.fadd5_lemma (1,1,1,1,2) (1,1,1,1,2) (as_felem5 h1 yy) (as_felem5 h1 tmp1)
// assert (felem_fits5 (as_felem5 h6 yy_p_bzz3) (2,2,2,2,4));
#set-options "--z3rlimit 300"
inline_for_extraction noextract
val point_add_no_alloc (out p q:point) (tmp:lbuffer uint64 (9ul *! nlimb)) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\ live h tmp /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
disjoint p tmp /\ disjoint q tmp /\ disjoint out tmp /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc tmp) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q)) | false | false | Hacl.Impl.K256.PointAdd.fst | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 0,
"initial_ifuel": 0,
"max_fuel": 0,
"max_ifuel": 0,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": false,
"smtencoding_l_arith_repr": "boxwrap",
"smtencoding_nl_arith_repr": "boxwrap",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [],
"z3refresh": false,
"z3rlimit": 300,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val point_add_no_alloc (out p q:point) (tmp:lbuffer uint64 (9ul *! nlimb)) : Stack unit
(requires fun h ->
live h out /\ live h p /\ live h q /\ live h tmp /\
eq_or_disjoint out p /\ eq_or_disjoint out q /\ eq_or_disjoint p q /\
disjoint p tmp /\ disjoint q tmp /\ disjoint out tmp /\
point_inv h p /\ point_inv h q)
(ensures fun h0 _ h1 -> modifies (loc out |+| loc tmp) h0 h1 /\ point_inv h1 out /\
point_eval h1 out == S.point_add (point_eval h0 p) (point_eval h0 q)) | [] | Hacl.Impl.K256.PointAdd.point_add_no_alloc | {
"file_name": "code/k256/Hacl.Impl.K256.PointAdd.fst",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
out: Hacl.Impl.K256.Point.point ->
p: Hacl.Impl.K256.Point.point ->
q: Hacl.Impl.K256.Point.point ->
tmp: Lib.Buffer.lbuffer Lib.IntTypes.uint64 (9ul *! Hacl.K256.Field.nlimb)
-> FStar.HyperStack.ST.Stack Prims.unit | {
"end_col": 48,
"end_line": 226,
"start_col": 36,
"start_line": 174
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let vale_stack = Vale.PPC64LE.Stack_i.vale_stack | let vale_stack = | false | null | false | Vale.PPC64LE.Stack_i.vale_stack | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Stack_i.vale_stack"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val vale_stack : Type0 | [] | Vale.PPC64LE.InsBasic.vale_stack | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Type0 | {
"end_col": 55,
"end_line": 9,
"start_col": 24,
"start_line": 9
} |
|
Prims.Tot | val va_wp_Move (dst src: va_operand_reg_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (()))) | val va_wp_Move (dst src: va_operand_reg_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Move (dst src: va_operand_reg_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (()))
) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.PPC64LE.Machine_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Move (dst src: va_operand_reg_opr) (va_s0: va_state) (va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_Move | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 99,
"end_line": 29,
"start_col": 2,
"start_line": 27
} |
Prims.Tot | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let vale_heap = Vale.PPC64LE.Memory.vale_heap | let vale_heap = | false | null | false | Vale.PPC64LE.Memory.vale_heap | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Memory.vale_heap"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val vale_heap : Type | [] | Vale.PPC64LE.InsBasic.vale_heap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | Type | {
"end_col": 52,
"end_line": 8,
"start_col": 23,
"start_line": 8
} |
|
Prims.Tot | val va_wp_AddImm
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (()))) | val va_wp_AddImm
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_AddImm
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.op_LessThan",
"Prims.op_Addition",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.PPC64LE.Machine_s.int_to_nat64",
"Vale.PPC64LE.Machine_s.pow2_64",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.int",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_AddImm
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_AddImm | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.simm16 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 66,
"end_line": 242,
"start_col": 2,
"start_line": 238
} |
Prims.Tot | val va_wp_AddLa
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (()))) | val va_wp_AddLa
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_AddLa
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
(0 <= va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.op_LessThanOrEqual",
"Prims.op_Addition",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Prims.op_LessThan",
"Vale.PPC64LE.Machine_s.pow2_64",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.int",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_AddLa
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_AddLa | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.simm16 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 16,
"end_line": 130,
"start_col": 2,
"start_line": 126
} |
Prims.Tot | val va_wp_LoadImm64
(dst: va_operand_reg_opr)
(src: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (()))) | val va_wp_LoadImm64
(dst: va_operand_reg_opr)
(src: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_LoadImm64
(dst: va_operand_reg_opr)
(src: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 ==> va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.int",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Prims.op_Modulus",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_LoadImm64
(dst: va_operand_reg_opr)
(src: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_LoadImm64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src: Vale.PPC64LE.Machine_s.simm16 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 57,
"end_line": 61,
"start_col": 2,
"start_line": 59
} |
Prims.Tot | val va_wp_Add
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (()))) | val va_wp_Add
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Add
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.op_LessThan",
"Prims.op_Addition",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.PPC64LE.Machine_s.pow2_64",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.int",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Add
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_Add | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 36,
"end_line": 168,
"start_col": 2,
"start_line": 164
} |
Prims.Tot | val va_wp_AddWrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (()))) | val va_wp_AddWrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_AddWrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.add_wrap64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_AddWrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_AddWrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 83,
"end_line": 205,
"start_col": 2,
"start_line": 202
} |
Prims.Tot | val va_wp_AddCarry
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (()))) | val va_wp_AddCarry
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_AddCarry
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr) (va_x_xer: xer_t).
let va_sM = va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\
Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Vale.PPC64LE.Machine_s.xer_t",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.add_wrap64",
"Prims.bool",
"Vale.PPC64LE.Decls.xer_ca",
"Vale.PPC64LE.Decls.va_get_xer",
"Prims.op_GreaterThanOrEqual",
"Prims.op_Addition",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_xer",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_AddCarry
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_AddCarry | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 94,
"end_line": 319,
"start_col": 2,
"start_line": 314
} |
Prims.Tot | val va_wp_Sub
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (()))) | val va_wp_Sub
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Sub
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.op_GreaterThanOrEqual",
"Prims.op_Subtraction",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.int",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Sub
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_Sub | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 36,
"end_line": 446,
"start_col": 2,
"start_line": 442
} |
Prims.Tot | val va_wp_AddImmWrap
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (()))) | val va_wp_AddImmWrap
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_AddImmWrap
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.add_wrap64",
"Vale.PPC64LE.Machine_s.int_to_nat64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_AddImmWrap
(dst src1: va_operand_reg_opr)
(src2: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_AddImmWrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.simm16 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 80,
"end_line": 279,
"start_col": 2,
"start_line": 276
} |
Prims.Tot | val va_wp_SubWrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (()))) | val va_wp_SubWrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_SubWrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.sub_wrap64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_SubWrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_SubWrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 83,
"end_line": 483,
"start_col": 2,
"start_line": 480
} |
Prims.Tot | val va_wp_SubImmWrap
(dst src1: va_operand_reg_opr)
(src2: nsimm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (()))) | val va_wp_SubImmWrap
(dst src1: va_operand_reg_opr)
(src2: nsimm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_SubImmWrap
(dst src1: va_operand_reg_opr)
(src2: nsimm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.nsimm16",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.sub_wrap64",
"Vale.PPC64LE.Machine_s.int_to_nat64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_SubImmWrap
(dst src1: va_operand_reg_opr)
(src2: nsimm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_SubImmWrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.nsimm16 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 80,
"end_line": 558,
"start_col": 2,
"start_line": 555
} |
Prims.Tot | val va_wp_MulLow64Wrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (()))) | val va_wp_MulLow64Wrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_MulLow64Wrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
(va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2))
`op_Modulus`
pow2_64 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.int",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Prims.op_Modulus",
"Vale.PPC64LE.Decls.va_mul_nat",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_MulLow64Wrap
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_MulLow64Wrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 87,
"end_line": 635,
"start_col": 2,
"start_line": 632
} |
Prims.Tot | val va_wp_Xor
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (()))) | val va_wp_Xor
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Xor
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.ixor64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Xor
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_Xor | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 83,
"end_line": 709,
"start_col": 2,
"start_line": 706
} |
Prims.Tot | val va_wp_Sl64Imm
(dst src1: va_operand_reg_opr)
(src2: bits64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (()))) | val va_wp_Sl64Imm
(dst src1: va_operand_reg_opr)
(src2: bits64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Sl64Imm
(dst src1: va_operand_reg_opr)
(src2: bits64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1) src2 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.bits64",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.ishl64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2))
//--
//-- Sr64Imm
val va_code_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sr64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sr64Imm dst src1 src2)) =
(va_QProc (va_code_Sr64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64Imm dst src1 src2)
(va_wpProof_Sr64Imm dst src1 src2))
//--
//-- Sl64Imm
val va_code_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sl64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sl64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Sl64Imm
(dst src1: va_operand_reg_opr)
(src2: bits64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_Sl64Imm | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.bits64 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 36,
"end_line": 818,
"start_col": 2,
"start_line": 815
} |
Prims.Tot | val va_wp_SubImm
(dst src1: va_operand_reg_opr)
(src2: nsimm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (()))) | val va_wp_SubImm
(dst src1: va_operand_reg_opr)
(src2: nsimm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_SubImm
(dst src1: va_operand_reg_opr)
(src2: nsimm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.nsimm16",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.op_GreaterThanOrEqual",
"Prims.op_Subtraction",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.PPC64LE.Machine_s.int_to_nat64",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.int",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_SubImm
(dst src1: va_operand_reg_opr)
(src2: nsimm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_SubImm | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.nsimm16 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 66,
"end_line": 521,
"start_col": 2,
"start_line": 517
} |
Prims.Tot | val va_wp_MulLow64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (()))) | val va_wp_MulLow64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_MulLow64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\
va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.op_LessThanOrEqual",
"Vale.PPC64LE.Decls.va_mul_nat",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Prims.op_LessThan",
"Vale.PPC64LE.Machine_s.pow2_64",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.nat",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_MulLow64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_MulLow64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 54,
"end_line": 598,
"start_col": 2,
"start_line": 593
} |
Prims.Tot | val va_wp_MulHigh64U
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (()))) | val va_wp_MulHigh64U
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_MulHigh64U
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
(va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2))
`op_Division`
pow2_64 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Prims.int",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Prims.op_Division",
"Vale.PPC64LE.Decls.va_mul_nat",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_MulHigh64U
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_MulHigh64U | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 88,
"end_line": 672,
"start_col": 2,
"start_line": 669
} |
Prims.Tot | val va_wp_Sl64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Sl64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2 `op_Modulus` 64) ==> va_k va_sM (()))) | val va_wp_Sl64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Sl64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1)
((va_eval_reg_opr va_s0 src2) `op_Modulus` 64) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.ishl64",
"Prims.op_Modulus",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2))
//--
//-- Sr64Imm
val va_code_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sr64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sr64Imm dst src1 src2)) =
(va_QProc (va_code_Sr64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64Imm dst src1 src2)
(va_wpProof_Sr64Imm dst src1 src2))
//--
//-- Sl64Imm
val va_code_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sl64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sl64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sl64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sl64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sl64Imm dst src1 src2)) =
(va_QProc (va_code_Sl64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sl64Imm dst src1 src2)
(va_wpProof_Sl64Imm dst src1 src2))
//--
//-- Sr64
val va_code_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sr64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2 `op_Modulus` 64) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2 `op_Modulus` 64) ==> va_k va_sM (())))
val va_wpProof_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64 dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sr64 dst src1 src2)) =
(va_QProc (va_code_Sr64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64 dst src1 src2)
(va_wpProof_Sr64 dst src1 src2))
//--
//-- Sl64
val va_code_Sl64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sl64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sl64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2 `op_Modulus` 64) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sl64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Sl64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_Sl64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 99,
"end_line": 892,
"start_col": 2,
"start_line": 889
} |
Prims.Tot | val va_wp_Sr64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2 `op_Modulus` 64) ==> va_k va_sM (()))) | val va_wp_Sr64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Sr64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1)
((va_eval_reg_opr va_s0 src2) `op_Modulus` 64) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.ishr64",
"Prims.op_Modulus",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2))
//--
//-- Sr64Imm
val va_code_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sr64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sr64Imm dst src1 src2)) =
(va_QProc (va_code_Sr64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64Imm dst src1 src2)
(va_wpProof_Sr64Imm dst src1 src2))
//--
//-- Sl64Imm
val va_code_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sl64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sl64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sl64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sl64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sl64Imm dst src1 src2)) =
(va_QProc (va_code_Sl64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sl64Imm dst src1 src2)
(va_wpProof_Sl64Imm dst src1 src2))
//--
//-- Sr64
val va_code_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sr64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2 `op_Modulus` 64) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Sr64
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_Sr64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 99,
"end_line": 855,
"start_col": 2,
"start_line": 852
} |
Prims.Tot | val va_wp_And
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (()))) | val va_wp_And
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_And
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.iand64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_And
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_And | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 83,
"end_line": 746,
"start_col": 2,
"start_line": 743
} |
Prims.Tot | val va_wp_Sr64Imm
(dst src1: va_operand_reg_opr)
(src2: bits64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (()))) | val va_wp_Sr64Imm
(dst src1: va_operand_reg_opr)
(src2: bits64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_Sr64Imm
(dst src1: va_operand_reg_opr)
(src2: bits64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.bits64",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.ishr64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2))
//--
//-- Sr64Imm
val va_code_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sr64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_Sr64Imm
(dst src1: va_operand_reg_opr)
(src2: bits64)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_Sr64Imm | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.bits64 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 36,
"end_line": 782,
"start_col": 2,
"start_line": 779
} |
Prims.Tot | val va_quick_Move (dst src: va_operand_reg_opr) : (va_quickCode unit (va_code_Move dst src)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src)) | val va_quick_Move (dst src: va_operand_reg_opr) : (va_quickCode unit (va_code_Move dst src))
let va_quick_Move (dst src: va_operand_reg_opr) : (va_quickCode unit (va_code_Move dst src)) = | false | null | false | (va_QProc (va_code_Move dst src)
([va_mod_reg_opr dst])
(va_wp_Move dst src)
(va_wpProof_Move dst src)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_Move",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_Move",
"Vale.PPC64LE.InsBasic.va_wpProof_Move",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Move (dst src: va_operand_reg_opr) : (va_quickCode unit (va_code_Move dst src)) | [] | Vale.PPC64LE.InsBasic.va_quick_Move | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | dst: Vale.PPC64LE.Decls.va_operand_reg_opr -> src: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit (Vale.PPC64LE.InsBasic.va_code_Move dst src) | {
"end_col": 9,
"end_line": 41,
"start_col": 2,
"start_line": 40
} |
Prims.Tot | val va_quick_LoadImmShl64 (dst: va_operand_reg_opr) (src: simm16)
: (va_quickCode unit (va_code_LoadImmShl64 dst src)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src)) | val va_quick_LoadImmShl64 (dst: va_operand_reg_opr) (src: simm16)
: (va_quickCode unit (va_code_LoadImmShl64 dst src))
let va_quick_LoadImmShl64 (dst: va_operand_reg_opr) (src: simm16)
: (va_quickCode unit (va_code_LoadImmShl64 dst src)) = | false | null | false | (va_QProc (va_code_LoadImmShl64 dst src)
([va_mod_reg_opr dst])
(va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_LoadImmShl64",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_LoadImmShl64",
"Vale.PPC64LE.InsBasic.va_wpProof_LoadImmShl64",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_LoadImmShl64 (dst: va_operand_reg_opr) (src: simm16)
: (va_quickCode unit (va_code_LoadImmShl64 dst src)) | [] | Vale.PPC64LE.InsBasic.va_quick_LoadImmShl64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | dst: Vale.PPC64LE.Decls.va_operand_reg_opr -> src: Vale.PPC64LE.Machine_s.simm16
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_LoadImmShl64 dst src) | {
"end_col": 38,
"end_line": 105,
"start_col": 2,
"start_line": 104
} |
Prims.Tot | val va_quick_LoadImm64 (dst: va_operand_reg_opr) (src: simm16)
: (va_quickCode unit (va_code_LoadImm64 dst src)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src)) | val va_quick_LoadImm64 (dst: va_operand_reg_opr) (src: simm16)
: (va_quickCode unit (va_code_LoadImm64 dst src))
let va_quick_LoadImm64 (dst: va_operand_reg_opr) (src: simm16)
: (va_quickCode unit (va_code_LoadImm64 dst src)) = | false | null | false | (va_QProc (va_code_LoadImm64 dst src)
([va_mod_reg_opr dst])
(va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_LoadImm64",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_LoadImm64",
"Vale.PPC64LE.InsBasic.va_wpProof_LoadImm64",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_LoadImm64 (dst: va_operand_reg_opr) (src: simm16)
: (va_quickCode unit (va_code_LoadImm64 dst src)) | [] | Vale.PPC64LE.InsBasic.va_quick_LoadImm64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} | dst: Vale.PPC64LE.Decls.va_operand_reg_opr -> src: Vale.PPC64LE.Machine_s.simm16
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_LoadImm64 dst src) | {
"end_col": 35,
"end_line": 73,
"start_col": 2,
"start_line": 72
} |
Prims.Tot | val va_quick_AddImm (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddImm dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2)) | val va_quick_AddImm (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddImm dst src1 src2))
let va_quick_AddImm (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddImm dst src1 src2)) = | false | null | false | (va_QProc (va_code_AddImm dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_AddImm",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_AddImm",
"Vale.PPC64LE.InsBasic.va_wpProof_AddImm",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_AddImm (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddImm dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_AddImm | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.simm16
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_AddImm dst src1 src2) | {
"end_col": 38,
"end_line": 254,
"start_col": 2,
"start_line": 253
} |
Prims.Tot | val va_quick_AddCarry (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2)) | val va_quick_AddCarry (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2))
let va_quick_AddCarry (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) = | false | null | false | (va_QProc (va_code_AddCarry dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddCarry dst src1 src2)
(va_wpProof_AddCarry dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_AddCarry",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_xer",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_AddCarry",
"Vale.PPC64LE.InsBasic.va_wpProof_AddCarry",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_AddCarry (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_AddCarry | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_AddCarry dst src1 src2) | {
"end_col": 51,
"end_line": 331,
"start_col": 2,
"start_line": 330
} |
Prims.Tot | val va_wp_LoadImmShl64
(dst: va_operand_reg_opr)
(src: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (()))) | val va_wp_LoadImmShl64
(dst: va_operand_reg_opr)
(src: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_LoadImmShl64
(dst: va_operand_reg_opr)
(src: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr).
let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.ishl64",
"Prims.op_Modulus",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_LoadImmShl64
(dst: va_operand_reg_opr)
(src: simm16)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_LoadImmShl64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src: Vale.PPC64LE.Machine_s.simm16 ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 85,
"end_line": 93,
"start_col": 2,
"start_line": 91
} |
Prims.Tot | val va_quick_Add (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Add dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2)) | val va_quick_Add (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Add dst src1 src2))
let va_quick_Add (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Add dst src1 src2)) = | false | null | false | (va_QProc (va_code_Add dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_Add",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_Add",
"Vale.PPC64LE.InsBasic.va_wpProof_Add",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Add (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Add dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_Add | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_Add dst src1 src2) | {
"end_col": 35,
"end_line": 180,
"start_col": 2,
"start_line": 179
} |
Prims.Tot | val va_quick_AddLa (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddLa dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2)) | val va_quick_AddLa (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddLa dst src1 src2))
let va_quick_AddLa (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddLa dst src1 src2)) = | false | null | false | (va_QProc (va_code_AddLa dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_AddLa",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_AddLa",
"Vale.PPC64LE.InsBasic.va_wpProof_AddLa",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_AddLa (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddLa dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_AddLa | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.simm16
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_AddLa dst src1 src2) | {
"end_col": 37,
"end_line": 142,
"start_col": 2,
"start_line": 141
} |
Prims.Tot | val va_quick_AddWrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddWrap dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2)) | val va_quick_AddWrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddWrap dst src1 src2))
let va_quick_AddWrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddWrap dst src1 src2)) = | false | null | false | (va_QProc (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_AddWrap",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_AddWrap",
"Vale.PPC64LE.InsBasic.va_wpProof_AddWrap",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_AddWrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddWrap dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_AddWrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_AddWrap dst src1 src2) | {
"end_col": 39,
"end_line": 217,
"start_col": 2,
"start_line": 216
} |
Prims.Tot | val va_quick_Sub (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sub dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2)) | val va_quick_Sub (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sub dst src1 src2))
let va_quick_Sub (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sub dst src1 src2)) = | false | null | false | (va_QProc (va_code_Sub dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_Sub",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_Sub",
"Vale.PPC64LE.InsBasic.va_wpProof_Sub",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Sub (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sub dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_Sub | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_Sub dst src1 src2) | {
"end_col": 35,
"end_line": 458,
"start_col": 2,
"start_line": 457
} |
Prims.Tot | val va_quick_AddImmWrap (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddImmWrap dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2)) | val va_quick_AddImmWrap (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddImmWrap dst src1 src2))
let va_quick_AddImmWrap (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddImmWrap dst src1 src2)) = | false | null | false | (va_QProc (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_AddImmWrap dst src1 src2)
(va_wpProof_AddImmWrap dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.simm16",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_AddImmWrap",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_AddImmWrap",
"Vale.PPC64LE.InsBasic.va_wpProof_AddImmWrap",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_AddImmWrap (dst src1: va_operand_reg_opr) (src2: simm16)
: (va_quickCode unit (va_code_AddImmWrap dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_AddImmWrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.simm16
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_AddImmWrap dst src1 src2) | {
"end_col": 48,
"end_line": 291,
"start_col": 2,
"start_line": 290
} |
Prims.Tot | val va_quick_SubImm (dst src1: va_operand_reg_opr) (src2: nsimm16)
: (va_quickCode unit (va_code_SubImm dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2)) | val va_quick_SubImm (dst src1: va_operand_reg_opr) (src2: nsimm16)
: (va_quickCode unit (va_code_SubImm dst src1 src2))
let va_quick_SubImm (dst src1: va_operand_reg_opr) (src2: nsimm16)
: (va_quickCode unit (va_code_SubImm dst src1 src2)) = | false | null | false | (va_QProc (va_code_SubImm dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.nsimm16",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_SubImm",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_SubImm",
"Vale.PPC64LE.InsBasic.va_wpProof_SubImm",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_SubImm (dst src1: va_operand_reg_opr) (src2: nsimm16)
: (va_quickCode unit (va_code_SubImm dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_SubImm | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.nsimm16
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_SubImm dst src1 src2) | {
"end_col": 38,
"end_line": 533,
"start_col": 2,
"start_line": 532
} |
Prims.Tot | val va_quick_AddExtended (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddExtended dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2)) | val va_quick_AddExtended (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddExtended dst src1 src2))
let va_quick_AddExtended (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddExtended dst src1 src2)) = | false | null | false | (va_QProc (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2)
(va_wpProof_AddExtended dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_AddExtended",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_xer",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_AddExtended",
"Vale.PPC64LE.InsBasic.va_wpProof_AddExtended",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_AddExtended (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddExtended dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_AddExtended | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_AddExtended dst src1 src2) | {
"end_col": 77,
"end_line": 375,
"start_col": 2,
"start_line": 374
} |
Prims.Tot | val va_wp_AddExtendedOV
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (()))) | val va_wp_AddExtendedOV
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_AddExtendedOV
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr) (va_x_xer: xer_t).
let va_sM = va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2))
(va_if (Vale.PPC64LE.Decls.xer_ov (va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\
Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 +
va_if (Vale.PPC64LE.Decls.xer_ov (va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >=
pow2_64) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Vale.PPC64LE.Machine_s.xer_t",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.add_wrap64",
"Vale.PPC64LE.Decls.va_if",
"Prims.int",
"Vale.PPC64LE.Decls.xer_ov",
"Vale.PPC64LE.Decls.va_get_xer",
"Prims.l_not",
"Prims.bool",
"Prims.op_GreaterThanOrEqual",
"Prims.op_Addition",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_xer",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_AddExtendedOV
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_AddExtendedOV | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 83,
"end_line": 408,
"start_col": 2,
"start_line": 401
} |
Prims.Tot | val va_quick_SubWrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_SubWrap dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2)) | val va_quick_SubWrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_SubWrap dst src1 src2))
let va_quick_SubWrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_SubWrap dst src1 src2)) = | false | null | false | (va_QProc (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_SubWrap",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_SubWrap",
"Vale.PPC64LE.InsBasic.va_wpProof_SubWrap",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_SubWrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_SubWrap dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_SubWrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_SubWrap dst src1 src2) | {
"end_col": 39,
"end_line": 495,
"start_col": 2,
"start_line": 494
} |
Prims.Tot | val va_quick_MulHigh64U (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2)) | val va_quick_MulHigh64U (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulHigh64U dst src1 src2))
let va_quick_MulHigh64U (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) = | false | null | false | (va_QProc (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_MulHigh64U dst src1 src2)
(va_wpProof_MulHigh64U dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_MulHigh64U",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_MulHigh64U",
"Vale.PPC64LE.InsBasic.va_wpProof_MulHigh64U",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_MulHigh64U (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_MulHigh64U | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_MulHigh64U dst src1 src2) | {
"end_col": 48,
"end_line": 684,
"start_col": 2,
"start_line": 683
} |
Prims.Tot | val va_quick_And (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_And dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2)) | val va_quick_And (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_And dst src1 src2))
let va_quick_And (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_And dst src1 src2)) = | false | null | false | (va_QProc (va_code_And dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_And",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_And",
"Vale.PPC64LE.InsBasic.va_wpProof_And",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_And (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_And dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_And | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_And dst src1 src2) | {
"end_col": 35,
"end_line": 758,
"start_col": 2,
"start_line": 757
} |
Prims.Tot | val va_quick_AddExtendedOV (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2)) | val va_quick_AddExtendedOV (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddExtendedOV dst src1 src2))
let va_quick_AddExtendedOV (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) = | false | null | false | (va_QProc (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2)
(va_wpProof_AddExtendedOV dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_AddExtendedOV",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_Mod_xer",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_AddExtendedOV",
"Vale.PPC64LE.InsBasic.va_wpProof_AddExtendedOV",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_AddExtendedOV (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_AddExtendedOV | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_AddExtendedOV dst src1 src2) | {
"end_col": 81,
"end_line": 420,
"start_col": 2,
"start_line": 419
} |
Prims.Tot | val va_quick_MulLow64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2)) | val va_quick_MulLow64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2))
let va_quick_MulLow64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) = | false | null | false | (va_QProc (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_MulLow64",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_MulLow64",
"Vale.PPC64LE.InsBasic.va_wpProof_MulLow64",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_MulLow64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_MulLow64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_MulLow64 dst src1 src2) | {
"end_col": 40,
"end_line": 610,
"start_col": 2,
"start_line": 609
} |
Prims.Tot | val va_quick_MulLow64Wrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2)) | val va_quick_MulLow64Wrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2))
let va_quick_MulLow64Wrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) = | false | null | false | (va_QProc (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_MulLow64Wrap dst src1 src2)
(va_wpProof_MulLow64Wrap dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_MulLow64Wrap",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_MulLow64Wrap",
"Vale.PPC64LE.InsBasic.va_wpProof_MulLow64Wrap",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_MulLow64Wrap (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_MulLow64Wrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_MulLow64Wrap dst src1 src2) | {
"end_col": 55,
"end_line": 647,
"start_col": 2,
"start_line": 646
} |
Prims.Tot | val va_quick_Xor (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Xor dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2)) | val va_quick_Xor (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Xor dst src1 src2))
let va_quick_Xor (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Xor dst src1 src2)) = | false | null | false | (va_QProc (va_code_Xor dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_Xor",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_Xor",
"Vale.PPC64LE.InsBasic.va_wpProof_Xor",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Xor (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Xor dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_Xor | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_Xor dst src1 src2) | {
"end_col": 35,
"end_line": 721,
"start_col": 2,
"start_line": 720
} |
Prims.Tot | val va_wp_AddExtended
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (()))) | val va_wp_AddExtended
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0
let va_wp_AddExtended
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 = | false | null | false | (va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\
(forall (va_x_dst: va_value_reg_opr) (va_x_xer: xer_t).
let va_sM = va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in
va_get_ok va_sM /\
va_eval_reg_opr va_sM dst ==
Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2))
(va_if (Vale.PPC64LE.Decls.xer_ca (va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\
Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 +
va_if (Vale.PPC64LE.Decls.xer_ca (va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >=
pow2_64) ==>
va_k va_sM (()))) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Decls.va_state",
"Prims.unit",
"Prims.l_and",
"Vale.PPC64LE.Decls.va_is_dst_reg_opr",
"Vale.PPC64LE.Decls.va_is_src_reg_opr",
"Prims.b2t",
"Vale.PPC64LE.Decls.va_get_ok",
"Prims.l_Forall",
"Vale.PPC64LE.Decls.va_value_reg_opr",
"Vale.PPC64LE.Machine_s.xer_t",
"Prims.l_imp",
"Prims.eq2",
"Vale.Def.Words_s.nat64",
"Vale.PPC64LE.Decls.va_eval_reg_opr",
"Vale.Arch.Types.add_wrap64",
"Vale.PPC64LE.Decls.va_if",
"Prims.int",
"Vale.PPC64LE.Decls.xer_ca",
"Vale.PPC64LE.Decls.va_get_xer",
"Prims.l_not",
"Prims.bool",
"Prims.op_GreaterThanOrEqual",
"Prims.op_Addition",
"Vale.PPC64LE.Machine_s.pow2_64",
"Vale.PPC64LE.Machine_s.state",
"Vale.PPC64LE.Decls.va_upd_xer",
"Vale.PPC64LE.Decls.va_upd_operand_reg_opr"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) | false | true | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_wp_AddExtended
(dst src1 src2: va_operand_reg_opr)
(va_s0: va_state)
(va_k: (va_state -> unit -> Type0))
: Type0 | [] | Vale.PPC64LE.InsBasic.va_wp_AddExtended | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr ->
va_s0: Vale.PPC64LE.Decls.va_state ->
va_k: (_: Vale.PPC64LE.Decls.va_state -> _: Prims.unit -> Type0)
-> Type0 | {
"end_col": 83,
"end_line": 363,
"start_col": 2,
"start_line": 356
} |
Prims.Tot | val va_quick_SubImmWrap (dst src1: va_operand_reg_opr) (src2: nsimm16)
: (va_quickCode unit (va_code_SubImmWrap dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2)) | val va_quick_SubImmWrap (dst src1: va_operand_reg_opr) (src2: nsimm16)
: (va_quickCode unit (va_code_SubImmWrap dst src1 src2))
let va_quick_SubImmWrap (dst src1: va_operand_reg_opr) (src2: nsimm16)
: (va_quickCode unit (va_code_SubImmWrap dst src1 src2)) = | false | null | false | (va_QProc (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_SubImmWrap dst src1 src2)
(va_wpProof_SubImmWrap dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.nsimm16",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_SubImmWrap",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_SubImmWrap",
"Vale.PPC64LE.InsBasic.va_wpProof_SubImmWrap",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_SubImmWrap (dst src1: va_operand_reg_opr) (src2: nsimm16)
: (va_quickCode unit (va_code_SubImmWrap dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_SubImmWrap | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.nsimm16
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_SubImmWrap dst src1 src2) | {
"end_col": 48,
"end_line": 570,
"start_col": 2,
"start_line": 569
} |
Prims.Tot | val va_quick_Sr64Imm (dst src1: va_operand_reg_opr) (src2: bits64)
: (va_quickCode unit (va_code_Sr64Imm dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sr64Imm dst src1 src2)) =
(va_QProc (va_code_Sr64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64Imm dst src1 src2)
(va_wpProof_Sr64Imm dst src1 src2)) | val va_quick_Sr64Imm (dst src1: va_operand_reg_opr) (src2: bits64)
: (va_quickCode unit (va_code_Sr64Imm dst src1 src2))
let va_quick_Sr64Imm (dst src1: va_operand_reg_opr) (src2: bits64)
: (va_quickCode unit (va_code_Sr64Imm dst src1 src2)) = | false | null | false | (va_QProc (va_code_Sr64Imm dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_Sr64Imm dst src1 src2)
(va_wpProof_Sr64Imm dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.bits64",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_Sr64Imm",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_Sr64Imm",
"Vale.PPC64LE.InsBasic.va_wpProof_Sr64Imm",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2))
//--
//-- Sr64Imm
val va_code_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sr64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Sr64Imm (dst src1: va_operand_reg_opr) (src2: bits64)
: (va_quickCode unit (va_code_Sr64Imm dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_Sr64Imm | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.bits64
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_Sr64Imm dst src1 src2) | {
"end_col": 39,
"end_line": 794,
"start_col": 2,
"start_line": 793
} |
Prims.Tot | val va_quick_Sl64Imm (dst src1: va_operand_reg_opr) (src2: bits64)
: (va_quickCode unit (va_code_Sl64Imm dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sl64Imm dst src1 src2)) =
(va_QProc (va_code_Sl64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sl64Imm dst src1 src2)
(va_wpProof_Sl64Imm dst src1 src2)) | val va_quick_Sl64Imm (dst src1: va_operand_reg_opr) (src2: bits64)
: (va_quickCode unit (va_code_Sl64Imm dst src1 src2))
let va_quick_Sl64Imm (dst src1: va_operand_reg_opr) (src2: bits64)
: (va_quickCode unit (va_code_Sl64Imm dst src1 src2)) = | false | null | false | (va_QProc (va_code_Sl64Imm dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_Sl64Imm dst src1 src2)
(va_wpProof_Sl64Imm dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.Machine_s.bits64",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_Sl64Imm",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_Sl64Imm",
"Vale.PPC64LE.InsBasic.va_wpProof_Sl64Imm",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2))
//--
//-- Sr64Imm
val va_code_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sr64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sr64Imm dst src1 src2)) =
(va_QProc (va_code_Sr64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64Imm dst src1 src2)
(va_wpProof_Sr64Imm dst src1 src2))
//--
//-- Sl64Imm
val va_code_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sl64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sl64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sl64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sl64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Sl64Imm (dst src1: va_operand_reg_opr) (src2: bits64)
: (va_quickCode unit (va_code_Sl64Imm dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_Sl64Imm | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Machine_s.bits64
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_Sl64Imm dst src1 src2) | {
"end_col": 39,
"end_line": 830,
"start_col": 2,
"start_line": 829
} |
Prims.Tot | val va_quick_Sl64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sl64 dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Sl64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sl64 dst src1 src2)) =
(va_QProc (va_code_Sl64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sl64 dst src1 src2)
(va_wpProof_Sl64 dst src1 src2)) | val va_quick_Sl64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sl64 dst src1 src2))
let va_quick_Sl64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sl64 dst src1 src2)) = | false | null | false | (va_QProc (va_code_Sl64 dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_Sl64 dst src1 src2)
(va_wpProof_Sl64 dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_Sl64",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_Sl64",
"Vale.PPC64LE.InsBasic.va_wpProof_Sl64",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2))
//--
//-- Sr64Imm
val va_code_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sr64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sr64Imm dst src1 src2)) =
(va_QProc (va_code_Sr64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64Imm dst src1 src2)
(va_wpProof_Sr64Imm dst src1 src2))
//--
//-- Sl64Imm
val va_code_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sl64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sl64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sl64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sl64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sl64Imm dst src1 src2)) =
(va_QProc (va_code_Sl64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sl64Imm dst src1 src2)
(va_wpProof_Sl64Imm dst src1 src2))
//--
//-- Sr64
val va_code_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sr64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2 `op_Modulus` 64) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2 `op_Modulus` 64) ==> va_k va_sM (())))
val va_wpProof_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64 dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sr64 dst src1 src2)) =
(va_QProc (va_code_Sr64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64 dst src1 src2)
(va_wpProof_Sr64 dst src1 src2))
//--
//-- Sl64
val va_code_Sl64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sl64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sl64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2 `op_Modulus` 64) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sl64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2 `op_Modulus` 64) ==> va_k va_sM (())))
val va_wpProof_Sl64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sl64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sl64 dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sl64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Sl64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sl64 dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_Sl64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_Sl64 dst src1 src2) | {
"end_col": 36,
"end_line": 904,
"start_col": 2,
"start_line": 903
} |
Prims.Tot | val va_quick_Sr64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sr64 dst src1 src2)) | [
{
"abbrev": false,
"full_module": "Vale.PPC64LE.QuickCode",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Decls",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.State",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE.Machine_s",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.Arch.Types",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Mul",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "Vale.PPC64LE",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar.Pervasives",
"short_module": null
},
{
"abbrev": false,
"full_module": "Prims",
"short_module": null
},
{
"abbrev": false,
"full_module": "FStar",
"short_module": null
}
] | false | let va_quick_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sr64 dst src1 src2)) =
(va_QProc (va_code_Sr64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64 dst src1 src2)
(va_wpProof_Sr64 dst src1 src2)) | val va_quick_Sr64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sr64 dst src1 src2))
let va_quick_Sr64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sr64 dst src1 src2)) = | false | null | false | (va_QProc (va_code_Sr64 dst src1 src2)
([va_mod_reg_opr dst])
(va_wp_Sr64 dst src1 src2)
(va_wpProof_Sr64 dst src1 src2)) | {
"checked_file": "Vale.PPC64LE.InsBasic.fsti.checked",
"dependencies": [
"Vale.PPC64LE.State.fsti.checked",
"Vale.PPC64LE.Stack_i.fsti.checked",
"Vale.PPC64LE.QuickCode.fst.checked",
"Vale.PPC64LE.Memory.fsti.checked",
"Vale.PPC64LE.Machine_s.fst.checked",
"Vale.PPC64LE.Decls.fsti.checked",
"Vale.Arch.Types.fsti.checked",
"prims.fst.checked",
"FStar.Pervasives.Native.fst.checked",
"FStar.Pervasives.fsti.checked",
"FStar.Mul.fst.checked"
],
"interface_file": false,
"source_file": "Vale.PPC64LE.InsBasic.fsti"
} | [
"total"
] | [
"Vale.PPC64LE.Decls.va_operand_reg_opr",
"Vale.PPC64LE.QuickCode.va_QProc",
"Prims.unit",
"Vale.PPC64LE.InsBasic.va_code_Sr64",
"Prims.Cons",
"Vale.PPC64LE.QuickCode.mod_t",
"Vale.PPC64LE.QuickCode.va_mod_reg_opr",
"Prims.Nil",
"Vale.PPC64LE.InsBasic.va_wp_Sr64",
"Vale.PPC64LE.InsBasic.va_wpProof_Sr64",
"Vale.PPC64LE.QuickCode.va_quickCode"
] | [] | module Vale.PPC64LE.InsBasic
open FStar.Mul
open Vale.Arch.Types
open Vale.PPC64LE.Machine_s
open Vale.PPC64LE.State
open Vale.PPC64LE.Decls
open Vale.PPC64LE.QuickCode
unfold let vale_heap = Vale.PPC64LE.Memory.vale_heap
unfold let vale_stack = Vale.PPC64LE.Stack_i.vale_stack
//-- Move
val va_code_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_code
val va_codegen_success_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Move : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Move dst src) va_s0 /\ va_is_dst_reg_opr dst va_s0 /\
va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state
-> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src ==> va_k va_sM (())))
val va_wpProof_Move : dst:va_operand_reg_opr -> src:va_operand_reg_opr -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Move dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Move dst src) ([va_mod_reg_opr dst])
va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Move (dst:va_operand_reg_opr) (src:va_operand_reg_opr) : (va_quickCode unit
(va_code_Move dst src)) =
(va_QProc (va_code_Move dst src) ([va_mod_reg_opr dst]) (va_wp_Move dst src) (va_wpProof_Move dst
src))
//--
//-- LoadImm64
val va_code_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImm64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImm64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == src `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state -> unit
-> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == src `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_LoadImm64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state -> va_k:(va_state
-> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImm64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImm64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImm64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImm64 dst src)) =
(va_QProc (va_code_LoadImm64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImm64 dst src)
(va_wpProof_LoadImm64 dst src))
//--
//-- LoadImmShl64
val va_code_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_code
val va_codegen_success_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> Tot va_pbool
val va_lemma_LoadImmShl64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr -> src:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_LoadImmShl64 dst src) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) (va_s0:va_state) (va_k:(va_state ->
unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let
va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM
dst == Vale.Arch.Types.ishl64 (src `op_Modulus` pow2_64) 16 ==> va_k va_sM (())))
val va_wpProof_LoadImmShl64 : dst:va_operand_reg_opr -> src:simm16 -> va_s0:va_state ->
va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_LoadImmShl64 dst src va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_LoadImmShl64 (dst:va_operand_reg_opr) (src:simm16) : (va_quickCode unit
(va_code_LoadImmShl64 dst src)) =
(va_QProc (va_code_LoadImmShl64 dst src) ([va_mod_reg_opr dst]) (va_wp_LoadImmShl64 dst src)
(va_wpProof_LoadImmShl64 dst src))
//--
//-- AddLa
val va_code_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddLa : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddLa dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <= va_eval_reg_opr va_s0 src1 +
src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 /\ va_state_eq va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (0 <=
va_eval_reg_opr va_s0 src1 + src2 /\ va_eval_reg_opr va_s0 src1 + src2 < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + src2 ==> va_k
va_sM (())))
val va_wpProof_AddLa : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddLa dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddLa dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddLa (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) : (va_quickCode
unit (va_code_AddLa dst src1 src2)) =
(va_QProc (va_code_AddLa dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddLa dst src1 src2)
(va_wpProof_AddLa dst src1 src2))
//--
//-- Add
val va_code_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Add : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Add dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Add : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Add dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Add dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Add (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Add dst src1 src2)) =
(va_QProc (va_code_Add dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Add dst src1 src2)
(va_wpProof_Add dst src1 src2))
//--
//-- AddWrap
val va_code_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_AddWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_AddWrap dst src1 src2)) =
(va_QProc (va_code_AddWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddWrap dst src1 src2)
(va_wpProof_AddWrap dst src1 src2))
//--
//-- AddImm
val va_code_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot va_code
val va_codegen_success_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
Tot va_pbool
val va_lemma_AddImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 + Vale.PPC64LE.Machine_s.int_to_nat64 src2 < pow2_64 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 +
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_AddImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImm dst src1 src2)) =
(va_QProc (va_code_AddImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImm dst src1 src2)
(va_wpProof_AddImm dst src1 src2))
//--
//-- AddImmWrap
val va_code_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 -> Tot
va_code
val va_codegen_success_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:simm16 -> Tot va_pbool
val va_lemma_AddImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:simm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_AddImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:simm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:simm16) :
(va_quickCode unit (va_code_AddImmWrap dst src1 src2)) =
(va_QProc (va_code_AddImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_AddImmWrap dst src1
src2) (va_wpProof_AddImmWrap dst src1 src2))
//--
//-- AddCarry
val va_code_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddCarry : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddCarry dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) /\ va_state_eq va_sM
(va_update_xer va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddCarry : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddCarry dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddCarry dst src1 src2) ([va_Mod_xer;
va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddCarry (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_AddCarry dst src1 src2)) =
(va_QProc (va_code_AddCarry dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst]) (va_wp_AddCarry dst
src1 src2) (va_wpProof_AddCarry dst src1 src2))
//--
//-- AddExtended
val va_code_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtended : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtended dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ca (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ca
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtended : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtended dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtended dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtended (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtended dst src1 src2)) =
(va_QProc (va_code_AddExtended dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtended dst src1 src2) (va_wpProof_AddExtended dst src1 src2))
//--
//-- AddExtendedOV
val va_code_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_AddExtendedOV : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_AddExtendedOV dst src1 src2) va_s0 /\
va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM) ==
(va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + (if Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0) then 1 else 0) >= pow2_64) /\ va_state_eq va_sM (va_update_xer va_sM
(va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0)))))
[@ va_qattr]
let va_wp_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) (va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) (va_x_xer:xer_t) . let va_sM =
va_upd_xer va_x_xer (va_upd_operand_reg_opr dst va_x_dst va_s0) in va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.add_wrap64 (Vale.Arch.Types.add_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)) (va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0)) /\ Vale.PPC64LE.Decls.xer_ov (va_get_xer va_sM)
== (va_eval_reg_opr va_s0 src1 + va_eval_reg_opr va_s0 src2 + va_if (Vale.PPC64LE.Decls.xer_ov
(va_get_xer va_s0)) (fun _ -> 1) (fun _ -> 0) >= pow2_64) ==> va_k va_sM (())))
val va_wpProof_AddExtendedOV : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_AddExtendedOV dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_AddExtendedOV dst src1 src2)
([va_Mod_xer; va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_AddExtendedOV (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_AddExtendedOV dst src1 src2)) =
(va_QProc (va_code_AddExtendedOV dst src1 src2) ([va_Mod_xer; va_mod_reg_opr dst])
(va_wp_AddExtendedOV dst src1 src2) (va_wpProof_AddExtendedOV dst src1 src2))
//--
//-- Sub
val va_code_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sub : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sub dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 - va_eval_reg_opr va_s0 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - va_eval_reg_opr
va_s0 src2 ==> va_k va_sM (())))
val va_wpProof_Sub : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sub dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sub dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sub (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Sub dst src1 src2)) =
(va_QProc (va_code_Sub dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sub dst src1 src2)
(va_wpProof_Sub dst src1 src2))
//--
//-- SubWrap
val va_code_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_SubWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_SubWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_SubWrap dst src1 src2)) =
(va_QProc (va_code_SubWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubWrap dst src1 src2)
(va_wpProof_SubWrap dst src1 src2))
//--
//-- SubImm
val va_code_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16
-> Tot va_pbool
val va_lemma_SubImm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64
src2 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\
va_eval_reg_opr va_s0 src1 - Vale.PPC64LE.Machine_s.int_to_nat64 src2 >= 0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_eval_reg_opr va_s0 src1 -
Vale.PPC64LE.Machine_s.int_to_nat64 src2 ==> va_k va_sM (())))
val va_wpProof_SubImm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImm dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImm dst src1 src2)) =
(va_QProc (va_code_SubImm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImm dst src1 src2)
(va_wpProof_SubImm dst src1 src2))
//--
//-- SubImmWrap
val va_code_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 -> Tot
va_code
val va_codegen_success_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:nsimm16 -> Tot va_pbool
val va_lemma_SubImmWrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:nsimm16
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_SubImmWrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr va_s0 src1)
(Vale.PPC64LE.Machine_s.int_to_nat64 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.sub_wrap64 (va_eval_reg_opr
va_s0 src1) (Vale.PPC64LE.Machine_s.int_to_nat64 src2) ==> va_k va_sM (())))
val va_wpProof_SubImmWrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:nsimm16 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_SubImmWrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_SubImmWrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_SubImmWrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:nsimm16) :
(va_quickCode unit (va_code_SubImmWrap dst src1 src2)) =
(va_QProc (va_code_SubImmWrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_SubImmWrap dst src1
src2) (va_wpProof_SubImmWrap dst src1 src2))
//--
//-- MulLow64
val va_code_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Tot va_code
val va_codegen_success_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0 /\ (0
<= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) /\ va_mul_nat
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64)))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (0 <= va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2)
/\ va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) < pow2_64) /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_MulLow64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64 dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
: (va_quickCode unit (va_code_MulLow64 dst src1 src2)) =
(va_QProc (va_code_MulLow64 dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64 dst src1 src2)
(va_wpProof_MulLow64 dst src1 src2))
//--
//-- MulLow64Wrap
val va_code_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulLow64Wrap : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulLow64Wrap dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Modulus` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Modulus` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulLow64Wrap : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulLow64Wrap dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulLow64Wrap dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulLow64Wrap (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulLow64Wrap dst src1 src2)) =
(va_QProc (va_code_MulLow64Wrap dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulLow64Wrap dst
src1 src2) (va_wpProof_MulLow64Wrap dst src1 src2))
//--
//-- MulHigh64U
val va_code_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_code
val va_codegen_success_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_MulHigh64U : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_MulHigh64U dst src1 src2) va_s0 /\ va_is_dst_reg_opr
dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0
src2) `op_Division` pow2_64 /\ va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr
dst va_sM va_s0))))
[@ va_qattr]
let va_wp_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == va_mul_nat (va_eval_reg_opr
va_s0 src1) (va_eval_reg_opr va_s0 src2) `op_Division` pow2_64 ==> va_k va_sM (())))
val va_wpProof_MulHigh64U : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_MulHigh64U dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_MulHigh64U dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_MulHigh64U (dst:va_operand_reg_opr) (src1:va_operand_reg_opr)
(src2:va_operand_reg_opr) : (va_quickCode unit (va_code_MulHigh64U dst src1 src2)) =
(va_QProc (va_code_MulHigh64U dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_MulHigh64U dst src1
src2) (va_wpProof_MulHigh64U dst src1 src2))
//--
//-- Xor
val va_code_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Xor : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Xor dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ixor64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_Xor : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Xor dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Xor dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Xor (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_Xor dst src1 src2)) =
(va_QProc (va_code_Xor dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Xor dst src1 src2)
(va_wpProof_Xor dst src1 src2))
//--
//-- And
val va_code_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_And : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_And dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.iand64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2) ==> va_k va_sM (())))
val va_wpProof_And : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_And dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_And dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_And (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) :
(va_quickCode unit (va_code_And dst src1 src2)) =
(va_QProc (va_code_And dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_And dst src1 src2)
(va_wpProof_And dst src1 src2))
//--
//-- Sr64Imm
val va_code_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sr64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sr64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sr64Imm dst src1 src2)) =
(va_QProc (va_code_Sr64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sr64Imm dst src1 src2)
(va_wpProof_Sr64Imm dst src1 src2))
//--
//-- Sl64Imm
val va_code_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 -> Tot
va_code
val va_codegen_success_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64
-> Tot va_pbool
val va_lemma_Sl64Imm : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:bits64
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sl64Imm dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0 src1) src2 /\
va_state_eq va_sM (va_update_ok va_sM (va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) (va_s0:va_state)
(va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_get_ok va_s0 /\ (forall
(va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst va_x_dst va_s0 in
va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishl64 (va_eval_reg_opr va_s0
src1) src2 ==> va_k va_sM (())))
val va_wpProof_Sl64Imm : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:bits64 ->
va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sl64Imm dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sl64Imm dst src1 src2)
([va_mod_reg_opr dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sl64Imm (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:bits64) :
(va_quickCode unit (va_code_Sl64Imm dst src1 src2)) =
(va_QProc (va_code_Sl64Imm dst src1 src2) ([va_mod_reg_opr dst]) (va_wp_Sl64Imm dst src1 src2)
(va_wpProof_Sl64Imm dst src1 src2))
//--
//-- Sr64
val va_code_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr ->
Tot va_code
val va_codegen_success_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr ->
src2:va_operand_reg_opr -> Tot va_pbool
val va_lemma_Sr64 : va_b0:va_code -> va_s0:va_state -> dst:va_operand_reg_opr ->
src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> Ghost (va_state & va_fuel)
(requires (va_require_total va_b0 (va_code_Sr64 dst src1 src2) va_s0 /\ va_is_dst_reg_opr dst
va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\ va_get_ok va_s0))
(ensures (fun (va_sM, va_fM) -> va_ensure_total va_b0 va_s0 va_sM va_fM /\ va_get_ok va_sM /\
va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64 (va_eval_reg_opr va_s0 src1)
(va_eval_reg_opr va_s0 src2 `op_Modulus` 64) /\ va_state_eq va_sM (va_update_ok va_sM
(va_update_operand_reg_opr dst va_sM va_s0))))
[@ va_qattr]
let va_wp_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr)
(va_s0:va_state) (va_k:(va_state -> unit -> Type0)) : Type0 =
(va_is_dst_reg_opr dst va_s0 /\ va_is_src_reg_opr src1 va_s0 /\ va_is_src_reg_opr src2 va_s0 /\
va_get_ok va_s0 /\ (forall (va_x_dst:va_value_reg_opr) . let va_sM = va_upd_operand_reg_opr dst
va_x_dst va_s0 in va_get_ok va_sM /\ va_eval_reg_opr va_sM dst == Vale.Arch.Types.ishr64
(va_eval_reg_opr va_s0 src1) (va_eval_reg_opr va_s0 src2 `op_Modulus` 64) ==> va_k va_sM (())))
val va_wpProof_Sr64 : dst:va_operand_reg_opr -> src1:va_operand_reg_opr -> src2:va_operand_reg_opr
-> va_s0:va_state -> va_k:(va_state -> unit -> Type0)
-> Ghost (va_state & va_fuel & unit)
(requires (va_t_require va_s0 /\ va_wp_Sr64 dst src1 src2 va_s0 va_k))
(ensures (fun (va_sM, va_f0, va_g) -> va_t_ensure (va_code_Sr64 dst src1 src2) ([va_mod_reg_opr
dst]) va_s0 va_k ((va_sM, va_f0, va_g))))
[@ "opaque_to_smt" va_qattr]
let va_quick_Sr64 (dst:va_operand_reg_opr) (src1:va_operand_reg_opr) (src2:va_operand_reg_opr) : | false | false | Vale.PPC64LE.InsBasic.fsti | {
"detail_errors": false,
"detail_hint_replay": false,
"initial_fuel": 2,
"initial_ifuel": 0,
"max_fuel": 1,
"max_ifuel": 1,
"no_plugins": false,
"no_smt": false,
"no_tactics": false,
"quake_hi": 1,
"quake_keep": false,
"quake_lo": 1,
"retry": false,
"reuse_hint_for": null,
"smtencoding_elim_box": true,
"smtencoding_l_arith_repr": "native",
"smtencoding_nl_arith_repr": "wrapped",
"smtencoding_valid_elim": false,
"smtencoding_valid_intro": true,
"tcnorm": true,
"trivial_pre_for_unannotated_effectful_fns": false,
"z3cliopt": [
"smt.arith.nl=false",
"smt.QI.EAGER_THRESHOLD=100",
"smt.CASE_SPLIT=3"
],
"z3refresh": false,
"z3rlimit": 5,
"z3rlimit_factor": 1,
"z3seed": 0,
"z3smtopt": [],
"z3version": "4.8.5"
} | null | val va_quick_Sr64 (dst src1 src2: va_operand_reg_opr)
: (va_quickCode unit (va_code_Sr64 dst src1 src2)) | [] | Vale.PPC64LE.InsBasic.va_quick_Sr64 | {
"file_name": "obj/Vale.PPC64LE.InsBasic.fsti",
"git_rev": "12c5e9539c7e3c366c26409d3b86493548c4483e",
"git_url": "https://github.com/hacl-star/hacl-star.git",
"project_name": "hacl-star"
} |
dst: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src1: Vale.PPC64LE.Decls.va_operand_reg_opr ->
src2: Vale.PPC64LE.Decls.va_operand_reg_opr
-> Vale.PPC64LE.QuickCode.va_quickCode Prims.unit
(Vale.PPC64LE.InsBasic.va_code_Sr64 dst src1 src2) | {
"end_col": 36,
"end_line": 867,
"start_col": 2,
"start_line": 866
} |
Subsets and Splits
No saved queries yet
Save your SQL queries to embed, download, and access them later. Queries will appear here once saved.