input
stringlengths 144
489k
| output
stringlengths 45
339k
| shard
stringclasses 16
values | filename
stringlengths 135
135
| line_num
int64 0
2.62k
| context
list |
|---|---|---|---|---|---|
{"name": "gen_helper_neon_qzip16", "code": "unsigned __int64 __fastcall gen_helper_neon_qzip16 ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_neon_qzip16 , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 2, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 521 |
[
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_neon_qzip32", "code": "unsigned __int64 __fastcall gen_helper_neon_qzip32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_neon_qzip32 , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 2, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 522 |
[
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crypto_aese", "code": "unsigned __int64 __fastcall gen_helper_crypto_aese ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v5@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; tcg_gen_callN ( & helper_crypto_aese , Number L , Number L , @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 523 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crypto_aesmc", "code": "unsigned __int64 __fastcall gen_helper_crypto_aesmc ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v5@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; tcg_gen_callN ( & helper_crypto_aesmc , Number L , Number L , @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 524 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crypto_sha1_3reg", "code": "unsigned __int64 __fastcall gen_helper_crypto_sha1_3reg ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ [ Number ] ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v7@@ [ Number ] = tcgv_i32_temp ( @@a4@@ ) ; tcg_gen_callN ( & helper_crypto_sha1_3reg , Number L , Number L , @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v8@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 4, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 525 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crypto_sha1h", "code": "unsigned __int64 __fastcall gen_helper_crypto_sha1h ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_crypto_sha1h , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 2, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 526 |
[
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crypto_sha1su1", "code": "unsigned __int64 __fastcall gen_helper_crypto_sha1su1 ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_crypto_sha1su1 , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 2, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 527 |
[
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crypto_sha256h", "code": "unsigned __int64 __fastcall gen_helper_crypto_sha256h ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; tcg_gen_callN ( & helper_crypto_sha256h , Number L , Number L , @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 528 |
[
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crypto_sha256h2", "code": "unsigned __int64 __fastcall gen_helper_crypto_sha256h2 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; tcg_gen_callN ( & helper_crypto_sha256h2 , Number L , Number L , @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 529 |
[
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_helper_crypto_sha256h\", \"code\": \"unsigned __int64 __fastcall gen_helper_crypto_sha256h ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; tcg_gen_callN ( & helper_crypto_sha256h , Number L , Number L , @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_helper_crypto_sha256su0", "code": "unsigned __int64 __fastcall gen_helper_crypto_sha256su0 ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_crypto_sha256su0 , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v4", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 2, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v3", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 530 |
[
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crypto_sha256su1", "code": "unsigned __int64 __fastcall gen_helper_crypto_sha256su1 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ [ Number ] ; unsigned __int64 @@v6@@ ; @@v6@@ = __readfsqword ( Number ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v5@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; tcg_gen_callN ( & helper_crypto_sha256su1 , Number L , Number L , @@v5@@ ) ; return __readfsqword ( Number ) ^ @@v6@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 531 |
[
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_crc32", "code": "unsigned __int64 __fastcall gen_helper_crc32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_crc32 , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}, {"n": "v8", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r24"}, {"n": "retval", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 3, "t": "TCGTemp_0"}, "location": "r8"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 532 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_helper_crc32c", "code": "unsigned __int64 __fastcall gen_helper_crc32c ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_crc32c , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}, {"n": "v8", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "arg3", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r24"}, {"n": "retval", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 3, "t": "TCGTemp_0"}, "location": "r8"}, {"n": "args", "t": {"T": 2, "n": 3, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 533 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_crc32\", \"code\": \"unsigned __int64 __fastcall gen_helper_crc32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_crc32 , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_helper_neon_pmull_64_lo", "code": "unsigned __int64 __fastcall gen_helper_neon_pmull_64_lo ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v6@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v3@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_neon_pmull_64_lo , @@v3@@ , Number L , @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}, {"n": "v6", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "retval", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 3, "t": "TCGTemp_0"}, "location": "r8"}, {"n": "args", "t": {"T": 2, "n": 2, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 534 |
[
"{\"name\": \"tcgv_i64_temp\", \"code\": \"__int64 __fastcall tcgv_i64_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_neon_pmull_64_hi", "code": "unsigned __int64 __fastcall gen_helper_neon_pmull_64_hi ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v6@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v3@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_neon_pmull_64_hi , @@v3@@ , Number L , @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}, {"n": "v6", "t": {"T": 2, "n": 3, "s": 8, "t": "__int64"}, "location": "s32"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "retval", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 3, "t": "TCGTemp_0"}, "location": "r8"}, {"n": "args", "t": {"T": 2, "n": 2, "s": 8, "t": "TCGTemp_0 *"}, "location": "s32"}, {"n": "v6", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 535 |
[
"{\"name\": \"tcgv_i64_temp\", \"code\": \"__int64 __fastcall tcgv_i64_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_qrdmlah_s16", "code": "unsigned __int64 __fastcall gen_helper_gvec_qrdmlah_s16 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_qrdmlah_s16 , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 536 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_qrdmlsh_s16", "code": "unsigned __int64 __fastcall gen_helper_gvec_qrdmlsh_s16 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_qrdmlsh_s16 , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 537 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_qrdmlah_s32", "code": "unsigned __int64 __fastcall gen_helper_gvec_qrdmlah_s32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_qrdmlah_s32 , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 538 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_qrdmlsh_s32", "code": "unsigned __int64 __fastcall gen_helper_gvec_qrdmlsh_s32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_qrdmlsh_s32 , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 539 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sdot_b", "code": "unsigned __int64 __fastcall gen_helper_gvec_sdot_b ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ [ Number ] ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v7@@ [ Number ] = tcgv_i32_temp ( @@a4@@ ) ; tcg_gen_callN ( & helper_gvec_sdot_b , Number L , Number L , @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v8@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 4, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 540 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_udot_b", "code": "unsigned __int64 __fastcall gen_helper_gvec_udot_b ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ [ Number ] ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v7@@ [ Number ] = tcgv_i32_temp ( @@a4@@ ) ; tcg_gen_callN ( & helper_gvec_udot_b , Number L , Number L , @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v8@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 4, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 541 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sdot_idx_b", "code": "unsigned __int64 __fastcall gen_helper_gvec_sdot_idx_b ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ [ Number ] ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v7@@ [ Number ] = tcgv_i32_temp ( @@a4@@ ) ; tcg_gen_callN ( & helper_gvec_sdot_idx_b , Number L , Number L , @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v8@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 4, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 542 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_udot_idx_b", "code": "unsigned __int64 __fastcall gen_helper_gvec_udot_idx_b ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ [ Number ] ; unsigned __int64 @@v8@@ ; @@v8@@ = __readfsqword ( Number ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v7@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v7@@ [ Number ] = tcgv_i32_temp ( @@a4@@ ) ; tcg_gen_callN ( & helper_gvec_udot_idx_b , Number L , Number L , @@v7@@ ) ; return __readfsqword ( Number ) ^ @@v8@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v8", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "args", "t": {"T": 2, "n": 4, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 543 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_fcaddh", "code": "unsigned __int64 __fastcall gen_helper_gvec_fcaddh ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fcaddh , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 544 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_fcadds", "code": "unsigned __int64 __fastcall gen_helper_gvec_fcadds ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fcadds , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 545 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_fcmlah", "code": "unsigned __int64 __fastcall gen_helper_gvec_fcmlah ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fcmlah , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 546 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_fcmlah_idx", "code": "unsigned __int64 __fastcall gen_helper_gvec_fcmlah_idx ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fcmlah_idx , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 547 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_helper_gvec_fcmlah\", \"code\": \"unsigned __int64 __fastcall gen_helper_gvec_fcmlah ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fcmlah , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 2, \"n\": 5, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_helper_gvec_fcmlas", "code": "unsigned __int64 __fastcall gen_helper_gvec_fcmlas ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fcmlas , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 548 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_fcmlas_idx", "code": "unsigned __int64 __fastcall gen_helper_gvec_fcmlas_idx ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fcmlas_idx , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 549 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_helper_gvec_fcmlas\", \"code\": \"unsigned __int64 __fastcall gen_helper_gvec_fcmlas ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fcmlas , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r72\"}, {\"n\": \"v9\", \"t\": {\"T\": 2, \"n\": 5, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_helper_gvec_uqadd_b", "code": "unsigned __int64 __fastcall gen_helper_gvec_uqadd_b ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_uqadd_b , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 550 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_uqadd_h", "code": "unsigned __int64 __fastcall gen_helper_gvec_uqadd_h ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_uqadd_h , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 551 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_uqadd_s", "code": "unsigned __int64 __fastcall gen_helper_gvec_uqadd_s ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_uqadd_s , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 552 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_uqadd_d", "code": "unsigned __int64 __fastcall gen_helper_gvec_uqadd_d ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_uqadd_d , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 553 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sqadd_b", "code": "unsigned __int64 __fastcall gen_helper_gvec_sqadd_b ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_sqadd_b , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 554 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sqadd_h", "code": "unsigned __int64 __fastcall gen_helper_gvec_sqadd_h ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_sqadd_h , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 555 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sqadd_s", "code": "unsigned __int64 __fastcall gen_helper_gvec_sqadd_s ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_sqadd_s , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 556 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sqadd_d", "code": "unsigned __int64 __fastcall gen_helper_gvec_sqadd_d ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_sqadd_d , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 557 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_uqsub_b", "code": "unsigned __int64 __fastcall gen_helper_gvec_uqsub_b ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_uqsub_b , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 558 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_uqsub_h", "code": "unsigned __int64 __fastcall gen_helper_gvec_uqsub_h ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_uqsub_h , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 559 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_uqsub_s", "code": "unsigned __int64 __fastcall gen_helper_gvec_uqsub_s ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_uqsub_s , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 560 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_uqsub_d", "code": "unsigned __int64 __fastcall gen_helper_gvec_uqsub_d ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_uqsub_d , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 561 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sqsub_b", "code": "unsigned __int64 __fastcall gen_helper_gvec_sqsub_b ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_sqsub_b , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 562 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sqsub_h", "code": "unsigned __int64 __fastcall gen_helper_gvec_sqsub_h ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_sqsub_h , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 563 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sqsub_s", "code": "unsigned __int64 __fastcall gen_helper_gvec_sqsub_s ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_sqsub_s , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 564 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_sqsub_d", "code": "unsigned __int64 __fastcall gen_helper_gvec_sqsub_d ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_sqsub_d , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 565 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_fmlal_a32", "code": "unsigned __int64 __fastcall gen_helper_gvec_fmlal_a32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fmlal_a32 , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 566 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "gen_helper_gvec_fmlal_idx_a32", "code": "unsigned __int64 __fastcall gen_helper_gvec_fmlal_idx_a32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ , __int64 @@a5@@ ) { __int64 @@v9@@ [ Number ] ; unsigned __int64 @@v10@@ ; @@v10@@ = __readfsqword ( Number ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a2@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v9@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v9@@ [ Number ] = tcgv_i32_temp ( @@a5@@ ) ; tcg_gen_callN ( & helper_gvec_fmlal_idx_a32 , Number L , Number L , @@v9@@ ) ; return __readfsqword ( Number ) ^ @@v10@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r72"}, {"n": "v9", "t": {"T": 2, "n": 5, "s": 8, "t": "__int64"}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "arg3", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "arg4", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}, {"n": "arg5", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r72"}, {"n": "args", "t": {"T": 2, "n": 5, "s": 8, "t": "TCGTemp_0 *"}, "location": "s48"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 567 |
[
"{\"name\": \"tcgv_i32_temp\", \"code\": \"__int64 __fastcall tcgv_i32_temp ( __int64 @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_ctx + @@a1@@ ; temp_idx ( tcg_ctx + @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcgv_ptr_temp\", \"code\": \"__int64 __fastcall tcgv_ptr_temp ( __int64 @@a1@@ ) { return tcgv_i32_temp ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "tcg_gen_op2_i32", "code": "__int64 __fastcall tcg_gen_op2_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; @@v3@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v4@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v4@@ , @@v3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "a2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r32"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "a1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 568 |
[
"{\"name\": \"tcgv_i32_arg\", \"code\": \"__int64 __fastcall tcgv_i32_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_op2_i64", "code": "__int64 __fastcall tcg_gen_op2_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; @@v3@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v4@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v4@@ , @@v3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "a2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r32"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "a1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "v4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 569 |
[
"{\"name\": \"tcgv_i64_arg\", \"code\": \"__int64 __fastcall tcgv_i64_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_op2i_i32", "code": "__int64 __fastcall tcg_gen_op2i_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v3@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "a2", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r16"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "a1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 570 |
[
"{\"name\": \"tcgv_i32_arg\", \"code\": \"__int64 __fastcall tcgv_i32_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_op2i_i64", "code": "__int64 __fastcall tcg_gen_op2i_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v3@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "a2", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r16"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "a1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 571 |
[
"{\"name\": \"tcgv_i64_arg\", \"code\": \"__int64 __fastcall tcgv_i64_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_op3_i32", "code": "__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }", "source": [{"n": "v4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r104"}, {"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "v5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "v4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r104"}, {"n": "a2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "a3", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r24"}, {"n": "v5", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r32"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "a1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 572 |
[
"{\"name\": \"tcgv_i32_arg\", \"code\": \"__int64 __fastcall tcgv_i32_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_op3_i64", "code": "__int64 __fastcall tcg_gen_op3_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i64_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }", "source": [{"n": "v4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r104"}, {"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "v5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "v4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r104"}, {"n": "a2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "a3", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r24"}, {"n": "v5", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r32"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "a1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 573 |
[
"{\"name\": \"tcgv_i64_arg\", \"code\": \"__int64 __fastcall tcgv_i64_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ldst_op_i32", "code": "__int64 __fastcall tcg_gen_ldst_op_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "v4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "base", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "offset", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "v4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r32"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "val", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 574 |
[
"{\"name\": \"tcgv_i32_arg\", \"code\": \"__int64 __fastcall tcgv_i32_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcgv_ptr_arg\", \"code\": \"__int64 __fastcall tcgv_ptr_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_ptr_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ldst_op_i64", "code": "__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "v4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "base", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r16"}, {"n": "offset", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r24"}, {"n": "v4", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r32"}, {"n": "opc", "t": {"T": 1, "n": "TCGOpcode_0", "s": 4}, "location": "r56"}, {"n": "val", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "v5", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 575 |
[
"{\"name\": \"tcgv_i64_arg\", \"code\": \"__int64 __fastcall tcgv_i64_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcgv_ptr_arg\", \"code\": \"__int64 __fastcall tcgv_ptr_arg ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_ptr_temp ( @@a1@@ ) ; return temp_arg ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "gen_set_label", "code": "__int64 __fastcall gen_set_label ( _BYTE * @@a1@@ ) { __int64 @@v1@@ ; * @@a1@@ |= Number ; @@v1@@ = label_arg ( ( __int64 ) @@a1@@ ) ; return tcg_gen_op1 ( Number L , @@v1@@ ) ; }", "source": [{"n": "a1", "t": {"T": 3, "t": "_BYTE"}, "location": "r56"}, {"n": "v1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "l", "t": {"T": 3, "t": "TCGLabel_0"}, "location": "r56"}, {"n": "v1", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 576 |
[
"{\"name\": \"label_arg\", \"code\": \"__int64 __fastcall label_arg ( __int64 @@a1@@ ) { return @@a1@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "tcg_gen_br", "code": "__int64 __fastcall tcg_gen_br ( __int64 @@a1@@ ) { __int64 @@v1@@ ; ++ * ( _WORD * ) ( @@a1@@ + Number ) ; @@v1@@ = label_arg ( @@a1@@ ) ; return tcg_gen_op1 ( Number L , @@v1@@ ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "v1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "l", "t": {"T": 3, "t": "TCGLabel_0"}, "location": "r56"}, {"n": "v1", "t": {"T": 1, "n": "TCGArg", "s": 8}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 577 |
[
"{\"name\": \"label_arg\", \"code\": \"__int64 __fastcall label_arg ( __int64 @@a1@@ ) { return @@a1@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "tcg_gen_mov_i32", "code": "__int64 __fastcall tcg_gen_mov_i32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@result@@ ; @@result@@ = @@a1@@ ; if ( @@a1@@ != @@a2@@ ) @@result@@ = tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; return @@result@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "result", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 578 |
[
"{\"name\": \"tcg_gen_op2_i32\", \"code\": \"__int64 __fastcall tcg_gen_op2_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; @@v3@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v4@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v4@@ , @@v3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_movi_i32", "code": "__int64 __fastcall tcg_gen_movi_i32 ( __int64 @@a1@@ , int @@a2@@ ) { return tcg_gen_op2i_i32 ( Number , @@a1@@ , @@a2@@ ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}]}
|
[{"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "int32_t", "s": 4}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 579 |
[
"{\"name\": \"tcg_gen_op2i_i32\", \"code\": \"__int64 __fastcall tcg_gen_op2i_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v3@@ , @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ld8u_i32", "code": "__int64 __fastcall tcg_gen_ld8u_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 580 |
[
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ld16u_i32", "code": "__int64 __fastcall tcg_gen_ld16u_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 581 |
[
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ld_i32", "code": "__int64 __fastcall tcg_gen_ld_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 582 |
[
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_st8_i32", "code": "__int64 __fastcall tcg_gen_st8_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 583 |
[
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_st16_i32", "code": "__int64 __fastcall tcg_gen_st16_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 584 |
[
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_st_i32", "code": "__int64 __fastcall tcg_gen_st_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 585 |
[
"{\"name\": \"tcg_gen_ldst_op_i32\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_add_i32", "code": "__int64 __fastcall tcg_gen_add_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 586 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_sub_i32", "code": "__int64 __fastcall tcg_gen_sub_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 587 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_and_i32", "code": "__int64 __fastcall tcg_gen_and_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 588 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_or_i32", "code": "__int64 __fastcall tcg_gen_or_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 589 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_xor_i32", "code": "__int64 __fastcall tcg_gen_xor_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 590 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_shl_i32", "code": "__int64 __fastcall tcg_gen_shl_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 591 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"gen_shl\", \"code\": \"__int64 __fastcall gen_shl ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; @@v5@@ = tcg_temp_new_i32 ( ) ; tcg_gen_andi_i32 ( @@v5@@ , @@a3@@ , Number L ) ; @@v6@@ = tcg_const_i32 ( Number L ) ; @@v7@@ = tcg_const_i32 ( Number L ) ; tcg_gen_movcond_i32 ( Number L , @@v6@@ , @@v5@@ , @@v7@@ , @@v6@@ , @@a2@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; tcg_gen_andi_i32 ( @@v5@@ , @@v5@@ , Number L ) ; tcg_gen_shl_i32 ( @@a1@@ , @@v6@@ , @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return tcg_temp_free_i32 ( @@v5@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "tcg_gen_shr_i32", "code": "__int64 __fastcall tcg_gen_shr_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 592 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"gen_shr\", \"code\": \"__int64 __fastcall gen_shr ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; @@v5@@ = tcg_temp_new_i32 ( ) ; tcg_gen_andi_i32 ( @@v5@@ , @@a3@@ , Number L ) ; @@v6@@ = tcg_const_i32 ( Number L ) ; @@v7@@ = tcg_const_i32 ( Number L ) ; tcg_gen_movcond_i32 ( Number L , @@v6@@ , @@v5@@ , @@v7@@ , @@v6@@ , @@a2@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; tcg_gen_andi_i32 ( @@v5@@ , @@v5@@ , Number L ) ; tcg_gen_shr_i32 ( @@a1@@ , @@v6@@ , @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return tcg_temp_free_i32 ( @@v5@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "tcg_gen_sar_i32", "code": "__int64 __fastcall tcg_gen_sar_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 593 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"gen_sar\", \"code\": \"__int64 __fastcall gen_sar ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ ; __int64 @@v6@@ ; @@v5@@ = tcg_temp_new_i32 ( ) ; tcg_gen_andi_i32 ( @@v5@@ , @@a3@@ , Number L ) ; @@v6@@ = tcg_const_i32 ( Number L ) ; tcg_gen_movcond_i32 ( Number L , @@v5@@ , @@v5@@ , @@v6@@ , @@v6@@ , @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_gen_sar_i32 ( @@a1@@ , @@a2@@ , @@v5@@ ) ; return tcg_temp_free_i32 ( @@v5@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "tcg_gen_mul_i32", "code": "__int64 __fastcall tcg_gen_mul_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 594 |
[
"{\"name\": \"tcg_gen_op3_i32\", \"code\": \"__int64 __fastcall tcg_gen_op3_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i32_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_neg_i32", "code": "__int64 __fastcall tcg_gen_neg_i32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { return tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 595 |
[
"{\"name\": \"tcg_gen_op2_i32\", \"code\": \"__int64 __fastcall tcg_gen_op2_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; @@v3@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v4@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v4@@ , @@v3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_not_i32", "code": "__int64 __fastcall tcg_gen_not_i32 ( __int64 @@a1@@ , __int64 @@a2@@ ) { return tcg_gen_op2_i32 ( Number , @@a1@@ , @@a2@@ ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "ret", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 596 |
[
"{\"name\": \"tcg_gen_op2_i32\", \"code\": \"__int64 __fastcall tcg_gen_op2_i32 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; @@v3@@ = tcgv_i32_arg ( @@a3@@ ) ; @@v4@@ = tcgv_i32_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v4@@ , @@v3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_mov_i64", "code": "__int64 __fastcall tcg_gen_mov_i64 ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@result@@ ; @@result@@ = @@a1@@ ; if ( @@a1@@ != @@a2@@ ) @@result@@ = tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; return @@result@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "result", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r8"}]}
|
[{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 597 |
[
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"__int64 __fastcall tcg_gen_op2_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; @@v3@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v4@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v4@@ , @@v3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_movi_i64", "code": "__int64 __fastcall tcg_gen_movi_i64 ( __int64 @@a1@@ , __int64 @@a2@@ ) { return tcg_gen_op2i_i64 ( Number , @@a1@@ , @@a2@@ ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "int64_t", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 598 |
[
"{\"name\": \"tcg_gen_op2i_i64\", \"code\": \"__int64 __fastcall tcg_gen_op2i_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v3@@ , @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ld8u_i64", "code": "__int64 __fastcall tcg_gen_ld8u_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 599 |
[
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ld16u_i64", "code": "__int64 __fastcall tcg_gen_ld16u_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 600 |
[
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ld32u_i64", "code": "__int64 __fastcall tcg_gen_ld32u_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 601 |
[
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_ld_i64", "code": "__int64 __fastcall tcg_gen_ld_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 602 |
[
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_st8_i64", "code": "__int64 __fastcall tcg_gen_st8_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 603 |
[
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_st16_i64", "code": "__int64 __fastcall tcg_gen_st16_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 604 |
[
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_st32_i64", "code": "__int64 __fastcall tcg_gen_st32_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 605 |
[
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_st_i64", "code": "__int64 __fastcall tcg_gen_st_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_ldst_op_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "offset", "t": {"T": 1, "n": "tcg_target_long", "s": 8}, "location": "r16"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg2", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 606 |
[
"{\"name\": \"tcg_gen_ldst_op_i64\", \"code\": \"__int64 __fastcall tcg_gen_ldst_op_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; @@v4@@ = tcgv_ptr_arg ( @@a3@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v5@@ , @@v4@@ , @@a4@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_add_i64", "code": "__int64 __fastcall tcg_gen_add_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 607 |
[
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"__int64 __fastcall tcg_gen_op3_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i64_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_sub_i64", "code": "__int64 __fastcall tcg_gen_sub_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 608 |
[
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"__int64 __fastcall tcg_gen_op3_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i64_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_and_i64", "code": "__int64 __fastcall tcg_gen_and_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 609 |
[
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"__int64 __fastcall tcg_gen_op3_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i64_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_or_i64", "code": "__int64 __fastcall tcg_gen_or_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 610 |
[
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"__int64 __fastcall tcg_gen_op3_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i64_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_xor_i64", "code": "__int64 __fastcall tcg_gen_xor_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 611 |
[
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"__int64 __fastcall tcg_gen_op3_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i64_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_mul_i64", "code": "__int64 __fastcall tcg_gen_mul_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "arg2", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg1", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 612 |
[
"{\"name\": \"tcg_gen_op3_i64\", \"code\": \"__int64 __fastcall tcg_gen_op3_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; @@v4@@ = tcgv_i64_arg ( @@a4@@ ) ; @@v5@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v6@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op3 ( @@a1@@ , @@v6@@ , @@v5@@ , @@v4@@ ) ; }\", \"source\": [{\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_neg_i64", "code": "__int64 __fastcall tcg_gen_neg_i64 ( __int64 @@a1@@ , __int64 @@a2@@ ) { return tcg_gen_op2_i64 ( Number , @@a1@@ , @@a2@@ ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "ret", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "arg", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 613 |
[
"{\"name\": \"tcg_gen_op2_i64\", \"code\": \"__int64 __fastcall tcg_gen_op2_i64 ( unsigned int @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; @@v3@@ = tcgv_i64_arg ( @@a3@@ ) ; @@v4@@ = tcgv_i64_arg ( @@a2@@ ) ; return tcg_gen_op2 ( @@a1@@ , @@v4@@ , @@v3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}"
] |
{"name": "tcg_gen_insn_start", "code": "__int64 __fastcall tcg_gen_insn_start ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3 ( Number L , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "a2", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r16"}, {"n": "pc", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r56"}, {"n": "a1", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 614 |
[] |
{"name": "tcg_gen_addi_ptr", "code": "__int64 __fastcall tcg_gen_addi_ptr ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_addi_i64 ( @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "b", "t": {"T": 1, "n": "intptr_t", "s": 8}, "location": "r16"}, {"n": "r", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r56"}, {"n": "a", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 615 |
[] |
{"name": "translator_lduw_swap", "code": "__int64 __fastcall translator_lduw_swap ( __int64 @@a1@@ , __int64 @@a2@@ , char @@a3@@ ) { unsigned __int16 @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; @@v6@@ = cpu_mmu_index ( @@a1@@ , Number L ) ; @@v7@@ = make_memop_idx ( Number , @@v6@@ ) ; @@v5@@ = helper_le_lduw_cmmu ( @@a1@@ , @@a2@@ , @@v7@@ , Number L ) ; if ( @@a3@@ ) @@v5@@ = bswap16 ( @@v5@@ ) ; plugin_insn_append ( ) ; return @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "char", "s": 1}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned __int16", "s": 2}, "location": "s18"}]}
|
[{"n": "do_swap", "t": {"T": 1, "n": "bool", "s": 1}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUArchState"}, "location": "r56"}, {"n": "pc", "t": {"T": 1, "n": "abi_ptr", "s": 8}, "location": "r64"}, {"n": "oi", "t": {"T": 1, "n": "TCGMemOpIdx", "s": 4}, "location": "s12"}, {"n": "mmu_idx", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "ret", "t": {"T": 1, "n": "uint16_t", "s": 2}, "location": "s18"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 616 |
[
"{\"name\": \"bswap16\", \"code\": \"__int16 __fastcall bswap16 ( __int16 @@a1@@ ) { return _bswap_16 ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int16\", \"s\": 2}, \"location\": \"r56\"}]}",
"{\"name\": \"make_memop_idx\", \"code\": \"__int64 __fastcall make_memop_idx ( int @@a1@@ , int @@a2@@ ) { return @@a2@@ | ( unsigned int ) ( Number * @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}"
] |
{"name": "translator_ldl_swap", "code": "__int64 __fastcall translator_ldl_swap ( __int64 @@a1@@ , __int64 @@a2@@ , char @@a3@@ ) { unsigned int @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; @@v6@@ = cpu_mmu_index ( @@a1@@ , Number L ) ; @@v7@@ = make_memop_idx ( Number , @@v6@@ ) ; @@v5@@ = helper_le_ldl_cmmu ( @@a1@@ , @@a2@@ , @@v7@@ , Number L ) ; if ( @@a3@@ ) @@v5@@ = bswap32 ( @@v5@@ ) ; plugin_insn_append ( ) ; return @@v5@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "char", "s": 1}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s12"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}]}
|
[{"n": "do_swap", "t": {"T": 1, "n": "bool", "s": 1}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUArchState"}, "location": "r56"}, {"n": "pc", "t": {"T": 1, "n": "abi_ptr", "s": 8}, "location": "r64"}, {"n": "oi", "t": {"T": 1, "n": "TCGMemOpIdx", "s": 4}, "location": "s12"}, {"n": "mmu_idx", "t": {"T": 1, "n": "int", "s": 4}, "location": "s16"}, {"n": "ret", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s20"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 617 |
[
"{\"name\": \"bswap32\", \"code\": \"__int64 __fastcall bswap32 ( unsigned int @@a1@@ ) { return _bswap_32 ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}]}",
"{\"name\": \"make_memop_idx\", \"code\": \"__int64 __fastcall make_memop_idx ( int @@a1@@ , int @@a2@@ ) { return @@a2@@ | ( unsigned int ) ( Number * @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}"
] |
{"name": "arm_ldl_code", "code": "__int64 __fastcall arm_ldl_code ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned __int8 @@a3@@ ) { char @@v3@@ ; @@v3@@ = bswap_code ( @@a3@@ ) ; return translator_ldl_swap ( @@a1@@ , @@a2@@ , @@v3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned __int8", "s": 1}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "char", "s": 1}, "location": "r8"}]}
|
[{"n": "sctlr_b", "t": {"T": 1, "n": "bool", "s": 1}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUARMState_0"}, "location": "r56"}, {"n": "addr", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 618 |
[
"{\"name\": \"translator_ldl_swap\", \"code\": \"__int64 __fastcall translator_ldl_swap ( __int64 @@a1@@ , __int64 @@a2@@ , char @@a3@@ ) { unsigned int @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; @@v6@@ = cpu_mmu_index ( @@a1@@ , Number L ) ; @@v7@@ = make_memop_idx ( Number , @@v6@@ ) ; @@v5@@ = helper_le_ldl_cmmu ( @@a1@@ , @@a2@@ , @@v7@@ , Number L ) ; if ( @@a3@@ ) @@v5@@ = bswap32 ( @@v5@@ ) ; plugin_insn_append ( ) ; return @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}]}"
] |
{"name": "arm_lduw_code", "code": "__int64 __fastcall arm_lduw_code ( __int64 @@a1@@ , __int64 @@a2@@ , unsigned __int8 @@a3@@ ) { char @@v3@@ ; __int64 @@v5@@ ; @@v5@@ = @@a2@@ ; if ( @@a3@@ ) @@v5@@ = @@a2@@ ^ Number ; @@v3@@ = bswap_code ( @@a3@@ ) ; return translator_lduw_swap ( @@a1@@ , @@v5@@ , @@v3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned __int8", "s": 1}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "char", "s": 1}, "location": "r8"}, {"n": "v5", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}]}
|
[{"n": "sctlr_b", "t": {"T": 1, "n": "bool", "s": 1}, "location": "r16"}, {"n": "env", "t": {"T": 3, "t": "CPUARMState_0"}, "location": "r56"}, {"n": "addr", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "r8"}, {"n": "addra", "t": {"T": 1, "n": "abi_ptr", "s": 8}, "location": "s16"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 619 |
[
"{\"name\": \"translator_lduw_swap\", \"code\": \"__int64 __fastcall translator_lduw_swap ( __int64 @@a1@@ , __int64 @@a2@@ , char @@a3@@ ) { unsigned __int16 @@v5@@ ; int @@v6@@ ; unsigned int @@v7@@ ; @@v6@@ = cpu_mmu_index ( @@a1@@ , Number L ) ; @@v7@@ = make_memop_idx ( Number , @@v6@@ ) ; @@v5@@ = helper_le_lduw_cmmu ( @@a1@@ , @@a2@@ , @@v7@@ , Number L ) ; if ( @@a3@@ ) @@v5@@ = bswap16 ( @@v5@@ ) ; plugin_insn_append ( ) ; return @@v5@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int16\", \"s\": 2}, \"location\": \"s18\"}]}"
] |
{"name": "log_target_disas", "code": "__int64 __fastcall log_target_disas ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return target_disas ( qemu_logfile , @@a1@@ , @@a2@@ , @@a3@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "len", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r16"}, {"n": "cpu", "t": {"T": 3, "t": "CPUState_0"}, "location": "r56"}, {"n": "start", "t": {"T": 1, "n": "target_ulong", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 620 |
[] |
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