input
stringlengths 144
489k
| output
stringlengths 45
339k
| shard
stringclasses 16
values | filename
stringlengths 135
135
| line_num
int64 0
2.62k
| context
list |
|---|---|---|---|---|---|
{"name": "disas_vfp_extract_disas_vfp_Fmt_11", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_11 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp6"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 721 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_12", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_12 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp6"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 722 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_13", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_13 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp7"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 723 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_14", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_14 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp7"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 724 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_15", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_15 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp7"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 725 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_16", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_16 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp7"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 726 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_17", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_17 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; int v9 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; v9 = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = v9 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp8"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 727 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_18", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_18 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; int v9 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; v9 = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = v9 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp8"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 728 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_19", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_19 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp9"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 729 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_2", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp0"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 730 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_20", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_20 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp9"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 731 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_21", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_21 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp9"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 732 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_22", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_22 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp9"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 733 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_23", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_23 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp10"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 734 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_24", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_24 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp10"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 735 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_25", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_25 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp11"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 736 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_26", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_26 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp11"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 737 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_27", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_27 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp12"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 738 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_28", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_28 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp12"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 739 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_29", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_29 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp13"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 740 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_3", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp1"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 741 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_30", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_30 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp13"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 742 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_31", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_31 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp13"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 743 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_32", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_32 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp11"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 744 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_33", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_33 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp11"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 745 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_34", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_34 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp14"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 746 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_35", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_35 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp14"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 747 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_36", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_36 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int @@v8@@ ; int v9 ; int v10 ; int v11 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; @@v8@@ = extract32 ( @@a3@@ , Number , Number ) ; v9 = extract32 ( @@a3@@ , Number , Number ) ; v10 = deposit32 ( v9 , Number , Number , @@v8@@ ) ; v11 = deposit32 ( v10 , Number , Number , v7 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v11 ; return result ; }", "source": [{"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "r104"}, {"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "v8", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r104"}, {"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp15"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 748 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_37", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_37 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int @@v8@@ ; int v9 ; int v10 ; int v11 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; @@v8@@ = extract32 ( @@a3@@ , Number , Number ) ; v9 = extract32 ( @@a3@@ , Number , Number ) ; v10 = deposit32 ( v9 , Number , Number , @@v8@@ ) ; v11 = deposit32 ( v10 , Number , Number , v7 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v11 ; return result ; }", "source": [{"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "r104"}, {"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "v8", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r104"}, {"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp15"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 749 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_38", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_38 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp16"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 750 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_39", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_39 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp16"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 751 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_4", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_4 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp1"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 752 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_5", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_5 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp1"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 753 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_6", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_6 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp2"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 754 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_7", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_7 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; _DWORD * @@result@@ ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; @@result@@ = @@a2@@ ; @@a2@@ [ Number ] = v3 ; return @@result@@ ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "result", "t": {"T": 3, "t": "_DWORD"}, "location": "r8"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp3"}, "location": "r64"}, {"n": "", "t": {"T": 10}, "location": "r8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 755 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_8", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_8 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp4"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 756 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_extract_disas_vfp_Fmt_9", "code": "_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_9 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r32"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "v3", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r32"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp5"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 757 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp", "code": "_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v16", "t": {"T": 2, "n": 10, "s": 4, "t": "_DWORD"}, "location": "s48"}, {"n": "v17", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "u", "t": {"T": 8}, "location": "s48"}, {"n": "v17", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 758 |
[
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_0\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_0 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_10\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_10 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_11\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_11 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_12\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_12 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_13\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_13 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_14\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_14 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_15\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_15 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_16\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_16 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_17\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_17 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; int v9 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; v9 = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = v9 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_18\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_18 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; int v9 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; v9 = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = v9 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_19\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_19 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; @@a2@@ [ Number ] = Number ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_20\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_20 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_21\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_21 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_22\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_22 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_23\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_23 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_24\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_24 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_25\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_25 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_26\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_26 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_27\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_27 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_28\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_28 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_29\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_29 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_30\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_30 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_31\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_31 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_32\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_32 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_33\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_33 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_34\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_34 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_35\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_35 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_36\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_36 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int @@v8@@ ; int v9 ; int v10 ; int v11 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; @@v8@@ = extract32 ( @@a3@@ , Number , Number ) ; v9 = extract32 ( @@a3@@ , Number , Number ) ; v10 = deposit32 ( v9 , Number , Number , @@v8@@ ) ; v11 = deposit32 ( v10 , Number , Number , v7 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v11 ; return result ; }\", \"source\": [{\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_37\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_37 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int @@v8@@ ; int v9 ; int v10 ; int v11 ; _DWORD * result ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; @@v8@@ = extract32 ( @@a3@@ , Number , Number ) ; v9 = extract32 ( @@a3@@ , Number , Number ) ; v10 = deposit32 ( v9 , Number , Number , @@v8@@ ) ; v11 = deposit32 ( v10 , Number , Number , v7 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v11 ; return result ; }\", \"source\": [{\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r104\"}, {\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_38\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_38 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_39\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_39 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_4\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_4 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; @@a2@@ [ Number ] = Number ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; v7 = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = v7 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_5\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_5 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_6\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_6 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_7\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_7 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; _DWORD * @@result@@ ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; @@result@@ = @@a2@@ ; @@a2@@ [ Number ] = v3 ; return @@result@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"result\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r8\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_8\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_8 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_extract_disas_vfp_Fmt_9\", \"code\": \"_DWORD * __fastcall disas_vfp_extract_disas_vfp_Fmt_9 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; int v4 ; int v5 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@v3@@ = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; v5 = deposit32 ( v4 , Number , Number , @@v3@@ ) ; result = @@a2@@ ; @@a2@@ [ Number ] = v5 ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VRINT\", \"code\": \"__int64 __fastcall trans_VRINT ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { unsigned int @@v3@@ ; bool @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 @@v13@@ ; @@v4@@ = * @@a2@@ != Number ; @@v5@@ = fp_decode_rm [ @@a2@@ [ Number ] ] ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a2@@ [ Number ] | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( @@v4@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v6@@ = @@a2@@ [ Number ] ; @@v7@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v8@@ = get_fpstatus_ptr ( Number ) ; @@v3@@ = arm_rmode_to_sf ( @@v5@@ ) ; @@v9@@ = tcg_const_i32 ( @@v3@@ ) ; gen_helper_set_rmode ( @@v9@@ , @@v9@@ , @@v8@@ ) ; if ( @@v4@@ ) { @@v12@@ = tcg_temp_new_i64 ( ) ; @@v13@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v12@@ , @@v7@@ ) ; gen_helper_rintd ( @@v13@@ , @@v12@@ , @@v8@@ ) ; neon_store_reg64 ( @@v13@@ , @@v6@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } else { @@v10@@ = tcg_temp_new_i32 ( ) ; @@v11@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v10@@ , @@v7@@ ) ; gen_helper_rints ( @@v11@@ , @@v10@@ , @@v8@@ ) ; neon_store_reg32 ( @@v11@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } gen_helper_set_rmode ( @@v9@@ , @@v9@@ , @@v8@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_ptr ( @@v8@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s48\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s85\"}]}",
"{\"name\": \"trans_VCVT\", \"code\": \"__int64 __fastcall trans_VCVT ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { unsigned int @@v3@@ ; bool @@v4@@ ; bool @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; @@v4@@ = * @@a2@@ != Number ; @@v6@@ = fp_decode_rm [ @@a2@@ [ Number ] ] ; @@v5@@ = @@a2@@ [ Number ] != Number ; if ( ! isar_feature_aa32_vcvt_dr ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v7@@ = @@a2@@ [ Number ] ; @@v8@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v9@@ = get_fpstatus_ptr ( Number ) ; @@v10@@ = tcg_const_i32 ( Number L ) ; @@v3@@ = arm_rmode_to_sf ( @@v6@@ ) ; @@v11@@ = tcg_const_i32 ( @@v3@@ ) ; gen_helper_set_rmode ( @@v11@@ , @@v11@@ , @@v9@@ ) ; if ( @@v4@@ ) { @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; neon_load_reg64 ( @@v14@@ , @@v8@@ ) ; if ( @@v5@@ ) gen_helper_vfp_tosld ( @@v15@@ , @@v14@@ , @@v10@@ , @@v9@@ ) ; else gen_helper_vfp_tould ( @@v15@@ , @@v14@@ , @@v10@@ , @@v9@@ ) ; tcg_gen_extrl_i64_i32 ( @@v16@@ , @@v15@@ ) ; neon_store_reg32 ( @@v16@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } else { @@v12@@ = tcg_temp_new_i32 ( ) ; @@v13@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v12@@ , @@v8@@ ) ; if ( @@v5@@ ) gen_helper_vfp_tosls ( @@v13@@ , @@v12@@ , @@v10@@ , @@v9@@ ) ; else gen_helper_vfp_touls ( @@v13@@ , @@v12@@ , @@v10@@ , @@v9@@ ) ; neon_store_reg32 ( @@v13@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } gen_helper_set_rmode ( @@v11@@ , @@v11@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_ptr ( @@v9@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s100\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s101\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s102\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s56\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s64\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s96\"}]}",
"{\"name\": \"trans_VMOV_to_gp\", \"code\": \"__int64 __fastcall trans_VMOV_to_gp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int @@v3@@ ; unsigned int v4 ; unsigned int v5 ; int @@v6@@ ; __int64 @@v7@@ ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; v4 = * @@a2@@ << @@a2@@ [ Number ] ; @@v6@@ = extract32 ( v4 , Number , Number ) ; v5 = Number * extract32 ( v4 , Number , Number ) ; if ( @@a2@@ [ Number ] != Number && ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v7@@ = neon_load_reg ( @@a2@@ [ Number ] , @@v6@@ ) ; @@v3@@ = @@a2@@ [ Number ] ; if ( @@v3@@ != Number && @@v3@@ <= Number ) { if ( @@v3@@ ) { if ( @@v3@@ == Number ) { if ( @@a2@@ [ Number ] ) { if ( v5 ) tcg_gen_shri_i32 ( @@v7@@ , @@v7@@ , Number L ) ; else tcg_gen_ext16u_i32 ( @@v7@@ , @@v7@@ ) ; } else if ( v5 ) { tcg_gen_sari_i32 ( @@v7@@ , @@v7@@ , Number L ) ; } else { tcg_gen_ext16s_i32 ( @@v7@@ , @@v7@@ ) ; } } } else { if ( v5 ) tcg_gen_shri_i32 ( @@v7@@ , @@v7@@ , v5 ) ; if ( @@a2@@ [ Number ] ) tcg_gen_ext8u_i32 ( @@v7@@ , @@v7@@ ) ; else tcg_gen_ext8s_i32 ( @@v7@@ , @@v7@@ ) ; } } store_reg ( @@a1@@ , @@a2@@ [ Number ] , @@v7@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VMOV_from_gp\", \"code\": \"__int64 __fastcall trans_VMOV_from_gp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int @@v3@@ ; unsigned int v4 ; unsigned int v5 ; int @@v6@@ ; __int64 @@v7@@ ; __int64 v8 ; __int64 v9 ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; v4 = * @@a2@@ << @@a2@@ [ Number ] ; @@v6@@ = extract32 ( v4 , Number , Number ) ; v5 = Number * extract32 ( v4 , Number , Number ) ; if ( @@a2@@ [ Number ] != Number && ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v7@@ = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; @@v3@@ = @@a2@@ [ Number ] ; if ( @@v3@@ != Number && @@v3@@ <= Number ) { if ( @@v3@@ ) { if ( @@v3@@ == Number ) { v9 = neon_load_reg ( @@a2@@ [ Number ] , @@v6@@ ) ; tcg_gen_deposit_i32 ( @@v7@@ , v9 , @@v7@@ , v5 , Number L ) ; tcg_temp_free_i32 ( v9 ) ; } } else { v8 = neon_load_reg ( @@a2@@ [ Number ] , @@v6@@ ) ; tcg_gen_deposit_i32 ( @@v7@@ , v8 , @@v7@@ , v5 , Number L ) ; tcg_temp_free_i32 ( v8 ) ; } } neon_store_reg ( @@a2@@ [ Number ] , @@v6@@ , @@v7@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}]}",
"{\"name\": \"trans_VDUP\", \"code\": \"__int64 __fastcall trans_VDUP ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; __int64 @@v7@@ ; if ( ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( * @@a2@@ && @@a2@@ [ Number ] ) return Number L ; if ( @@a2@@ [ Number ] && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( @@a2@@ [ Number ] ) v3 = Number ; else v3 = Number ; @@v6@@ = v3 ; if ( * @@a2@@ ) { @@v5@@ = Number ; } else if ( @@a2@@ [ Number ] ) { @@v5@@ = Number ; } else { @@v5@@ = Number ; } if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v7@@ = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; v4 = neon_reg_offset ( @@a2@@ [ Number ] , Number ) ; tcg_gen_gvec_dup_i32 ( @@v5@@ , v4 , @@v6@@ , @@v6@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s40\"}]}",
"{\"name\": \"trans_VMSR_VMRS\", \"code\": \"__int64 __fastcall trans_VMSR_VMRS ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int @@v3@@ ; char @@v4@@ ; __int64 v5 ; __int64 v6 ; __int64 v7 ; __int64 v8 ; @@v4@@ = Number ; if ( arm_dc_feature ( @@a1@@ , Number ) && @@a2@@ [ Number ] == Number && ( ! * @@a2@@ || @@a2@@ [ Number ] != Number ) ) return Number L ; switch ( @@a2@@ [ Number ] ) { case Number : if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) || ! arm_dc_feature ( @@a1@@ , Number ) ) { @@v4@@ = Number ; goto LABEL_26 ; } return Number L ; case Number : goto LABEL_26 ; case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) || ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; @@v4@@ = Number ; goto LABEL_26 ; case Number : case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) || ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; @@v4@@ = Number ; goto LABEL_26 ; case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) return Number L ; @@v4@@ = Number ; LABEL_26 : if ( ( unsigned __int8 ) full_vfp_access_check ( @@a1@@ , @@v4@@ ) != Number ) return Number L ; if ( * @@a2@@ ) { @@v3@@ = @@a2@@ [ Number ] ; if ( @@v3@@ <= Number ) { if ( @@v3@@ >= Number || ! @@v3@@ ) { v5 = load_cpu_offset ( Number * ( @@a2@@ [ Number ] + Number ) ) ; goto LABEL_39 ; } if ( @@v3@@ == Number ) { if ( @@a2@@ [ Number ] == Number ) { v5 = load_cpu_offset ( Number ) ; tcg_gen_andi_i32 ( v5 , v5 , Number L ) ; } else { v5 = tcg_temp_new_i32 ( ) ; gen_helper_vfp_get_fpscr ( v5 , cpu_env ) ; } goto LABEL_39 ; } } g_assertion_message_expr ( Number L , String , Number L , String , Number L ) ; LABEL_39 : if ( @@a2@@ [ Number ] == Number ) { gen_set_cpsr ( v5 , Number ) ; tcg_temp_free_i32 ( v5 ) ; } else { store_reg ( @@a1@@ , @@a2@@ [ Number ] , v5 ) ; } return Number L ; } switch ( @@a2@@ [ Number ] ) { case Number : case Number : case Number : case Number : return Number L ; case Number : v6 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; gen_helper_vfp_set_fpscr ( cpu_env , v6 ) ; tcg_temp_free_i32 ( v6 ) ; gen_lookup_tb ( @@a1@@ ) ; break ; case Number : v7 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; tcg_gen_andi_i32 ( v7 , v7 , Number ) ; store_cpu_offset ( v7 , Number * ( @@a2@@ [ Number ] + Number ) ) ; gen_lookup_tb ( @@a1@@ ) ; break ; case Number : case Number : v8 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; store_cpu_offset ( v8 , Number * ( @@a2@@ [ Number ] + Number ) ) ; break ; default : g_assertion_message_expr ( Number L , String , Number L , String , Number L ) ; break ; } return Number L ; case Number : case Number : if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) && ! arm_dc_feature ( @@a1@@ , Number ) ) goto LABEL_26 ; return Number L ; default : return Number L ; } }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"s9\"}]}",
"{\"name\": \"trans_VMOV_single\", \"code\": \"__int64 __fastcall trans_VMOV_single ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 v3 ; __int64 v4 ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( * @@a2@@ ) { v3 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v3 , @@a2@@ [ Number ] ) ; if ( @@a2@@ [ Number ] == Number ) { gen_set_cpsr ( v3 , Number ) ; tcg_temp_free_i32 ( v3 ) ; } else { store_reg ( @@a1@@ , @@a2@@ [ Number ] , v3 ) ; } } else { v4 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v4 , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( v4 ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VMOV_64_sp\", \"code\": \"__int64 __fastcall trans_VMOV_64_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 v3 ; __int64 v4 ; __int64 v5 ; __int64 v6 ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( * @@a2@@ ) { v3 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v3 , @@a2@@ [ Number ] ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , v3 ) ; v4 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v4 , @@a2@@ [ Number ] + Number ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , v4 ) ; } else { v5 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v5 , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( v5 ) ; v6 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v6 , @@a2@@ [ Number ] + Number ) ; tcg_temp_free_i32 ( v6 ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VMOV_64_dp\", \"code\": \"__int64 __fastcall trans_VMOV_64_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 v3 ; __int64 v4 ; __int64 v5 ; __int64 v6 ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( * @@a2@@ ) { v3 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v3 , Number * @@a2@@ [ Number ] ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , v3 ) ; v4 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v4 , Number * @@a2@@ [ Number ] + Number ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , v4 ) ; } else { v5 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v5 , Number * @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( v5 ) ; v6 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v6 , Number * @@a2@@ [ Number ] + Number ) ; tcg_temp_free_i32 ( v6 ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VLDR_VSTR_sp\", \"code\": \"__int64 __fastcall trans_VLDR_VSTR_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int v3 ; int v4 ; unsigned int @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v5@@ = Number * * @@a2@@ ; if ( ! @@a2@@ [ Number ] ) @@v5@@ = Number * * @@a2@@ ; @@v6@@ = add_reg_for_lit ( @@a1@@ , @@a2@@ [ Number ] , @@v5@@ ) ; @@v7@@ = tcg_temp_new_i32 ( ) ; if ( @@a2@@ [ Number ] ) { v3 = get_mem_index ( @@a1@@ ) ; gen_aa32_ld32u ( @@a1@@ , @@v7@@ , @@v6@@ , v3 ) ; neon_store_reg32 ( @@v7@@ , @@a2@@ [ Number ] ) ; } else { neon_load_reg32 ( @@v7@@ , @@a2@@ [ Number ] ) ; v4 = get_mem_index ( @@a1@@ ) ; gen_aa32_st32 ( @@a1@@ , @@v7@@ , @@v6@@ , v4 ) ; } tcg_temp_free_i32 ( @@v7@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VLDR_VSTR_dp\", \"code\": \"__int64 __fastcall trans_VLDR_VSTR_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int v3 ; int v4 ; unsigned int @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v5@@ = Number * * @@a2@@ ; if ( ! @@a2@@ [ Number ] ) @@v5@@ = Number * * @@a2@@ ; @@v6@@ = add_reg_for_lit ( @@a1@@ , @@a2@@ [ Number ] , @@v5@@ ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; if ( @@a2@@ [ Number ] ) { v3 = get_mem_index ( @@a1@@ ) ; gen_aa32_ld64 ( @@a1@@ , @@v7@@ , @@v6@@ , v3 ) ; neon_store_reg64 ( @@v7@@ , @@a2@@ [ Number ] ) ; } else { neon_load_reg64 ( @@v7@@ , @@a2@@ [ Number ] ) ; v4 = get_mem_index ( @@a1@@ ) ; gen_aa32_st64 ( @@a1@@ , @@v7@@ , @@v6@@ , v4 ) ; } tcg_temp_free_i64 ( @@v7@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VLDM_VSTM_sp\", \"code\": \"__int64 __fastcall trans_VLDM_VSTM_sp ( __int64 @@a1@@ , int * @@a2@@ ) { int v3 ; int v4 ; int @@i@@ ; int @@v6@@ ; __int64 @@v7@@ ; __int64 @@v8@@ ; @@v6@@ = * @@a2@@ ; if ( ! * @@a2@@ || @@a2@@ [ Number ] + @@v6@@ > Number ) return Number L ; if ( @@a2@@ [ Number ] == Number && @@a2@@ [ Number ] ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v7@@ = add_reg_for_lit ( @@a1@@ , @@a2@@ [ Number ] , Number ) ; if ( @@a2@@ [ Number ] ) tcg_gen_addi_i32 ( @@v7@@ , @@v7@@ , ( unsigned int ) ( Number * * @@a2@@ ) ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) && @@a2@@ [ Number ] == Number && @@a2@@ [ Number ] ) gen_helper_v8m_stackcheck ( cpu_env , @@v7@@ ) ; @@v8@@ = tcg_temp_new_i32 ( ) ; for ( @@i@@ = Number ; @@i@@ < @@v6@@ ; ++ @@i@@ ) { if ( @@a2@@ [ Number ] ) { v3 = get_mem_index ( @@a1@@ ) ; gen_aa32_ld32u ( @@a1@@ , @@v8@@ , @@v7@@ , v3 ) ; neon_store_reg32 ( @@v8@@ , @@i@@ + @@a2@@ [ Number ] ) ; } else { neon_load_reg32 ( @@v8@@ , @@i@@ + @@a2@@ [ Number ] ) ; v4 = get_mem_index ( @@a1@@ ) ; gen_aa32_st32 ( @@a1@@ , @@v8@@ , @@v7@@ , v4 ) ; } tcg_gen_addi_i32 ( @@v7@@ , @@v7@@ , Number L ) ; } tcg_temp_free_i32 ( @@v8@@ ) ; if ( @@a2@@ [ Number ] ) { if ( @@a2@@ [ Number ] ) tcg_gen_addi_i32 ( @@v7@@ , @@v7@@ , ( unsigned int ) ( Number * @@v6@@ ) ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , @@v7@@ ) ; } else { tcg_temp_free_i32 ( @@v7@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"int\"}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"i\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VLDM_VSTM_dp\", \"code\": \"__int64 __fastcall trans_VLDM_VSTM_dp ( __int64 @@a1@@ , int * @@a2@@ ) { int v3 ; int v4 ; unsigned int @@v5@@ ; int @@i@@ ; int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; @@v7@@ = * @@a2@@ >> Number ; if ( ! @@v7@@ || @@a2@@ [ Number ] + @@v7@@ > Number || @@v7@@ > Number ) return Number L ; if ( @@a2@@ [ Number ] == Number && @@a2@@ [ Number ] ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && @@a2@@ [ Number ] + @@v7@@ > Number ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v8@@ = add_reg_for_lit ( @@a1@@ , @@a2@@ [ Number ] , Number ) ; if ( @@a2@@ [ Number ] ) tcg_gen_addi_i32 ( @@v8@@ , @@v8@@ , ( unsigned int ) ( Number * * @@a2@@ ) ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) && @@a2@@ [ Number ] == Number && @@a2@@ [ Number ] ) gen_helper_v8m_stackcheck ( cpu_env , @@v8@@ ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; for ( @@i@@ = Number ; @@i@@ < @@v7@@ ; ++ @@i@@ ) { if ( @@a2@@ [ Number ] ) { v3 = get_mem_index ( @@a1@@ ) ; gen_aa32_ld64 ( @@a1@@ , @@v9@@ , @@v8@@ , v3 ) ; neon_store_reg64 ( @@v9@@ , @@i@@ + @@a2@@ [ Number ] ) ; } else { neon_load_reg64 ( @@v9@@ , @@i@@ + @@a2@@ [ Number ] ) ; v4 = get_mem_index ( @@a1@@ ) ; gen_aa32_st64 ( @@a1@@ , @@v9@@ , @@v8@@ , v4 ) ; } tcg_gen_addi_i32 ( @@v8@@ , @@v8@@ , Number L ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; if ( @@a2@@ [ Number ] ) { if ( @@a2@@ [ Number ] ) { @@v5@@ = Number * @@v7@@ ; } else if ( ( * @@a2@@ & Number ) != Number ) { @@v5@@ = Number ; } else { @@v5@@ = Number ; } if ( @@v5@@ ) tcg_gen_addi_i32 ( @@v8@@ , @@v8@@ , @@v5@@ ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , @@v8@@ ) ; } else { tcg_temp_free_i32 ( @@v8@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"int\"}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"i\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s32\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VMLA_sp\", \"code\": \"__int64 __fastcall trans_VMLA_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VMLA_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VMLA_dp\", \"code\": \"__int64 __fastcall trans_VMLA_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VMLA_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VMLS_sp\", \"code\": \"__int64 __fastcall trans_VMLS_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VMLS_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VMLS_dp\", \"code\": \"__int64 __fastcall trans_VMLS_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VMLS_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VNMLS_sp\", \"code\": \"__int64 __fastcall trans_VNMLS_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMLS_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VNMLS_dp\", \"code\": \"__int64 __fastcall trans_VNMLS_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMLS_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VNMLA_sp\", \"code\": \"__int64 __fastcall trans_VNMLA_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMLA_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VNMLA_dp\", \"code\": \"__int64 __fastcall trans_VNMLA_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMLA_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VMUL_sp\", \"code\": \"__int64 __fastcall trans_VMUL_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_muls , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VMUL_dp\", \"code\": \"__int64 __fastcall trans_VMUL_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_muld , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VNMUL_sp\", \"code\": \"__int64 __fastcall trans_VNMUL_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMUL_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VNMUL_dp\", \"code\": \"__int64 __fastcall trans_VNMUL_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMUL_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VADD_sp\", \"code\": \"__int64 __fastcall trans_VADD_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_adds , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VADD_dp\", \"code\": \"__int64 __fastcall trans_VADD_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_addd , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VSUB_sp\", \"code\": \"__int64 __fastcall trans_VSUB_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_subs , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VSUB_dp\", \"code\": \"__int64 __fastcall trans_VSUB_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_subd , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VDIV_sp\", \"code\": \"__int64 __fastcall trans_VDIV_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_divs , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VDIV_dp\", \"code\": \"__int64 __fastcall trans_VDIV_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_divd , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VFM_sp\", \"code\": \"__int64 __fastcall trans_VFM_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; if ( ! arm_dc_feature ( @@a1@@ , Number ) || * ( _DWORD * ) ( @@a1@@ + Number ) || * ( _DWORD * ) ( @@a1@@ + Number ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v3@@ = tcg_temp_new_i32 ( ) ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v5@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; neon_load_reg32 ( @@v4@@ , @@a2@@ [ Number ] ) ; if ( @@a2@@ [ Number ] ) gen_helper_vfp_negs ( @@v3@@ , @@v3@@ ) ; neon_load_reg32 ( @@v5@@ , @@a2@@ [ Number ] ) ; if ( ( * @@a2@@ & Number ) != Number ) gen_helper_vfp_negs ( @@v5@@ , @@v5@@ ) ; @@v6@@ = get_fpstatus_ptr ( Number ) ; gen_helper_vfp_muladds ( @@v5@@ , @@v3@@ , @@v4@@ , @@v5@@ , @@v6@@ ) ; neon_store_reg32 ( @@v5@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_ptr ( @@v6@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VFM_dp\", \"code\": \"__int64 __fastcall trans_VFM_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; if ( ! arm_dc_feature ( @@a1@@ , Number ) || * ( _DWORD * ) ( @@a1@@ + Number ) || * ( _DWORD * ) ( @@a1@@ + Number ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) ( * ( ( _BYTE * ) @@a2@@ + Number ) | * ( ( _BYTE * ) @@a2@@ + Number ) ) | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v3@@ = tcg_temp_new_i64 ( ) ; @@v4@@ = tcg_temp_new_i64 ( ) ; @@v5@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v3@@ , @@a2@@ [ Number ] ) ; neon_load_reg64 ( @@v4@@ , @@a2@@ [ Number ] ) ; if ( @@a2@@ [ Number ] ) gen_helper_vfp_negd ( @@v3@@ , @@v3@@ ) ; neon_load_reg64 ( @@v5@@ , @@a2@@ [ Number ] ) ; if ( ( * @@a2@@ & Number ) != Number ) gen_helper_vfp_negd ( @@v5@@ , @@v5@@ ) ; @@v6@@ = get_fpstatus_ptr ( Number ) ; gen_helper_vfp_muladdd ( @@v5@@ , @@v3@@ , @@v4@@ , @@v5@@ , @@v6@@ ) ; neon_store_reg64 ( @@v5@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_ptr ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; tcg_temp_free_i64 ( @@v5@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VMOV_imm_sp\", \"code\": \"__int64 __fastcall trans_VMOV_imm_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { unsigned int @@v3@@ ; int @@v4@@ ; int @@v5@@ ; unsigned int @@v6@@ ; __int64 @@v7@@ ; LOBYTE ( @@v4@@ ) = Number ; @@v5@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v6@@ = @@a2@@ [ Number ] ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v5@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v5@@ > Number ) { if ( vfp_sreg_is_scalar ( @@v6@@ ) ) @@v5@@ = Number ; else @@v4@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; } @@v3@@ = vfp_expand_imm ( Number , * @@a2@@ ) ; @@v7@@ = tcg_const_i32 ( @@v3@@ ) ; neon_store_reg32 ( @@v7@@ , @@v6@@ ) ; while ( @@v5@@ ) { -- @@v5@@ ; @@v6@@ = vfp_advance_sreg ( @@v6@@ , @@v4@@ ) ; neon_store_reg32 ( @@v7@@ , @@v6@@ ) ; } tcg_temp_free_i32 ( @@v7@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s20\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VMOV_imm_dp\", \"code\": \"__int64 __fastcall trans_VMOV_imm_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { unsigned __int64 @@v3@@ ; int @@v4@@ ; int @@v5@@ ; unsigned int @@v6@@ ; __int64 @@v7@@ ; LOBYTE ( @@v4@@ ) = Number ; @@v5@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; @@v6@@ = @@a2@@ [ Number ] ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v6@@ & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v5@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v5@@ > Number ) { if ( vfp_dreg_is_scalar ( @@v6@@ ) ) @@v5@@ = Number ; else @@v4@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; } @@v3@@ = vfp_expand_imm ( Number , * @@a2@@ ) ; @@v7@@ = tcg_const_i64 ( @@v3@@ ) ; neon_store_reg64 ( @@v7@@ , @@v6@@ ) ; while ( @@v5@@ ) { -- @@v5@@ ; @@v6@@ = vfp_advance_dreg ( @@v6@@ , @@v4@@ ) ; neon_store_reg64 ( @@v7@@ , @@v6@@ ) ; } tcg_temp_free_i64 ( @@v7@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s36\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s40\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VMOV_reg_sp\", \"code\": \"__int64 __fastcall trans_VMOV_reg_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_2op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 ) ) tcg_gen_mov_i32 , * @@a2@@ , @@a2@@ [ Number ] ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VMOV_reg_dp\", \"code\": \"__int64 __fastcall trans_VMOV_reg_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_2op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 ) ) tcg_gen_mov_i64 , * @@a2@@ , @@a2@@ [ Number ] ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VABS_sp\", \"code\": \"__int64 __fastcall trans_VABS_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_2op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 ) ) gen_helper_vfp_abss , * @@a2@@ , @@a2@@ [ Number ] ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VABS_dp\", \"code\": \"__int64 __fastcall trans_VABS_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_2op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 ) ) gen_helper_vfp_absd , * @@a2@@ , @@a2@@ [ Number ] ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VNEG_sp\", \"code\": \"__int64 __fastcall trans_VNEG_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_2op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 ) ) gen_helper_vfp_negs , * @@a2@@ , @@a2@@ [ Number ] ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VNEG_dp\", \"code\": \"__int64 __fastcall trans_VNEG_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_2op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 ) ) gen_helper_vfp_negd , * @@a2@@ , @@a2@@ [ Number ] ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VSQRT_sp\", \"code\": \"__int64 __fastcall trans_VSQRT_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_2op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 ) ) gen_VSQRT_sp , * @@a2@@ , @@a2@@ [ Number ] ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VSQRT_dp\", \"code\": \"__int64 __fastcall trans_VSQRT_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_2op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 ) ) gen_VSQRT_dp , * @@a2@@ , @@a2@@ [ Number ] ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VCMP_sp\", \"code\": \"__int64 __fastcall trans_VCMP_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( @@a2@@ [ Number ] && @@a2@@ [ Number ] ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v3@@ = tcg_temp_new_i32 ( ) ; @@v4@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; if ( @@a2@@ [ Number ] ) tcg_gen_movi_i32 ( @@v4@@ , Number ) ; else neon_load_reg32 ( @@v4@@ , @@a2@@ [ Number ] ) ; if ( * @@a2@@ ) gen_helper_vfp_cmpes ( @@v3@@ , @@v4@@ , cpu_env ) ; else gen_helper_vfp_cmps ( @@v3@@ , @@v4@@ , cpu_env ) ; tcg_temp_free_i32 ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCMP_dp\", \"code\": \"__int64 __fastcall trans_VCMP_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( @@a2@@ [ Number ] && @@a2@@ [ Number ] ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a2@@ [ Number ] | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v3@@ = tcg_temp_new_i64 ( ) ; @@v4@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v3@@ , @@a2@@ [ Number ] ) ; if ( @@a2@@ [ Number ] ) tcg_gen_movi_i64 ( @@v4@@ , Number L ) ; else neon_load_reg64 ( @@v4@@ , @@a2@@ [ Number ] ) ; if ( * @@a2@@ ) gen_helper_vfp_cmped ( @@v3@@ , @@v4@@ , cpu_env ) ; else gen_helper_vfp_cmpd ( @@v3@@ , @@v4@@ , cpu_env ) ; tcg_temp_free_i64 ( @@v3@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_f32_f16\", \"code\": \"__int64 __fastcall trans_VCVT_f32_f16 ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; if ( ! isar_feature_aa32_fp16_spconv ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v4@@ = get_fpstatus_ptr ( Number ) ; @@v5@@ = get_ahp_flag ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; @@v3@@ = vfp_f16_offset ( @@a2@@ [ Number ] , * @@a2@@ != Number ) ; tcg_gen_ld16u_i32 ( @@v6@@ , cpu_env , @@v3@@ ) ; gen_helper_vfp_fcvt_f16_to_f32 ( @@v6@@ , @@v6@@ , @@v4@@ , @@v5@@ ) ; neon_store_reg32 ( @@v6@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_f64_f16\", \"code\": \"__int64 __fastcall trans_VCVT_f64_f16 ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; if ( ! isar_feature_aa32_fp16_dpconv ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v4@@ = get_fpstatus_ptr ( Number ) ; @@v5@@ = get_ahp_flag ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; @@v3@@ = vfp_f16_offset ( @@a2@@ [ Number ] , * @@a2@@ != Number ) ; tcg_gen_ld16u_i32 ( @@v6@@ , cpu_env , @@v3@@ ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_fcvt_f16_to_f64 ( @@v7@@ , @@v6@@ , @@v4@@ , @@v5@@ ) ; neon_store_reg64 ( @@v7@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_f16_f32\", \"code\": \"__int64 __fastcall trans_VCVT_f16_f32 ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; if ( ! isar_feature_aa32_fp16_spconv ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v4@@ = get_fpstatus_ptr ( Number ) ; @@v5@@ = get_ahp_flag ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v6@@ , @@a2@@ [ Number ] ) ; gen_helper_vfp_fcvt_f32_to_f16 ( @@v6@@ , @@v6@@ , @@v4@@ , @@v5@@ ) ; @@v3@@ = vfp_f16_offset ( @@a2@@ [ Number ] , * @@a2@@ != Number ) ; tcg_gen_st16_i32 ( @@v6@@ , cpu_env , @@v3@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_f16_f64\", \"code\": \"__int64 __fastcall trans_VCVT_f16_f64 ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; if ( ! isar_feature_aa32_fp16_dpconv ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v4@@ = get_fpstatus_ptr ( Number ) ; @@v5@@ = get_ahp_flag ( ) ; @@v6@@ = tcg_temp_new_i32 ( ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v7@@ , @@a2@@ [ Number ] ) ; gen_helper_vfp_fcvt_f64_to_f16 ( @@v6@@ , @@v7@@ , @@v4@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v7@@ ) ; @@v3@@ = vfp_f16_offset ( @@a2@@ [ Number ] , * @@a2@@ != Number ) ; tcg_gen_st16_i32 ( @@v6@@ , cpu_env , @@v3@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VRINTR_sp\", \"code\": \"__int64 __fastcall trans_VRINTR_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; @@v4@@ = get_fpstatus_ptr ( Number ) ; gen_helper_rints ( @@v3@@ , @@v3@@ , @@v4@@ ) ; neon_store_reg32 ( @@v3@@ , * @@a2@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VRINTR_dp\", \"code\": \"__int64 __fastcall trans_VRINTR_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) * @@a2@@ | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v3@@ , @@a2@@ [ Number ] ) ; @@v4@@ = get_fpstatus_ptr ( Number ) ; gen_helper_rintd ( @@v3@@ , @@v3@@ , @@v4@@ ) ; neon_store_reg64 ( @@v3@@ , * @@a2@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VRINTZ_sp\", \"code\": \"__int64 __fastcall trans_VRINTZ_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; @@v4@@ = get_fpstatus_ptr ( Number ) ; @@v5@@ = tcg_const_i32 ( Number L ) ; gen_helper_set_rmode ( @@v5@@ , @@v5@@ , @@v4@@ ) ; gen_helper_rints ( @@v3@@ , @@v3@@ , @@v4@@ ) ; gen_helper_set_rmode ( @@v5@@ , @@v5@@ , @@v4@@ ) ; neon_store_reg32 ( @@v3@@ , * @@a2@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VRINTZ_dp\", \"code\": \"__int64 __fastcall trans_VRINTZ_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) * @@a2@@ | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v3@@ , @@a2@@ [ Number ] ) ; @@v4@@ = get_fpstatus_ptr ( Number ) ; @@v5@@ = tcg_const_i32 ( Number L ) ; gen_helper_set_rmode ( @@v5@@ , @@v5@@ , @@v4@@ ) ; gen_helper_rintd ( @@v3@@ , @@v3@@ , @@v4@@ ) ; gen_helper_set_rmode ( @@v5@@ , @@v5@@ , @@v4@@ ) ; neon_store_reg64 ( @@v3@@ , * @@a2@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v5@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VRINTX_sp\", \"code\": \"__int64 __fastcall trans_VRINTX_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; @@v4@@ = get_fpstatus_ptr ( Number ) ; gen_helper_rints_exact ( @@v3@@ , @@v3@@ , @@v4@@ ) ; neon_store_reg32 ( @@v3@@ , * @@a2@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VRINTX_dp\", \"code\": \"__int64 __fastcall trans_VRINTX_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) * @@a2@@ | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v3@@ , @@a2@@ [ Number ] ) ; @@v4@@ = get_fpstatus_ptr ( Number ) ; gen_helper_rintd_exact ( @@v3@@ , @@v3@@ , @@v4@@ ) ; neon_store_reg64 ( @@v3@@ , * @@a2@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_sp\", \"code\": \"__int64 __fastcall trans_VCVT_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( * @@a2@@ & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i32 ( ) ; @@v4@@ = tcg_temp_new_i64 ( ) ; neon_load_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; gen_helper_vfp_fcvtds ( @@v4@@ , @@v3@@ , cpu_env ) ; neon_store_reg64 ( @@v4@@ , * @@a2@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_dp\", \"code\": \"__int64 __fastcall trans_VCVT_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i32 ( ) ; @@v4@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v4@@ , @@a2@@ [ Number ] ) ; gen_helper_vfp_fcvtsd ( @@v3@@ , @@v4@@ , cpu_env ) ; neon_store_reg32 ( @@v3@@ , * @@a2@@ ) ; tcg_temp_free_i32 ( @@v3@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_int_sp\", \"code\": \"__int64 __fastcall trans_VCVT_int_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v3@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; @@v4@@ = get_fpstatus_ptr ( Number ) ; if ( * @@a2@@ ) gen_helper_vfp_sitos ( @@v3@@ , @@v3@@ , @@v4@@ ) ; else gen_helper_vfp_uitos ( @@v3@@ , @@v3@@ , @@v4@@ ) ; neon_store_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( @@v3@@ ) ; tcg_temp_free_ptr ( @@v4@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_int_dp\", \"code\": \"__int64 __fastcall trans_VCVT_int_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v3@@ = tcg_temp_new_i32 ( ) ; @@v4@@ = tcg_temp_new_i64 ( ) ; neon_load_reg32 ( @@v3@@ , @@a2@@ [ Number ] ) ; @@v5@@ = get_fpstatus_ptr ( Number ) ; if ( * @@a2@@ ) gen_helper_vfp_sitod ( @@v4@@ , @@v3@@ , @@v5@@ ) ; else gen_helper_vfp_uitod ( @@v4@@ , @@v3@@ , @@v5@@ ) ; neon_store_reg64 ( @@v4@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( @@v3@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; tcg_temp_free_ptr ( @@v5@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VJCVT\", \"code\": \"__int64 __fastcall trans_VJCVT ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ! isar_feature_aa32_jscvt ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v3@@ = tcg_temp_new_i64 ( ) ; @@v4@@ = tcg_temp_new_i32 ( ) ; neon_load_reg64 ( @@v3@@ , @@a2@@ [ Number ] ) ; gen_helper_vjcvt ( @@v4@@ , @@v3@@ , cpu_env ) ; neon_store_reg32 ( @@v4@@ , * @@a2@@ ) ; tcg_temp_free_i64 ( @@v3@@ ) ; tcg_temp_free_i32 ( @@v4@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"unsigned int\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_fix_sp\", \"code\": \"__int64 __fastcall trans_VCVT_fix_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int @@v3@@ ; unsigned int @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; if ( ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( ( @@a2@@ [ Number ] & Number ) != Number ) @@v3@@ = Number - * @@a2@@ ; else @@v3@@ = Number - * @@a2@@ ; @@v4@@ = @@v3@@ ; @@v5@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v5@@ , @@a2@@ [ Number ] ) ; @@v6@@ = get_fpstatus_ptr ( Number ) ; @@v7@@ = tcg_const_i32 ( @@v4@@ ) ; switch ( @@a2@@ [ Number ] ) { case Number : gen_helper_vfp_shtos ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_sltos ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_uhtos ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_ultos ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_toshs_round_to_zero ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_tosls_round_to_zero ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_touhs_round_to_zero ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_touls_round_to_zero ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; default : g_assertion_message_expr ( Number L , String , Number L , String , Number L ) ; break ; } neon_store_reg32 ( @@v5@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; tcg_temp_free_ptr ( @@v6@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s28\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_fix_dp\", \"code\": \"__int64 __fastcall trans_VCVT_fix_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int @@v3@@ ; unsigned int @@v4@@ ; __int64 @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; if ( ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( ( @@a2@@ [ Number ] & Number ) != Number ) @@v3@@ = Number - * @@a2@@ ; else @@v3@@ = Number - * @@a2@@ ; @@v4@@ = @@v3@@ ; @@v5@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v5@@ , @@a2@@ [ Number ] ) ; @@v6@@ = get_fpstatus_ptr ( Number ) ; @@v7@@ = tcg_const_i32 ( @@v4@@ ) ; switch ( @@a2@@ [ Number ] ) { case Number : gen_helper_vfp_shtod ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_sltod ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_uhtod ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_ultod ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_toshd_round_to_zero ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_tosld_round_to_zero ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_touhd_round_to_zero ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; case Number : gen_helper_vfp_tould_round_to_zero ( @@v5@@ , @@v5@@ , @@v7@@ , @@v6@@ ) ; break ; default : g_assertion_message_expr ( Number L , String , Number L , String , Number L ) ; break ; } neon_store_reg64 ( @@v5@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_i64 ( @@v5@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; tcg_temp_free_ptr ( @@v6@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_sp_int\", \"code\": \"__int64 __fastcall trans_VCVT_sp_int ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v3@@ = get_fpstatus_ptr ( Number ) ; @@v4@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v4@@ , @@a2@@ [ Number ] ) ; if ( @@a2@@ [ Number ] ) { if ( * @@a2@@ ) gen_helper_vfp_tosizs ( @@v4@@ , @@v4@@ , @@v3@@ ) ; else gen_helper_vfp_tosis ( @@v4@@ , @@v4@@ , @@v3@@ ) ; } else if ( * @@a2@@ ) { gen_helper_vfp_touizs ( @@v4@@ , @@v4@@ , @@v3@@ ) ; } else { gen_helper_vfp_touis ( @@v4@@ , @@v4@@ , @@v3@@ ) ; } neon_store_reg32 ( @@v4@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( @@v4@@ ) ; tcg_temp_free_ptr ( @@v3@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"trans_VCVT_dp_int\", \"code\": \"__int64 __fastcall trans_VCVT_dp_int ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 @@v3@@ ; __int64 @@v4@@ ; __int64 @@v5@@ ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v3@@ = get_fpstatus_ptr ( Number ) ; @@v4@@ = tcg_temp_new_i64 ( ) ; @@v5@@ = tcg_temp_new_i32 ( ) ; neon_load_reg64 ( @@v4@@ , @@a2@@ [ Number ] ) ; if ( @@a2@@ [ Number ] ) { if ( * @@a2@@ ) gen_helper_vfp_tosizd ( @@v5@@ , @@v4@@ , @@v3@@ ) ; else gen_helper_vfp_tosid ( @@v5@@ , @@v4@@ , @@v3@@ ) ; } else if ( * @@a2@@ ) { gen_helper_vfp_touizd ( @@v5@@ , @@v4@@ , @@v3@@ ) ; } else { gen_helper_vfp_touid ( @@v5@@ , @@v4@@ , @@v3@@ ) ; } neon_store_reg32 ( @@v5@@ , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( @@v5@@ ) ; tcg_temp_free_i64 ( @@v4@@ ) ; tcg_temp_free_ptr ( @@v3@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0", "code": "_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp_uncond0"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 759 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond\", \"code\": \"_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 6, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1", "code": "_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp_uncond0"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 760 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond\", \"code\": \"_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 6, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2", "code": "_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp_uncond1"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 761 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond\", \"code\": \"_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 6, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3", "code": "_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp_uncond1"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 762 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond\", \"code\": \"_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 6, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4", "code": "_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp_uncond2"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 763 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond\", \"code\": \"_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 6, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5", "code": "_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp_uncond2"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 764 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond\", \"code\": \"_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 6, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6", "code": "_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp_uncond3"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 765 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond\", \"code\": \"_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 6, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7", "code": "_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r16"}, {"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_disas_vfp_uncond3"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 766 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"deposit32\", \"code\": \"__int64 __fastcall deposit32 ( int @@a1@@ , int @@a2@@ , int @@a3@@ , int @@a4@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return @@a1@@ & ~ ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) | ( Number >> ( Number - @@a3@@ ) << @@a2@@ ) & ( @@a4@@ << @@a2@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond\", \"code\": \"_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 6, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "disas_vfp_uncond", "code": "_BOOL8 __fastcall disas_vfp_uncond ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; int v4 ; int v5 ; _DWORD @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } else { if ( v2 != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; } return ( unsigned __int8 ) trans_VSEL ( @@a1@@ , @@v6@@ ) != Number ; } return Number L ; } v4 = ( @@a2@@ >> Number ) & Number ; if ( ! v4 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v4 != Number ) return Number L ; if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; } disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } v5 = ( @@a2@@ >> Number ) & Number ; if ( ! v5 ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VMINMAXNM ( @@a1@@ , @@v6@@ ) != Number ; } if ( v5 != Number ) return Number L ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) return Number L ; return ( unsigned __int8 ) trans_VRINT ( @@a1@@ , @@v6@@ ) != Number ; } if ( ( @@a2@@ & Number ) != Number ) return Number L ; disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( @@a1@@ , @@v6@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT ( @@a1@@ , @@v6@@ ) != Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r64"}, {"n": "v6", "t": {"T": 2, "n": 6, "s": 4, "t": "_DWORD"}, "location": "s32"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]}
|
[{"n": "ctx", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "insn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "r64"}, {"n": "u", "t": {"T": 8}, "location": "s32"}, {"n": "v7", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 767 |
[
"{\"name\": \"disas_vfp\", \"code\": \"_BOOL8 __fastcall disas_vfp ( __int64 @@a1@@ , unsigned int @@a2@@ ) { unsigned int v2 ; _BOOL8 result ; unsigned int v4 ; unsigned int v5 ; unsigned int v6 ; unsigned int v7 ; unsigned int v8 ; unsigned int v9 ; unsigned int v10 ; unsigned int v11 ; unsigned int v12 ; unsigned int v13 ; unsigned int v14 ; unsigned int v15 ; _DWORD @@v16@@ [ Number ] ; unsigned __int64 @@v17@@ ; @@v17@@ = __readfsqword ( Number ) ; v2 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { v10 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_0 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_1 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_2 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_to_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v10 != Number ) { if ( v10 <= Number ) { if ( ! v10 ) { v11 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_22 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v11 != Number ) { if ( v11 <= Number ) { if ( ! v11 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v11 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VMUL_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v10 == Number ) { if ( ( @@a2@@ & Number ) != Number ) { if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_6 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDUP ( @@a1@@ , @@v16@@ ) != Number ; } else { result = Number L ; } } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_3 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_4 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_5 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_from_gp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } } return Number L ; } v12 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != Number ) { if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_20 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v12 <= Number ) { if ( ! v12 ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VNMLA_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VNMLS_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v12 == Number ) { disas_vfp_extract_disas_vfp_Fmt_18 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VSUB_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VADD_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_24 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v13 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_37 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_dp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v13 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_39 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp_int ( @@a1@@ , @@v16@@ ) != Number ; } else if ( ( @@a2@@ & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) result = ( unsigned __int8 ) trans_VJCVT ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } else { disas_vfp_extract_disas_vfp_Fmt_35 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_int_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v13 > Number ) return Number L ; if ( ! v13 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_28 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_dp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v14 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) return ( unsigned __int8 ) trans_VNEG_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 > Number ) goto LABEL_195 ; if ( ! v14 ) return ( unsigned __int8 ) trans_VMOV_reg_dp ( @@a1@@ , @@v16@@ ) != Number ; if ( v14 == Number ) result = ( unsigned __int8 ) trans_VABS_dp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_195 : result = Number L ; return result ; } if ( v13 != ( _DWORD ) & loc_20000 ) return Number L ; v15 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v15 <= ( unsigned int ) & unk_50000 ) { if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_dp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v15 <= Number ) { if ( ! v15 ) { disas_vfp_extract_disas_vfp_Fmt_30 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f64_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v15 == Number ) { disas_vfp_extract_disas_vfp_Fmt_31 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f64 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_33 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_26 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_dp ( @@a1@@ , @@v16@@ ) != Number ; } } else { if ( v2 > Number ) return Number L ; if ( v2 != Number ) { if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_16 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_12 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_dp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_15 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_11 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDR_VSTR_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v2 <= Number ) { if ( v2 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_13 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_9 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } else { if ( v2 != Number ) return Number L ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_14 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VLDM_VSTM_dp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_10 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMOV_64_dp ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; } } return result ; } } } return Number L ; } v4 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_7 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) == Number ) result = ( unsigned __int8 ) trans_VMSR_VMRS ( @@a1@@ , @@v16@@ ) != Number ; else result = Number L ; return result ; } if ( v4 != Number ) { if ( v4 <= Number ) { if ( v4 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_19 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VDIV_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v4 <= Number ) { if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v6 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSUB_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) return ( unsigned __int8 ) trans_VADD_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 > Number ) goto LABEL_66 ; if ( ! v6 ) return ( unsigned __int8 ) trans_VMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v6 == Number ) result = ( unsigned __int8 ) trans_VNMUL_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_66 : result = Number L ; return result ; } if ( v4 <= Number ) { if ( ! v4 ) { disas_vfp_extract_disas_vfp_Fmt_17 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v5 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VNMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) return ( unsigned __int8 ) trans_VNMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 > Number ) goto LABEL_52 ; if ( ! v5 ) return ( unsigned __int8 ) trans_VMLA_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v5 == Number ) result = ( unsigned __int8 ) trans_VMLS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_52 : result = Number L ; return result ; } if ( v4 == Number ) { disas_vfp_extract_disas_vfp_Fmt_8 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_single ( @@a1@@ , @@v16@@ ) != Number ; return result ; } } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_21 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VFM_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( ( ( @@a2@@ >> Number ) & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_23 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VMOV_imm_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } v7 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) { disas_vfp_extract_disas_vfp_Fmt_36 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_fix_sp ( @@a1@@ , @@v16@@ ) != Number ; } if ( v7 == Number ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_38 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp_int ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_34 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( @@a2@@ & Number ) != Number ) result = Number L ; else result = ( unsigned __int8 ) trans_VCVT_int_sp ( @@a1@@ , @@v16@@ ) != Number ; } return result ; } if ( v7 > Number ) return Number L ; if ( ! v7 ) { if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_27 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCMP_sp ( @@a1@@ , @@v16@@ ) != Number ; } disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; v8 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) == Number ) return ( unsigned __int8 ) trans_VSQRT_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) return ( unsigned __int8 ) trans_VNEG_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 > Number ) goto LABEL_96 ; if ( ! v8 ) return ( unsigned __int8 ) trans_VMOV_reg_sp ( @@a1@@ , @@v16@@ ) != Number ; if ( v8 == Number ) result = ( unsigned __int8 ) trans_VABS_sp ( @@a1@@ , @@v16@@ ) != Number ; else LABEL_96 : result = Number L ; return result ; } if ( v7 != ( _DWORD ) & loc_20000 ) return Number L ; v9 = @@a2@@ & Number ; if ( ( @@a2@@ & Number ) != ( _DWORD ) & unk_50000 ) { if ( v9 <= ( unsigned int ) & unk_50000 ) { if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) result = ( unsigned __int8 ) trans_VRINTZ_sp ( @@a1@@ , @@v16@@ ) != Number ; else result = ( unsigned __int8 ) trans_VRINTR_sp ( @@a1@@ , @@v16@@ ) != Number ; return result ; } if ( v9 <= Number ) { if ( ! v9 ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f32_f16 ( @@a1@@ , @@v16@@ ) != Number ; } if ( v9 == Number ) { disas_vfp_extract_disas_vfp_Fmt_29 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; return ( unsigned __int8 ) trans_VCVT_f16_f32 ( @@a1@@ , @@v16@@ ) != Number ; } } } return Number L ; } if ( ( ( @@a2@@ >> Number ) & Number ) != Number ) { disas_vfp_extract_disas_vfp_Fmt_32 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VCVT_sp ( @@a1@@ , @@v16@@ ) != Number ; } else { disas_vfp_extract_disas_vfp_Fmt_25 ( @@a1@@ , @@v16@@ , @@a2@@ ) ; result = ( unsigned __int8 ) trans_VRINTX_sp ( @@a1@@ , @@v16@@ ) != Number ; } } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v16\", \"t\": {\"T\": 2, \"n\": 10, \"s\": 4, \"t\": \"_DWORD\"}, \"location\": \"s48\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0\", \"code\": \"_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_0 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1\", \"code\": \"_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_1 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; * @@a2@@ = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; @@a2@@ [ Number ] = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2\", \"code\": \"_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3\", \"code\": \"_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; int v8 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; v7 = extract32 ( @@a3@@ , Number , Number ) ; v8 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v8 , Number , Number , v7 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4\", \"code\": \"_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5\", \"code\": \"_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6\", \"code\": \"_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7\", \"code\": \"_DWORD * __fastcall disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7 ( __int64 @@a1@@ , _DWORD * @@a2@@ , unsigned int @@a3@@ ) { int v3 ; int v4 ; int v5 ; int v6 ; _DWORD * result ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = extract32 ( @@a3@@ , Number , Number ) ; v3 = extract32 ( @@a3@@ , Number , Number ) ; v4 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v4 , Number , Number , v3 ) ; v5 = extract32 ( @@a3@@ , Number , Number ) ; v6 = extract32 ( @@a3@@ , Number , Number ) ; @@a2@@ [ Number ] = deposit32 ( v6 , Number , Number , v5 ) ; result = @@a2@@ ; * @@a2@@ = Number ; return result ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}]}",
"{\"name\": \"trans_VSEL\", \"code\": \"__int64 __fastcall trans_VSEL ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int v3 ; int v4 ; bool @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 v13 ; __int64 v14 ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; __int64 @@v18@@ ; __int64 @@v19@@ ; __int64 @@v20@@ ; __int64 @@v21@@ ; __int64 v22 ; __int64 v23 ; @@v5@@ = @@a2@@ [ Number ] != Number ; if ( ! isar_feature_aa32_vsel ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v5@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) ( * ( ( _BYTE * ) @@a2@@ + Number ) | * ( ( _BYTE * ) @@a2@@ + Number ) ) | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( @@v5@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v6@@ = @@a2@@ [ Number ] ; @@v7@@ = @@a2@@ [ Number ] ; @@v8@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v5@@ ) { @@v15@@ = tcg_const_i64 ( Number L ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = tcg_temp_new_i64 ( ) ; @@v18@@ = tcg_temp_new_i64 ( ) ; @@v19@@ = tcg_temp_new_i64 ( ) ; @@v20@@ = tcg_temp_new_i64 ( ) ; @@v21@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v19@@ , cpu_ZF ) ; tcg_gen_ext_i32_i64 ( @@v20@@ , cpu_NF ) ; tcg_gen_ext_i32_i64 ( @@v21@@ , cpu_VF ) ; neon_load_reg64 ( @@v16@@ , @@v7@@ ) ; neon_load_reg64 ( @@v17@@ , @@v8@@ ) ; v3 = * @@a2@@ ; if ( * @@a2@@ == Number ) { tcg_gen_movcond_i64 ( Number L , @@v18@@ , @@v19@@ , @@v15@@ , @@v16@@ , @@v17@@ ) ; v23 = tcg_temp_new_i64 ( ) ; tcg_gen_xor_i64 ( v23 , @@v21@@ , @@v20@@ ) ; tcg_gen_movcond_i64 ( Number L , @@v18@@ , v23 , @@v15@@ , @@v18@@ , @@v17@@ ) ; tcg_temp_free_i64 ( v23 ) ; } else if ( v3 <= Number ) { if ( v3 == Number ) { v22 = tcg_temp_new_i64 ( ) ; tcg_gen_xor_i64 ( v22 , @@v21@@ , @@v20@@ ) ; tcg_gen_movcond_i64 ( Number L , @@v18@@ , v22 , @@v15@@ , @@v16@@ , @@v17@@ ) ; tcg_temp_free_i64 ( v22 ) ; } else if ( v3 ) { if ( v3 == Number ) tcg_gen_movcond_i64 ( Number L , @@v18@@ , @@v21@@ , @@v15@@ , @@v16@@ , @@v17@@ ) ; } else { tcg_gen_movcond_i64 ( Number L , @@v18@@ , @@v19@@ , @@v15@@ , @@v16@@ , @@v17@@ ) ; } } neon_store_reg64 ( @@v18@@ , @@v6@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_i64 ( @@v17@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; } else { @@v9@@ = tcg_const_i32 ( Number L ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; @@v11@@ = tcg_temp_new_i32 ( ) ; @@v12@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v10@@ , @@v7@@ ) ; neon_load_reg32 ( @@v11@@ , @@v8@@ ) ; v4 = * @@a2@@ ; if ( * @@a2@@ == Number ) { tcg_gen_movcond_i32 ( Number L , @@v12@@ , cpu_ZF , @@v9@@ , @@v10@@ , @@v11@@ ) ; v14 = tcg_temp_new_i32 ( ) ; tcg_gen_xor_i32 ( v14 , cpu_VF , cpu_NF ) ; tcg_gen_movcond_i32 ( Number L , @@v12@@ , v14 , @@v9@@ , @@v12@@ , @@v11@@ ) ; tcg_temp_free_i32 ( v14 ) ; } else if ( v4 <= Number ) { if ( v4 == Number ) { v13 = tcg_temp_new_i32 ( ) ; tcg_gen_xor_i32 ( v13 , cpu_VF , cpu_NF ) ; tcg_gen_movcond_i32 ( Number L , @@v12@@ , v13 , @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( v13 ) ; } else if ( v4 ) { if ( v4 == Number ) tcg_gen_movcond_i32 ( Number L , @@v12@@ , cpu_VF , @@v9@@ , @@v10@@ , @@v11@@ ) ; } else { tcg_gen_movcond_i32 ( Number L , @@v12@@ , cpu_ZF , @@v9@@ , @@v10@@ , @@v11@@ ) ; } } neon_store_reg32 ( @@v12@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; } return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s104\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s132\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s136\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s140\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s141\"}, {\"n\": \"v21\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v20\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v19\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v18\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s48\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s56\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s64\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s80\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s88\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s96\"}]}",
"{\"name\": \"trans_VMINMAXNM\", \"code\": \"__int64 __fastcall trans_VMINMAXNM ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { bool @@v3@@ ; bool @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 @@v13@@ ; __int64 @@v14@@ ; @@v3@@ = * @@a2@@ != Number ; @@v4@@ = @@a2@@ [ Number ] != Number ; if ( ! isar_feature_aa32_vminmaxnm ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v3@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) ( * ( ( _BYTE * ) @@a2@@ + Number ) | * ( ( _BYTE * ) @@a2@@ + Number ) ) | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( @@v3@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v5@@ = @@a2@@ [ Number ] ; @@v6@@ = @@a2@@ [ Number ] ; @@v7@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v8@@ = get_fpstatus_ptr ( Number ) ; if ( @@v3@@ ) { @@v12@@ = tcg_temp_new_i64 ( ) ; @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v12@@ , @@v6@@ ) ; neon_load_reg64 ( @@v13@@ , @@v7@@ ) ; if ( @@v4@@ ) gen_helper_vfp_minnumd ( @@v14@@ , @@v12@@ , @@v13@@ , @@v8@@ ) ; else gen_helper_vfp_maxnumd ( @@v14@@ , @@v12@@ , @@v13@@ , @@v8@@ ) ; neon_store_reg64 ( @@v14@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } else { @@v9@@ = tcg_temp_new_i32 ( ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; @@v11@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v9@@ , @@v6@@ ) ; neon_load_reg32 ( @@v10@@ , @@v7@@ ) ; if ( @@v4@@ ) gen_helper_vfp_minnums ( @@v11@@ , @@v9@@ , @@v10@@ , @@v8@@ ) ; else gen_helper_vfp_maxnums ( @@v11@@ , @@v9@@ , @@v10@@ , @@v8@@ ) ; neon_store_reg32 ( @@v11@@ , @@v5@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } tcg_temp_free_ptr ( @@v8@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s48\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s56\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s88\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s93\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s94\"}]}",
"{\"name\": \"trans_VRINT\", \"code\": \"__int64 __fastcall trans_VRINT ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { unsigned int @@v3@@ ; bool @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 @@v13@@ ; @@v4@@ = * @@a2@@ != Number ; @@v5@@ = fp_decode_rm [ @@a2@@ [ Number ] ] ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a2@@ [ Number ] | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( @@v4@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v6@@ = @@a2@@ [ Number ] ; @@v7@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v8@@ = get_fpstatus_ptr ( Number ) ; @@v3@@ = arm_rmode_to_sf ( @@v5@@ ) ; @@v9@@ = tcg_const_i32 ( @@v3@@ ) ; gen_helper_set_rmode ( @@v9@@ , @@v9@@ , @@v8@@ ) ; if ( @@v4@@ ) { @@v12@@ = tcg_temp_new_i64 ( ) ; @@v13@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v12@@ , @@v7@@ ) ; gen_helper_rintd ( @@v13@@ , @@v12@@ , @@v8@@ ) ; neon_store_reg64 ( @@v13@@ , @@v6@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } else { @@v10@@ = tcg_temp_new_i32 ( ) ; @@v11@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v10@@ , @@v7@@ ) ; gen_helper_rints ( @@v11@@ , @@v10@@ , @@v8@@ ) ; neon_store_reg32 ( @@v11@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } gen_helper_set_rmode ( @@v9@@ , @@v9@@ , @@v8@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_ptr ( @@v8@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s48\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s76\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s80\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s84\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s85\"}]}",
"{\"name\": \"trans_VCVT\", \"code\": \"__int64 __fastcall trans_VCVT ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { unsigned int @@v3@@ ; bool @@v4@@ ; bool @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; @@v4@@ = * @@a2@@ != Number ; @@v6@@ = fp_decode_rm [ @@a2@@ [ Number ] ] ; @@v5@@ = @@a2@@ [ Number ] != Number ; if ( ! isar_feature_aa32_vcvt_dr ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v7@@ = @@a2@@ [ Number ] ; @@v8@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v9@@ = get_fpstatus_ptr ( Number ) ; @@v10@@ = tcg_const_i32 ( Number L ) ; @@v3@@ = arm_rmode_to_sf ( @@v6@@ ) ; @@v11@@ = tcg_const_i32 ( @@v3@@ ) ; gen_helper_set_rmode ( @@v11@@ , @@v11@@ , @@v9@@ ) ; if ( @@v4@@ ) { @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; neon_load_reg64 ( @@v14@@ , @@v8@@ ) ; if ( @@v5@@ ) gen_helper_vfp_tosld ( @@v15@@ , @@v14@@ , @@v10@@ , @@v9@@ ) ; else gen_helper_vfp_tould ( @@v15@@ , @@v14@@ , @@v10@@ , @@v9@@ ) ; tcg_gen_extrl_i64_i32 ( @@v16@@ , @@v15@@ ) ; neon_store_reg32 ( @@v16@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } else { @@v12@@ = tcg_temp_new_i32 ( ) ; @@v13@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v12@@ , @@v8@@ ) ; if ( @@v5@@ ) gen_helper_vfp_tosls ( @@v13@@ , @@v12@@ , @@v10@@ , @@v9@@ ) ; else gen_helper_vfp_touls ( @@v13@@ , @@v12@@ , @@v10@@ , @@v9@@ ) ; neon_store_reg32 ( @@v13@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } gen_helper_set_rmode ( @@v11@@ , @@v11@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_ptr ( @@v9@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 3, \"t\": \"_DWORD\"}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s100\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s101\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"bool\", \"s\": 1}, \"location\": \"s102\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s48\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s56\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s64\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s92\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s96\"}]}"
] |
{"name": "vfp_expand_imm", "code": "unsigned __int64 __fastcall vfp_expand_imm ( int @@a1@@ , unsigned __int8 @@a2@@ ) { int v2 ; int v3 ; int v4 ; int v5 ; int v6 ; int v7 ; unsigned __int64 @@v9@@ ; if ( @@a1@@ == Number ) { if ( ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) ) v2 = Number ; else v2 = Number ; if ( ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) ) v3 = Number ; else v3 = Number ; @@v9@@ = ( unsigned __int64 ) ( v2 | v3 | ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) ) << Number ; } else { if ( @@a1@@ > Number ) { LABEL_27 : g_assertion_message_expr ( Number L , String , Number L , String , Number L ) ; return @@v9@@ ; } if ( @@a1@@ == Number ) { if ( ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) ) v6 = Number ; else v6 = Number ; if ( ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) ) v7 = Number ; else v7 = Number ; @@v9@@ = v6 | v7 | ( ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) << Number ) ; } else { if ( @@a1@@ != Number ) goto LABEL_27 ; if ( ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) ) v4 = Number ; else v4 = Number ; if ( ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) ) v5 = Number ; else v5 = Number ; @@v9@@ = ( unsigned __int64 ) ( v4 | v5 | ( Number * ( unsigned int ) extract32 ( @@a2@@ , Number , Number ) ) ) << Number ; } } return @@v9@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "unsigned __int8", "s": 1}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s24"}]}
|
[{"n": "size", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "imm8", "t": {"T": 1, "n": "uint8_t", "s": 1}, "location": "r64"}, {"n": "imm", "t": {"T": 1, "n": "unsigned __int64", "s": 8}, "location": "s24"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 768 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}"
] |
{"name": "vfp_f16_offset", "code": "__int64 __fastcall vfp_f16_offset ( unsigned int @@a1@@ , char @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = vfp_reg_offset ( Number , @@a1@@ ) ; if ( @@a2@@ ) @@v3@@ += Number L ; return @@v3@@ ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "reg", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r56"}, {"n": "top", "t": {"T": 1, "n": "bool", "s": 1}, "location": "r64"}, {"n": "offs", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 769 |
[
"{\"name\": \"vfp_reg_offset\", \"code\": \"__int64 __fastcall vfp_reg_offset ( char @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v3@@ ; if ( @@a1@@ ) return Number * ( Number * ( ( @@a2@@ >> Number ) + Number L ) + ( @@a2@@ & Number ) ) ; @@v3@@ = Number * ( Number * ( ( @@a2@@ >> Number ) + Number L ) + ( ( @@a2@@ >> Number ) & Number ) ) ; if ( ( @@a2@@ & Number ) != Number ) @@v3@@ += Number L ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "full_vfp_access_check", "code": "__int64 __fastcall full_vfp_access_check ( __int64 @@a1@@ , char @@a2@@ ) { unsigned int v2 ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; __int64 result ; unsigned int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { if ( arm_dc_feature ( @@a1@@ , Number ) ) { v2 = * ( _DWORD * ) ( @@a1@@ + Number ) ; v3 = syn_uncategorized ( ) ; gen_exception_insn ( @@a1@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , Number , v3 , v2 ) ; } else { v4 = * ( _DWORD * ) ( @@a1@@ + Number ) ; v5 = syn_fp_access_trap ( Number , Number , Number ) ; gen_exception_insn ( @@a1@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , Number , v5 , v4 ) ; } result = Number L ; } else if ( * ( _BYTE * ) ( @@a1@@ + Number ) != Number && @@a2@@ != Number ) { if ( arm_dc_feature ( @@a1@@ , Number ) ) _assert_fail ( String , String , Number , String ) ; unallocated_encoding ( @@a1@@ ) ; result = Number L ; } else { if ( arm_dc_feature ( @@a1@@ , Number ) ) { if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { if ( ( tb_cflags ( * ( _QWORD * ) @@a1@@ ) & Number ) != Number ) gen_io_start ( ) ; gen_helper_v7m_preserve_fp_state ( cpu_env ) ; if ( ( tb_cflags ( * ( _QWORD * ) @@a1@@ ) & Number ) != Number ) gen_io_end ( ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { @@v8@@ = load_cpu_offset ( Number ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) tcg_gen_ori_i32 ( @@v8@@ , @@v8@@ , Number L ) ; else tcg_gen_andi_i32 ( @@v8@@ , @@v8@@ , Number L ) ; store_cpu_offset ( @@v8@@ , Number ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { @@v7@@ = Number ; @@v9@@ = load_cpu_offset ( Number * ( ( unsigned int ) * ( unsigned __int8 * ) ( @@a1@@ + Number ) + Number ) ) ; gen_helper_vfp_set_fpscr ( cpu_env , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) @@v7@@ = Number ; @@v10@@ = load_cpu_offset ( Number ) ; tcg_gen_ori_i32 ( @@v10@@ , @@v10@@ , @@v7@@ ) ; store_cpu_offset ( @@v10@@ , Number ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } } result = Number L ; } return result ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}, {"n": "v10", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s40"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s44"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "ignore_vfp_enabled", "t": {"T": 1, "n": "bool", "s": 1}, "location": "r64"}, {"n": "control", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s24"}, {"n": "fpscr", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s32"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s40"}, {"n": "bits", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s44"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 770 |
[
"{\"name\": \"syn_fp_access_trap\", \"code\": \"__int64 __fastcall syn_fp_access_trap ( int @@a1@@ , int @@a2@@ , char @@a3@@ ) { int v3 ; if ( @@a3@@ ) v3 = Number ; else v3 = Number ; return ( @@a1@@ << Number ) | v3 | ( @@a2@@ << Number ) | Number ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tb_cflags\", \"code\": \"__int64 __fastcall tb_cflags ( __int64 @@a1@@ ) { return * ( unsigned int * ) ( @@a1@@ + Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"gen_helper_v7m_preserve_fp_state\", \"code\": \"unsigned __int64 __fastcall gen_helper_v7m_preserve_fp_state ( __int64 @@a1@@ ) { __int64 @@v2@@ ; unsigned __int64 @@v3@@ ; @@v3@@ = __readfsqword ( Number ) ; @@v2@@ = tcgv_ptr_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_v7m_preserve_fp_state , Number L , Number L , & @@v2@@ ) ; return __readfsqword ( Number ) ^ @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_set_fpscr\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_set_fpscr ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_vfp_set_fpscr , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"arm_dc_feature\", \"code\": \"_BOOL8 __fastcall arm_dc_feature ( __int64 @@a1@@ , char @@a2@@ ) { return ( ( * ( _QWORD * ) ( @@a1@@ + Number ) >> @@a2@@ ) & Number L ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_exception\", \"code\": \"__int64 __fastcall gen_exception ( unsigned int @@a1@@ , unsigned int @@a2@@ , unsigned int @@a3@@ ) { __int64 @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; @@v5@@ = tcg_const_i32 ( @@a1@@ ) ; @@v6@@ = tcg_const_i32 ( @@a2@@ ) ; @@v7@@ = tcg_const_i32 ( @@a3@@ ) ; gen_helper_exception_with_syndrome ( cpu_env , @@v5@@ , @@v6@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return tcg_temp_free_i32 ( @@v5@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_start\", \"code\": \"__int64 gen_io_start ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number ) ; return tcg_temp_free_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_io_end\", \"code\": \"__int64 gen_io_end ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_const_i32 ( Number L ) ; tcg_gen_st_i32 ( @@v1@@ , cpu_env , Number ) ; return tcg_temp_free_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_cpu_offset\", \"code\": \"__int64 __fastcall load_cpu_offset ( int @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_temp_new_i32 ( ) ; tcg_gen_ld_i32 ( @@v2@@ , cpu_env , @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_cpu_offset\", \"code\": \"__int64 __fastcall store_cpu_offset ( __int64 @@a1@@ , int @@a2@@ ) { tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@a2@@ ) ; return tcg_temp_free_i32 ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_exception_insn\", \"code\": \"__int64 __fastcall gen_exception_insn ( __int64 @@a1@@ , int @@a2@@ , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ ) { __int64 @@result@@ ; gen_set_condexec ( @@a1@@ ) ; gen_set_pc_im ( @@a1@@ , @@a2@@ ) ; gen_exception ( @@a3@@ , @@a4@@ , @@a5@@ ) ; @@result@@ = @@a1@@ ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; return @@result@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"result\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"unallocated_encoding\", \"code\": \"__int64 __fastcall unallocated_encoding ( __int64 @@a1@@ ) { unsigned int @@v1@@ ; unsigned int @@v2@@ ; @@v1@@ = default_exception_el ( @@a1@@ ) ; @@v2@@ = syn_uncategorized ( ) ; return gen_exception_insn ( @@a1@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , Number , @@v2@@ , @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r32\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "vfp_access_check", "code": "__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 771 |
[
"{\"name\": \"full_vfp_access_check\", \"code\": \"__int64 __fastcall full_vfp_access_check ( __int64 @@a1@@ , char @@a2@@ ) { unsigned int v2 ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; __int64 result ; unsigned int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { if ( arm_dc_feature ( @@a1@@ , Number ) ) { v2 = * ( _DWORD * ) ( @@a1@@ + Number ) ; v3 = syn_uncategorized ( ) ; gen_exception_insn ( @@a1@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , Number , v3 , v2 ) ; } else { v4 = * ( _DWORD * ) ( @@a1@@ + Number ) ; v5 = syn_fp_access_trap ( Number , Number , Number ) ; gen_exception_insn ( @@a1@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , Number , v5 , v4 ) ; } result = Number L ; } else if ( * ( _BYTE * ) ( @@a1@@ + Number ) != Number && @@a2@@ != Number ) { if ( arm_dc_feature ( @@a1@@ , Number ) ) _assert_fail ( String , String , Number , String ) ; unallocated_encoding ( @@a1@@ ) ; result = Number L ; } else { if ( arm_dc_feature ( @@a1@@ , Number ) ) { if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { if ( ( tb_cflags ( * ( _QWORD * ) @@a1@@ ) & Number ) != Number ) gen_io_start ( ) ; gen_helper_v7m_preserve_fp_state ( cpu_env ) ; if ( ( tb_cflags ( * ( _QWORD * ) @@a1@@ ) & Number ) != Number ) gen_io_end ( ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { @@v8@@ = load_cpu_offset ( Number ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) tcg_gen_ori_i32 ( @@v8@@ , @@v8@@ , Number L ) ; else tcg_gen_andi_i32 ( @@v8@@ , @@v8@@ , Number L ) ; store_cpu_offset ( @@v8@@ , Number ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { @@v7@@ = Number ; @@v9@@ = load_cpu_offset ( Number * ( ( unsigned int ) * ( unsigned __int8 * ) ( @@a1@@ + Number ) + Number ) ) ; gen_helper_vfp_set_fpscr ( cpu_env , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) @@v7@@ = Number ; @@v10@@ = load_cpu_offset ( Number ) ; tcg_gen_ori_i32 ( @@v10@@ , @@v10@@ , @@v7@@ ) ; store_cpu_offset ( @@v10@@ , Number ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } } result = Number L ; } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}]}"
] |
{"name": "trans_VSEL", "code": "__int64 __fastcall trans_VSEL ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int v3 ; int v4 ; bool @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 v13 ; __int64 v14 ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; __int64 @@v18@@ ; __int64 @@v19@@ ; __int64 @@v20@@ ; __int64 @@v21@@ ; __int64 v22 ; __int64 v23 ; @@v5@@ = @@a2@@ [ Number ] != Number ; if ( ! isar_feature_aa32_vsel ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v5@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) ( * ( ( _BYTE * ) @@a2@@ + Number ) | * ( ( _BYTE * ) @@a2@@ + Number ) ) | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( @@v5@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v6@@ = @@a2@@ [ Number ] ; @@v7@@ = @@a2@@ [ Number ] ; @@v8@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v5@@ ) { @@v15@@ = tcg_const_i64 ( Number L ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = tcg_temp_new_i64 ( ) ; @@v18@@ = tcg_temp_new_i64 ( ) ; @@v19@@ = tcg_temp_new_i64 ( ) ; @@v20@@ = tcg_temp_new_i64 ( ) ; @@v21@@ = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( @@v19@@ , cpu_ZF ) ; tcg_gen_ext_i32_i64 ( @@v20@@ , cpu_NF ) ; tcg_gen_ext_i32_i64 ( @@v21@@ , cpu_VF ) ; neon_load_reg64 ( @@v16@@ , @@v7@@ ) ; neon_load_reg64 ( @@v17@@ , @@v8@@ ) ; v3 = * @@a2@@ ; if ( * @@a2@@ == Number ) { tcg_gen_movcond_i64 ( Number L , @@v18@@ , @@v19@@ , @@v15@@ , @@v16@@ , @@v17@@ ) ; v23 = tcg_temp_new_i64 ( ) ; tcg_gen_xor_i64 ( v23 , @@v21@@ , @@v20@@ ) ; tcg_gen_movcond_i64 ( Number L , @@v18@@ , v23 , @@v15@@ , @@v18@@ , @@v17@@ ) ; tcg_temp_free_i64 ( v23 ) ; } else if ( v3 <= Number ) { if ( v3 == Number ) { v22 = tcg_temp_new_i64 ( ) ; tcg_gen_xor_i64 ( v22 , @@v21@@ , @@v20@@ ) ; tcg_gen_movcond_i64 ( Number L , @@v18@@ , v22 , @@v15@@ , @@v16@@ , @@v17@@ ) ; tcg_temp_free_i64 ( v22 ) ; } else if ( v3 ) { if ( v3 == Number ) tcg_gen_movcond_i64 ( Number L , @@v18@@ , @@v21@@ , @@v15@@ , @@v16@@ , @@v17@@ ) ; } else { tcg_gen_movcond_i64 ( Number L , @@v18@@ , @@v19@@ , @@v15@@ , @@v16@@ , @@v17@@ ) ; } } neon_store_reg64 ( @@v18@@ , @@v6@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_i64 ( @@v17@@ ) ; tcg_temp_free_i64 ( @@v18@@ ) ; tcg_temp_free_i64 ( @@v19@@ ) ; tcg_temp_free_i64 ( @@v20@@ ) ; tcg_temp_free_i64 ( @@v21@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; } else { @@v9@@ = tcg_const_i32 ( Number L ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; @@v11@@ = tcg_temp_new_i32 ( ) ; @@v12@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v10@@ , @@v7@@ ) ; neon_load_reg32 ( @@v11@@ , @@v8@@ ) ; v4 = * @@a2@@ ; if ( * @@a2@@ == Number ) { tcg_gen_movcond_i32 ( Number L , @@v12@@ , cpu_ZF , @@v9@@ , @@v10@@ , @@v11@@ ) ; v14 = tcg_temp_new_i32 ( ) ; tcg_gen_xor_i32 ( v14 , cpu_VF , cpu_NF ) ; tcg_gen_movcond_i32 ( Number L , @@v12@@ , v14 , @@v9@@ , @@v12@@ , @@v11@@ ) ; tcg_temp_free_i32 ( v14 ) ; } else if ( v4 <= Number ) { if ( v4 == Number ) { v13 = tcg_temp_new_i32 ( ) ; tcg_gen_xor_i32 ( v13 , cpu_VF , cpu_NF ) ; tcg_gen_movcond_i32 ( Number L , @@v12@@ , v13 , @@v9@@ , @@v10@@ , @@v11@@ ) ; tcg_temp_free_i32 ( v13 ) ; } else if ( v4 ) { if ( v4 == Number ) tcg_gen_movcond_i32 ( Number L , @@v12@@ , cpu_VF , @@v9@@ , @@v10@@ , @@v11@@ ) ; } else { tcg_gen_movcond_i32 ( Number L , @@v12@@ , cpu_ZF , @@v9@@ , @@v10@@ , @@v11@@ ) ; } } neon_store_reg32 ( @@v12@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s104"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s132"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s136"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s140"}, {"n": "v5", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s141"}, {"n": "v21", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v20", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v19", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "v18", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s40"}, {"n": "v17", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s48"}, {"n": "v16", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s56"}, {"n": "v15", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s64"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s80"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s88"}, {"n": "v10", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s96"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VSEL"}, "location": "r64"}, {"n": "zero_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s104"}, {"n": "rm", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s132"}, {"n": "rn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s136"}, {"n": "rd", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s140"}, {"n": "dp", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s141"}, {"n": "vf", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s16"}, {"n": "nf", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s24"}, {"n": "zf_0", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s32"}, {"n": "dest", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s40"}, {"n": "frm", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s48"}, {"n": "frn", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s56"}, {"n": "zero", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s64"}, {"n": "dest_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s80"}, {"n": "frm_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s88"}, {"n": "frn_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s96"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 772 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_fpdp\", \"code\": \"bool __fastcall isar_feature_aa32_fpdp ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_vsel\", \"code\": \"bool __fastcall isar_feature_aa32_vsel ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_gen_xor_i32\", \"code\": \"__int64 __fastcall tcg_gen_xor_i32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i32 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"tcg_gen_xor_i64\", \"code\": \"__int64 __fastcall tcg_gen_xor_i64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { return tcg_gen_op3_i64 ( Number , @@a1@@ , @@a2@@ , @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg64\", \"code\": \"__int64 __fastcall neon_load_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg64\", \"code\": \"__int64 __fastcall neon_store_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VMINMAXNM", "code": "__int64 __fastcall trans_VMINMAXNM ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { bool @@v3@@ ; bool @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 @@v13@@ ; __int64 @@v14@@ ; @@v3@@ = * @@a2@@ != Number ; @@v4@@ = @@a2@@ [ Number ] != Number ; if ( ! isar_feature_aa32_vminmaxnm ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v3@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) ( * ( ( _BYTE * ) @@a2@@ + Number ) | * ( ( _BYTE * ) @@a2@@ + Number ) ) | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( @@v3@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v5@@ = @@a2@@ [ Number ] ; @@v6@@ = @@a2@@ [ Number ] ; @@v7@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v8@@ = get_fpstatus_ptr ( Number ) ; if ( @@v3@@ ) { @@v12@@ = tcg_temp_new_i64 ( ) ; @@v13@@ = tcg_temp_new_i64 ( ) ; @@v14@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v12@@ , @@v6@@ ) ; neon_load_reg64 ( @@v13@@ , @@v7@@ ) ; if ( @@v4@@ ) gen_helper_vfp_minnumd ( @@v14@@ , @@v12@@ , @@v13@@ , @@v8@@ ) ; else gen_helper_vfp_maxnumd ( @@v14@@ , @@v12@@ , @@v13@@ , @@v8@@ ) ; neon_store_reg64 ( @@v14@@ , @@v5@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } else { @@v9@@ = tcg_temp_new_i32 ( ) ; @@v10@@ = tcg_temp_new_i32 ( ) ; @@v11@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v9@@ , @@v6@@ ) ; neon_load_reg32 ( @@v10@@ , @@v7@@ ) ; if ( @@v4@@ ) gen_helper_vfp_minnums ( @@v11@@ , @@v9@@ , @@v10@@ , @@v8@@ ) ; else gen_helper_vfp_maxnums ( @@v11@@ , @@v9@@ , @@v10@@ , @@v8@@ ) ; neon_store_reg32 ( @@v11@@ , @@v5@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } tcg_temp_free_ptr ( @@v8@@ ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v13", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "v10", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s40"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s48"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s56"}, {"n": "v14", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s84"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s88"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s92"}, {"n": "v4", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s93"}, {"n": "v3", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s94"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMINMAXNM"}, "location": "r64"}, {"n": "frm", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s16"}, {"n": "frn", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s24"}, {"n": "dest_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s32"}, {"n": "frm_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s40"}, {"n": "frn_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s48"}, {"n": "fpst", "t": {"T": 3, "t": "TCGv_ptr_d"}, "location": "s56"}, {"n": "dest", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}, {"n": "rm", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s84"}, {"n": "rn", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s88"}, {"n": "rd", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s92"}, {"n": "vmin", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s93"}, {"n": "dp", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s94"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 773 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_fpdp\", \"code\": \"bool __fastcall isar_feature_aa32_fpdp ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_vminmaxnm\", \"code\": \"bool __fastcall isar_feature_aa32_vminmaxnm ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_ptr\", \"code\": \"__int64 __fastcall tcg_temp_free_ptr ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_ptr_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_maxnums\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_maxnums ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_maxnums , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_maxnumd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_maxnumd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_maxnumd , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_minnums\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_minnums ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_minnums , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_minnumd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_minnumd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_minnumd , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"get_fpstatus_ptr\", \"code\": \"__int64 __fastcall get_fpstatus_ptr ( int @@a1@@ ) { int @@v2@@ ; __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_ptr ( ) ; if ( @@a1@@ ) @@v2@@ = Number ; else @@v2@@ = Number ; tcg_gen_addi_ptr ( @@v3@@ , cpu_env , @@v2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg64\", \"code\": \"__int64 __fastcall neon_load_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg64\", \"code\": \"__int64 __fastcall neon_store_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VRINT", "code": "__int64 __fastcall trans_VRINT ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { unsigned int @@v3@@ ; bool @@v4@@ ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 @@v13@@ ; @@v4@@ = * @@a2@@ != Number ; @@v5@@ = fp_decode_rm [ @@a2@@ [ Number ] ] ; if ( ! isar_feature_aa32_vrint ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a2@@ [ Number ] | ( unsigned __int8 ) @@a2@@ [ Number ] ) & Number ) != Number ) { return Number L ; } if ( @@v4@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v6@@ = @@a2@@ [ Number ] ; @@v7@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v8@@ = get_fpstatus_ptr ( Number ) ; @@v3@@ = arm_rmode_to_sf ( @@v5@@ ) ; @@v9@@ = tcg_const_i32 ( @@v3@@ ) ; gen_helper_set_rmode ( @@v9@@ , @@v9@@ , @@v8@@ ) ; if ( @@v4@@ ) { @@v12@@ = tcg_temp_new_i64 ( ) ; @@v13@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v12@@ , @@v7@@ ) ; gen_helper_rintd ( @@v13@@ , @@v12@@ , @@v8@@ ) ; neon_store_reg64 ( @@v13@@ , @@v6@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; tcg_temp_free_i64 ( @@v13@@ ) ; } else { @@v10@@ = tcg_temp_new_i32 ( ) ; @@v11@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v10@@ , @@v7@@ ) ; gen_helper_rints ( @@v11@@ , @@v10@@ , @@v8@@ ) ; neon_store_reg32 ( @@v11@@ , @@v6@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; } gen_helper_set_rmode ( @@v9@@ , @@v9@@ , @@v8@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; tcg_temp_free_ptr ( @@v8@@ ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v10", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s40"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s48"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s76"}, {"n": "v13", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s80"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s84"}, {"n": "v4", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s85"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VRINT"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "tcg_op", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s16"}, {"n": "tcg_res_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s24"}, {"n": "tcg_op_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s32"}, {"n": "tcg_rmode", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s40"}, {"n": "fpst", "t": {"T": 3, "t": "TCGv_ptr_d"}, "location": "s48"}, {"n": "rm", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s76"}, {"n": "tcg_res", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}, {"n": "rd", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s80"}, {"n": "rounding", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s84"}, {"n": "dp", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s85"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 774 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_fpdp\", \"code\": \"bool __fastcall isar_feature_aa32_fpdp ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_vrint\", \"code\": \"bool __fastcall isar_feature_aa32_vrint ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_ptr\", \"code\": \"__int64 __fastcall tcg_temp_free_ptr ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_ptr_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_set_rmode\", \"code\": \"unsigned __int64 __fastcall gen_helper_set_rmode ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v6@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v3@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_set_rmode , @@v3@@ , Number L , @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_rints\", \"code\": \"unsigned __int64 __fastcall gen_helper_rints ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v6@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v3@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_rints , @@v3@@ , Number L , @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_rintd\", \"code\": \"unsigned __int64 __fastcall gen_helper_rintd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v6@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v3@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_rintd , @@v3@@ , Number L , @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"get_fpstatus_ptr\", \"code\": \"__int64 __fastcall get_fpstatus_ptr ( int @@a1@@ ) { int @@v2@@ ; __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_ptr ( ) ; if ( @@a1@@ ) @@v2@@ = Number ; else @@v2@@ = Number ; tcg_gen_addi_ptr ( @@v3@@ , cpu_env , @@v2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg64\", \"code\": \"__int64 __fastcall neon_load_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg64\", \"code\": \"__int64 __fastcall neon_store_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VCVT", "code": "__int64 __fastcall trans_VCVT ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { unsigned int @@v3@@ ; bool @@v4@@ ; bool @@v5@@ ; unsigned int @@v6@@ ; unsigned int @@v7@@ ; unsigned int @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; __int64 @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; @@v4@@ = * @@a2@@ != Number ; @@v6@@ = fp_decode_rm [ @@a2@@ [ Number ] ] ; @@v5@@ = @@a2@@ [ Number ] != Number ; if ( ! isar_feature_aa32_vcvt_dr ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( @@v4@@ && ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; @@v7@@ = @@a2@@ [ Number ] ; @@v8@@ = @@a2@@ [ Number ] ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v9@@ = get_fpstatus_ptr ( Number ) ; @@v10@@ = tcg_const_i32 ( Number L ) ; @@v3@@ = arm_rmode_to_sf ( @@v6@@ ) ; @@v11@@ = tcg_const_i32 ( @@v3@@ ) ; gen_helper_set_rmode ( @@v11@@ , @@v11@@ , @@v9@@ ) ; if ( @@v4@@ ) { @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; neon_load_reg64 ( @@v14@@ , @@v8@@ ) ; if ( @@v5@@ ) gen_helper_vfp_tosld ( @@v15@@ , @@v14@@ , @@v10@@ , @@v9@@ ) ; else gen_helper_vfp_tould ( @@v15@@ , @@v14@@ , @@v10@@ , @@v9@@ ) ; tcg_gen_extrl_i64_i32 ( @@v16@@ , @@v15@@ ) ; neon_store_reg32 ( @@v16@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v14@@ ) ; } else { @@v12@@ = tcg_temp_new_i32 ( ) ; @@v13@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v12@@ , @@v8@@ ) ; if ( @@v5@@ ) gen_helper_vfp_tosls ( @@v13@@ , @@v12@@ , @@v10@@ , @@v9@@ ) ; else gen_helper_vfp_touls ( @@v13@@ , @@v12@@ , @@v10@@ , @@v9@@ ) ; neon_store_reg32 ( @@v13@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v13@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; } gen_helper_set_rmode ( @@v11@@ , @@v11@@ , @@v9@@ ) ; tcg_temp_free_i32 ( @@v11@@ ) ; tcg_temp_free_i32 ( @@v10@@ ) ; tcg_temp_free_ptr ( @@v9@@ ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s100"}, {"n": "v5", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s101"}, {"n": "v4", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s102"}, {"n": "v15", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v14", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v13", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s40"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s48"}, {"n": "v10", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s56"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s64"}, {"n": "v16", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}, {"n": "v8", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s92"}, {"n": "v7", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s96"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VCVT"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r8"}, {"n": "rounding", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s100"}, {"n": "is_signed", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s101"}, {"n": "dp", "t": {"T": 1, "n": "bool", "s": 1}, "location": "s102"}, {"n": "tcg_res", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s16"}, {"n": "tcg_double", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s24"}, {"n": "tcg_res_0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s32"}, {"n": "tcg_single", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s40"}, {"n": "tcg_rmode", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s48"}, {"n": "tcg_shift", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s56"}, {"n": "fpst", "t": {"T": 3, "t": "TCGv_ptr_d"}, "location": "s64"}, {"n": "tcg_tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}, {"n": "rm", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s92"}, {"n": "rd", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s96"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 775 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_fpdp\", \"code\": \"bool __fastcall isar_feature_aa32_fpdp ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_vcvt_dr\", \"code\": \"bool __fastcall isar_feature_aa32_vcvt_dr ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_ptr\", \"code\": \"__int64 __fastcall tcg_temp_free_ptr ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_ptr_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_tosls\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_tosls ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_tosls , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_touls\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_touls ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_touls , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_tosld\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_tosld ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_tosld , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_tould\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_tould ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_tould , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_set_rmode\", \"code\": \"unsigned __int64 __fastcall gen_helper_set_rmode ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; __int64 @@v6@@ [ Number ] ; unsigned __int64 @@v7@@ ; @@v7@@ = __readfsqword ( Number ) ; @@v6@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v6@@ [ Number ] = tcgv_ptr_temp ( @@a3@@ ) ; @@v3@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_set_rmode , @@v3@@ , Number L , @@v6@@ ) ; return __readfsqword ( Number ) ^ @@v7@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"get_fpstatus_ptr\", \"code\": \"__int64 __fastcall get_fpstatus_ptr ( int @@a1@@ ) { int @@v2@@ ; __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_ptr ( ) ; if ( @@a1@@ ) @@v2@@ = Number ; else @@v2@@ = Number ; tcg_gen_addi_ptr ( @@v3@@ , cpu_env , @@v2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg64\", \"code\": \"__int64 __fastcall neon_load_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VMOV_to_gp", "code": "__int64 __fastcall trans_VMOV_to_gp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int @@v3@@ ; unsigned int v4 ; unsigned int v5 ; int @@v6@@ ; __int64 @@v7@@ ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; v4 = * @@a2@@ << @@a2@@ [ Number ] ; @@v6@@ = extract32 ( v4 , Number , Number ) ; v5 = Number * extract32 ( v4 , Number , Number ) ; if ( @@a2@@ [ Number ] != Number && ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v7@@ = neon_load_reg ( @@a2@@ [ Number ] , @@v6@@ ) ; @@v3@@ = @@a2@@ [ Number ] ; if ( @@v3@@ != Number && @@v3@@ <= Number ) { if ( @@v3@@ ) { if ( @@v3@@ == Number ) { if ( @@a2@@ [ Number ] ) { if ( v5 ) tcg_gen_shri_i32 ( @@v7@@ , @@v7@@ , Number L ) ; else tcg_gen_ext16u_i32 ( @@v7@@ , @@v7@@ ) ; } else if ( v5 ) { tcg_gen_sari_i32 ( @@v7@@ , @@v7@@ , Number L ) ; } else { tcg_gen_ext16s_i32 ( @@v7@@ , @@v7@@ ) ; } } } else { if ( v5 ) tcg_gen_shri_i32 ( @@v7@@ , @@v7@@ , v5 ) ; if ( @@a2@@ [ Number ] ) tcg_gen_ext8u_i32 ( @@v7@@ , @@v7@@ ) ; else tcg_gen_ext8s_i32 ( @@v7@@ , @@v7@@ ) ; } } store_reg ( @@a1@@ , @@a2@@ [ Number ] , @@v7@@ ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMOV_to_gp"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "pass", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s20"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 776 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"arm_dc_feature\", \"code\": \"_BOOL8 __fastcall arm_dc_feature ( __int64 @@a1@@ , char @@a2@@ ) { return ( ( * ( _QWORD * ) ( @@a1@@ + Number ) >> @@a2@@ ) & Number L ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_shr\", \"code\": \"__int64 __fastcall gen_shr ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; @@v5@@ = tcg_temp_new_i32 ( ) ; tcg_gen_andi_i32 ( @@v5@@ , @@a3@@ , Number L ) ; @@v6@@ = tcg_const_i32 ( Number L ) ; @@v7@@ = tcg_const_i32 ( Number L ) ; tcg_gen_movcond_i32 ( Number L , @@v6@@ , @@v5@@ , @@v7@@ , @@v6@@ , @@a2@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; tcg_gen_andi_i32 ( @@v5@@ , @@v5@@ , Number L ) ; tcg_gen_shr_i32 ( @@a1@@ , @@v6@@ , @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return tcg_temp_free_i32 ( @@v5@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_sar\", \"code\": \"__int64 __fastcall gen_sar ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ ) { __int64 @@v5@@ ; __int64 @@v6@@ ; @@v5@@ = tcg_temp_new_i32 ( ) ; tcg_gen_andi_i32 ( @@v5@@ , @@a3@@ , Number L ) ; @@v6@@ = tcg_const_i32 ( Number L ) ; tcg_gen_movcond_i32 ( Number L , @@v5@@ , @@v5@@ , @@v6@@ , @@v6@@ , @@v5@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; tcg_gen_sar_i32 ( @@a1@@ , @@a2@@ , @@v5@@ ) ; return tcg_temp_free_i32 ( @@v5@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VMOV_from_gp", "code": "__int64 __fastcall trans_VMOV_from_gp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int @@v3@@ ; unsigned int v4 ; unsigned int v5 ; int @@v6@@ ; __int64 @@v7@@ ; __int64 v8 ; __int64 v9 ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; v4 = * @@a2@@ << @@a2@@ [ Number ] ; @@v6@@ = extract32 ( v4 , Number , Number ) ; v5 = Number * extract32 ( v4 , Number , Number ) ; if ( @@a2@@ [ Number ] != Number && ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v7@@ = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; @@v3@@ = @@a2@@ [ Number ] ; if ( @@v3@@ != Number && @@v3@@ <= Number ) { if ( @@v3@@ ) { if ( @@v3@@ == Number ) { v9 = neon_load_reg ( @@a2@@ [ Number ] , @@v6@@ ) ; tcg_gen_deposit_i32 ( @@v7@@ , v9 , @@v7@@ , v5 , Number L ) ; tcg_temp_free_i32 ( v9 ) ; } } else { v8 = neon_load_reg ( @@a2@@ [ Number ] , @@v6@@ ) ; tcg_gen_deposit_i32 ( @@v7@@ , v8 , @@v7@@ , v5 , Number L ) ; tcg_temp_free_i32 ( v8 ) ; } } neon_store_reg ( @@a2@@ [ Number ] , @@v6@@ , @@v7@@ ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMOV_from_gp"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s16"}, {"n": "pass", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s28"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 777 |
[
"{\"name\": \"extract32\", \"code\": \"__int64 __fastcall extract32 ( unsigned int @@a1@@ , int @@a2@@ , int @@a3@@ ) { if ( @@a2@@ < Number || @@a3@@ <= Number || @@a3@@ > Number - @@a2@@ ) _assert_fail ( String , String , Number , String ) ; return ( @@a1@@ >> @@a2@@ ) & ( Number >> ( Number - @@a3@@ ) ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"arm_dc_feature\", \"code\": \"_BOOL8 __fastcall arm_dc_feature ( __int64 @@a1@@ , char @@a2@@ ) { return ( ( * ( _QWORD * ) ( @@a1@@ + Number ) >> @@a2@@ ) & Number L ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VDUP", "code": "__int64 __fastcall trans_VDUP ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int v3 ; unsigned int v4 ; unsigned int @@v5@@ ; unsigned int @@v6@@ ; __int64 @@v7@@ ; if ( ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( * @@a2@@ && @@a2@@ [ Number ] ) return Number L ; if ( @@a2@@ [ Number ] && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( @@a2@@ [ Number ] ) v3 = Number ; else v3 = Number ; @@v6@@ = v3 ; if ( * @@a2@@ ) { @@v5@@ = Number ; } else if ( @@a2@@ [ Number ] ) { @@v5@@ = Number ; } else { @@v5@@ = Number ; } if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) == Number ) { @@v7@@ = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; v4 = neon_reg_offset ( @@a2@@ [ Number ] , Number ) ; tcg_gen_gvec_dup_i32 ( @@v5@@ , v4 , @@v6@@ , @@v6@@ , @@v7@@ ) ; tcg_temp_free_i32 ( @@v7@@ ) ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v6", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VDUP"}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s24"}, {"n": "vec_size", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "size", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s40"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 778 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"arm_dc_feature\", \"code\": \"_BOOL8 __fastcall arm_dc_feature ( __int64 @@a1@@ , char @@a2@@ ) { return ( ( * ( _QWORD * ) ( @@a1@@ + Number ) >> @@a2@@ ) & Number L ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_reg_offset\", \"code\": \"__int64 __fastcall neon_reg_offset ( int @@a1@@ , int @@a2@@ ) { return vfp_reg_offset ( Number , Number * @@a1@@ + @@a2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VMSR_VMRS", "code": "__int64 __fastcall trans_VMSR_VMRS ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int @@v3@@ ; char @@v4@@ ; __int64 v5 ; __int64 v6 ; __int64 v7 ; __int64 v8 ; @@v4@@ = Number ; if ( arm_dc_feature ( @@a1@@ , Number ) && @@a2@@ [ Number ] == Number && ( ! * @@a2@@ || @@a2@@ [ Number ] != Number ) ) return Number L ; switch ( @@a2@@ [ Number ] ) { case Number : if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) || ! arm_dc_feature ( @@a1@@ , Number ) ) { @@v4@@ = Number ; goto LABEL_26 ; } return Number L ; case Number : goto LABEL_26 ; case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) || ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; @@v4@@ = Number ; goto LABEL_26 ; case Number : case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) || ! arm_dc_feature ( @@a1@@ , Number ) ) return Number L ; @@v4@@ = Number ; goto LABEL_26 ; case Number : if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) return Number L ; @@v4@@ = Number ; LABEL_26 : if ( ( unsigned __int8 ) full_vfp_access_check ( @@a1@@ , @@v4@@ ) != Number ) return Number L ; if ( * @@a2@@ ) { @@v3@@ = @@a2@@ [ Number ] ; if ( @@v3@@ <= Number ) { if ( @@v3@@ >= Number || ! @@v3@@ ) { v5 = load_cpu_offset ( Number * ( @@a2@@ [ Number ] + Number ) ) ; goto LABEL_39 ; } if ( @@v3@@ == Number ) { if ( @@a2@@ [ Number ] == Number ) { v5 = load_cpu_offset ( Number ) ; tcg_gen_andi_i32 ( v5 , v5 , Number L ) ; } else { v5 = tcg_temp_new_i32 ( ) ; gen_helper_vfp_get_fpscr ( v5 , cpu_env ) ; } goto LABEL_39 ; } } g_assertion_message_expr ( Number L , String , Number L , String , Number L ) ; LABEL_39 : if ( @@a2@@ [ Number ] == Number ) { gen_set_cpsr ( v5 , Number ) ; tcg_temp_free_i32 ( v5 ) ; } else { store_reg ( @@a1@@ , @@a2@@ [ Number ] , v5 ) ; } return Number L ; } switch ( @@a2@@ [ Number ] ) { case Number : case Number : case Number : case Number : return Number L ; case Number : v6 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; gen_helper_vfp_set_fpscr ( cpu_env , v6 ) ; tcg_temp_free_i32 ( v6 ) ; gen_lookup_tb ( @@a1@@ ) ; break ; case Number : v7 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; tcg_gen_andi_i32 ( v7 , v7 , Number ) ; store_cpu_offset ( v7 , Number * ( @@a2@@ [ Number ] + Number ) ) ; gen_lookup_tb ( @@a1@@ ) ; break ; case Number : case Number : v8 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; store_cpu_offset ( v8 , Number * ( @@a2@@ [ Number ] + Number ) ) ; break ; default : g_assertion_message_expr ( Number L , String , Number L , String , Number L ) ; break ; } return Number L ; case Number : case Number : if ( ! * ( _DWORD * ) ( @@a1@@ + Number ) && ! arm_dc_feature ( @@a1@@ , Number ) ) goto LABEL_26 ; return Number L ; default : return Number L ; } }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "v4", "t": {"T": 1, "n": "char", "s": 1}, "location": "s9"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMSR_VMRS"}, "location": "r64"}, {"n": "v3", "t": {"T": 1, "n": "int", "s": 4}, "location": "r8"}, {"n": "ignore_vfp_enabled", "t": {"T": 1, "n": "char", "s": 1}, "location": "s9"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 779 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_get_fpscr\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_get_fpscr ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_ptr_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_get_fpscr , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_set_fpscr\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_set_fpscr ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_vfp_set_fpscr , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"arm_dc_feature\", \"code\": \"_BOOL8 __fastcall arm_dc_feature ( __int64 @@a1@@ , char @@a2@@ ) { return ( ( * ( _QWORD * ) ( @@a1@@ + Number ) >> @@a2@@ ) & Number L ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}",
"{\"name\": \"load_cpu_offset\", \"code\": \"__int64 __fastcall load_cpu_offset ( int @@a1@@ ) { __int64 @@v2@@ ; @@v2@@ = tcg_temp_new_i32 ( ) ; tcg_gen_ld_i32 ( @@v2@@ , cpu_env , @@a1@@ ) ; return @@v2@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_cpu_offset\", \"code\": \"__int64 __fastcall store_cpu_offset ( __int64 @@a1@@ , int @@a2@@ ) { tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@a2@@ ) ; return tcg_temp_free_i32 ( @@a1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_set_cpsr\", \"code\": \"__int64 __fastcall gen_set_cpsr ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_cpsr_write ( cpu_env , @@a1@@ , @@v3@@ ) ; return tcg_temp_free_i32 ( @@v3@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_lookup_tb\", \"code\": \"__int64 __fastcall gen_lookup_tb ( __int64 @@a1@@ ) { __int64 @@result@@ ; tcg_gen_movi_i32 ( qword_4BEB8 , * ( _QWORD * ) ( @@a1@@ + Number ) ) ; @@result@@ = @@a1@@ ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; return @@result@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"result\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"full_vfp_access_check\", \"code\": \"__int64 __fastcall full_vfp_access_check ( __int64 @@a1@@ , char @@a2@@ ) { unsigned int v2 ; unsigned int v3 ; unsigned int v4 ; unsigned int v5 ; __int64 result ; unsigned int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; __int64 @@v10@@ ; if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) { if ( arm_dc_feature ( @@a1@@ , Number ) ) { v2 = * ( _DWORD * ) ( @@a1@@ + Number ) ; v3 = syn_uncategorized ( ) ; gen_exception_insn ( @@a1@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , Number , v3 , v2 ) ; } else { v4 = * ( _DWORD * ) ( @@a1@@ + Number ) ; v5 = syn_fp_access_trap ( Number , Number , Number ) ; gen_exception_insn ( @@a1@@ , * ( _QWORD * ) ( @@a1@@ + Number ) , Number , v5 , v4 ) ; } result = Number L ; } else if ( * ( _BYTE * ) ( @@a1@@ + Number ) != Number && @@a2@@ != Number ) { if ( arm_dc_feature ( @@a1@@ , Number ) ) _assert_fail ( String , String , Number , String ) ; unallocated_encoding ( @@a1@@ ) ; result = Number L ; } else { if ( arm_dc_feature ( @@a1@@ , Number ) ) { if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { if ( ( tb_cflags ( * ( _QWORD * ) @@a1@@ ) & Number ) != Number ) gen_io_start ( ) ; gen_helper_v7m_preserve_fp_state ( cpu_env ) ; if ( ( tb_cflags ( * ( _QWORD * ) @@a1@@ ) & Number ) != Number ) gen_io_end ( ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { @@v8@@ = load_cpu_offset ( Number ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) tcg_gen_ori_i32 ( @@v8@@ , @@v8@@ , Number L ) ; else tcg_gen_andi_i32 ( @@v8@@ , @@v8@@ , Number L ) ; store_cpu_offset ( @@v8@@ , Number ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) { @@v7@@ = Number ; @@v9@@ = load_cpu_offset ( Number * ( ( unsigned int ) * ( unsigned __int8 * ) ( @@a1@@ + Number ) + Number ) ) ; gen_helper_vfp_set_fpscr ( cpu_env , @@v9@@ ) ; tcg_temp_free_i32 ( @@v9@@ ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) ) @@v7@@ = Number ; @@v10@@ = load_cpu_offset ( Number ) ; tcg_gen_ori_i32 ( @@v10@@ , @@v10@@ , @@v7@@ ) ; store_cpu_offset ( @@v10@@ , Number ) ; * ( _BYTE * ) ( @@a1@@ + Number ) = Number ; } } result = Number L ; } return result ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}, {\"n\": \"v10\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s40\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"s44\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VMOV_single", "code": "__int64 __fastcall trans_VMOV_single ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 v3 ; __int64 v4 ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( * @@a2@@ ) { v3 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v3 , @@a2@@ [ Number ] ) ; if ( @@a2@@ [ Number ] == Number ) { gen_set_cpsr ( v3 , Number ) ; tcg_temp_free_i32 ( v3 ) ; } else { store_reg ( @@a1@@ , @@a2@@ [ Number ] , v3 ) ; } } else { v4 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v4 , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( v4 ) ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMOV_single"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 780 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_set_cpsr\", \"code\": \"__int64 __fastcall gen_set_cpsr ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_const_i32 ( @@a2@@ ) ; gen_helper_cpsr_write ( cpu_env , @@a1@@ , @@v3@@ ) ; return tcg_temp_free_i32 ( @@v3@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VMOV_64_sp", "code": "__int64 __fastcall trans_VMOV_64_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 v3 ; __int64 v4 ; __int64 v5 ; __int64 v6 ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( * @@a2@@ ) { v3 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v3 , @@a2@@ [ Number ] ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , v3 ) ; v4 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v4 , @@a2@@ [ Number ] + Number ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , v4 ) ; } else { v5 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v5 , @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( v5 ) ; v6 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v6 , @@a2@@ [ Number ] + Number ) ; tcg_temp_free_i32 ( v6 ) ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMOV_64_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 781 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VMOV_64_dp", "code": "__int64 __fastcall trans_VMOV_64_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { __int64 v3 ; __int64 v4 ; __int64 v5 ; __int64 v6 ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( * @@a2@@ ) { v3 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v3 , Number * @@a2@@ [ Number ] ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , v3 ) ; v4 = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( v4 , Number * @@a2@@ [ Number ] + Number ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , v4 ) ; } else { v5 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v5 , Number * @@a2@@ [ Number ] ) ; tcg_temp_free_i32 ( v5 ) ; v6 = load_reg ( @@a1@@ , @@a2@@ [ Number ] ) ; neon_store_reg32 ( v6 , Number * @@a2@@ [ Number ] + Number ) ; tcg_temp_free_i32 ( v6 ) ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMOV_64_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 782 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VLDR_VSTR_sp", "code": "__int64 __fastcall trans_VLDR_VSTR_sp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int v3 ; int v4 ; unsigned int @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v5@@ = Number * * @@a2@@ ; if ( ! @@a2@@ [ Number ] ) @@v5@@ = Number * * @@a2@@ ; @@v6@@ = add_reg_for_lit ( @@a1@@ , @@a2@@ [ Number ] , @@v5@@ ) ; @@v7@@ = tcg_temp_new_i32 ( ) ; if ( @@a2@@ [ Number ] ) { v3 = get_mem_index ( @@a1@@ ) ; gen_aa32_ld32u ( @@a1@@ , @@v7@@ , @@v6@@ , v3 ) ; neon_store_reg32 ( @@v7@@ , @@a2@@ [ Number ] ) ; } else { neon_load_reg32 ( @@v7@@ , @@a2@@ [ Number ] ) ; v4 = get_mem_index ( @@a1@@ ) ; gen_aa32_st32 ( @@a1@@ , @@v7@@ , @@v6@@ , v4 ) ; } tcg_temp_free_i32 ( @@v7@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s20"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VLDR_VSTR_sp"}, "location": "r64"}, {"n": "addr", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s16"}, {"n": "offset", "t": {"T": 1, "n": "int", "s": 4}, "location": "s20"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 783 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_mem_index\", \"code\": \"__int64 __fastcall get_mem_index ( __int64 @@a1@@ ) { return arm_to_core_mmu_idx ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"add_reg_for_lit\", \"code\": \"__int64 __fastcall add_reg_for_lit ( __int64 @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; __int64 @@v6@@ ; @@v6@@ = tcg_temp_new_i32 ( ) ; if ( @@a2@@ == Number ) { @@v3@@ = read_pc ( @@a1@@ ) ; tcg_gen_movi_i32 ( @@v6@@ , ( @@v3@@ & Number ) + @@a3@@ ) ; } else { tcg_gen_addi_i32 ( @@v6@@ , cpu_R [ @@a2@@ ] , @@a3@@ ) ; } return @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_aa32_ld32u\", \"code\": \"__int64 __fastcall gen_aa32_ld32u ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { return gen_aa32_ld_i32 ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ , * ( _DWORD * ) ( @@a1@@ + Number ) | Number ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_aa32_st32\", \"code\": \"__int64 __fastcall gen_aa32_st32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { return gen_aa32_st_i32 ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ , * ( _DWORD * ) ( @@a1@@ + Number ) | Number ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VLDR_VSTR_dp", "code": "__int64 __fastcall trans_VLDR_VSTR_dp ( __int64 @@a1@@ , _DWORD * @@a2@@ ) { int v3 ; int v4 ; unsigned int @@v5@@ ; __int64 @@v6@@ ; __int64 @@v7@@ ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@a2@@ [ Number ] & Number ) != Number ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v5@@ = Number * * @@a2@@ ; if ( ! @@a2@@ [ Number ] ) @@v5@@ = Number * * @@a2@@ ; @@v6@@ = add_reg_for_lit ( @@a1@@ , @@a2@@ [ Number ] , @@v5@@ ) ; @@v7@@ = tcg_temp_new_i64 ( ) ; if ( @@a2@@ [ Number ] ) { v3 = get_mem_index ( @@a1@@ ) ; gen_aa32_ld64 ( @@a1@@ , @@v7@@ , @@v6@@ , v3 ) ; neon_store_reg64 ( @@v7@@ , @@a2@@ [ Number ] ) ; } else { neon_load_reg64 ( @@v7@@ , @@a2@@ [ Number ] ) ; v4 = get_mem_index ( @@a1@@ ) ; gen_aa32_st64 ( @@a1@@ , @@v7@@ , @@v6@@ , v4 ) ; } tcg_temp_free_i64 ( @@v7@@ ) ; tcg_temp_free_i32 ( @@v6@@ ) ; return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "_DWORD"}, "location": "r64"}, {"n": "v6", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s28"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VLDR_VSTR_dp"}, "location": "r64"}, {"n": "addr", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s16"}, {"n": "offset", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 784 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_mem_index\", \"code\": \"__int64 __fastcall get_mem_index ( __int64 @@a1@@ ) { return arm_to_core_mmu_idx ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"add_reg_for_lit\", \"code\": \"__int64 __fastcall add_reg_for_lit ( __int64 @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; __int64 @@v6@@ ; @@v6@@ = tcg_temp_new_i32 ( ) ; if ( @@a2@@ == Number ) { @@v3@@ = read_pc ( @@a1@@ ) ; tcg_gen_movi_i32 ( @@v6@@ , ( @@v3@@ & Number ) + @@a3@@ ) ; } else { tcg_gen_addi_i32 ( @@v6@@ , cpu_R [ @@a2@@ ] , @@a3@@ ) ; } return @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_aa32_ld64\", \"code\": \"__int64 __fastcall gen_aa32_ld64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { return gen_aa32_ld_i64 ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ , * ( _DWORD * ) ( @@a1@@ + Number ) | Number ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_aa32_st64\", \"code\": \"__int64 __fastcall gen_aa32_st64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { return gen_aa32_st_i64 ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ , * ( _DWORD * ) ( @@a1@@ + Number ) | Number ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg64\", \"code\": \"__int64 __fastcall neon_load_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg64\", \"code\": \"__int64 __fastcall neon_store_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VLDM_VSTM_sp", "code": "__int64 __fastcall trans_VLDM_VSTM_sp ( __int64 @@a1@@ , int * @@a2@@ ) { int v3 ; int v4 ; int @@i@@ ; int @@v6@@ ; __int64 @@v7@@ ; __int64 @@v8@@ ; @@v6@@ = * @@a2@@ ; if ( ! * @@a2@@ || @@a2@@ [ Number ] + @@v6@@ > Number ) return Number L ; if ( @@a2@@ [ Number ] == Number && @@a2@@ [ Number ] ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v7@@ = add_reg_for_lit ( @@a1@@ , @@a2@@ [ Number ] , Number ) ; if ( @@a2@@ [ Number ] ) tcg_gen_addi_i32 ( @@v7@@ , @@v7@@ , ( unsigned int ) ( Number * * @@a2@@ ) ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) && @@a2@@ [ Number ] == Number && @@a2@@ [ Number ] ) gen_helper_v8m_stackcheck ( cpu_env , @@v7@@ ) ; @@v8@@ = tcg_temp_new_i32 ( ) ; for ( @@i@@ = Number ; @@i@@ < @@v6@@ ; ++ @@i@@ ) { if ( @@a2@@ [ Number ] ) { v3 = get_mem_index ( @@a1@@ ) ; gen_aa32_ld32u ( @@a1@@ , @@v8@@ , @@v7@@ , v3 ) ; neon_store_reg32 ( @@v8@@ , @@i@@ + @@a2@@ [ Number ] ) ; } else { neon_load_reg32 ( @@v8@@ , @@i@@ + @@a2@@ [ Number ] ) ; v4 = get_mem_index ( @@a1@@ ) ; gen_aa32_st32 ( @@a1@@ , @@v8@@ , @@v7@@ , v4 ) ; } tcg_gen_addi_i32 ( @@v7@@ , @@v7@@ , Number L ) ; } tcg_temp_free_i32 ( @@v8@@ ) ; if ( @@a2@@ [ Number ] ) { if ( @@a2@@ [ Number ] ) tcg_gen_addi_i32 ( @@v7@@ , @@v7@@ , ( unsigned int ) ( Number * @@v6@@ ) ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , @@v7@@ ) ; } else { tcg_temp_free_i32 ( @@v7@@ ) ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "int"}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v6", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VLDM_VSTM_sp"}, "location": "r64"}, {"n": "addr", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s16"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "s24"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 785 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_v8m_stackcheck\", \"code\": \"unsigned __int64 __fastcall gen_helper_v8m_stackcheck ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_v8m_stackcheck , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_mem_index\", \"code\": \"__int64 __fastcall get_mem_index ( __int64 @@a1@@ ) { return arm_to_core_mmu_idx ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"add_reg_for_lit\", \"code\": \"__int64 __fastcall add_reg_for_lit ( __int64 @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; __int64 @@v6@@ ; @@v6@@ = tcg_temp_new_i32 ( ) ; if ( @@a2@@ == Number ) { @@v3@@ = read_pc ( @@a1@@ ) ; tcg_gen_movi_i32 ( @@v6@@ , ( @@v3@@ & Number ) + @@a3@@ ) ; } else { tcg_gen_addi_i32 ( @@v6@@ , cpu_R [ @@a2@@ ] , @@a3@@ ) ; } return @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_aa32_ld32u\", \"code\": \"__int64 __fastcall gen_aa32_ld32u ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { return gen_aa32_ld_i32 ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ , * ( _DWORD * ) ( @@a1@@ + Number ) | Number ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_aa32_st32\", \"code\": \"__int64 __fastcall gen_aa32_st32 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { return gen_aa32_st_i32 ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ , * ( _DWORD * ) ( @@a1@@ + Number ) | Number ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "trans_VLDM_VSTM_dp", "code": "__int64 __fastcall trans_VLDM_VSTM_dp ( __int64 @@a1@@ , int * @@a2@@ ) { int v3 ; int v4 ; unsigned int @@v5@@ ; int @@i@@ ; int @@v7@@ ; __int64 @@v8@@ ; __int64 @@v9@@ ; @@v7@@ = * @@a2@@ >> Number ; if ( ! @@v7@@ || @@a2@@ [ Number ] + @@v7@@ > Number || @@v7@@ > Number ) return Number L ; if ( @@a2@@ [ Number ] == Number && @@a2@@ [ Number ] ) return Number L ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && @@a2@@ [ Number ] + @@v7@@ > Number ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; @@v8@@ = add_reg_for_lit ( @@a1@@ , @@a2@@ [ Number ] , Number ) ; if ( @@a2@@ [ Number ] ) tcg_gen_addi_i32 ( @@v8@@ , @@v8@@ , ( unsigned int ) ( Number * * @@a2@@ ) ) ; if ( * ( _BYTE * ) ( @@a1@@ + Number ) && @@a2@@ [ Number ] == Number && @@a2@@ [ Number ] ) gen_helper_v8m_stackcheck ( cpu_env , @@v8@@ ) ; @@v9@@ = tcg_temp_new_i64 ( ) ; for ( @@i@@ = Number ; @@i@@ < @@v7@@ ; ++ @@i@@ ) { if ( @@a2@@ [ Number ] ) { v3 = get_mem_index ( @@a1@@ ) ; gen_aa32_ld64 ( @@a1@@ , @@v9@@ , @@v8@@ , v3 ) ; neon_store_reg64 ( @@v9@@ , @@i@@ + @@a2@@ [ Number ] ) ; } else { neon_load_reg64 ( @@v9@@ , @@i@@ + @@a2@@ [ Number ] ) ; v4 = get_mem_index ( @@a1@@ ) ; gen_aa32_st64 ( @@a1@@ , @@v9@@ , @@v8@@ , v4 ) ; } tcg_gen_addi_i32 ( @@v8@@ , @@v8@@ , Number L ) ; } tcg_temp_free_i64 ( @@v9@@ ) ; if ( @@a2@@ [ Number ] ) { if ( @@a2@@ [ Number ] ) { @@v5@@ = Number * @@v7@@ ; } else if ( ( * @@a2@@ & Number ) != Number ) { @@v5@@ = Number ; } else { @@v5@@ = Number ; } if ( @@v5@@ ) tcg_gen_addi_i32 ( @@v8@@ , @@v8@@ , @@v5@@ ) ; store_reg ( @@a1@@ , @@a2@@ [ Number ] , @@v8@@ ) ; } else { tcg_temp_free_i32 ( @@v8@@ ) ; } return Number L ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "int"}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v7", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "s36"}, {"n": "v9", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VLDM_VSTM_dp"}, "location": "r64"}, {"n": "addr", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s16"}, {"n": "n", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "i", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "offset", "t": {"T": 1, "n": "uint32_t", "s": 4}, "location": "s36"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 786 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_v8m_stackcheck\", \"code\": \"unsigned __int64 __fastcall gen_helper_v8m_stackcheck ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v3@@ [ Number ] ; unsigned __int64 @@v4@@ ; @@v4@@ = __readfsqword ( Number ) ; @@v3@@ [ Number ] = tcgv_ptr_temp ( @@a1@@ ) ; @@v3@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; tcg_gen_callN ( & helper_v8m_stackcheck , Number L , Number L , @@v3@@ ) ; return __readfsqword ( Number ) ^ @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"get_mem_index\", \"code\": \"__int64 __fastcall get_mem_index ( __int64 @@a1@@ ) { return arm_to_core_mmu_idx ( * ( _DWORD * ) ( @@a1@@ + Number ) ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"add_reg_for_lit\", \"code\": \"__int64 __fastcall add_reg_for_lit ( __int64 @@a1@@ , int @@a2@@ , unsigned int @@a3@@ ) { int @@v3@@ ; __int64 @@v6@@ ; @@v6@@ = tcg_temp_new_i32 ( ) ; if ( @@a2@@ == Number ) { @@v3@@ = read_pc ( @@a1@@ ) ; tcg_gen_movi_i32 ( @@v6@@ , ( @@v3@@ & Number ) + @@a3@@ ) ; } else { tcg_gen_addi_i32 ( @@v6@@ , cpu_R [ @@a2@@ ] , @@a3@@ ) ; } return @@v6@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r8\"}, {\"n\": \"v6\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_aa32_ld64\", \"code\": \"__int64 __fastcall gen_aa32_ld64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { return gen_aa32_ld_i64 ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ , * ( _DWORD * ) ( @@a1@@ + Number ) | Number ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"gen_aa32_st64\", \"code\": \"__int64 __fastcall gen_aa32_st64 ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , int @@a4@@ ) { return gen_aa32_st_i64 ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ , * ( _DWORD * ) ( @@a1@@ + Number ) | Number ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg64\", \"code\": \"__int64 __fastcall neon_load_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg64\", \"code\": \"__int64 __fastcall neon_store_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}"
] |
{"name": "vfp_sreg_is_scalar", "code": "bool __fastcall vfp_sreg_is_scalar ( char @@a1@@ ) { return ( @@a1@@ & Number ) == Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "char", "s": 1}, "location": "r56"}]}
|
[{"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 787 |
[] |
{"name": "vfp_dreg_is_scalar", "code": "bool __fastcall vfp_dreg_is_scalar ( char @@a1@@ ) { return ( @@a1@@ & Number ) == Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "char", "s": 1}, "location": "r56"}]}
|
[{"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 788 |
[] |
{"name": "vfp_advance_sreg", "code": "__int64 __fastcall vfp_advance_sreg ( int @@a1@@ , char @@a2@@ ) { return ( ( _BYTE ) @@a1@@ + @@a2@@ ) & Number | @@a1@@ & Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}]}
|
[{"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "delta", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 789 |
[] |
{"name": "vfp_advance_dreg", "code": "__int64 __fastcall vfp_advance_dreg ( int @@a1@@ , char @@a2@@ ) { return ( ( _BYTE ) @@a1@@ + @@a2@@ ) & Number | @@a1@@ & Number ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "char", "s": 1}, "location": "r64"}]}
|
[{"n": "reg", "t": {"T": 1, "n": "int", "s": 4}, "location": "r56"}, {"n": "delta", "t": {"T": 1, "n": "int", "s": 4}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 790 |
[] |
{"name": "do_vfp_3op_sp", "code": "__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 9, "n": "void (__fastcall *)(__int64, __int64, __int64, __int64)"}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "char", "s": 1}, "location": "r80"}, {"n": "v16", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v15", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v14", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "v17", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "vn", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "fn", "t": {"T": 9, "n": "VFPGen3OpSPFn *"}, "location": "r64"}, {"n": "vm", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "reads_vd", "t": {"T": 1, "n": "bool", "s": 1}, "location": "r80"}, {"n": "fd", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s16"}, {"n": "f1", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s24"}, {"n": "f0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s32"}, {"n": "veclen", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "delta_d", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "delta_m", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "fpst", "t": {"T": 3, "t": "TCGv_ptr_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 791 |
[
"{\"name\": \"isar_feature_aa32_fpshvec\", \"code\": \"bool __fastcall isar_feature_aa32_fpshvec ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_ptr\", \"code\": \"__int64 __fastcall tcg_temp_free_ptr ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_ptr_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"get_fpstatus_ptr\", \"code\": \"__int64 __fastcall get_fpstatus_ptr ( int @@a1@@ ) { int @@v2@@ ; __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_ptr ( ) ; if ( @@a1@@ ) @@v2@@ = Number ; else @@v2@@ = Number ; tcg_gen_addi_ptr ( @@v3@@ , cpu_env , @@v2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"vfp_sreg_is_scalar\", \"code\": \"bool __fastcall vfp_sreg_is_scalar ( char @@a1@@ ) { return ( @@a1@@ & Number ) == Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r56\"}]}",
"{\"name\": \"vfp_advance_sreg\", \"code\": \"__int64 __fastcall vfp_advance_sreg ( int @@a1@@ , char @@a2@@ ) { return ( ( _BYTE ) @@a1@@ + @@a2@@ ) & Number | @@a1@@ & Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}"
] |
{"name": "do_vfp_3op_dp", "code": "__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 9, "n": "void (__fastcall *)(__int64, __int64, __int64, __int64)"}, "location": "r64"}, {"n": "a5", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r72"}, {"n": "a6", "t": {"T": 1, "n": "char", "s": 1}, "location": "r80"}, {"n": "v16", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v15", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s24"}, {"n": "v14", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s32"}, {"n": "v13", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "v12", "t": {"T": 1, "n": "int", "s": 4}, "location": "s64"}, {"n": "v11", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "v17", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "vn", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "fn", "t": {"T": 9, "n": "VFPGen3OpDPFn *"}, "location": "r64"}, {"n": "vm", "t": {"T": 1, "n": "int", "s": 4}, "location": "r72"}, {"n": "reads_vd", "t": {"T": 1, "n": "bool", "s": 1}, "location": "r80"}, {"n": "fd", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s16"}, {"n": "f1", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s24"}, {"n": "f0", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s32"}, {"n": "veclen", "t": {"T": 1, "n": "int", "s": 4}, "location": "s60"}, {"n": "delta_d", "t": {"T": 1, "n": "int", "s": 4}, "location": "s64"}, {"n": "delta_m", "t": {"T": 1, "n": "int", "s": 4}, "location": "s68"}, {"n": "fpst", "t": {"T": 3, "t": "TCGv_ptr_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 792 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_fpshvec\", \"code\": \"bool __fastcall isar_feature_aa32_fpshvec ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_fpdp\", \"code\": \"bool __fastcall isar_feature_aa32_fpdp ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_free_ptr\", \"code\": \"__int64 __fastcall tcg_temp_free_ptr ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_ptr_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"get_fpstatus_ptr\", \"code\": \"__int64 __fastcall get_fpstatus_ptr ( int @@a1@@ ) { int @@v2@@ ; __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_ptr ( ) ; if ( @@a1@@ ) @@v2@@ = Number ; else @@v2@@ = Number ; tcg_gen_addi_ptr ( @@v3@@ , cpu_env , @@v2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s12\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg64\", \"code\": \"__int64 __fastcall neon_load_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg64\", \"code\": \"__int64 __fastcall neon_store_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"vfp_dreg_is_scalar\", \"code\": \"bool __fastcall vfp_dreg_is_scalar ( char @@a1@@ ) { return ( @@a1@@ & Number ) == Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r56\"}]}",
"{\"name\": \"vfp_advance_dreg\", \"code\": \"__int64 __fastcall vfp_advance_dreg ( int @@a1@@ , char @@a2@@ ) { return ( ( _BYTE ) @@a1@@ + @@a2@@ ) & Number | @@a1@@ & Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}"
] |
{"name": "do_vfp_2op_sp", "code": "__int64 __fastcall do_vfp_2op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ ) { int @@v8@@ ; int @@v9@@ ; int @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; @@v8@@ = Number ; LOBYTE ( @@v9@@ ) = Number ; @@v10@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v10@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v10@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v10@@ = Number ; } else { @@v9@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a4@@ ) ) @@v8@@ = Number ; else @@v8@@ = @@v9@@ ; } } @@v11@@ = tcg_temp_new_i32 ( ) ; @@v12@@ = tcg_temp_new_i32 ( ) ; neon_load_reg32 ( @@v11@@ , @@a4@@ ) ; while ( Number ) { @@a2@@ ( @@v12@@ , @@v11@@ ) ; neon_store_reg32 ( @@v12@@ , @@a3@@ ) ; if ( ! @@v10@@ ) break ; if ( ! @@v8@@ ) { while ( @@v10@@ -- ) { @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v9@@ ) ; neon_store_reg32 ( @@v12@@ , @@a3@@ ) ; } break ; } -- @@v10@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v9@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v8@@ ) ; neon_load_reg32 ( @@v11@@ , @@a4@@ ) ; } tcg_temp_free_i32 ( @@v11@@ ) ; tcg_temp_free_i32 ( @@v12@@ ) ; return Number L ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 9, "n": "void (__fastcall *)(__int64, __int64)"}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "vm", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "fn", "t": {"T": 9, "n": "VFPGen2OpSPFn *"}, "location": "r64"}, {"n": "f0", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s16"}, {"n": "veclen", "t": {"T": 1, "n": "int", "s": 4}, "location": "s28"}, {"n": "delta_d", "t": {"T": 1, "n": "int", "s": 4}, "location": "s32"}, {"n": "delta_m", "t": {"T": 1, "n": "int", "s": 4}, "location": "s36"}, {"n": "fd", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 793 |
[
"{\"name\": \"isar_feature_aa32_fpshvec\", \"code\": \"bool __fastcall isar_feature_aa32_fpshvec ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg32\", \"code\": \"__int64 __fastcall neon_load_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg32\", \"code\": \"__int64 __fastcall neon_store_reg32 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i32 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"vfp_sreg_is_scalar\", \"code\": \"bool __fastcall vfp_sreg_is_scalar ( char @@a1@@ ) { return ( @@a1@@ & Number ) == Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r56\"}]}",
"{\"name\": \"vfp_advance_sreg\", \"code\": \"__int64 __fastcall vfp_advance_sreg ( int @@a1@@ , char @@a2@@ ) { return ( ( _BYTE ) @@a1@@ + @@a2@@ ) & Number | @@a1@@ & Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}"
] |
{"name": "do_vfp_2op_dp", "code": "__int64 __fastcall do_vfp_2op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ ) { int @@v8@@ ; int @@v9@@ ; int @@v10@@ ; __int64 @@v11@@ ; __int64 @@v12@@ ; @@v8@@ = Number ; LOBYTE ( @@v9@@ ) = Number ; @@v10@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a4@@ | ( unsigned __int8 ) @@a3@@ ) & Number ) != Number ) return Number L ; if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v10@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v10@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v10@@ = Number ; } else { @@v9@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a4@@ ) ) @@v8@@ = Number ; else @@v8@@ = @@v9@@ ; } } @@v11@@ = tcg_temp_new_i64 ( ) ; @@v12@@ = tcg_temp_new_i64 ( ) ; neon_load_reg64 ( @@v11@@ , @@a4@@ ) ; while ( Number ) { @@a2@@ ( @@v12@@ , @@v11@@ ) ; neon_store_reg64 ( @@v12@@ , @@a3@@ ) ; if ( ! @@v10@@ ) break ; if ( ! @@v8@@ ) { while ( @@v10@@ -- ) { @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v9@@ ) ; neon_store_reg64 ( @@v12@@ , @@a3@@ ) ; } break ; } -- @@v10@@ ; vfp_advance_dreg ( @@a3@@ , @@v9@@ ) ; @@a3@@ = vfp_advance_dreg ( @@a4@@ , @@v8@@ ) ; neon_load_reg64 ( @@v11@@ , @@a4@@ ) ; } tcg_temp_free_i64 ( @@v11@@ ) ; tcg_temp_free_i64 ( @@v12@@ ) ; return Number L ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "unsigned int", "s": 4}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 9, "n": "void (__fastcall *)(__int64, __int64)"}, "location": "r64"}, {"n": "v11", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s16"}, {"n": "v10", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "v9", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "v8", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "v12", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vd", "t": {"T": 1, "n": "int", "s": 4}, "location": "r16"}, {"n": "vm", "t": {"T": 1, "n": "int", "s": 4}, "location": "r24"}, {"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "fn", "t": {"T": 9, "n": "VFPGen2OpDPFn *"}, "location": "r64"}, {"n": "f0", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s16"}, {"n": "veclen", "t": {"T": 1, "n": "int", "s": 4}, "location": "s44"}, {"n": "delta_d", "t": {"T": 1, "n": "int", "s": 4}, "location": "s48"}, {"n": "delta_m", "t": {"T": 1, "n": "int", "s": 4}, "location": "s52"}, {"n": "fd", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 794 |
[
"{\"name\": \"isar_feature_aa32_fp_d32\", \"code\": \"bool __fastcall isar_feature_aa32_fp_d32 ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) > Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_fpshvec\", \"code\": \"bool __fastcall isar_feature_aa32_fpshvec ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"isar_feature_aa32_fpdp\", \"code\": \"bool __fastcall isar_feature_aa32_fpdp ( __int64 @@a1@@ ) { return extract64 ( * ( unsigned int * ) ( @@a1@@ + Number ) , Number , Number ) != Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"load_reg\", \"code\": \"__int64 __fastcall load_reg ( __int64 @@a1@@ , int @@a2@@ ) { __int64 @@v3@@ ; @@v3@@ = tcg_temp_new_i32 ( ) ; load_reg_var ( @@a1@@ , @@v3@@ , @@a2@@ ) ; return @@v3@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"store_reg\", \"code\": \"__int64 __fastcall store_reg ( __int64 @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 v3 ; if ( @@a2@@ == Number ) { if ( * ( _DWORD * ) ( @@a1@@ + Number ) ) v3 = Number L ; else v3 = Number L ; tcg_gen_andi_i32 ( @@a3@@ , @@a3@@ , v3 ) ; * ( _DWORD * ) ( @@a1@@ + Number ) = Number ; } tcg_gen_mov_i32 ( cpu_R [ @@a2@@ ] , @@a3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}]}",
"{\"name\": \"neon_load_reg\", \"code\": \"__int64 __fastcall neon_load_reg ( int @@a1@@ , int @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; @@v4@@ = tcg_temp_new_i32 ( ) ; @@v2@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_ld_i32 ( @@v4@@ , cpu_env , @@v2@@ ) ; return @@v4@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"neon_store_reg\", \"code\": \"__int64 __fastcall neon_store_reg ( int @@a1@@ , int @@a2@@ , __int64 @@a3@@ ) { __int64 @@v3@@ ; @@v3@@ = neon_reg_offset ( @@a1@@ , @@a2@@ ) ; tcg_gen_st_i32 ( @@a3@@ , cpu_env , @@v3@@ ) ; return tcg_temp_free_i32 ( @@a3@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_load_reg64\", \"code\": \"__int64 __fastcall neon_load_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_ld_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"neon_store_reg64\", \"code\": \"__int64 __fastcall neon_store_reg64 ( __int64 @@a1@@ , unsigned int @@a2@@ ) { __int64 @@v2@@ ; @@v2@@ = vfp_reg_offset ( Number , @@a2@@ ) ; return tcg_gen_st_i64 ( @@a1@@ , cpu_env , @@v2@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"vfp_access_check\", \"code\": \"__int64 __fastcall vfp_access_check ( __int64 @@a1@@ ) { return full_vfp_access_check ( @@a1@@ , Number ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}]}",
"{\"name\": \"vfp_dreg_is_scalar\", \"code\": \"bool __fastcall vfp_dreg_is_scalar ( char @@a1@@ ) { return ( @@a1@@ & Number ) == Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r56\"}]}",
"{\"name\": \"vfp_advance_dreg\", \"code\": \"__int64 __fastcall vfp_advance_dreg ( int @@a1@@ , char @@a2@@ ) { return ( ( _BYTE ) @@a1@@ + @@a2@@ ) & Number | @@a1@@ & Number ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r64\"}]}"
] |
{"name": "gen_VMLA_sp", "code": "__int64 __fastcall gen_VMLA_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ ; @@v7@@ = tcg_temp_new_i32 ( ) ; gen_helper_vfp_muls ( @@v7@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_adds ( @@a1@@ , @@a1@@ , @@v7@@ , @@a4@@ ) ; return tcg_temp_free_i32 ( @@v7@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 795 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_adds\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_adds ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_adds , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_muls\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muls ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muls , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VMLA_sp", "code": "__int64 __fastcall trans_VMLA_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VMLA_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMLA_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 796 |
[
"{\"name\": \"do_vfp_3op_sp\", \"code\": \"__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VMLA_sp\", \"code\": \"__int64 __fastcall gen_VMLA_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ ; @@v7@@ = tcg_temp_new_i32 ( ) ; gen_helper_vfp_muls ( @@v7@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_adds ( @@a1@@ , @@a1@@ , @@v7@@ , @@a4@@ ) ; return tcg_temp_free_i32 ( @@v7@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_VMLA_dp", "code": "__int64 __fastcall gen_VMLA_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ ; @@v7@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_muld ( @@v7@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_addd ( @@a1@@ , @@a1@@ , @@v7@@ , @@a4@@ ) ; return tcg_temp_free_i64 ( @@v7@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 797 |
[
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_addd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_addd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_addd , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_muld\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muld ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muld , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VMLA_dp", "code": "__int64 __fastcall trans_VMLA_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VMLA_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMLA_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 798 |
[
"{\"name\": \"do_vfp_3op_dp\", \"code\": \"__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VMLA_dp\", \"code\": \"__int64 __fastcall gen_VMLA_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ ; @@v7@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_muld ( @@v7@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_addd ( @@a1@@ , @@a1@@ , @@v7@@ , @@a4@@ ) ; return tcg_temp_free_i64 ( @@v7@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_VMLS_sp", "code": "__int64 __fastcall gen_VMLS_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ ; @@v7@@ = tcg_temp_new_i32 ( ) ; gen_helper_vfp_muls ( @@v7@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negs ( @@v7@@ , @@v7@@ ) ; gen_helper_vfp_adds ( @@a1@@ , @@a1@@ , @@v7@@ , @@a4@@ ) ; return tcg_temp_free_i32 ( @@v7@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 799 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_adds\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_adds ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_adds , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_muls\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muls ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muls , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_negs\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_negs ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_i32_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_negs , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VMLS_sp", "code": "__int64 __fastcall trans_VMLS_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VMLS_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMLS_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 800 |
[
"{\"name\": \"do_vfp_3op_sp\", \"code\": \"__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VMLS_sp\", \"code\": \"__int64 __fastcall gen_VMLS_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ ; @@v7@@ = tcg_temp_new_i32 ( ) ; gen_helper_vfp_muls ( @@v7@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negs ( @@v7@@ , @@v7@@ ) ; gen_helper_vfp_adds ( @@a1@@ , @@a1@@ , @@v7@@ , @@a4@@ ) ; return tcg_temp_free_i32 ( @@v7@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_VMLS_dp", "code": "__int64 __fastcall gen_VMLS_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ ; @@v7@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_muld ( @@v7@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negd ( @@v7@@ , @@v7@@ ) ; gen_helper_vfp_addd ( @@a1@@ , @@a1@@ , @@v7@@ , @@a4@@ ) ; return tcg_temp_free_i64 ( @@v7@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v7", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 801 |
[
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_addd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_addd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_addd , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_muld\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muld ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muld , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_negd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_negd ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_i64_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_negd , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VMLS_dp", "code": "__int64 __fastcall trans_VMLS_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VMLS_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMLS_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 802 |
[
"{\"name\": \"do_vfp_3op_dp\", \"code\": \"__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VMLS_dp\", \"code\": \"__int64 __fastcall gen_VMLS_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v7@@ ; @@v7@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_muld ( @@v7@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negd ( @@v7@@ , @@v7@@ ) ; gen_helper_vfp_addd ( @@a1@@ , @@a1@@ , @@v7@@ , @@a4@@ ) ; return tcg_temp_free_i64 ( @@v7@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v7\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_VNMLS_sp", "code": "__int64 __fastcall gen_VNMLS_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v8@@ ; @@v8@@ = tcg_temp_new_i32 ( ) ; gen_helper_vfp_muls ( @@v8@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negs ( @@a1@@ , @@a1@@ ) ; gen_helper_vfp_adds ( @@a1@@ , @@a1@@ , @@v8@@ , @@a4@@ ) ; return tcg_temp_free_i32 ( @@v8@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 803 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_adds\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_adds ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_adds , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_muls\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muls ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muls , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_negs\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_negs ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_i32_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_negs , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VNMLS_sp", "code": "__int64 __fastcall trans_VNMLS_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMLS_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VNMLS_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 804 |
[
"{\"name\": \"do_vfp_3op_sp\", \"code\": \"__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VNMLS_sp\", \"code\": \"__int64 __fastcall gen_VNMLS_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v8@@ ; @@v8@@ = tcg_temp_new_i32 ( ) ; gen_helper_vfp_muls ( @@v8@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negs ( @@a1@@ , @@a1@@ ) ; gen_helper_vfp_adds ( @@a1@@ , @@a1@@ , @@v8@@ , @@a4@@ ) ; return tcg_temp_free_i32 ( @@v8@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_VNMLS_dp", "code": "__int64 __fastcall gen_VNMLS_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v8@@ ; @@v8@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_muld ( @@v8@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negd ( @@a1@@ , @@a1@@ ) ; gen_helper_vfp_addd ( @@a1@@ , @@a1@@ , @@v8@@ , @@a4@@ ) ; return tcg_temp_free_i64 ( @@v8@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 805 |
[
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_addd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_addd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_addd , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_muld\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muld ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muld , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_negd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_negd ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_i64_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_negd , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VNMLS_dp", "code": "__int64 __fastcall trans_VNMLS_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMLS_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VNMLS_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 806 |
[
"{\"name\": \"do_vfp_3op_dp\", \"code\": \"__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VNMLS_dp\", \"code\": \"__int64 __fastcall gen_VNMLS_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v8@@ ; @@v8@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_muld ( @@v8@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negd ( @@a1@@ , @@a1@@ ) ; gen_helper_vfp_addd ( @@a1@@ , @@a1@@ , @@v8@@ , @@a4@@ ) ; return tcg_temp_free_i64 ( @@v8@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_VNMLA_sp", "code": "__int64 __fastcall gen_VNMLA_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v8@@ ; @@v8@@ = tcg_temp_new_i32 ( ) ; gen_helper_vfp_muls ( @@v8@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negs ( @@v8@@ , @@v8@@ ) ; gen_helper_vfp_negs ( @@a1@@ , @@a1@@ ) ; gen_helper_vfp_adds ( @@a1@@ , @@a1@@ , @@v8@@ , @@a4@@ ) ; return tcg_temp_free_i32 ( @@v8@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i32_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 807 |
[
"{\"name\": \"tcg_temp_free_i32\", \"code\": \"__int64 __fastcall tcg_temp_free_i32 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i32_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i32\", \"code\": \"__int64 tcg_temp_new_i32 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i32 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_adds\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_adds ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_adds , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_muls\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muls ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muls , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_negs\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_negs ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_i32_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_negs , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VNMLA_sp", "code": "__int64 __fastcall trans_VNMLA_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMLA_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VNMLA_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 808 |
[
"{\"name\": \"do_vfp_3op_sp\", \"code\": \"__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VNMLA_sp\", \"code\": \"__int64 __fastcall gen_VNMLA_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v8@@ ; @@v8@@ = tcg_temp_new_i32 ( ) ; gen_helper_vfp_muls ( @@v8@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negs ( @@v8@@ , @@v8@@ ) ; gen_helper_vfp_negs ( @@a1@@ , @@a1@@ ) ; gen_helper_vfp_adds ( @@a1@@ , @@a1@@ , @@v8@@ , @@a4@@ ) ; return tcg_temp_free_i32 ( @@v8@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_VNMLA_dp", "code": "__int64 __fastcall gen_VNMLA_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v8@@ ; @@v8@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_muld ( @@v8@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negd ( @@v8@@ , @@v8@@ ) ; gen_helper_vfp_negd ( @@a1@@ , @@a1@@ ) ; gen_helper_vfp_addd ( @@a1@@ , @@a1@@ , @@v8@@ , @@a4@@ ) ; return tcg_temp_free_i64 ( @@v8@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}, {"n": "v8", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "s8"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}, {"n": "tmp", "t": {"T": 3, "t": "TCGv_i64_d"}, "location": "s8"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 809 |
[
"{\"name\": \"tcg_temp_free_i64\", \"code\": \"__int64 __fastcall tcg_temp_free_i64 ( __int64 @@a1@@ ) { __int64 @@v1@@ ; @@v1@@ = tcgv_i64_temp ( @@a1@@ ) ; return tcg_temp_free_internal ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}]}",
"{\"name\": \"tcg_temp_new_i64\", \"code\": \"__int64 tcg_temp_new_i64 ( ) { __int64 @@v1@@ ; @@v1@@ = tcg_temp_new_internal ( Number L , Number L ) ; return temp_tcgv_i64 ( @@v1@@ ) ; }\", \"source\": [{\"n\": \"v1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_addd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_addd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_addd , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_muld\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muld ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muld , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_negd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_negd ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_i64_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_negd , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VNMLA_dp", "code": "__int64 __fastcall trans_VNMLA_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMLA_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VNMLA_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 810 |
[
"{\"name\": \"do_vfp_3op_dp\", \"code\": \"__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VNMLA_dp\", \"code\": \"__int64 __fastcall gen_VNMLA_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v8@@ ; @@v8@@ = tcg_temp_new_i64 ( ) ; gen_helper_vfp_muld ( @@v8@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; gen_helper_vfp_negd ( @@v8@@ , @@v8@@ ) ; gen_helper_vfp_negd ( @@a1@@ , @@a1@@ ) ; gen_helper_vfp_addd ( @@a1@@ , @@a1@@ , @@v8@@ , @@a4@@ ) ; return tcg_temp_free_i64 ( @@v8@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v8\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VMUL_sp", "code": "__int64 __fastcall trans_VMUL_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_muls , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMUL_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 811 |
[
"{\"name\": \"gen_helper_vfp_muls\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muls ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muls , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"do_vfp_3op_sp\", \"code\": \"__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VMUL_dp", "code": "__int64 __fastcall trans_VMUL_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_muld , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VMUL_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 812 |
[
"{\"name\": \"gen_helper_vfp_muld\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muld ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muld , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"do_vfp_3op_dp\", \"code\": \"__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "gen_VNMUL_sp", "code": "unsigned __int64 __fastcall gen_VNMUL_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { gen_helper_vfp_muls ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; return gen_helper_vfp_negs ( @@a1@@ , @@a1@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i32", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 813 |
[
"{\"name\": \"gen_helper_vfp_muls\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muls ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muls , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_negs\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_negs ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_i32_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_negs , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VNMUL_sp", "code": "__int64 __fastcall trans_VNMUL_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMUL_sp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VNMUL_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 814 |
[
"{\"name\": \"do_vfp_3op_sp\", \"code\": \"__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VNMUL_sp\", \"code\": \"unsigned __int64 __fastcall gen_VNMUL_sp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { gen_helper_vfp_muls ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; return gen_helper_vfp_negs ( @@a1@@ , @@a1@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}"
] |
{"name": "gen_VNMUL_dp", "code": "unsigned __int64 __fastcall gen_VNMUL_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { gen_helper_vfp_muld ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; return gen_helper_vfp_negd ( @@a1@@ , @@a1@@ ) ; }", "source": [{"n": "a3", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r16"}, {"n": "a4", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r24"}, {"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r64"}]}
|
[{"n": "vm", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r16"}, {"n": "fpst", "t": {"T": 1, "n": "TCGv_ptr", "s": 8}, "location": "r24"}, {"n": "vd", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r56"}, {"n": "vn", "t": {"T": 1, "n": "TCGv_i64", "s": 8}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 815 |
[
"{\"name\": \"gen_helper_vfp_muld\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_muld ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_muld , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_helper_vfp_negd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_negd ( __int64 @@a1@@ , __int64 @@a2@@ ) { __int64 @@v2@@ ; __int64 @@v4@@ ; unsigned __int64 @@v5@@ ; @@v5@@ = __readfsqword ( Number ) ; @@v4@@ = tcgv_i64_temp ( @@a2@@ ) ; @@v2@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_negd , @@v2@@ , Number L , & @@v4@@ ) ; return __readfsqword ( Number ) ^ @@v5@@ ; }\", \"source\": [{\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v5\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VNMUL_dp", "code": "__int64 __fastcall trans_VNMUL_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_VNMUL_dp , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VNMUL_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 816 |
[
"{\"name\": \"do_vfp_3op_dp\", \"code\": \"__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"gen_VNMUL_dp\", \"code\": \"unsigned __int64 __fastcall gen_VNMUL_dp ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { gen_helper_vfp_muld ( @@a1@@ , @@a2@@ , @@a3@@ , @@a4@@ ) ; return gen_helper_vfp_negd ( @@a1@@ , @@a1@@ ) ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}]}"
] |
{"name": "trans_VADD_sp", "code": "__int64 __fastcall trans_VADD_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_adds , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VADD_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 817 |
[
"{\"name\": \"gen_helper_vfp_adds\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_adds ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_adds , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"do_vfp_3op_sp\", \"code\": \"__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VADD_dp", "code": "__int64 __fastcall trans_VADD_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_addd , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VADD_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 818 |
[
"{\"name\": \"gen_helper_vfp_addd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_addd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_addd , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"do_vfp_3op_dp\", \"code\": \"__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VSUB_sp", "code": "__int64 __fastcall trans_VSUB_sp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_sp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_subs , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VSUB_sp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 819 |
[
"{\"name\": \"gen_helper_vfp_subs\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_subs ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i32_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i32_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_subs , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"do_vfp_3op_sp\", \"code\": \"__int64 __fastcall do_vfp_3op_sp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_sreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = * ( _DWORD * ) ( @@a1@@ + Number ) + Number ; if ( vfp_sreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i32 ( ) ; @@v15@@ = tcg_temp_new_i32 ( ) ; @@v16@@ = tcg_temp_new_i32 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg32 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg32 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_sreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_sreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg32 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_sreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg32 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i32 ( @@v14@@ ) ; tcg_temp_free_i32 ( @@v15@@ ) ; tcg_temp_free_i32 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s44\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s48\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s52\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
{"name": "trans_VSUB_dp", "code": "__int64 __fastcall trans_VSUB_dp ( __int64 @@a1@@ , unsigned int * @@a2@@ ) { return do_vfp_3op_dp ( @@a1@@ , ( void ( __fastcall * ) ( __int64 , __int64 , __int64 , __int64 ) ) gen_helper_vfp_subd , * @@a2@@ , @@a2@@ [ Number ] , @@a2@@ [ Number ] , Number ) ; }", "source": [{"n": "a1", "t": {"T": 1, "n": "__int64", "s": 8}, "location": "r56"}, {"n": "a2", "t": {"T": 3, "t": "unsigned int"}, "location": "r64"}]}
|
[{"n": "s", "t": {"T": 3, "t": "DisasContext_0"}, "location": "r56"}, {"n": "a", "t": {"T": 3, "t": "arg_VSUB_dp"}, "location": "r64"}]
|
data1/train-shard-4.tar
|
0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9_0de5b970c4b623b11deb59e14880555bdda1f6bbad19a7820ea754471bf85af9.jsonl
| 820 |
[
"{\"name\": \"gen_helper_vfp_subd\", \"code\": \"unsigned __int64 __fastcall gen_helper_vfp_subd ( __int64 @@a1@@ , __int64 @@a2@@ , __int64 @@a3@@ , __int64 @@a4@@ ) { __int64 @@v4@@ ; __int64 @@v8@@ [ Number ] ; unsigned __int64 @@v9@@ ; @@v9@@ = __readfsqword ( Number ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a2@@ ) ; @@v8@@ [ Number ] = tcgv_i64_temp ( @@a3@@ ) ; @@v8@@ [ Number ] = tcgv_ptr_temp ( @@a4@@ ) ; @@v4@@ = tcgv_i64_temp ( @@a1@@ ) ; tcg_gen_callN ( & helper_vfp_subd , @@v4@@ , Number L , @@v8@@ ) ; return __readfsqword ( Number ) ^ @@v9@@ ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r64\"}, {\"n\": \"v4\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r8\"}, {\"n\": \"v8\", \"t\": {\"T\": 2, \"n\": 3, \"s\": 8, \"t\": \"__int64\"}, \"location\": \"s32\"}, {\"n\": \"v9\", \"t\": {\"T\": 1, \"n\": \"unsigned __int64\", \"s\": 8}, \"location\": \"s8\"}]}",
"{\"name\": \"do_vfp_3op_dp\", \"code\": \"__int64 __fastcall do_vfp_3op_dp ( __int64 @@a1@@ , void ( __fastcall * @@a2@@ ) ( __int64 , __int64 , __int64 , __int64 ) , unsigned int @@a3@@ , unsigned int @@a4@@ , unsigned int @@a5@@ , char @@a6@@ ) { int @@v11@@ ; int @@v12@@ ; int @@v13@@ ; __int64 @@v14@@ ; __int64 @@v15@@ ; __int64 @@v16@@ ; __int64 @@v17@@ ; @@v11@@ = Number ; LOBYTE ( @@v12@@ ) = Number ; @@v13@@ = * ( _DWORD * ) ( @@a1@@ + Number ) ; if ( ! isar_feature_aa32_fp_d32 ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( ( ( unsigned __int8 ) @@a5@@ | ( unsigned __int8 ) ( @@a4@@ | @@a3@@ ) ) & Number ) != Number ) { return Number L ; } if ( ! isar_feature_aa32_fpdp ( * ( _QWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ! isar_feature_aa32_fpshvec ( * ( _QWORD * ) ( @@a1@@ + Number ) ) && ( @@v13@@ || * ( _DWORD * ) ( @@a1@@ + Number ) ) ) return Number L ; if ( ( unsigned __int8 ) vfp_access_check ( @@a1@@ ) != Number ) return Number L ; if ( @@v13@@ > Number ) { if ( vfp_dreg_is_scalar ( @@a3@@ ) ) { @@v13@@ = Number ; } else { @@v12@@ = ( * ( int * ) ( @@a1@@ + Number ) >> Number ) + Number ; if ( vfp_dreg_is_scalar ( @@a5@@ ) ) @@v11@@ = Number ; else @@v11@@ = @@v12@@ ; } } @@v14@@ = tcg_temp_new_i64 ( ) ; @@v15@@ = tcg_temp_new_i64 ( ) ; @@v16@@ = tcg_temp_new_i64 ( ) ; @@v17@@ = get_fpstatus_ptr ( Number ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; while ( Number ) { if ( @@a6@@ ) neon_load_reg64 ( @@v16@@ , @@a3@@ ) ; @@a2@@ ( @@v16@@ , @@v14@@ , @@v15@@ , @@v17@@ ) ; neon_store_reg64 ( @@v16@@ , @@a3@@ ) ; if ( ! @@v13@@ ) break ; -- @@v13@@ ; @@a3@@ = vfp_advance_dreg ( @@a3@@ , @@v12@@ ) ; @@a4@@ = vfp_advance_dreg ( @@a4@@ , @@v12@@ ) ; neon_load_reg64 ( @@v14@@ , @@a4@@ ) ; if ( @@v11@@ ) { @@a5@@ = vfp_advance_dreg ( @@a5@@ , @@v11@@ ) ; neon_load_reg64 ( @@v15@@ , @@a5@@ ) ; } } tcg_temp_free_i64 ( @@v14@@ ) ; tcg_temp_free_i64 ( @@v15@@ ) ; tcg_temp_free_i64 ( @@v16@@ ) ; tcg_temp_free_ptr ( @@v17@@ ) ; return Number L ; }\", \"source\": [{\"n\": \"a3\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r16\"}, {\"n\": \"a4\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r24\"}, {\"n\": \"a1\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"r56\"}, {\"n\": \"a2\", \"t\": {\"T\": 9, \"n\": \"void (__fastcall *)(__int64, __int64, __int64, __int64)\"}, \"location\": \"r64\"}, {\"n\": \"a5\", \"t\": {\"T\": 1, \"n\": \"unsigned int\", \"s\": 4}, \"location\": \"r72\"}, {\"n\": \"a6\", \"t\": {\"T\": 1, \"n\": \"char\", \"s\": 1}, \"location\": \"r80\"}, {\"n\": \"v16\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s16\"}, {\"n\": \"v15\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s24\"}, {\"n\": \"v14\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s32\"}, {\"n\": \"v13\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s60\"}, {\"n\": \"v12\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s64\"}, {\"n\": \"v11\", \"t\": {\"T\": 1, \"n\": \"int\", \"s\": 4}, \"location\": \"s68\"}, {\"n\": \"v17\", \"t\": {\"T\": 1, \"n\": \"__int64\", \"s\": 8}, \"location\": \"s8\"}]}"
] |
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