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-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2771.vhd,v 1.2 2001-10-26 16:29:49 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
package c13s08b00x00p01n01i02771pkg is
function--This is a valid comment.
F1 return BOOLEAN;
function F2 return BOOLEAN;
end c13s08b00x00p01n01i02771pkg;
package body c13s08b00x00p01n01i02771pkg is
function--This is a valid comment.
F1 return BOOLEAN is
begin
return --This comment occurs within a statement!
FALSE-- Comments can occur anywhere and need not be
-- preceded by a blank
;
end F1;
function F2 return BOOLEAN is
type TYP_1 is range 1 to 10;
variable V1--This is all one comment--not two -- or more!
: TYP_1 := 2;
begin
assert TRUE
report "--This is not a comment--";
return FALSE;
end F2;
end c13s08b00x00p01n01i02771pkg;
ENTITY c13s08b00x00p01n01i02771ent IS
port (PT:BOOLEAN) ;
--This is a NULL entity
END c13s08b00x00p01n01i02771ent;
ARCHITECTURE c13s08b00x00p01n01i02771arch OF c13s08b00x00p01n01i02771ent IS
--
--(that was a blank comment)
BEGIN
TESTING: PROCESS
BEGIN
assert FALSE
report "***PASSED TEST: c13s08b00x00p01n01i02771"
severity NOTE;
wait;
END PROCESS TESTING
--that wasn't so quick!
;--semicolon
END c13s08b00x00p01n01i02771arch; --architecture A ("A comment can appear on any line of a VHDL description.")
|
-------------------------------------------------------------------------------
-- Title : Exercise
-- Project : Counter
-------------------------------------------------------------------------------
-- File : cntr.vhd
-- Author : Martin Angermair
-- Company : Technikum Wien, Embedded Systems
-- Last update: 24.10.2017
-- Platform : ModelSim
-------------------------------------------------------------------------------
-- Description: This contains the counter logic
-------------------------------------------------------------------------------
-- Revisions :
-- Date Version Author Description
-- 27.10.2017 0.1 Martin Angermair init
-- 19.11.2017 1.0 Martin Angermair final version
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
architecture rtl of cntr is
constant C_COUNT_1HZ : integer := 50000000; -- 1 HZ clock for counting
-- constant C_COUNT_1HZ : integer := 50000; -- for easier testing
component clk_gen is
port(
clk_i : in std_logic;
reset_i : in std_logic;
count_val_i : in integer;
signal_o : out std_logic);
end component;
signal s_count : std_logic_vector(13 downto 0) := (others => '0');
signal s_clk_1Hz : std_logic;
begin
p_clk_1Hz : clk_gen
port map (
clk_i => clk_i,
reset_i => reset_i,
count_val_i => C_COUNT_1HZ,
signal_o => s_clk_1HZ
);
process(s_clk_1HZ, reset_i, cntrreset_i, cntrhold_i, cntrup_i, cntrdown_i)
begin
if reset_i = '1' or cntrreset_i = '1' then
s_count <= (others => '0');
elsif rising_edge(s_clk_1HZ) then
if cntrhold_i = '1' then
s_count <= s_count;
elsif cntrup_i = '1' then
if s_count = "10011100001111" then
s_count <= (others => '0');
else
s_count <= s_count + 1;
end if;
elsif cntrdown_i = '1' then
if s_count = "00000000000000" then
s_count <= "10011100001111";
else
s_count <= s_count - 1;
end if;
else
-- stop countig till direction is set
end if;
end if;
end process;
digits_o <= s_count;
end rtl; |
---------------------------------------------------------------------
-- TITLE: Arithmetic Logic Unit
-- AUTHOR: Steve Rhoads ([email protected])
-- DATE CREATED: 2/8/01
-- FILENAME: alu.vhd
-- PROJECT: Plasma CPU core
-- COPYRIGHT: Software placed into the public domain by the author.
-- Software 'as is' without warranty. Author liable for nothing.
-- DESCRIPTION:
-- Implements the ALU.
---------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.mlite_pack.all;
use work.cam_pkg.all;
entity coproc_2 is
port(
clock : in std_logic;
reset : in std_logic;
INPUT_1 : in std_logic_vector(31 downto 0);
INPUT_1_valid : in std_logic;
OUTPUT_1 : out std_logic_vector(31 downto 0)
);
end; --comb_alu_1
architecture logic of coproc_2 is
signal min_reg : unsigned(7 downto 0);
signal beta_reg : unsigned(15 downto 0);
signal beta_tmp : unsigned(15 downto 0);
signal min_tmp, max_tmp : unsigned(7 downto 0);
signal store_min_beta : std_logic;
signal a,b : unsigned(15 downto 0);
signal OUTPUT_1_tmp : std_logic_vector(31 downto 0);
begin
-------------------------------------------------------------------------
scaling_computation : process (INPUT_1, min_reg, beta_reg)
variable mini : UNSIGNED(7 downto 0);
variable data1, data2, data3, data4 : UNSIGNED(7 downto 0);
variable diff1, diff2, diff3, diff4 : UNSIGNED(7 downto 0);
variable mult1, mult2, mult3, mult4 : UNSIGNED(23 downto 0);
begin
data1 := UNSIGNED( INPUT_1(7 downto 0) );
data2 := UNSIGNED( INPUT_1(15 downto 8) );
data3 := UNSIGNED( INPUT_1(23 downto 16) );
data4 := UNSIGNED( INPUT_1(31 downto 24) );
diff1 := data1 - min_reg; -- 8
diff2 := data2 - min_reg; -- 8
diff3 := data3 - min_reg; -- 8
diff4 := data4 - min_reg; -- 8
mult1 := diff1 * beta_reg; -- 24
mult2 := diff2 * beta_reg; -- 24
mult3 := diff3 * beta_reg; -- 24
mult4 := diff4 * beta_reg; -- 24
OUTPUT_1_tmp(7 downto 0) <= std_logic_vector(mult1(15 downto 8));
OUTPUT_1_tmp(15 downto 8) <= std_logic_vector(mult2(15 downto 8));
OUTPUT_1_tmp(23 downto 16) <= std_logic_vector(mult3(15 downto 8));
OUTPUT_1_tmp(31 downto 24) <= std_logic_vector(mult4(15 downto 8));
end process;
-------------------------------------------------------------------------
max_tmp <= UNSIGNED(INPUT_1(7 downto 0));
min_tmp <= UNSIGNED(INPUT_1(15 downto 8));
b <= "00000000"&(max_tmp-min_tmp);
a <= TO_UNSIGNED( 255, 8)&"00000000";
--beta_tmp <= divide(TO_UNSIGNED( 255, 8), (max_tmp-min_tmp));
beta_tmp <= divide(a,b); --(8,8)
--beta_tmp <= "00000000"&max_tmp-min_tmp;
-------------------------------------------------------------------------
process (clock, reset)
begin
IF clock'event AND clock = '1' THEN
IF reset = '1' THEN
store_min_beta <= '1';
min_reg <= (others => '0');
beta_reg <= (others => '0');
OUTPUT_1 <= (others => '0');
ELSE
IF (INPUT_1_valid = '1' and store_min_beta ='1') THEN
store_min_beta <= '0';
min_reg <= UNSIGNED(INPUT_1(15 downto 8));
beta_reg <= beta_tmp;
OUTPUT_1 <= INPUT_1;
ELSIF (INPUT_1_valid = '1' and store_min_beta = '0') THEN
store_min_beta <= '0';
min_reg <= min_reg;
beta_reg <= beta_reg;
OUTPUT_1 <= OUTPUT_1_tmp;
--OUTPUT_1 <= "000000000000000000000000"&std_logic_vector(min_reg);
END IF;
END IF;
END IF;
end process;
-------------------------------------------------------------------------
end; --architecture logic
|
---------------------------------------------------------------------
-- TITLE: Arithmetic Logic Unit
-- AUTHOR: Steve Rhoads ([email protected])
-- DATE CREATED: 2/8/01
-- FILENAME: alu.vhd
-- PROJECT: Plasma CPU core
-- COPYRIGHT: Software placed into the public domain by the author.
-- Software 'as is' without warranty. Author liable for nothing.
-- DESCRIPTION:
-- Implements the ALU.
---------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.mlite_pack.all;
use work.cam_pkg.all;
entity coproc_2 is
port(
clock : in std_logic;
reset : in std_logic;
INPUT_1 : in std_logic_vector(31 downto 0);
INPUT_1_valid : in std_logic;
OUTPUT_1 : out std_logic_vector(31 downto 0)
);
end; --comb_alu_1
architecture logic of coproc_2 is
signal min_reg : unsigned(7 downto 0);
signal beta_reg : unsigned(15 downto 0);
signal beta_tmp : unsigned(15 downto 0);
signal min_tmp, max_tmp : unsigned(7 downto 0);
signal store_min_beta : std_logic;
signal a,b : unsigned(15 downto 0);
signal OUTPUT_1_tmp : std_logic_vector(31 downto 0);
begin
-------------------------------------------------------------------------
scaling_computation : process (INPUT_1, min_reg, beta_reg)
variable mini : UNSIGNED(7 downto 0);
variable data1, data2, data3, data4 : UNSIGNED(7 downto 0);
variable diff1, diff2, diff3, diff4 : UNSIGNED(7 downto 0);
variable mult1, mult2, mult3, mult4 : UNSIGNED(23 downto 0);
begin
data1 := UNSIGNED( INPUT_1(7 downto 0) );
data2 := UNSIGNED( INPUT_1(15 downto 8) );
data3 := UNSIGNED( INPUT_1(23 downto 16) );
data4 := UNSIGNED( INPUT_1(31 downto 24) );
diff1 := data1 - min_reg; -- 8
diff2 := data2 - min_reg; -- 8
diff3 := data3 - min_reg; -- 8
diff4 := data4 - min_reg; -- 8
mult1 := diff1 * beta_reg; -- 24
mult2 := diff2 * beta_reg; -- 24
mult3 := diff3 * beta_reg; -- 24
mult4 := diff4 * beta_reg; -- 24
OUTPUT_1_tmp(7 downto 0) <= std_logic_vector(mult1(15 downto 8));
OUTPUT_1_tmp(15 downto 8) <= std_logic_vector(mult2(15 downto 8));
OUTPUT_1_tmp(23 downto 16) <= std_logic_vector(mult3(15 downto 8));
OUTPUT_1_tmp(31 downto 24) <= std_logic_vector(mult4(15 downto 8));
end process;
-------------------------------------------------------------------------
max_tmp <= UNSIGNED(INPUT_1(7 downto 0));
min_tmp <= UNSIGNED(INPUT_1(15 downto 8));
b <= "00000000"&(max_tmp-min_tmp);
a <= TO_UNSIGNED( 255, 8)&"00000000";
--beta_tmp <= divide(TO_UNSIGNED( 255, 8), (max_tmp-min_tmp));
beta_tmp <= divide(a,b); --(8,8)
--beta_tmp <= "00000000"&max_tmp-min_tmp;
-------------------------------------------------------------------------
process (clock, reset)
begin
IF clock'event AND clock = '1' THEN
IF reset = '1' THEN
store_min_beta <= '1';
min_reg <= (others => '0');
beta_reg <= (others => '0');
OUTPUT_1 <= (others => '0');
ELSE
IF (INPUT_1_valid = '1' and store_min_beta ='1') THEN
store_min_beta <= '0';
min_reg <= UNSIGNED(INPUT_1(15 downto 8));
beta_reg <= beta_tmp;
OUTPUT_1 <= INPUT_1;
ELSIF (INPUT_1_valid = '1' and store_min_beta = '0') THEN
store_min_beta <= '0';
min_reg <= min_reg;
beta_reg <= beta_reg;
OUTPUT_1 <= OUTPUT_1_tmp;
--OUTPUT_1 <= "000000000000000000000000"&std_logic_vector(min_reg);
END IF;
END IF;
END IF;
end process;
-------------------------------------------------------------------------
end; --architecture logic
|
-- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
-- --------------------------------------------------------------------------------
-- Tool Version: Vivado v.2016.4 (win64) Build 1733598 Wed Dec 14 22:35:39 MST 2016
-- Date : Tue May 30 22:30:26 2017
-- Host : GILAMONSTER running 64-bit major release (build 9200)
-- Command : write_vhdl -force -mode synth_stub -rename_top system_buffer_register_1_0 -prefix
-- system_buffer_register_1_0_ system_buffer_register_1_0_stub.vhdl
-- Design : system_buffer_register_1_0
-- Purpose : Stub declaration of top-level module interface
-- Device : xc7z020clg484-1
-- --------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity system_buffer_register_1_0 is
Port (
clk : in STD_LOGIC;
val_in : in STD_LOGIC_VECTOR ( 31 downto 0 );
val_out : out STD_LOGIC_VECTOR ( 31 downto 0 )
);
end system_buffer_register_1_0;
architecture stub of system_buffer_register_1_0 is
attribute syn_black_box : boolean;
attribute black_box_pad_pin : string;
attribute syn_black_box of stub : architecture is true;
attribute black_box_pad_pin of stub : architecture is "clk,val_in[31:0],val_out[31:0]";
attribute x_core_info : string;
attribute x_core_info of stub : architecture is "buffer_register,Vivado 2016.4";
begin
end;
|
-- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
-- --------------------------------------------------------------------------------
-- Tool Version: Vivado v.2016.4 (win64) Build 1733598 Wed Dec 14 22:35:39 MST 2016
-- Date : Fri Jan 13 17:31:20 2017
-- Host : KLight-PC running 64-bit major release (build 9200)
-- Command : write_vhdl -force -mode synth_stub
-- D:/Document/Verilog/VGA/VGA.srcs/sources_1/ip/shadow_pixel_1/shadow_pixel_stub.vhdl
-- Design : shadow_pixel
-- Purpose : Stub declaration of top-level module interface
-- Device : xc7a35tcpg236-1
-- --------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity shadow_pixel is
Port (
clka : in STD_LOGIC;
wea : in STD_LOGIC_VECTOR ( 0 to 0 );
addra : in STD_LOGIC_VECTOR ( 10 downto 0 );
dina : in STD_LOGIC_VECTOR ( 11 downto 0 );
douta : out STD_LOGIC_VECTOR ( 11 downto 0 )
);
end shadow_pixel;
architecture stub of shadow_pixel is
attribute syn_black_box : boolean;
attribute black_box_pad_pin : string;
attribute syn_black_box of stub : architecture is true;
attribute black_box_pad_pin of stub : architecture is "clka,wea[0:0],addra[10:0],dina[11:0],douta[11:0]";
attribute x_core_info : string;
attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4";
begin
end;
|
-- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
-- --------------------------------------------------------------------------------
-- Tool Version: Vivado v.2016.4 (win64) Build 1733598 Wed Dec 14 22:35:39 MST 2016
-- Date : Fri Jan 13 17:31:20 2017
-- Host : KLight-PC running 64-bit major release (build 9200)
-- Command : write_vhdl -force -mode synth_stub
-- D:/Document/Verilog/VGA/VGA.srcs/sources_1/ip/shadow_pixel_1/shadow_pixel_stub.vhdl
-- Design : shadow_pixel
-- Purpose : Stub declaration of top-level module interface
-- Device : xc7a35tcpg236-1
-- --------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity shadow_pixel is
Port (
clka : in STD_LOGIC;
wea : in STD_LOGIC_VECTOR ( 0 to 0 );
addra : in STD_LOGIC_VECTOR ( 10 downto 0 );
dina : in STD_LOGIC_VECTOR ( 11 downto 0 );
douta : out STD_LOGIC_VECTOR ( 11 downto 0 )
);
end shadow_pixel;
architecture stub of shadow_pixel is
attribute syn_black_box : boolean;
attribute black_box_pad_pin : string;
attribute syn_black_box of stub : architecture is true;
attribute black_box_pad_pin of stub : architecture is "clka,wea[0:0],addra[10:0],dina[11:0],douta[11:0]";
attribute x_core_info : string;
attribute x_core_info of stub : architecture is "blk_mem_gen_v8_3_5,Vivado 2016.4";
begin
end;
|
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.NUMERIC_STD.all;
library work;
use work.rv_components.all;
use work.utils.all;
use work.constants_pkg.all;
entity memory_interface is
generic (
REGISTER_SIZE : positive range 32 to 32;
WRITE_FIRST_SUPPORTED : boolean;
WISHBONE_SINGLE_CYCLE_READS : boolean;
MAX_IFETCHES_IN_FLIGHT : positive;
MAX_OUTSTANDING_REQUESTS : positive;
LOG2_BURSTLENGTH : positive;
AXI_ID_WIDTH : positive;
AVALON_AUX : boolean;
WISHBONE_AUX : boolean;
LMB_AUX : boolean;
AUX_MEMORY_REGIONS : natural range 0 to 4;
AMR0_ADDR_BASE : std_logic_vector(31 downto 0);
AMR0_ADDR_LAST : std_logic_vector(31 downto 0);
UC_MEMORY_REGIONS : natural range 0 to 4;
UMR0_ADDR_BASE : std_logic_vector(31 downto 0);
UMR0_ADDR_LAST : std_logic_vector(31 downto 0);
ICACHE_SIZE : natural;
ICACHE_LINE_SIZE : positive range 16 to 256;
ICACHE_EXTERNAL_WIDTH : positive;
INSTRUCTION_REQUEST_REGISTER : request_register_type;
INSTRUCTION_RETURN_REGISTER : boolean;
IUC_REQUEST_REGISTER : request_register_type;
IUC_RETURN_REGISTER : boolean;
IAUX_REQUEST_REGISTER : request_register_type;
IAUX_RETURN_REGISTER : boolean;
IC_REQUEST_REGISTER : request_register_type;
IC_RETURN_REGISTER : boolean;
DCACHE_SIZE : natural;
DCACHE_LINE_SIZE : positive range 16 to 256;
DCACHE_EXTERNAL_WIDTH : positive;
DCACHE_WRITEBACK : boolean;
DATA_REQUEST_REGISTER : request_register_type;
DATA_RETURN_REGISTER : boolean;
DUC_REQUEST_REGISTER : request_register_type;
DUC_RETURN_REGISTER : boolean;
DAUX_REQUEST_REGISTER : request_register_type;
DAUX_RETURN_REGISTER : boolean;
DC_REQUEST_REGISTER : request_register_type;
DC_RETURN_REGISTER : boolean
);
port (
clk : in std_logic;
reset : in std_logic;
--Auxiliary/Uncached memory regions
amr_base_addrs : in std_logic_vector((imax(AUX_MEMORY_REGIONS, 1)*REGISTER_SIZE)-1 downto 0);
amr_last_addrs : in std_logic_vector((imax(AUX_MEMORY_REGIONS, 1)*REGISTER_SIZE)-1 downto 0);
umr_base_addrs : in std_logic_vector((imax(UC_MEMORY_REGIONS, 1)*REGISTER_SIZE)-1 downto 0);
umr_last_addrs : in std_logic_vector((imax(UC_MEMORY_REGIONS, 1)*REGISTER_SIZE)-1 downto 0);
--ICache control (Invalidate/flush/writeback)
from_icache_control_ready : out std_logic;
to_icache_control_valid : in std_logic;
to_icache_control_command : in cache_control_command;
--DCache control (Invalidate/flush/writeback)
from_dcache_control_ready : out std_logic;
to_dcache_control_valid : in std_logic;
to_dcache_control_command : in cache_control_command;
--Cache control common signals
to_cache_control_base : in std_logic_vector(REGISTER_SIZE-1 downto 0);
to_cache_control_last : in std_logic_vector(REGISTER_SIZE-1 downto 0);
memory_interface_idle : out std_logic;
--Instruction ORCA-internal memory-mapped master
ifetch_oimm_address : in std_logic_vector(REGISTER_SIZE-1 downto 0);
ifetch_oimm_requestvalid : in std_logic;
ifetch_oimm_readdata : out std_logic_vector(REGISTER_SIZE-1 downto 0);
ifetch_oimm_waitrequest : out std_logic;
ifetch_oimm_readdatavalid : out std_logic;
--Data ORCA-internal memory-mapped master
lsu_oimm_address : in std_logic_vector(REGISTER_SIZE-1 downto 0);
lsu_oimm_byteenable : in std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
lsu_oimm_requestvalid : in std_logic;
lsu_oimm_readnotwrite : in std_logic;
lsu_oimm_writedata : in std_logic_vector(REGISTER_SIZE-1 downto 0);
lsu_oimm_readdata : out std_logic_vector(REGISTER_SIZE-1 downto 0);
lsu_oimm_readdatavalid : out std_logic;
lsu_oimm_waitrequest : out std_logic;
-------------------------------------------------------------------------------
--AVALON
-------------------------------------------------------------------------------
--Avalon data master
avm_data_address : out std_logic_vector(REGISTER_SIZE-1 downto 0);
avm_data_byteenable : out std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
avm_data_read : out std_logic;
avm_data_readdata : in std_logic_vector(REGISTER_SIZE-1 downto 0);
avm_data_write : out std_logic;
avm_data_writedata : out std_logic_vector(REGISTER_SIZE-1 downto 0);
avm_data_waitrequest : in std_logic;
avm_data_readdatavalid : in std_logic;
--Avalon instruction master
avm_instruction_address : out std_logic_vector(REGISTER_SIZE-1 downto 0);
avm_instruction_read : out std_logic;
avm_instruction_readdata : in std_logic_vector(REGISTER_SIZE-1 downto 0);
avm_instruction_waitrequest : in std_logic;
avm_instruction_readdatavalid : in std_logic;
-------------------------------------------------------------------------------
--WISHBONE
-------------------------------------------------------------------------------
--WISHBONE data master
data_ADR_O : out std_logic_vector(REGISTER_SIZE-1 downto 0);
data_DAT_I : in std_logic_vector(REGISTER_SIZE-1 downto 0);
data_DAT_O : out std_logic_vector(REGISTER_SIZE-1 downto 0);
data_WE_O : out std_logic;
data_SEL_O : out std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
data_STB_O : out std_logic;
data_ACK_I : in std_logic;
data_CYC_O : out std_logic;
data_CTI_O : out std_logic_vector(2 downto 0);
data_STALL_I : in std_logic;
--WISHBONE instruction master
instr_ADR_O : out std_logic_vector(REGISTER_SIZE-1 downto 0);
instr_DAT_I : in std_logic_vector(REGISTER_SIZE-1 downto 0);
instr_STB_O : out std_logic;
instr_ACK_I : in std_logic;
instr_CYC_O : out std_logic;
instr_CTI_O : out std_logic_vector(2 downto 0);
instr_STALL_I : in std_logic;
-------------------------------------------------------------------------------
--AXI
-------------------------------------------------------------------------------
--AXI4-Lite uncached instruction master
--A full AXI3 interface is exposed for systems that require it, but
--only the (read-only) AXI4-Lite signals are needed
IUC_ARID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IUC_ARADDR : out std_logic_vector(REGISTER_SIZE-1 downto 0);
IUC_ARLEN : out std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
IUC_ARSIZE : out std_logic_vector(2 downto 0);
IUC_ARBURST : out std_logic_vector(1 downto 0);
IUC_ARLOCK : out std_logic_vector(1 downto 0);
IUC_ARCACHE : out std_logic_vector(3 downto 0);
IUC_ARPROT : out std_logic_vector(2 downto 0);
IUC_ARVALID : out std_logic;
IUC_ARREADY : in std_logic;
IUC_RID : in std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IUC_RDATA : in std_logic_vector(REGISTER_SIZE-1 downto 0);
IUC_RRESP : in std_logic_vector(1 downto 0);
IUC_RLAST : in std_logic;
IUC_RVALID : in std_logic;
IUC_RREADY : out std_logic;
IUC_AWID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IUC_AWADDR : out std_logic_vector(REGISTER_SIZE-1 downto 0);
IUC_AWLEN : out std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
IUC_AWSIZE : out std_logic_vector(2 downto 0);
IUC_AWBURST : out std_logic_vector(1 downto 0);
IUC_AWLOCK : out std_logic_vector(1 downto 0);
IUC_AWCACHE : out std_logic_vector(3 downto 0);
IUC_AWPROT : out std_logic_vector(2 downto 0);
IUC_AWVALID : out std_logic;
IUC_AWREADY : in std_logic;
IUC_WID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IUC_WDATA : out std_logic_vector(REGISTER_SIZE-1 downto 0);
IUC_WSTRB : out std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
IUC_WLAST : out std_logic;
IUC_WVALID : out std_logic;
IUC_WREADY : in std_logic;
IUC_BID : in std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IUC_BRESP : in std_logic_vector(1 downto 0);
IUC_BVALID : in std_logic;
IUC_BREADY : out std_logic;
--AXI4-Lite uncached data master
--A full AXI3 interface is exposed for systems that require it, but
--only the AXI4-Lite signals are needed
DUC_AWID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DUC_AWADDR : out std_logic_vector(REGISTER_SIZE-1 downto 0);
DUC_AWLEN : out std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
DUC_AWSIZE : out std_logic_vector(2 downto 0);
DUC_AWBURST : out std_logic_vector(1 downto 0);
DUC_AWLOCK : out std_logic_vector(1 downto 0);
DUC_AWCACHE : out std_logic_vector(3 downto 0);
DUC_AWPROT : out std_logic_vector(2 downto 0);
DUC_AWVALID : out std_logic;
DUC_AWREADY : in std_logic;
DUC_WID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DUC_WDATA : out std_logic_vector(REGISTER_SIZE-1 downto 0);
DUC_WSTRB : out std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
DUC_WLAST : out std_logic;
DUC_WVALID : out std_logic;
DUC_WREADY : in std_logic;
DUC_BID : in std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DUC_BRESP : in std_logic_vector(1 downto 0);
DUC_BVALID : in std_logic;
DUC_BREADY : out std_logic;
DUC_ARID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DUC_ARADDR : out std_logic_vector(REGISTER_SIZE-1 downto 0);
DUC_ARLEN : out std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
DUC_ARSIZE : out std_logic_vector(2 downto 0);
DUC_ARBURST : out std_logic_vector(1 downto 0);
DUC_ARLOCK : out std_logic_vector(1 downto 0);
DUC_ARCACHE : out std_logic_vector(3 downto 0);
DUC_ARPROT : out std_logic_vector(2 downto 0);
DUC_ARVALID : out std_logic;
DUC_ARREADY : in std_logic;
DUC_RID : in std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DUC_RDATA : in std_logic_vector(REGISTER_SIZE-1 downto 0);
DUC_RRESP : in std_logic_vector(1 downto 0);
DUC_RLAST : in std_logic;
DUC_RVALID : in std_logic;
DUC_RREADY : out std_logic;
--AXI3/4 cacheable instruction master
--WID can be unconnected and LOG2_BURSTLENGTH set to 8 to for AXI4
--Read-only, write is exposed for systems that require it
IC_ARID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IC_ARADDR : out std_logic_vector(REGISTER_SIZE-1 downto 0);
IC_ARLEN : out std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
IC_ARSIZE : out std_logic_vector(2 downto 0);
IC_ARBURST : out std_logic_vector(1 downto 0);
IC_ARLOCK : out std_logic_vector(1 downto 0);
IC_ARCACHE : out std_logic_vector(3 downto 0);
IC_ARPROT : out std_logic_vector(2 downto 0);
IC_ARVALID : out std_logic;
IC_ARREADY : in std_logic;
IC_RID : in std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IC_RDATA : in std_logic_vector(ICACHE_EXTERNAL_WIDTH-1 downto 0);
IC_RRESP : in std_logic_vector(1 downto 0);
IC_RLAST : in std_logic;
IC_RVALID : in std_logic;
IC_RREADY : out std_logic;
IC_AWID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IC_AWADDR : out std_logic_vector(REGISTER_SIZE-1 downto 0);
IC_AWLEN : out std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
IC_AWSIZE : out std_logic_vector(2 downto 0);
IC_AWBURST : out std_logic_vector(1 downto 0);
IC_AWLOCK : out std_logic_vector(1 downto 0);
IC_AWCACHE : out std_logic_vector(3 downto 0);
IC_AWPROT : out std_logic_vector(2 downto 0);
IC_AWVALID : out std_logic;
IC_AWREADY : in std_logic;
IC_WID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IC_WDATA : out std_logic_vector(ICACHE_EXTERNAL_WIDTH-1 downto 0);
IC_WSTRB : out std_logic_vector((ICACHE_EXTERNAL_WIDTH/8)-1 downto 0);
IC_WLAST : out std_logic;
IC_WVALID : out std_logic;
IC_WREADY : in std_logic;
IC_BID : in std_logic_vector(AXI_ID_WIDTH-1 downto 0);
IC_BRESP : in std_logic_vector(1 downto 0);
IC_BVALID : in std_logic;
IC_BREADY : out std_logic;
--AXI3/4 cacheable data master
--WID can be unconnected and LOG2_BURSTLENGTH set to 8 to for AXI4
DC_ARID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DC_ARADDR : out std_logic_vector(REGISTER_SIZE-1 downto 0);
DC_ARLEN : out std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
DC_ARSIZE : out std_logic_vector(2 downto 0);
DC_ARBURST : out std_logic_vector(1 downto 0);
DC_ARLOCK : out std_logic_vector(1 downto 0);
DC_ARCACHE : out std_logic_vector(3 downto 0);
DC_ARPROT : out std_logic_vector(2 downto 0);
DC_ARVALID : out std_logic;
DC_ARREADY : in std_logic;
DC_RID : in std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DC_RDATA : in std_logic_vector(DCACHE_EXTERNAL_WIDTH-1 downto 0);
DC_RRESP : in std_logic_vector(1 downto 0);
DC_RLAST : in std_logic;
DC_RVALID : in std_logic;
DC_RREADY : out std_logic;
DC_AWID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DC_AWADDR : out std_logic_vector(REGISTER_SIZE-1 downto 0);
DC_AWLEN : out std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
DC_AWSIZE : out std_logic_vector(2 downto 0);
DC_AWBURST : out std_logic_vector(1 downto 0);
DC_AWLOCK : out std_logic_vector(1 downto 0);
DC_AWCACHE : out std_logic_vector(3 downto 0);
DC_AWPROT : out std_logic_vector(2 downto 0);
DC_AWVALID : out std_logic;
DC_AWREADY : in std_logic;
DC_WID : out std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DC_WDATA : out std_logic_vector(DCACHE_EXTERNAL_WIDTH-1 downto 0);
DC_WSTRB : out std_logic_vector((DCACHE_EXTERNAL_WIDTH/8)-1 downto 0);
DC_WLAST : out std_logic;
DC_WVALID : out std_logic;
DC_WREADY : in std_logic;
DC_BID : in std_logic_vector(AXI_ID_WIDTH-1 downto 0);
DC_BRESP : in std_logic_vector(1 downto 0);
DC_BVALID : in std_logic;
DC_BREADY : out std_logic;
-------------------------------------------------------------------------------
--LMB
-------------------------------------------------------------------------------
--Xilinx local memory bus instruction master
--Read-only, write is exposed for systems that require it
ILMB_Addr : out std_logic_vector(0 to REGISTER_SIZE-1);
ILMB_Byte_Enable : out std_logic_vector(0 to (REGISTER_SIZE/8)-1);
ILMB_Data_Write : out std_logic_vector(0 to REGISTER_SIZE-1);
ILMB_AS : out std_logic;
ILMB_Read_Strobe : out std_logic;
ILMB_Write_Strobe : out std_logic;
ILMB_Data_Read : in std_logic_vector(0 to REGISTER_SIZE-1);
ILMB_Ready : in std_logic;
ILMB_Wait : in std_logic;
ILMB_CE : in std_logic;
ILMB_UE : in std_logic;
--Xilinx local memory bus data master
DLMB_Addr : out std_logic_vector(0 to REGISTER_SIZE-1);
DLMB_Byte_Enable : out std_logic_vector(0 to (REGISTER_SIZE/8)-1);
DLMB_Data_Write : out std_logic_vector(0 to REGISTER_SIZE-1);
DLMB_AS : out std_logic;
DLMB_Read_Strobe : out std_logic;
DLMB_Write_Strobe : out std_logic;
DLMB_Data_Read : in std_logic_vector(0 to REGISTER_SIZE-1);
DLMB_Ready : in std_logic;
DLMB_Wait : in std_logic;
DLMB_CE : in std_logic;
DLMB_UE : in std_logic
);
end entity memory_interface;
architecture rtl of memory_interface is
constant A4L_BURST_SIZE : std_logic_vector(2 downto 0) := std_logic_vector(to_unsigned(log2(REGISTER_SIZE/8), 3));
constant A4L_BURST_INCR : std_logic_vector(1 downto 0) := "01";
constant A4L_LOCK_VAL : std_logic_vector(1 downto 0) := "00";
constant A4L_CACHE_VAL : std_logic_vector(3 downto 0) := "0000";
signal lsu_oimm_address_aligned : std_logic_vector(lsu_oimm_address'range);
signal iinternal_register_idle : std_logic;
signal iexternal_registers_idle : std_logic;
signal dinternal_register_idle : std_logic;
signal dexternal_registers_idle : std_logic;
signal icache_idle : std_logic;
signal dcache_idle : std_logic;
signal ic_master_idle : std_logic;
signal dc_master_idle : std_logic;
signal iuc_master_idle : std_logic;
signal duc_master_idle : std_logic;
signal iuc_oimm_address : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal iuc_oimm_byteenable : std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
signal iuc_oimm_requestvalid : std_logic;
signal iuc_oimm_readnotwrite : std_logic;
signal iuc_oimm_writedata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal iuc_oimm_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal iuc_oimm_readdatavalid : std_logic;
signal iuc_oimm_waitrequest : std_logic;
signal duc_oimm_address : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal duc_oimm_byteenable : std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
signal duc_oimm_requestvalid : std_logic;
signal duc_oimm_readnotwrite : std_logic;
signal duc_oimm_writedata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal duc_oimm_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal duc_oimm_readdatavalid : std_logic;
signal duc_oimm_waitrequest : std_logic;
signal iaux_oimm_address : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal iaux_oimm_byteenable : std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
signal iaux_oimm_requestvalid : std_logic;
signal iaux_oimm_readnotwrite : std_logic;
signal iaux_oimm_writedata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal iaux_oimm_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal iaux_oimm_readdatavalid : std_logic;
signal iaux_oimm_waitrequest : std_logic;
signal daux_oimm_address : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal daux_oimm_byteenable : std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
signal daux_oimm_requestvalid : std_logic;
signal daux_oimm_readnotwrite : std_logic;
signal daux_oimm_writedata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal daux_oimm_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal daux_oimm_readdatavalid : std_logic;
signal daux_oimm_waitrequest : std_logic;
signal icacheint_oimm_address : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal icacheint_oimm_byteenable : std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
signal icacheint_oimm_requestvalid : std_logic;
signal icacheint_oimm_readnotwrite : std_logic;
signal icacheint_oimm_writedata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal icacheint_oimm_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal icacheint_oimm_readdatavalid : std_logic;
signal icacheint_oimm_waitrequest : std_logic;
signal dcacheint_oimm_address : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal dcacheint_oimm_byteenable : std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
signal dcacheint_oimm_requestvalid : std_logic;
signal dcacheint_oimm_readnotwrite : std_logic;
signal dcacheint_oimm_writedata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal dcacheint_oimm_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal dcacheint_oimm_readdatavalid : std_logic;
signal dcacheint_oimm_waitrequest : std_logic;
signal aresetn : std_logic;
begin
assert (bool_to_int(AVALON_AUX) + bool_to_int(WISHBONE_AUX) + bool_to_int(LMB_AUX)) < 2 report
"At most one auxiliary interface type (AVALON_AUX, WISHBONE_AUX, LMB_AUX) must be enabled"
severity failure;
assert AUX_MEMORY_REGIONS = 0 or (AVALON_AUX or WISHBONE_AUX or LMB_AUX) report
"if AUX_MEMORY_REGIONS > 0 then one auxiliary interface (AVALON_AUX, WISHBONE_AUX, or LMB_AUX) must be enabled"
severity failure;
aresetn <= not reset;
memory_interface_idle <= iinternal_register_idle and dinternal_register_idle and
iexternal_registers_idle and dexternal_registers_idle and
icache_idle and dcache_idle and
ic_master_idle and dc_master_idle and
iuc_master_idle and duc_master_idle;
-----------------------------------------------------------------------------
-- Instruction cache and mux
-----------------------------------------------------------------------------
instruction_cache_mux : cache_mux
generic map (
ADDRESS_WIDTH => REGISTER_SIZE,
DATA_WIDTH => REGISTER_SIZE,
MAX_OUTSTANDING_READS => MAX_IFETCHES_IN_FLIGHT,
AUX_MEMORY_REGIONS => AUX_MEMORY_REGIONS,
AMR0_ADDR_BASE => AMR0_ADDR_BASE,
AMR0_ADDR_LAST => AMR0_ADDR_LAST,
UC_MEMORY_REGIONS => UC_MEMORY_REGIONS,
UMR0_ADDR_BASE => UMR0_ADDR_BASE,
UMR0_ADDR_LAST => UMR0_ADDR_LAST,
CACHE_SIZE => ICACHE_SIZE,
CACHE_LINE_SIZE => ICACHE_LINE_SIZE,
INTERNAL_REQUEST_REGISTER => INSTRUCTION_REQUEST_REGISTER,
INTERNAL_RETURN_REGISTER => INSTRUCTION_RETURN_REGISTER,
UC_REQUEST_REGISTER => IUC_REQUEST_REGISTER,
UC_RETURN_REGISTER => IUC_RETURN_REGISTER,
AUX_REQUEST_REGISTER => IAUX_REQUEST_REGISTER,
AUX_RETURN_REGISTER => IAUX_RETURN_REGISTER
)
port map (
clk => clk,
reset => reset,
amr_base_addrs => amr_base_addrs,
amr_last_addrs => amr_last_addrs,
umr_base_addrs => umr_base_addrs,
umr_last_addrs => umr_last_addrs,
internal_register_idle => iinternal_register_idle,
external_registers_idle => iexternal_registers_idle,
oimm_address => ifetch_oimm_address,
oimm_requestvalid => ifetch_oimm_requestvalid,
oimm_readdata => ifetch_oimm_readdata,
oimm_readdatavalid => ifetch_oimm_readdatavalid,
oimm_waitrequest => ifetch_oimm_waitrequest,
cacheint_oimm_address => icacheint_oimm_address,
cacheint_oimm_byteenable => icacheint_oimm_byteenable,
cacheint_oimm_requestvalid => icacheint_oimm_requestvalid,
cacheint_oimm_readnotwrite => icacheint_oimm_readnotwrite,
cacheint_oimm_writedata => icacheint_oimm_writedata,
cacheint_oimm_readdata => icacheint_oimm_readdata,
cacheint_oimm_readdatavalid => icacheint_oimm_readdatavalid,
cacheint_oimm_waitrequest => icacheint_oimm_waitrequest,
uc_oimm_address => iuc_oimm_address,
uc_oimm_byteenable => iuc_oimm_byteenable,
uc_oimm_requestvalid => iuc_oimm_requestvalid,
uc_oimm_readnotwrite => iuc_oimm_readnotwrite,
uc_oimm_writedata => iuc_oimm_writedata,
uc_oimm_readdata => iuc_oimm_readdata,
uc_oimm_readdatavalid => iuc_oimm_readdatavalid,
uc_oimm_waitrequest => iuc_oimm_waitrequest,
aux_oimm_address => iaux_oimm_address,
aux_oimm_byteenable => iaux_oimm_byteenable,
aux_oimm_requestvalid => iaux_oimm_requestvalid,
aux_oimm_readnotwrite => iaux_oimm_readnotwrite,
aux_oimm_writedata => iaux_oimm_writedata,
aux_oimm_readdata => iaux_oimm_readdata,
aux_oimm_readdatavalid => iaux_oimm_readdatavalid,
aux_oimm_waitrequest => iaux_oimm_waitrequest
);
instruction_cache_gen : if ICACHE_SIZE /= 0 generate
signal ic_oimm_address : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal ic_oimm_burstlength : std_logic_vector(LOG2_BURSTLENGTH downto 0);
signal ic_oimm_burstlength_minus1 : std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
signal ic_oimm_byteenable : std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
signal ic_oimm_requestvalid : std_logic;
signal ic_oimm_readnotwrite : std_logic;
signal ic_oimm_writedata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal ic_oimm_writelast : std_logic;
signal ic_oimm_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal ic_oimm_readdatavalid : std_logic;
signal ic_oimm_waitrequest : std_logic;
begin
instruction_cache : cache_controller
generic map (
CACHE_SIZE => ICACHE_SIZE,
LINE_SIZE => ICACHE_LINE_SIZE,
ADDRESS_WIDTH => REGISTER_SIZE,
INTERNAL_WIDTH => REGISTER_SIZE,
EXTERNAL_WIDTH => ICACHE_EXTERNAL_WIDTH,
LOG2_BURSTLENGTH => LOG2_BURSTLENGTH,
POLICY => READ_ONLY,
REGION_OPTIMIZATIONS => true,
WRITE_FIRST_SUPPORTED => WRITE_FIRST_SUPPORTED
)
port map (
clk => clk,
reset => reset,
from_cache_control_ready => from_icache_control_ready,
to_cache_control_valid => to_icache_control_valid,
to_cache_control_command => to_icache_control_command,
to_cache_control_base => to_cache_control_base,
to_cache_control_last => to_cache_control_last,
precache_idle => iinternal_register_idle,
cache_idle => icache_idle,
cacheint_oimm_address => icacheint_oimm_address,
cacheint_oimm_byteenable => icacheint_oimm_byteenable,
cacheint_oimm_requestvalid => icacheint_oimm_requestvalid,
cacheint_oimm_readnotwrite => icacheint_oimm_readnotwrite,
cacheint_oimm_writedata => icacheint_oimm_writedata,
cacheint_oimm_readdata => icacheint_oimm_readdata,
cacheint_oimm_readdatavalid => icacheint_oimm_readdatavalid,
cacheint_oimm_waitrequest => icacheint_oimm_waitrequest,
c_oimm_address => ic_oimm_address,
c_oimm_burstlength => ic_oimm_burstlength,
c_oimm_burstlength_minus1 => ic_oimm_burstlength_minus1,
c_oimm_byteenable => ic_oimm_byteenable,
c_oimm_requestvalid => ic_oimm_requestvalid,
c_oimm_readnotwrite => ic_oimm_readnotwrite,
c_oimm_writedata => ic_oimm_writedata,
c_oimm_writelast => ic_oimm_writelast,
c_oimm_readdata => ic_oimm_readdata,
c_oimm_readdatavalid => ic_oimm_readdatavalid,
c_oimm_waitrequest => ic_oimm_waitrequest
);
ic_master : axi_master
generic map (
ADDRESS_WIDTH => REGISTER_SIZE,
DATA_WIDTH => REGISTER_SIZE,
ID_WIDTH => AXI_ID_WIDTH,
LOG2_BURSTLENGTH => LOG2_BURSTLENGTH,
MAX_OUTSTANDING_REQUESTS => 0,
REQUEST_REGISTER => IC_REQUEST_REGISTER,
RETURN_REGISTER => IC_RETURN_REGISTER
)
port map (
clk => clk,
reset => reset,
aresetn => aresetn,
master_idle => ic_master_idle,
oimm_address => ic_oimm_address,
oimm_burstlength_minus1 => ic_oimm_burstlength_minus1,
oimm_byteenable => ic_oimm_byteenable,
oimm_requestvalid => ic_oimm_requestvalid,
oimm_readnotwrite => ic_oimm_readnotwrite,
oimm_writedata => ic_oimm_writedata,
oimm_writelast => ic_oimm_writelast,
oimm_readdata => ic_oimm_readdata,
oimm_readdatavalid => ic_oimm_readdatavalid,
oimm_waitrequest => ic_oimm_waitrequest,
AWID => IC_AWID,
AWADDR => IC_AWADDR,
AWLEN => IC_AWLEN,
AWSIZE => IC_AWSIZE,
AWBURST => IC_AWBURST,
AWLOCK => IC_AWLOCK,
AWCACHE => IC_AWCACHE,
AWPROT => IC_AWPROT,
AWVALID => IC_AWVALID,
AWREADY => IC_AWREADY,
WID => IC_WID,
WSTRB => IC_WSTRB,
WVALID => IC_WVALID,
WLAST => IC_WLAST,
WDATA => IC_WDATA,
WREADY => IC_WREADY,
BID => IC_BID,
BRESP => IC_BRESP,
BVALID => IC_BVALID,
BREADY => IC_BREADY,
ARID => IC_ARID,
ARADDR => IC_ARADDR,
ARLEN => IC_ARLEN,
ARSIZE => IC_ARSIZE,
ARBURST => IC_ARBURST,
ARLOCK => IC_ARLOCK,
ARCACHE => IC_ARCACHE,
ARPROT => IC_ARPROT,
ARVALID => IC_ARVALID,
ARREADY => IC_ARREADY,
RID => IC_RID,
RDATA => IC_RDATA,
RRESP => IC_RRESP,
RLAST => IC_RLAST,
RVALID => IC_RVALID,
RREADY => IC_RREADY
);
end generate instruction_cache_gen;
no_instruction_cache_gen : if ICACHE_SIZE = 0 generate
from_icache_control_ready <= '1';
icache_idle <= '1';
ic_master_idle <= '1';
IC_AWID <= (others => '0');
IC_AWADDR <= (others => '0');
IC_AWLEN <= (others => '0');
IC_AWSIZE <= (others => '0');
IC_AWBURST <= (others => '0');
IC_AWLOCK <= (others => '0');
IC_AWCACHE <= (others => '0');
IC_AWPROT <= (others => '0');
IC_AWVALID <= '0';
IC_WID <= (others => '0');
IC_WDATA <= (others => '0');
IC_WSTRB <= (others => '0');
IC_WLAST <= '0';
IC_WVALID <= '0';
IC_BREADY <= '0';
IC_ARID <= (others => '0');
IC_ARADDR <= (others => '0');
IC_ARLEN <= (others => '0');
IC_ARSIZE <= (others => '0');
IC_ARBURST <= (others => '0');
IC_ARLOCK <= (others => '0');
IC_ARCACHE <= (others => '0');
IC_ARPROT <= (others => '0');
IC_ARVALID <= '0';
IC_RREADY <= '0';
end generate no_instruction_cache_gen;
-----------------------------------------------------------------------------
-- Data cache and mux
-----------------------------------------------------------------------------
lsu_oimm_address_aligned <= lsu_oimm_address(lsu_oimm_address'left downto 2) & "00";
data_cache_mux : cache_mux
generic map (
ADDRESS_WIDTH => REGISTER_SIZE,
DATA_WIDTH => REGISTER_SIZE,
MAX_OUTSTANDING_READS => 1,
AUX_MEMORY_REGIONS => AUX_MEMORY_REGIONS,
AMR0_ADDR_BASE => AMR0_ADDR_BASE,
AMR0_ADDR_LAST => AMR0_ADDR_LAST,
UC_MEMORY_REGIONS => UC_MEMORY_REGIONS,
UMR0_ADDR_BASE => UMR0_ADDR_BASE,
UMR0_ADDR_LAST => UMR0_ADDR_LAST,
CACHE_SIZE => DCACHE_SIZE,
CACHE_LINE_SIZE => DCACHE_LINE_SIZE,
INTERNAL_REQUEST_REGISTER => DATA_REQUEST_REGISTER,
INTERNAL_RETURN_REGISTER => DATA_RETURN_REGISTER,
UC_REQUEST_REGISTER => DUC_REQUEST_REGISTER,
UC_RETURN_REGISTER => DUC_RETURN_REGISTER,
AUX_REQUEST_REGISTER => DAUX_REQUEST_REGISTER,
AUX_RETURN_REGISTER => DAUX_RETURN_REGISTER
)
port map (
clk => clk,
reset => reset,
amr_base_addrs => amr_base_addrs,
amr_last_addrs => amr_last_addrs,
umr_base_addrs => umr_base_addrs,
umr_last_addrs => umr_last_addrs,
internal_register_idle => dinternal_register_idle,
external_registers_idle => dexternal_registers_idle,
oimm_address => lsu_oimm_address_aligned,
oimm_byteenable => lsu_oimm_byteenable,
oimm_requestvalid => lsu_oimm_requestvalid,
oimm_readnotwrite => lsu_oimm_readnotwrite,
oimm_writedata => lsu_oimm_writedata,
oimm_readdata => lsu_oimm_readdata,
oimm_readdatavalid => lsu_oimm_readdatavalid,
oimm_waitrequest => lsu_oimm_waitrequest,
cacheint_oimm_address => dcacheint_oimm_address,
cacheint_oimm_byteenable => dcacheint_oimm_byteenable,
cacheint_oimm_requestvalid => dcacheint_oimm_requestvalid,
cacheint_oimm_readnotwrite => dcacheint_oimm_readnotwrite,
cacheint_oimm_writedata => dcacheint_oimm_writedata,
cacheint_oimm_readdata => dcacheint_oimm_readdata,
cacheint_oimm_readdatavalid => dcacheint_oimm_readdatavalid,
cacheint_oimm_waitrequest => dcacheint_oimm_waitrequest,
uc_oimm_address => duc_oimm_address,
uc_oimm_byteenable => duc_oimm_byteenable,
uc_oimm_requestvalid => duc_oimm_requestvalid,
uc_oimm_readnotwrite => duc_oimm_readnotwrite,
uc_oimm_writedata => duc_oimm_writedata,
uc_oimm_readdata => duc_oimm_readdata,
uc_oimm_readdatavalid => duc_oimm_readdatavalid,
uc_oimm_waitrequest => duc_oimm_waitrequest,
aux_oimm_address => daux_oimm_address,
aux_oimm_byteenable => daux_oimm_byteenable,
aux_oimm_requestvalid => daux_oimm_requestvalid,
aux_oimm_readnotwrite => daux_oimm_readnotwrite,
aux_oimm_writedata => daux_oimm_writedata,
aux_oimm_readdata => daux_oimm_readdata,
aux_oimm_readdatavalid => daux_oimm_readdatavalid,
aux_oimm_waitrequest => daux_oimm_waitrequest
);
data_cache_gen : if DCACHE_SIZE /= 0 generate
signal dc_oimm_address : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal dc_oimm_burstlength : std_logic_vector(LOG2_BURSTLENGTH downto 0);
signal dc_oimm_burstlength_minus1 : std_logic_vector(LOG2_BURSTLENGTH-1 downto 0);
signal dc_oimm_byteenable : std_logic_vector((REGISTER_SIZE/8)-1 downto 0);
signal dc_oimm_requestvalid : std_logic;
signal dc_oimm_readnotwrite : std_logic;
signal dc_oimm_writedata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal dc_oimm_writelast : std_logic;
signal dc_oimm_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
signal dc_oimm_readdatavalid : std_logic;
signal dc_oimm_waitrequest : std_logic;
function boolean_to_cache_policy (
constant WRITEBACK : boolean
)
return cache_policy is
variable policy : cache_policy;
begin
if WRITEBACK then
policy := WRITE_BACK;
else
policy := WRITE_THROUGH;
end if;
return policy;
end function boolean_to_cache_policy;
begin
data_cache : cache_controller
generic map (
CACHE_SIZE => DCACHE_SIZE,
LINE_SIZE => DCACHE_LINE_SIZE,
ADDRESS_WIDTH => REGISTER_SIZE,
INTERNAL_WIDTH => REGISTER_SIZE,
EXTERNAL_WIDTH => DCACHE_EXTERNAL_WIDTH,
LOG2_BURSTLENGTH => LOG2_BURSTLENGTH,
POLICY => boolean_to_cache_policy(DCACHE_WRITEBACK),
REGION_OPTIMIZATIONS => true,
WRITE_FIRST_SUPPORTED => WRITE_FIRST_SUPPORTED
)
port map (
clk => clk,
reset => reset,
from_cache_control_ready => from_dcache_control_ready,
to_cache_control_valid => to_dcache_control_valid,
to_cache_control_command => to_dcache_control_command,
to_cache_control_base => to_cache_control_base,
to_cache_control_last => to_cache_control_last,
precache_idle => dinternal_register_idle,
cache_idle => dcache_idle,
cacheint_oimm_address => dcacheint_oimm_address,
cacheint_oimm_byteenable => dcacheint_oimm_byteenable,
cacheint_oimm_requestvalid => dcacheint_oimm_requestvalid,
cacheint_oimm_readnotwrite => dcacheint_oimm_readnotwrite,
cacheint_oimm_writedata => dcacheint_oimm_writedata,
cacheint_oimm_readdata => dcacheint_oimm_readdata,
cacheint_oimm_readdatavalid => dcacheint_oimm_readdatavalid,
cacheint_oimm_waitrequest => dcacheint_oimm_waitrequest,
c_oimm_address => dc_oimm_address,
c_oimm_burstlength => dc_oimm_burstlength,
c_oimm_burstlength_minus1 => dc_oimm_burstlength_minus1,
c_oimm_byteenable => dc_oimm_byteenable,
c_oimm_requestvalid => dc_oimm_requestvalid,
c_oimm_readnotwrite => dc_oimm_readnotwrite,
c_oimm_writedata => dc_oimm_writedata,
c_oimm_writelast => dc_oimm_writelast,
c_oimm_readdata => dc_oimm_readdata,
c_oimm_readdatavalid => dc_oimm_readdatavalid,
c_oimm_waitrequest => dc_oimm_waitrequest
);
dc_master : axi_master
generic map (
ADDRESS_WIDTH => REGISTER_SIZE,
DATA_WIDTH => REGISTER_SIZE,
ID_WIDTH => AXI_ID_WIDTH,
LOG2_BURSTLENGTH => LOG2_BURSTLENGTH,
MAX_OUTSTANDING_REQUESTS => MAX_OUTSTANDING_REQUESTS,
REQUEST_REGISTER => DC_REQUEST_REGISTER,
RETURN_REGISTER => DC_RETURN_REGISTER
)
port map (
clk => clk,
reset => reset,
aresetn => aresetn,
master_idle => dc_master_idle,
oimm_address => dc_oimm_address,
oimm_burstlength_minus1 => dc_oimm_burstlength_minus1,
oimm_byteenable => dc_oimm_byteenable,
oimm_requestvalid => dc_oimm_requestvalid,
oimm_readnotwrite => dc_oimm_readnotwrite,
oimm_writedata => dc_oimm_writedata,
oimm_writelast => dc_oimm_writelast,
oimm_readdata => dc_oimm_readdata,
oimm_readdatavalid => dc_oimm_readdatavalid,
oimm_waitrequest => dc_oimm_waitrequest,
AWID => DC_AWID,
AWADDR => DC_AWADDR,
AWLEN => DC_AWLEN,
AWSIZE => DC_AWSIZE,
AWBURST => DC_AWBURST,
AWLOCK => DC_AWLOCK,
AWCACHE => DC_AWCACHE,
AWPROT => DC_AWPROT,
AWVALID => DC_AWVALID,
AWREADY => DC_AWREADY,
WID => DC_WID,
WSTRB => DC_WSTRB,
WVALID => DC_WVALID,
WLAST => DC_WLAST,
WDATA => DC_WDATA,
WREADY => DC_WREADY,
BID => DC_BID,
BRESP => DC_BRESP,
BVALID => DC_BVALID,
BREADY => DC_BREADY,
ARID => DC_ARID,
ARADDR => DC_ARADDR,
ARLEN => DC_ARLEN,
ARSIZE => DC_ARSIZE,
ARBURST => DC_ARBURST,
ARLOCK => DC_ARLOCK,
ARCACHE => DC_ARCACHE,
ARPROT => DC_ARPROT,
ARVALID => DC_ARVALID,
ARREADY => DC_ARREADY,
RID => DC_RID,
RDATA => DC_RDATA,
RRESP => DC_RRESP,
RLAST => DC_RLAST,
RVALID => DC_RVALID,
RREADY => DC_RREADY
);
end generate data_cache_gen;
no_data_cache_gen : if DCACHE_SIZE = 0 generate
from_dcache_control_ready <= '1';
dcache_idle <= '1';
dc_master_idle <= '1';
DC_AWID <= (others => '0');
DC_AWADDR <= (others => '0');
DC_AWLEN <= (others => '0');
DC_AWSIZE <= (others => '0');
DC_AWBURST <= (others => '0');
DC_AWLOCK <= (others => '0');
DC_AWCACHE <= (others => '0');
DC_AWPROT <= (others => '0');
DC_AWVALID <= '0';
DC_WID <= (others => '0');
DC_WDATA <= (others => '0');
DC_WSTRB <= (others => '0');
DC_WLAST <= '0';
DC_WVALID <= '0';
DC_BREADY <= '0';
DC_ARID <= (others => '0');
DC_ARADDR <= (others => '0');
DC_ARLEN <= (others => '0');
DC_ARSIZE <= (others => '0');
DC_ARBURST <= (others => '0');
DC_ARLOCK <= (others => '0');
DC_ARCACHE <= (others => '0');
DC_ARPROT <= (others => '0');
DC_ARVALID <= '0';
DC_RREADY <= '0';
end generate no_data_cache_gen;
-----------------------------------------------------------------------------
-- LMB auxiliary interface
-----------------------------------------------------------------------------
ilmb_aux_enabled : if LMB_AUX generate
signal iread_in_flight : std_logic;
signal iwrite_in_flight : std_logic;
signal dread_in_flight : std_logic;
signal dwrite_in_flight : std_logic;
begin
ILMB_Addr <= iaux_oimm_address;
ILMB_Byte_Enable <= iaux_oimm_byteenable;
ILMB_Data_Write <= iaux_oimm_writedata;
ILMB_AS <= iaux_oimm_requestvalid and (not iaux_oimm_waitrequest);
ILMB_Read_Strobe <= iaux_oimm_readnotwrite and iaux_oimm_requestvalid and (not iaux_oimm_waitrequest);
ILMB_Write_Strobe <= (not iaux_oimm_readnotwrite) and iaux_oimm_requestvalid and (not iaux_oimm_waitrequest);
DLMB_Addr <= daux_oimm_address;
DLMB_Byte_Enable <= daux_oimm_byteenable;
DLMB_Data_Write <= daux_oimm_writedata;
DLMB_AS <= daux_oimm_requestvalid and (not daux_oimm_waitrequest);
DLMB_Read_Strobe <= daux_oimm_readnotwrite and daux_oimm_requestvalid and (not daux_oimm_waitrequest);
DLMB_Write_Strobe <= (not daux_oimm_readnotwrite) and daux_oimm_requestvalid and (not daux_oimm_waitrequest);
--The LMB spec (which is inside the MicroBlaze Processor Reference Guide)
--is vague about how Wait and Ready differ and can be used. A conservative
--reading is that a new request can be sent as soon as Ready is asserted
--and there's no reason to pay attention to Wait.
--It's not explicitly stated but looking at Xilinx's HDL it's clear that
--Ready can't be asserted on the same cycle as the strobe signals.
process (clk) is
begin
if rising_edge(clk) then
if ILMB_Ready = '1' then
iread_in_flight <= '0';
iwrite_in_flight <= '0';
end if;
if iaux_oimm_requestvalid = '1' and iaux_oimm_waitrequest = '0' then
if iaux_oimm_readnotwrite = '1' then
iread_in_flight <= '1';
else
iwrite_in_flight <= '1';
end if;
end if;
if reset = '1' then
iread_in_flight <= '0';
iwrite_in_flight <= '0';
end if;
end if;
end process;
process (clk) is
begin
if rising_edge(clk) then
if DLMB_Ready = '1' then
dread_in_flight <= '0';
dwrite_in_flight <= '0';
end if;
if daux_oimm_requestvalid = '1' and daux_oimm_waitrequest = '0' then
if daux_oimm_readnotwrite = '1' then
dread_in_flight <= '1';
else
dwrite_in_flight <= '1';
end if;
end if;
if reset = '1' then
dread_in_flight <= '0';
dwrite_in_flight <= '0';
end if;
end if;
end process;
iaux_oimm_readdata <= ILMB_Data_Read;
iaux_oimm_readdatavalid <= ILMB_Ready and iread_in_flight;
iaux_oimm_waitrequest <= (iread_in_flight or iwrite_in_flight) and (not ILMB_Ready);
daux_oimm_readdata <= DLMB_Data_Read;
daux_oimm_readdatavalid <= DLMB_Ready and dread_in_flight;
daux_oimm_waitrequest <= (dread_in_flight or dwrite_in_flight) and (not DLMB_Ready);
end generate ilmb_aux_enabled;
ilmb_aux_disabled : if not LMB_AUX generate
ILMB_Addr <= (others => '0');
ILMB_Byte_Enable <= (others => '0');
ILMB_Data_Write <= (others => '0');
ILMB_AS <= '0';
ILMB_Read_Strobe <= '0';
ILMB_Write_Strobe <= '0';
DLMB_Addr <= (others => '0');
DLMB_Byte_Enable <= (others => '0');
DLMB_Data_Write <= (others => '0');
DLMB_AS <= '0';
DLMB_Read_Strobe <= '0';
DLMB_Write_Strobe <= '0';
end generate ilmb_aux_disabled;
-----------------------------------------------------------------------------
-- AVALON auxiliary interface
-----------------------------------------------------------------------------
avalon_enabled : if AVALON_AUX generate
avm_instruction_address <= iaux_oimm_address;
avm_instruction_read <= iaux_oimm_readnotwrite and iaux_oimm_requestvalid;
iaux_oimm_readdata <= avm_instruction_readdata;
iaux_oimm_waitrequest <= avm_instruction_waitrequest;
iaux_oimm_readdatavalid <= avm_instruction_readdatavalid;
avm_data_address <= daux_oimm_address;
avm_data_byteenable <= daux_oimm_byteenable;
avm_data_read <= daux_oimm_readnotwrite and daux_oimm_requestvalid;
daux_oimm_readdata <= avm_data_readdata;
avm_data_write <= (not daux_oimm_readnotwrite) and daux_oimm_requestvalid;
avm_data_writedata <= daux_oimm_writedata;
daux_oimm_waitrequest <= avm_data_waitrequest;
daux_oimm_readdatavalid <= avm_data_readdatavalid;
end generate avalon_enabled;
avalon_disabled : if not AVALON_AUX generate
avm_data_address <= (others => '0');
avm_data_byteenable <= (others => '0');
avm_data_read <= '0';
avm_data_write <= '0';
avm_data_writedata <= (others => '0');
avm_instruction_address <= (others => '0');
avm_instruction_read <= '0';
end generate avalon_disabled;
-----------------------------------------------------------------------------
-- WISHBONE auxiliary interface
-----------------------------------------------------------------------------
wishbone_enabled : if WISHBONE_AUX generate
signal reading : std_logic;
signal writing : std_logic;
signal awaiting_ack : std_logic;
signal delayed_readdatavalid : std_logic;
signal delayed_readdata : std_logic_vector(REGISTER_SIZE-1 downto 0);
begin
awaiting_ack <= reading or writing;
no_single_cycle_gen : if not WISHBONE_SINGLE_CYCLE_READS generate
daux_oimm_readdata <= data_DAT_I;
daux_oimm_readdatavalid <= data_ACK_I and reading;
end generate no_single_cycle_gen;
single_cycle_gen : if WISHBONE_SINGLE_CYCLE_READS generate
daux_oimm_readdata <= data_DAT_I when delayed_readdatavalid = '0' else delayed_readdata;
daux_oimm_readdatavalid <= (data_ACK_I and reading) or delayed_readdatavalid;
end generate single_cycle_gen;
daux_oimm_waitrequest <= data_STALL_I or (awaiting_ack and (not data_ACK_I));
data_ADR_O <= daux_oimm_address;
data_STB_O <= daux_oimm_requestvalid and ((not awaiting_ack) or data_ACK_I);
data_CYC_O <= daux_oimm_requestvalid and ((not awaiting_ack) or data_ACK_I);
data_CTI_O <= (others => '0');
data_SEL_O <= daux_oimm_byteenable;
data_WE_O <= not daux_oimm_readnotwrite;
data_DAT_O <= daux_oimm_writedata;
process(clk)
begin
if rising_edge(clk) then
delayed_readdata <= data_DAT_I;
delayed_readdatavalid <= '0';
if data_ACK_I = '1' then
reading <= '0';
writing <= '0';
end if;
if daux_oimm_waitrequest = '0' then
--Allow one ACK in flight. Must delay single cycle reads to conform
--to OIMM spec (readdatavalid can't come back on the same cycle as
--read is asserted).
if awaiting_ack = '0' and data_ACK_I = '1' then
delayed_readdatavalid <= daux_oimm_readnotwrite and daux_oimm_requestvalid;
reading <= '0';
writing <= '0';
else
reading <= daux_oimm_readnotwrite and daux_oimm_requestvalid;
writing <= (not daux_oimm_readnotwrite) and daux_oimm_requestvalid;
end if;
end if;
if reset = '1' then
delayed_readdatavalid <= '0';
reading <= '0';
writing <= '0';
end if;
end if;
end process;
instr_ADR_O <= iaux_oimm_address;
instr_CYC_O <= iaux_oimm_readnotwrite and iaux_oimm_requestvalid;
instr_CTI_O <= (others => '0');
instr_STB_O <= iaux_oimm_readnotwrite and iaux_oimm_requestvalid;
iaux_oimm_readdata <= instr_DAT_I;
iaux_oimm_waitrequest <= instr_STALL_I;
iaux_oimm_readdatavalid <= instr_ACK_I;
end generate wishbone_enabled;
wishbone_disabled : if not WISHBONE_AUX generate
data_ADR_O <= (others => '0');
data_STB_O <= '0';
data_CYC_O <= '0';
data_CTI_O <= (others => '0');
data_SEL_O <= (others => '0');
data_WE_O <= '0';
data_DAT_O <= (others => '0');
instr_ADR_O <= (others => '0');
instr_CYC_O <= '0';
instr_CTI_O <= (others => '0');
instr_STB_O <= '0';
end generate wishbone_disabled;
-----------------------------------------------------------------------------
-- AXI4-Lite uncached interface
-----------------------------------------------------------------------------
uc_masters_gen : if UC_MEMORY_REGIONS /= 0 generate
iuc_master : a4l_master
generic map (
ADDRESS_WIDTH => REGISTER_SIZE,
DATA_WIDTH => REGISTER_SIZE,
MAX_OUTSTANDING_REQUESTS => 0
)
port map (
clk => clk,
reset => reset,
aresetn => aresetn,
master_idle => iuc_master_idle,
oimm_address => iuc_oimm_address,
oimm_byteenable => iuc_oimm_byteenable,
oimm_requestvalid => iuc_oimm_requestvalid,
oimm_readnotwrite => iuc_oimm_readnotwrite,
oimm_writedata => iuc_oimm_writedata,
oimm_readdata => iuc_oimm_readdata,
oimm_readdatavalid => iuc_oimm_readdatavalid,
oimm_waitrequest => iuc_oimm_waitrequest,
AWADDR => IUC_AWADDR,
AWPROT => IUC_AWPROT,
AWVALID => IUC_AWVALID,
AWREADY => IUC_AWREADY,
WSTRB => IUC_WSTRB,
WVALID => IUC_WVALID,
WDATA => IUC_WDATA,
WREADY => IUC_WREADY,
BRESP => IUC_BRESP,
BVALID => IUC_BVALID,
BREADY => IUC_BREADY,
ARADDR => IUC_ARADDR,
ARPROT => IUC_ARPROT,
ARVALID => IUC_ARVALID,
ARREADY => IUC_ARREADY,
RDATA => IUC_RDATA,
RRESP => IUC_RRESP,
RVALID => IUC_RVALID,
RREADY => IUC_RREADY
);
duc_master : a4l_master
generic map (
ADDRESS_WIDTH => REGISTER_SIZE,
DATA_WIDTH => REGISTER_SIZE,
MAX_OUTSTANDING_REQUESTS => MAX_OUTSTANDING_REQUESTS
)
port map (
clk => clk,
reset => reset,
aresetn => aresetn,
master_idle => duc_master_idle,
oimm_address => duc_oimm_address,
oimm_byteenable => duc_oimm_byteenable,
oimm_requestvalid => duc_oimm_requestvalid,
oimm_readnotwrite => duc_oimm_readnotwrite,
oimm_writedata => duc_oimm_writedata,
oimm_readdata => duc_oimm_readdata,
oimm_readdatavalid => duc_oimm_readdatavalid,
oimm_waitrequest => duc_oimm_waitrequest,
AWADDR => DUC_AWADDR,
AWPROT => DUC_AWPROT,
AWVALID => DUC_AWVALID,
AWREADY => DUC_AWREADY,
WSTRB => DUC_WSTRB,
WVALID => DUC_WVALID,
WDATA => DUC_WDATA,
WREADY => DUC_WREADY,
BRESP => DUC_BRESP,
BVALID => DUC_BVALID,
BREADY => DUC_BREADY,
ARADDR => DUC_ARADDR,
ARPROT => DUC_ARPROT,
ARVALID => DUC_ARVALID,
ARREADY => DUC_ARREADY,
RDATA => DUC_RDATA,
RRESP => DUC_RRESP,
RVALID => DUC_RVALID,
RREADY => DUC_RREADY
);
end generate uc_masters_gen;
no_uc_masters_gen : if UC_MEMORY_REGIONS = 0 generate
iuc_master_idle <= '1';
duc_master_idle <= '1';
IUC_AWADDR <= (others => '0');
IUC_AWPROT <= (others => '0');
IUC_AWVALID <= '0';
IUC_WDATA <= (others => '0');
IUC_WSTRB <= (others => '0');
IUC_WVALID <= '0';
IUC_BREADY <= '0';
IUC_ARADDR <= (others => '0');
IUC_ARPROT <= (others => '0');
IUC_ARVALID <= '0';
IUC_RREADY <= '0';
DUC_AWADDR <= (others => '0');
DUC_AWPROT <= (others => '0');
DUC_AWVALID <= '0';
DUC_WDATA <= (others => '0');
DUC_WSTRB <= (others => '0');
DUC_WVALID <= '0';
DUC_BREADY <= '0';
DUC_ARADDR <= (others => '0');
DUC_ARPROT <= (others => '0');
DUC_ARVALID <= '0';
DUC_RREADY <= '0';
end generate no_uc_masters_gen;
--Uncached bus signals are AXI4L, translate to AXI3 if needed
IUC_AWID <= (others => '0');
IUC_AWLEN <= (others => '0');
IUC_AWSIZE <= A4L_BURST_SIZE;
IUC_AWBURST <= A4L_BURST_INCR;
IUC_AWLOCK <= A4L_LOCK_VAL;
IUC_AWCACHE <= A4L_CACHE_VAL;
IUC_WID <= (others => '0');
IUC_WLAST <= '1';
IUC_ARID <= (others => '0');
IUC_ARLEN <= (others => '0');
IUC_ARSIZE <= A4L_BURST_SIZE;
IUC_ARBURST <= A4L_BURST_INCR;
IUC_ARLOCK <= A4L_LOCK_VAL;
IUC_ARCACHE <= A4L_CACHE_VAL;
DUC_AWID <= (others => '0');
DUC_AWLEN <= (others => '0');
DUC_AWSIZE <= A4L_BURST_SIZE;
DUC_AWBURST <= A4L_BURST_INCR;
DUC_AWLOCK <= A4L_LOCK_VAL;
DUC_AWCACHE <= A4L_CACHE_VAL;
DUC_WID <= (others => '0');
DUC_WLAST <= '1';
DUC_ARID <= (others => '0');
DUC_ARLEN <= (others => '0');
DUC_ARSIZE <= A4L_BURST_SIZE;
DUC_ARBURST <= A4L_BURST_INCR;
DUC_ARLOCK <= A4L_LOCK_VAL;
DUC_ARCACHE <= A4L_CACHE_VAL;
end architecture rtl;
|
-- opa: Open Processor Architecture
-- Copyright (C) 2014-2016 Wesley W. Terpstra
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
--
-- To apply the GPL to my VHDL, please follow these definitions:
-- Program - The entire collection of VHDL in this project and any
-- netlist or floorplan derived from it.
-- System Library - Any macro that translates directly to hardware
-- e.g. registers, IO pins, or memory blocks
--
-- My intent is that if you include OPA into your project, all of the HDL
-- and other design files that go into the same physical chip must also
-- be released under the GPL. If this does not cover your usage, then you
-- must consult me directly to receive the code under a different license.
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.opa_pkg.all;
use work.opa_isa_base_pkg.all;
use work.opa_functions_pkg.all;
use work.opa_components_pkg.all;
-- Used to implement FP and integer multipliers
entity opa_prim_mul is
generic(
g_wide : natural;
g_regout : boolean;
g_regwal : boolean;
g_target : t_opa_target);
port(
clk_i : in std_logic;
a_i : in std_logic_vector( g_wide-1 downto 0);
b_i : in std_logic_vector( g_wide-1 downto 0);
x_o : out std_logic_vector(2*g_wide-1 downto 0));
end opa_prim_mul;
architecture rtl of opa_prim_mul is
constant c_lut_width : natural := g_target.lut_width;
constant c_add_width : natural := g_target.add_width;
constant c_post_adder : boolean := g_target.post_adder;
-------------------------------------------------------------------------------------------
-- Wallace adder tree section --
-------------------------------------------------------------------------------------------
-- Helpful to simplify wallace recursion
function f_submatrix(rows : natural; x : t_opa_matrix) return t_opa_matrix is
variable result : t_opa_matrix(x'low(1)+rows-1 downto x'low(1), x'range(2));
begin
for i in result'range(1) loop
for j in result'range(2) loop
result(i,j) := x(i,j);
end loop;
end loop;
return result;
end f_submatrix;
-- Reasonable Wallace-tree reduction sizes
type t_options is array(natural range <>) of natural;
constant c_wallace_options : t_options(4 downto 0) := (1, 3, 5, 6, 7);
constant c_wallace_bits_out : natural := f_opa_log2(c_wallace_options(0)+1);
subtype t_wallace_bits_out is std_logic_vector(c_wallace_bits_out-1 downto 0);
type t_wallace_lut is array(natural range <>) of t_wallace_bits_out;
function f_wallace_table(bits : natural) return t_wallace_lut is
variable row_in : unsigned(bits-1 downto 0);
variable row_out : unsigned(t_wallace_bits_out'range);
variable result : t_wallace_lut(2**bits-1 downto 0);
variable c : natural := 0;
begin
for i in result'range loop
row_in := to_unsigned(i, bits);
c := 0; -- count bits
for i in row_in'range loop
if row_in(i) = '1' then c := c + 1; end if;
end loop;
row_out := to_unsigned(c, c_wallace_bits_out);
for j in row_out'range loop
result(i)(j) := row_out(j);
end loop;
end loop;
return result;
end f_wallace_table;
constant c_wallace_lut1 : t_wallace_lut(2**1-1 downto 0) := f_wallace_table(1);
constant c_wallace_lut3 : t_wallace_lut(2**3-1 downto 0) := f_wallace_table(3);
constant c_wallace_lut5 : t_wallace_lut(2**5-1 downto 0) := f_wallace_table(5);
constant c_wallace_lut6 : t_wallace_lut(2**6-1 downto 0) := f_wallace_table(6);
constant c_wallace_lut7 : t_wallace_lut(2**7-1 downto 0) := f_wallace_table(7);
function f_wallace_lut(bits : natural; x : std_logic_vector) return std_logic_vector is
constant c_bad : t_wallace_bits_out := (others => 'X');
begin
if f_opa_safe(x) = '1' then
if bits = 1 then return c_wallace_lut1(to_integer(unsigned(x(0 downto 0)))); end if;
if bits = 3 then return c_wallace_lut3(to_integer(unsigned(x(2 downto 0)))); end if;
if bits = 5 then return c_wallace_lut5(to_integer(unsigned(x(4 downto 0)))); end if;
if bits = 6 then return c_wallace_lut6(to_integer(unsigned(x(5 downto 0)))); end if;
if bits = 7 then return c_wallace_lut7(to_integer(unsigned(x(6 downto 0)))); end if;
assert (false) report "Invalid Wallace reduction" severity failure;
end if;
return c_bad;
end f_wallace_lut;
function f_wallace(x : t_opa_matrix) return t_opa_matrix is
constant rows_in : natural := x'length(1); -- How many rows to combine?
variable rows_out : natural := 0;
variable row : natural := 0;
variable step_in : natural;
variable step_out : natural;
variable result : t_opa_matrix(x'range(1), x'range(2)) := (others => (others => '0'));
variable pad : t_opa_matrix(c_add_width-1 downto 0, x'range(2)) := (others => (others => '0'));
variable chunk : std_logic_vector(c_wallace_options(0)-1 downto 0);
begin
if x'length(1) <= c_add_width then
for i in x'range(1) loop
for j in x'range(2) loop
pad(i,j) := x(i,j);
end loop;
end loop;
return pad;
end if;
while row < rows_in loop
-- Pick reduction step size
step_in := 99; -- should never be read
for i in c_wallace_options'range loop
if c_wallace_options(i) <= c_lut_width and -- supported by hardware?
c_wallace_options(i) <= rows_in-row then -- not too big?
step_in := c_wallace_options(i);
end if;
end loop;
-- This results in a reduction to
step_out := f_opa_log2(step_in+1);
-- Map the wallace tree
for i in x'range(2) loop
chunk := (others => '0');
for j in 0 to step_in-1 loop
chunk(j) := x(row+j, i);
end loop;
chunk(t_wallace_bits_out'range) := f_wallace_lut(step_in, chunk);
for j in 0 to step_out-1 loop
if i+j <= result'high(2) then -- we know multiplication will never carry
result(rows_out+j, i+j) := chunk(j);
end if;
end loop;
end loop;
row := row + step_in;
rows_out := rows_out + step_out;
end loop;
return f_wallace(f_submatrix(rows_out, result));
end f_wallace;
-------------------------------------------------------------------------------------------
-- DSP hardware multiplier section --
-------------------------------------------------------------------------------------------
-- Plan the reduction. Either using a post_adder (_add_) or not (_raw_).
-- If using the post adder, must make sure to use full width so the shift is supported.
constant c_dsp_wide : natural := g_target.mul_width;
constant c_raw_parts : natural := (g_wide+c_dsp_wide-1)/c_dsp_wide;
constant c_raw_mul_wide : natural := (g_wide+c_raw_parts-1)/c_raw_parts; -- use smallest possible
constant c_raw_wallace : natural := 2*c_raw_parts-1;
constant c_raw_wide : natural := c_raw_mul_wide*c_raw_parts;
constant c_add_parts : natural := ((g_wide+2*c_dsp_wide-1)/(2*c_dsp_wide))*2; -- must be even
constant c_add_mul_wide : natural := c_dsp_wide; -- must use HW width so shift is acceptable
constant c_add_wallace : natural := c_add_parts+(c_add_parts/2)-1;
constant c_add_wide : natural := c_add_mul_wide*c_add_parts;
constant c_wallace : natural := f_opa_choose(c_post_adder, c_add_wallace, c_raw_wallace);
constant c_wide : natural := f_opa_choose(c_post_adder, c_add_wide, c_raw_wide);
constant c_num_sum : natural := f_opa_choose(c_wallace<c_add_width, c_wallace, c_add_width);
constant c_zeros : unsigned(c_add_mul_wide-1 downto 0) := (others => '0');
-- Register stages
type t_raw_mul_out is array(c_raw_parts*c_raw_parts -1 downto 0) of unsigned(2*c_raw_mul_wide-1 downto 0);
type t_add_mul_out is array(c_add_parts*c_add_parts/2-1 downto 0) of unsigned(3*c_add_mul_wide-1 downto 0);
type t_sum_in is array(c_num_sum-1 downto 0) of unsigned(2*c_wide-1 downto 0);
signal r_a : unsigned(c_wide-1 downto 0);
signal r_b : unsigned(c_wide-1 downto 0);
signal s_mul_a : t_add_mul_out;
signal s_mul_r : t_raw_mul_out;
signal r_mul_a : t_add_mul_out; -- optional register (g_regwal)
signal r_mul_r : t_raw_mul_out; -- optional register (g_regwal)
signal s_wal_i : t_opa_matrix(c_wallace -1 downto 0, 2*c_wide-1 downto 0) := (others => (others => '0'));
signal s_wal_o : t_opa_matrix(c_add_width-1 downto 0, 2*c_wide-1 downto 0);
signal r_wal : t_sum_in; -- result of wallace tree
signal s_sum3 : unsigned(2*c_wide-1 downto 0);
signal s_sumx : unsigned(2*c_wide-1 downto 0);
signal s_sum : unsigned(2*c_wide-1 downto 0);
signal r_sum : unsigned(2*c_wide-1 downto 0);
begin
check_add_width :
assert (g_target.add_width > 1)
report "add_width must be greater than 1"
severity failure;
check_mul_width :
assert (g_target.mul_width > 0)
report "mul_width must be greater than 0"
severity failure;
-- Register and pad the inputs
edge1 : process(clk_i) is
begin
if rising_edge(clk_i) then
r_a <= (others => '0');
r_b <= (others => '0');
r_a(a_i'range) <= unsigned(a_i);
r_b(b_i'range) <= unsigned(b_i);
end if;
end process;
-- Deal with simple DSP hardware
raw_mul : if not c_post_adder generate
mul_rows : for i in 0 to c_raw_parts-1 generate
mul_cols : for j in 0 to c_raw_parts-1 generate
s_mul_r(i*c_raw_parts + j) <=
r_a(c_raw_mul_wide*(i+1)-1 downto c_raw_mul_wide*i) *
r_b(c_raw_mul_wide*(j+1)-1 downto c_raw_mul_wide*j);
end generate;
end generate;
-- Register the results of native DSP blocks
-- This is bypassed when g_regwal is false
edge2 : process(clk_i) is
begin
if rising_edge(clk_i) then
r_mul_r <= s_mul_r;
end if;
end process;
-- Remap the DSP outputs into the wallace input
-- Example: 7 parts => 12 rows = 2*x - 2
-- AAAAAAA
-- AAAAAAA
-- BBBBBBB
-- BBBBBBB
-- CCCCCCC
-- CCCCCCC
-- DDDDDDD
-- DDDDDDD
-- EEEEEEE
-- EEEEEEE
-- FFFFFFF
-- FFFFFFF
-- GGGGGGG
--GGGGGGG <<= wraps around
rows : for i in 0 to c_raw_parts-1 generate
cols : for j in 0 to c_raw_parts-1 generate
bitsl : for b in 0 to c_raw_mul_wide-1 generate
s_wal_i((2*i + 0) mod c_wallace, (i+j)*c_raw_mul_wide + b) <=
r_mul_r(i*c_raw_parts + j)(b) when g_regwal else
s_mul_r(i*c_raw_parts + j)(b);
end generate;
bitsh : for b in c_raw_mul_wide to 2*c_raw_mul_wide-1 generate
s_wal_i((2*i + 1) mod c_wallace, (i+j)*c_raw_mul_wide + b) <=
r_mul_r(i*c_raw_parts + j)(b) when g_regwal else
s_mul_r(i*c_raw_parts + j)(b);
end generate;
end generate;
end generate;
end generate;
-- Exploit DSP mul+add architecture
add_mul : if c_post_adder generate
mul_rows : for i in 0 to c_add_parts/2-1 generate
mul_cols : for j in 0 to c_add_parts-1 generate
s_mul_a(i*c_add_parts + j) <=
(c_zeros &
(r_a(c_add_mul_wide*(2*i+1)-1 downto c_add_mul_wide*(2*i+0)) *
r_b(c_add_mul_wide*( j+1)-1 downto c_add_mul_wide* j))) +
((r_a(c_add_mul_wide*(2*i+2)-1 downto c_add_mul_wide*(2*i+1)) *
r_b(c_add_mul_wide*( j+1)-1 downto c_add_mul_wide* j)) &
c_zeros);
end generate;
end generate;
edge2 : process(clk_i) is
begin
if rising_edge(clk_i) then
r_mul_a <= s_mul_a;
end if;
end process;
-- Example: 128 has 8 parts => 11 to combine (instead of 15)
-- AAA
-- BBBAAA
-- CCCBBBAAA
-- DDDCCCBBBAAA
-- EEEDDDCCCBBB
-- FFFEEEDDDCCC
-- GGGFFFEEEDDD
-- HHHGGGFFFEEE
-- HHHGGGFFF
-- HHHGGG
-- HHH
rows : for i in 0 to c_add_parts/2-1 generate
cols : for j in 0 to c_add_parts-1 generate -- j = the letters in the example
bits : for b in 0 to 3*c_add_mul_wide-1 generate
s_wal_i(c_add_parts/2-1-i+j, (2*i+j)*c_add_mul_wide + b) <=
r_mul_a(i*c_add_parts + j)(b) when g_regwal else
s_mul_a(i*c_add_parts + j)(b);
end generate;
end generate;
end generate;
end generate;
-- Compute the Wallace tree result
s_wal_o <= f_wallace(s_wal_i);
-- Register the result of a wallace tree
edge3 : process(clk_i) is
begin
if rising_edge(clk_i) then
for i in 0 to c_num_sum-1 loop
r_wal(i) <= unsigned(f_opa_select_row(s_wal_o, i));
end loop;
end if;
end process;
-- Hold quartus' hand. Appalling.
ternary : if c_num_sum = 3 generate
prim : opa_prim_ternary
generic map(
g_wide => 2*c_wide)
port map(
a_i => r_wal(0),
b_i => r_wal(1),
c_i => r_wal(2),
x_o => s_sum3);
end generate;
-- Finally, sum the output
sum : process(r_wal) is
variable acc : unsigned(s_sumx'range);
begin
acc := r_wal(0);
for i in 1 to c_num_sum-1 loop
acc := acc + r_wal(i);
end loop;
s_sumx <= acc;
end process;
s_sum <= s_sum3 when c_num_sum=3 else s_sumx;
reg : process(clk_i) is
begin
if rising_edge(clk_i) then
r_sum <= s_sum;
end if;
end process;
x_o <= std_logic_vector(r_sum(x_o'range)) when g_regout else
std_logic_vector(s_sum(x_o'range));
end rtl;
|
-- $Id: gray_cnt_gen.vhd 418 2011-10-23 20:11:40Z mueller $
--
-- Copyright 2007- by Walter F.J. Mueller <[email protected]>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
-- Software Foundation, either version 2, or at your option any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for complete details.
--
------------------------------------------------------------------------------
-- Module Name: gray_cnt_gen - syn
-- Description: Generic width Gray code counter
--
-- Dependencies: -
-- Test bench: -
-- Target Devices: generic
-- Tool versions: xst 8.1, 8.2, 9.1, 9.2; ghdl 0.18-0.25
-- Revision History:
-- Date Rev Version Comment
-- 2007-12-26 106 1.0 Initial version
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use work.slvtypes.all;
use work.genlib.all;
entity gray_cnt_gen is -- gray code counter, generic vector
generic (
DWIDTH : positive := 4); -- data width
port (
CLK : in slbit; -- clock
RESET : in slbit := '0'; -- reset
CE : in slbit := '1'; -- count enable
DATA : out slv(DWIDTH-1 downto 0) -- data out
);
end entity gray_cnt_gen;
architecture syn of gray_cnt_gen is
begin
assert DWIDTH>=4
report "assert(DWIDTH>=4): only 4 or more bit width supported"
severity failure;
GRAY_4: if DWIDTH=4 generate
begin
CNT : gray_cnt_4
port map (
CLK => CLK,
RESET => RESET,
CE => CE,
DATA => DATA
);
end generate GRAY_4;
GRAY_5: if DWIDTH=5 generate
begin
CNT : gray_cnt_5
port map (
CLK => CLK,
RESET => RESET,
CE => CE,
DATA => DATA
);
end generate GRAY_5;
GRAY_N: if DWIDTH>5 generate
begin
CNT : gray_cnt_n
generic map (
DWIDTH => DWIDTH)
port map (
CLK => CLK,
RESET => RESET,
CE => CE,
DATA => DATA
);
end generate GRAY_N;
end syn;
|
-- $Id: gray_cnt_gen.vhd 418 2011-10-23 20:11:40Z mueller $
--
-- Copyright 2007- by Walter F.J. Mueller <[email protected]>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
-- Software Foundation, either version 2, or at your option any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for complete details.
--
------------------------------------------------------------------------------
-- Module Name: gray_cnt_gen - syn
-- Description: Generic width Gray code counter
--
-- Dependencies: -
-- Test bench: -
-- Target Devices: generic
-- Tool versions: xst 8.1, 8.2, 9.1, 9.2; ghdl 0.18-0.25
-- Revision History:
-- Date Rev Version Comment
-- 2007-12-26 106 1.0 Initial version
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use work.slvtypes.all;
use work.genlib.all;
entity gray_cnt_gen is -- gray code counter, generic vector
generic (
DWIDTH : positive := 4); -- data width
port (
CLK : in slbit; -- clock
RESET : in slbit := '0'; -- reset
CE : in slbit := '1'; -- count enable
DATA : out slv(DWIDTH-1 downto 0) -- data out
);
end entity gray_cnt_gen;
architecture syn of gray_cnt_gen is
begin
assert DWIDTH>=4
report "assert(DWIDTH>=4): only 4 or more bit width supported"
severity failure;
GRAY_4: if DWIDTH=4 generate
begin
CNT : gray_cnt_4
port map (
CLK => CLK,
RESET => RESET,
CE => CE,
DATA => DATA
);
end generate GRAY_4;
GRAY_5: if DWIDTH=5 generate
begin
CNT : gray_cnt_5
port map (
CLK => CLK,
RESET => RESET,
CE => CE,
DATA => DATA
);
end generate GRAY_5;
GRAY_N: if DWIDTH>5 generate
begin
CNT : gray_cnt_n
generic map (
DWIDTH => DWIDTH)
port map (
CLK => CLK,
RESET => RESET,
CE => CE,
DATA => DATA
);
end generate GRAY_N;
end syn;
|
--------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 14:15:52 11/21/2013
-- Design Name:
-- Module Name: C:/Users/etingi01/EPL221_FALL2013_MIPS32DSPprocessorID_948282/My_TOP_outs_tb_948282.vhd
-- Project Name: EPL221_FALL2013_MIPS32DSPprocessorID_948282
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHDL Test Bench Created by ISE for module: My_TOP_948282
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY My_TOP_outs_tb_948282 IS
END My_TOP_outs_tb_948282;
ARCHITECTURE behavior OF My_TOP_outs_tb_948282 IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT My_TOP_948282
PORT(
Clock : IN std_logic;
Reset : IN std_logic;
InstrAddress : OUT std_logic_vector(9 downto 0);
InstructionNum : OUT std_logic_vector(31 downto 0);
RFReadRegister1 : OUT std_logic_vector(4 downto 0);
RFReadRegister2 : OUT std_logic_vector(4 downto 0);
RFWriteRegister : OUT std_logic_vector(4 downto 0);
RFWriteData : OUT std_logic_vector(31 downto 0);
RFRegWrite : OUT std_logic;
RFclk : OUT std_logic;
RFReset : OUT std_logic;
RFReadData1 : OUT std_logic_vector(31 downto 0);
RFReadData2 : OUT std_logic_vector(31 downto 0);
RFReadData3 : OUT std_logic_vector(31 downto 0);
CUOp_Code : OUT std_logic_vector(5 downto 0);
CUFun_Code : OUT std_logic_vector(5 downto 0);
CUMemToRead : OUT std_logic;
CURegDist : OUT std_logic;
CURegWrite : OUT std_logic;
CUMemWrite : OUT std_logic;
CUAlu1 : OUT std_logic;
CUCarryIn : OUT std_logic;
CUAlu0 : OUT std_logic;
CUMemRead : OUT std_logic;
InAlu0 : OUT std_logic;
InAlu1 : OUT std_logic;
InA : OUT std_logic_vector(31 downto 0);
InB : OUT std_logic_vector(31 downto 0);
InB_Inv : OUT std_logic;
OutResult_alu : OUT std_logic_vector(31 downto 0);
RAMDataAddress : OUT std_logic_vector(9 downto 0);
RAMclk : OUT std_logic;
RAMreadData : OUT std_logic;
RAMwriteData : OUT std_logic;
RAMDataIn : OUT std_logic_vector(31 downto 0);
RAMDataOut : OUT std_logic_vector(31 downto 0);
beforeRF_A : OUT std_logic_vector(4 downto 0);
beforeRF_B : OUT std_logic_vector(4 downto 0);
beforeRF_Op : OUT std_logic;
beforeRF_result : OUT std_logic_vector(4 downto 0);
Select1_secMux : OUT std_logic;
A_secMux : OUT std_logic_vector(31 downto 0);
B_secMux : OUT std_logic_vector(31 downto 0);
out_secMux : OUT std_logic_vector(31 downto 0);
Select1_thirdMux : OUT std_logic;
A_thirdMux : OUT std_logic_vector(31 downto 0);
B_thirdMux : OUT std_logic_vector(31 downto 0);
out_thirdMux : OUT std_logic_vector(31 downto 0);
Select1_fourthMux : OUT std_logic;
A_fourthMux : OUT std_logic_vector(31 downto 0);
B_fourthMux : OUT std_logic_vector(31 downto 0);
out_fourthMux : OUT std_logic_vector(31 downto 0);
Select1_lastMux : OUT std_logic;
Select2_lastMux : OUT std_logic;
A_lastMux : OUT std_logic_vector(31 downto 0);
B_lastMux : OUT std_logic_vector(31 downto 0);
C_lastMux : OUT std_logic_vector(31 downto 0);
D_lastMux : OUT std_logic_vector(31 downto 0);
R_lastMux : OUT std_logic_vector(31 downto 0);
RF2_ReadRegister1 : OUT std_logic_vector(4 downto 0);
RF2_ReadRegister2 : OUT std_logic_vector(4 downto 0);
RF2_WriteRegister : OUT std_logic_vector(4 downto 0);
RF2_WriteData : OUT std_logic_vector(31 downto 0);
RF2_RegWrite : OUT std_logic;
RF2_clk : OUT std_logic;
RF2_Reset : OUT std_logic;
RF2_ReadData1 : OUT std_logic_vector(31 downto 0);
RF2_ReadData2 : OUT std_logic_vector(31 downto 0);
RF2_ReadData3 : OUT std_logic_vector(31 downto 0);
address : OUT std_logic_vector(9 downto 0)
);
END COMPONENT;
--Inputs
signal Clock : std_logic := '0';
signal Reset : std_logic := '0';
--Outputs
signal InstrAddress : std_logic_vector(9 downto 0);
signal InstructionNum : std_logic_vector(31 downto 0);
signal RFReadRegister1 : std_logic_vector(4 downto 0);
signal RFReadRegister2 : std_logic_vector(4 downto 0);
signal RFWriteRegister : std_logic_vector(4 downto 0);
signal RFWriteData : std_logic_vector(31 downto 0);
signal RFRegWrite : std_logic;
signal RFclk : std_logic;
signal RFReset : std_logic;
signal RFReadData1 : std_logic_vector(31 downto 0);
signal RFReadData2 : std_logic_vector(31 downto 0);
signal RFReadData3 : std_logic_vector(31 downto 0);
signal CUOp_Code : std_logic_vector(5 downto 0);
signal CUFun_Code : std_logic_vector(5 downto 0);
signal CUMemToRead : std_logic;
signal CURegDist : std_logic;
signal CURegWrite : std_logic;
signal CUMemWrite : std_logic;
signal CUAlu1 : std_logic;
signal CUCarryIn : std_logic;
signal CUAlu0 : std_logic;
signal CUMemRead : std_logic;
signal InAlu0 : std_logic;
signal InAlu1 : std_logic;
signal InA : std_logic_vector(31 downto 0);
signal InB : std_logic_vector(31 downto 0);
signal InB_Inv : std_logic;
signal OutResult_alu : std_logic_vector(31 downto 0);
signal RAMDataAddress : std_logic_vector(9 downto 0);
signal RAMclk : std_logic;
signal RAMreadData : std_logic;
signal RAMwriteData : std_logic;
signal RAMDataIn : std_logic_vector(31 downto 0);
signal RAMDataOut : std_logic_vector(31 downto 0);
signal beforeRF_A : std_logic_vector(4 downto 0);
signal beforeRF_B : std_logic_vector(4 downto 0);
signal beforeRF_Op : std_logic;
signal beforeRF_result : std_logic_vector(4 downto 0);
signal Select1_secMux : std_logic;
signal A_secMux : std_logic_vector(31 downto 0);
signal B_secMux : std_logic_vector(31 downto 0);
signal out_secMux : std_logic_vector(31 downto 0);
signal Select1_thirdMux : std_logic;
signal A_thirdMux : std_logic_vector(31 downto 0);
signal B_thirdMux : std_logic_vector(31 downto 0);
signal out_thirdMux : std_logic_vector(31 downto 0);
signal Select1_fourthMux : std_logic;
signal A_fourthMux : std_logic_vector(31 downto 0);
signal B_fourthMux : std_logic_vector(31 downto 0);
signal out_fourthMux : std_logic_vector(31 downto 0);
signal Select1_lastMux : std_logic;
signal Select2_lastMux : std_logic;
signal A_lastMux : std_logic_vector(31 downto 0);
signal B_lastMux : std_logic_vector(31 downto 0);
signal C_lastMux : std_logic_vector(31 downto 0);
signal D_lastMux : std_logic_vector(31 downto 0);
signal R_lastMux : std_logic_vector(31 downto 0);
signal RF2_ReadRegister1 : std_logic_vector(4 downto 0);
signal RF2_ReadRegister2 : std_logic_vector(4 downto 0);
signal RF2_WriteRegister : std_logic_vector(4 downto 0);
signal RF2_WriteData : std_logic_vector(31 downto 0);
signal RF2_RegWrite : std_logic;
signal RF2_clk : std_logic;
signal RF2_Reset : std_logic;
signal RF2_ReadData1 : std_logic_vector(31 downto 0);
signal RF2_ReadData2 : std_logic_vector(31 downto 0);
signal RF2_ReadData3 : std_logic_vector(31 downto 0);
signal address : std_logic_vector(9 downto 0);
-- Clock period definitions
constant Clock_period : time := 10 ns;
constant RFclk_period : time := 10 ns;
constant RAMclk_period : time := 10 ns;
constant RF2_clk_period : time := 10 ns;
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: My_TOP_948282 PORT MAP (
Clock => Clock,
Reset => Reset,
InstrAddress => InstrAddress,
InstructionNum => InstructionNum,
RFReadRegister1 => RFReadRegister1,
RFReadRegister2 => RFReadRegister2,
RFWriteRegister => RFWriteRegister,
RFWriteData => RFWriteData,
RFRegWrite => RFRegWrite,
RFclk => RFclk,
RFReset => RFReset,
RFReadData1 => RFReadData1,
RFReadData2 => RFReadData2,
RFReadData3 => RFReadData3,
CUOp_Code => CUOp_Code,
CUFun_Code => CUFun_Code,
CUMemToRead => CUMemToRead,
CURegDist => CURegDist,
CURegWrite => CURegWrite,
CUMemWrite => CUMemWrite,
CUAlu1 => CUAlu1,
CUCarryIn => CUCarryIn,
CUAlu0 => CUAlu0,
CUMemRead => CUMemRead,
InAlu0 => InAlu0,
InAlu1 => InAlu1,
InA => InA,
InB => InB,
InB_Inv => InB_Inv,
OutResult_alu => OutResult_alu,
RAMDataAddress => RAMDataAddress,
RAMclk => RAMclk,
RAMreadData => RAMreadData,
RAMwriteData => RAMwriteData,
RAMDataIn => RAMDataIn,
RAMDataOut => RAMDataOut,
beforeRF_A => beforeRF_A,
beforeRF_B => beforeRF_B,
beforeRF_Op => beforeRF_Op,
beforeRF_result => beforeRF_result,
Select1_secMux => Select1_secMux,
A_secMux => A_secMux,
B_secMux => B_secMux,
out_secMux => out_secMux,
Select1_thirdMux => Select1_thirdMux,
A_thirdMux => A_thirdMux,
B_thirdMux => B_thirdMux,
out_thirdMux => out_thirdMux,
Select1_fourthMux => Select1_fourthMux,
A_fourthMux => A_fourthMux,
B_fourthMux => B_fourthMux,
out_fourthMux => out_fourthMux,
Select1_lastMux => Select1_lastMux,
Select2_lastMux => Select2_lastMux,
A_lastMux => A_lastMux,
B_lastMux => B_lastMux,
C_lastMux => C_lastMux,
D_lastMux => D_lastMux,
R_lastMux => R_lastMux,
RF2_ReadRegister1 => RF2_ReadRegister1,
RF2_ReadRegister2 => RF2_ReadRegister2,
RF2_WriteRegister => RF2_WriteRegister,
RF2_WriteData => RF2_WriteData,
RF2_RegWrite => RF2_RegWrite,
RF2_clk => RF2_clk,
RF2_Reset => RF2_Reset,
RF2_ReadData1 => RF2_ReadData1,
RF2_ReadData2 => RF2_ReadData2,
RF2_ReadData3 => RF2_ReadData3,
address => address
);
-- Clock process definitions
Clock_process :process
begin
Clock <= '0';
wait for Clock_period/2;
Clock <= '1';
wait for Clock_period/2;
end process;
RFclk_process :process
begin
RFclk <= '0';
wait for RFclk_period/2;
RFclk <= '1';
wait for RFclk_period/2;
end process;
RAMclk_process :process
begin
RAMclk <= '0';
wait for RAMclk_period/2;
RAMclk <= '1';
wait for RAMclk_period/2;
end process;
RF2_clk_process :process
begin
RF2_clk <= '0';
wait for RF2_clk_period/2;
RF2_clk <= '1';
wait for RF2_clk_period/2;
end process;
-- Stimulus process
stim_proc: process
begin
-- hold reset state for 100 ns.
wait for 100 ns;
wait for Clock_period*10;
Reset<='1';
Clock<='1';
wait for 100 ns;
Clock<='0';
Reset<='0';
wait for 100 ns;
--Reset<='1';
Clock<='1';
wait for 100 ns;
Clock<='0';
--Reset<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
Clock<='1';
wait for 100 ns;
Clock<='0';
wait for 100 ns;
wait;
end process;
END;
|
library ieee;
use ieee.std_logic_1164.all;
library ieee;
use ieee.numeric_std.all;
entity add_419 is
port (
result : out std_logic_vector(26 downto 0);
in_a : in std_logic_vector(26 downto 0);
in_b : in std_logic_vector(26 downto 0)
);
end add_419;
architecture augh of add_419 is
signal carry_inA : std_logic_vector(28 downto 0);
signal carry_inB : std_logic_vector(28 downto 0);
signal carry_res : std_logic_vector(28 downto 0);
begin
-- To handle the CI input, the operation is '1' + CI
-- If CI is not present, the operation is '1' + '0'
carry_inA <= '0' & in_a & '1';
carry_inB <= '0' & in_b & '0';
-- Compute the result
carry_res <= std_logic_vector(unsigned(carry_inA) + unsigned(carry_inB));
-- Set the outputs
result <= carry_res(27 downto 1);
end architecture;
|
library ieee;
use ieee.std_logic_1164.all;
library ieee;
use ieee.numeric_std.all;
entity add_419 is
port (
result : out std_logic_vector(26 downto 0);
in_a : in std_logic_vector(26 downto 0);
in_b : in std_logic_vector(26 downto 0)
);
end add_419;
architecture augh of add_419 is
signal carry_inA : std_logic_vector(28 downto 0);
signal carry_inB : std_logic_vector(28 downto 0);
signal carry_res : std_logic_vector(28 downto 0);
begin
-- To handle the CI input, the operation is '1' + CI
-- If CI is not present, the operation is '1' + '0'
carry_inA <= '0' & in_a & '1';
carry_inB <= '0' & in_b & '0';
-- Compute the result
carry_res <= std_logic_vector(unsigned(carry_inA) + unsigned(carry_inB));
-- Set the outputs
result <= carry_res(27 downto 1);
end architecture;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2848.vhd,v 1.2 2001-10-26 16:30:23 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
entity WHEN is
end WHEN;
ENTITY c13s09b00x00p99n01i02848ent IS
END c13s09b00x00p99n01i02848ent;
ARCHITECTURE c13s09b00x00p99n01i02848arch OF c13s09b00x00p99n01i02848ent IS
BEGIN
TESTING: PROCESS
BEGIN
assert FALSE
report "***FAILED TEST: c13s09b00x00p99n01i02848 - Reserved word WHEN can not be used as an entity name."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s09b00x00p99n01i02848arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2848.vhd,v 1.2 2001-10-26 16:30:23 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
entity WHEN is
end WHEN;
ENTITY c13s09b00x00p99n01i02848ent IS
END c13s09b00x00p99n01i02848ent;
ARCHITECTURE c13s09b00x00p99n01i02848arch OF c13s09b00x00p99n01i02848ent IS
BEGIN
TESTING: PROCESS
BEGIN
assert FALSE
report "***FAILED TEST: c13s09b00x00p99n01i02848 - Reserved word WHEN can not be used as an entity name."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s09b00x00p99n01i02848arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2848.vhd,v 1.2 2001-10-26 16:30:23 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
entity WHEN is
end WHEN;
ENTITY c13s09b00x00p99n01i02848ent IS
END c13s09b00x00p99n01i02848ent;
ARCHITECTURE c13s09b00x00p99n01i02848arch OF c13s09b00x00p99n01i02848ent IS
BEGIN
TESTING: PROCESS
BEGIN
assert FALSE
report "***FAILED TEST: c13s09b00x00p99n01i02848 - Reserved word WHEN can not be used as an entity name."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s09b00x00p99n01i02848arch;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- MMCM_BASE : In order to incorporate this function into the design,
-- VHDL : the following instance declaration needs to be placed
-- instance : in the body of the design code. The instance name
-- declaration : (MMCM_BASE_inst) and/or the port declarations after the
-- code : "=>" declaration maybe changed to properly reference and
-- : connect this function to the design. All inputs and outputs
-- : must be connected.
-- Library : In addition to adding the instance declaration, a use
-- declaration : statement for the UNISIM.vcomponents library needs to be
-- for : added before the entity declaration. This library
-- Xilinx : contains the component declarations for all Xilinx
-- primitives : primitives and points to the models that will be used
-- : for simulation.
-- Copy the following two statements and paste them before the
-- Entity declaration, unless they already exist.
library UNISIM;
use UNISIM.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
entity sys_pll is
generic(
-- 200 MHz input clock
g_clkin_period : real := 5.000;
g_clkbout_mult_f : real := 5.000;
-- 100 MHz output clock
g_clk0_divide_f : real := 10.000;
-- 200 MHz output clock
g_clk1_divide : integer := 5
);
port(
rst_i : in std_logic := '0';
clk_i : in std_logic := '0';
clk0_o : out std_logic;
clk1_o : out std_logic;
locked_o : out std_logic
);
end sys_pll;
architecture syn of sys_pll is
signal s_mmcm_fbin : std_logic;
signal s_mmcm_fbout : std_logic;
signal s_clk0 : std_logic;
signal s_clk1 : std_logic;
begin
-- MMCM_BASE: Base Mixed Mode Clock Manager
-- Virtex-6
-- Xilinx HDL Language Template, version 13.4
-- Clock PLL
cmp_mmcm : MMCM_ADV
generic map(
BANDWIDTH => "OPTIMIZED",
CLKOUT4_CASCADE => FALSE,
CLOCK_HOLD => FALSE,
COMPENSATION => "ZHOLD",
STARTUP_WAIT => FALSE,
DIVCLK_DIVIDE => 1,
CLKFBOUT_MULT_F => g_clkbout_mult_f,
CLKFBOUT_PHASE => 0.000,
CLKFBOUT_USE_FINE_PS => FALSE,
CLKOUT0_DIVIDE_F => g_clk0_divide_f,
CLKOUT0_PHASE => 0.000,
CLKOUT0_DUTY_CYCLE => 0.500,
CLKOUT0_USE_FINE_PS => FALSE,
CLKOUT1_DIVIDE => g_clk1_divide,
CLKOUT1_PHASE => 0.000,
CLKOUT1_DUTY_CYCLE => 0.500,
CLKOUT1_USE_FINE_PS => FALSE,
CLKIN1_PERIOD => g_clkin_period,
REF_JITTER1 => 0.010,
-- Not used. Just to bypass Xilinx errors
-- Just input g_clkin_period input clock period
CLKIN2_PERIOD => g_clkin_period,
REF_JITTER2 => 0.010
)
port map(
-- Output clocks
CLKFBOUT => s_mmcm_fbout,
CLKFBOUTB => open,
CLKOUT0 => s_clk0,
CLKOUT0B => open,
CLKOUT1 => s_clk1,
CLKOUT1B => open,
CLKOUT2 => open,
CLKOUT2B => open,
CLKOUT3 => open,
CLKOUT3B => open,
CLKOUT4 => open,
CLKOUT5 => open,
CLKOUT6 => open,
-- Input clock control
CLKFBIN => s_mmcm_fbin,
CLKIN1 => clk_i,
CLKIN2 => '0',
-- Tied to always select the primary input clock
CLKINSEL => '1',
-- Ports for dynamic reconfiguration
DADDR => (others => '0'),
DCLK => '0',
DEN => '0',
DI => (others => '0'),
DO => open,
DRDY => open,
DWE => '0',
-- Ports for dynamic phase shift
PSCLK => '0',
PSEN => '0',
PSINCDEC => '0',
PSDONE => open,
-- Other control and status signals
LOCKED => locked_o,
CLKINSTOPPED => open,
CLKFBSTOPPED => open,
PWRDWN => '0',
RST => rst_i
);
-- Global clock buffers for "cmp_mmcm" instance
cmp_clkf_bufg : BUFG
port map(
O => s_mmcm_fbin,
I => s_mmcm_fbout
);
cmp_clkout0_buf : BUFG
port map(
O => clk0_o,
I => s_clk0
);
cmp_clkout1_buf : BUFG
port map(
O => clk1_o,
I => s_clk1
);
end syn;
|
-- Author : K. Abdelouahab
-- Company : DREAM - Institut Pascal - Unviersite Clermont Auvergne
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.NUMERIC_STD.all;
entity conv_slave is
port (
clk_proc : in std_logic;
reset_n : in std_logic;
addr_rel_i : in std_logic_vector(3 downto 0);
wr_i : in std_logic;
rd_i : in std_logic;
datawr_i : in std_logic_vector(31 downto 0);
datard_o : out std_logic_vector(31 downto 0);
enable_o : out std_logic;
widthimg_o : out std_logic_vector(15 downto 0);
w11_o : out std_logic_vector (7 downto 0);
w12_o : out std_logic_vector (7 downto 0);
w13_o : out std_logic_vector (7 downto 0);
w21_o : out std_logic_vector (7 downto 0);
w22_o : out std_logic_vector (7 downto 0);
w23_o : out std_logic_vector (7 downto 0);
w31_o : out std_logic_vector (7 downto 0);
w32_o : out std_logic_vector (7 downto 0);
w33_o : out std_logic_vector (7 downto 0);
norm_o : out std_logic_vector (7 downto 0)
);
end conv_slave;
architecture rtl of conv_slave is
constant ENABLE_REG_ADDR : natural := 0;
constant WIDTHIMG_REG_ADDR : natural := 1;
constant W11_ADDR : natural := 2;
constant W12_ADDR : natural := 3;
constant W13_ADDR : natural := 4;
constant W21_ADDR : natural := 5;
constant W22_ADDR : natural := 6;
constant W23_ADDR : natural := 7;
constant W31_ADDR : natural := 8;
constant W32_ADDR : natural := 9;
constant W33_ADDR : natural := 10;
constant NORM_ADDR : natural := 11;
signal enable_reg : std_logic;
signal widthimg_reg : std_logic_vector(15 downto 0);
signal w11_reg : std_logic_vector(7 downto 0);
signal w12_reg : std_logic_vector(7 downto 0);
signal w13_reg : std_logic_vector(7 downto 0);
signal w21_reg : std_logic_vector(7 downto 0);
signal w22_reg : std_logic_vector(7 downto 0);
signal w23_reg : std_logic_vector(7 downto 0);
signal w31_reg : std_logic_vector(7 downto 0);
signal w32_reg : std_logic_vector(7 downto 0);
signal w33_reg : std_logic_vector(7 downto 0);
signal norm_reg : std_logic_vector(7 downto 0);
begin
write_reg : process (clk_proc, reset_n)
begin
if(reset_n='0') then
enable_reg <= '0';
widthimg_reg <= std_logic_vector(to_unsigned(320, 16));
elsif(rising_edge(clk_proc)) then
if(wr_i='1') then
case addr_rel_i is
when std_logic_vector(to_unsigned(ENABLE_REG_ADDR, 4)) => enable_reg <= datawr_i(0);
when std_logic_vector(to_unsigned(WIDTHIMG_REG_ADDR, 4)) => widthimg_reg <= datawr_i(15 downto 0);
when std_logic_vector(to_unsigned(W11_ADDR, 4)) => w11_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(W12_ADDR, 4)) => w12_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(W13_ADDR, 4)) => w13_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(W21_ADDR, 4)) => w21_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(W22_ADDR, 4)) => w22_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(W23_ADDR, 4)) => w23_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(W31_ADDR, 4)) => w31_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(W32_ADDR, 4)) => w32_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(W33_ADDR, 4)) => w33_reg <= datawr_i (7 downto 0);
when std_logic_vector(to_unsigned(NORM_ADDR, 4)) => norm_reg <= datawr_i (7 downto 0);
when others=>
end case;
end if;
end if;
end process;
enable_o <= enable_reg;
widthimg_o <= widthimg_reg;
w11_o <= w11_reg;
w12_o <= w12_reg;
w13_o <= w13_reg;
w21_o <= w21_reg;
w22_o <= w22_reg;
w23_o <= w23_reg;
w31_o <= w31_reg;
w32_o <= w32_reg;
w33_o <= w33_reg;
norm_o <= norm_reg;
end rtl;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2304.vhd,v 1.2 2001-10-26 16:29:47 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s02b06x00p37n01i02304ent IS
END c07s02b06x00p37n01i02304ent;
ARCHITECTURE c07s02b06x00p37n01i02304arch OF c07s02b06x00p37n01i02304ent IS
BEGIN
TESTING: PROCESS
BEGIN
-- Test dividing the predefined type TIME.
assert ((1 min / 1 sec) = 60);
assert ((1 sec / 1 ms) = 1000);
assert ((1 ms / 1 us) = 1000);
wait for 5 us;
assert NOT( ((1 min / 1 sec) = 60) and
((1 sec / 1 ms) = 1000) and
((1 ms / 1 us) = 1000) )
report "***PASSED TEST: c07s02b06x00p37n01i02304"
severity NOTE;
assert ( ((1 min / 1 sec) = 60) and
((1 sec / 1 ms) = 1000) and
((1 ms / 1 us) = 1000) )
report "***FAILED TEST: c07s02b06x00p37n01i02304 - Division of a physical type by another physical type (predefined TIME) test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s02b06x00p37n01i02304arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2304.vhd,v 1.2 2001-10-26 16:29:47 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s02b06x00p37n01i02304ent IS
END c07s02b06x00p37n01i02304ent;
ARCHITECTURE c07s02b06x00p37n01i02304arch OF c07s02b06x00p37n01i02304ent IS
BEGIN
TESTING: PROCESS
BEGIN
-- Test dividing the predefined type TIME.
assert ((1 min / 1 sec) = 60);
assert ((1 sec / 1 ms) = 1000);
assert ((1 ms / 1 us) = 1000);
wait for 5 us;
assert NOT( ((1 min / 1 sec) = 60) and
((1 sec / 1 ms) = 1000) and
((1 ms / 1 us) = 1000) )
report "***PASSED TEST: c07s02b06x00p37n01i02304"
severity NOTE;
assert ( ((1 min / 1 sec) = 60) and
((1 sec / 1 ms) = 1000) and
((1 ms / 1 us) = 1000) )
report "***FAILED TEST: c07s02b06x00p37n01i02304 - Division of a physical type by another physical type (predefined TIME) test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s02b06x00p37n01i02304arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2304.vhd,v 1.2 2001-10-26 16:29:47 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s02b06x00p37n01i02304ent IS
END c07s02b06x00p37n01i02304ent;
ARCHITECTURE c07s02b06x00p37n01i02304arch OF c07s02b06x00p37n01i02304ent IS
BEGIN
TESTING: PROCESS
BEGIN
-- Test dividing the predefined type TIME.
assert ((1 min / 1 sec) = 60);
assert ((1 sec / 1 ms) = 1000);
assert ((1 ms / 1 us) = 1000);
wait for 5 us;
assert NOT( ((1 min / 1 sec) = 60) and
((1 sec / 1 ms) = 1000) and
((1 ms / 1 us) = 1000) )
report "***PASSED TEST: c07s02b06x00p37n01i02304"
severity NOTE;
assert ( ((1 min / 1 sec) = 60) and
((1 sec / 1 ms) = 1000) and
((1 ms / 1 us) = 1000) )
report "***FAILED TEST: c07s02b06x00p37n01i02304 - Division of a physical type by another physical type (predefined TIME) test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s02b06x00p37n01i02304arch;
|
-- NEED RESULT: ARCH00267: Parameters are initialized passed
-- NEED RESULT: ARCH00267: Parameters are initialized passed
-------------------------------------------------------------------------------
--
-- Copyright (c) 1989 by Intermetrics, Inc.
-- All rights reserved.
--
-------------------------------------------------------------------------------
--
-- TEST NAME:
--
-- CT00267
--
-- AUTHOR:
--
-- D. Hyman
--
-- TEST OBJECTIVES:
--
-- 2.1.1.1 (1)
-- 2.1.1.1 (2)
-- 2.1.1.1 (3)
-- 2.1.1.1 (4)
--
-- DESIGN UNIT ORDERING:
--
-- E00000(ARCH00267)
-- ENT00267_Test_Bench(ARCH00267_Test_Bench)
--
-- REVISION HISTORY:
--
-- 17-JUL-1987 - initial revision
-- 08-JUN-1988 - EL - remove tests of out params being initialize
--
-- NOTES:
--
-- ACCESS TYPES ARE FIXED AT NULL VALUES
--
-- self-checking
--
use WORK.STANDARD_TYPES.all ;
architecture ARCH00267 of E00000 is
procedure proc1( int_in : in integer ;
real_in : in real ;
bool_in : in boolean ;
bit_in : in bit ;
chr_in : in character ;
lev_in : in severity_level ;
time_in : in time ;
phys_in : in t_phys1 ;
int_inout : inout integer ;
real_inout : inout real ;
bool_inout : inout boolean ;
bit_inout : inout bit ;
chr_inout : inout character ;
lev_inout : inout severity_level ;
time_inout : inout time ;
phys_inout : inout t_phys1 ;
acc_inout : inout a_bit_vector ;
int_out : out integer ;
real_out : out real ;
bool_out : out boolean ;
bit_out : out bit ;
chr_out : out character ;
lev_out : out severity_level ;
time_out : out time ;
phys_out : out t_phys1 ;
acc_out : out a_bit_vector ) is
begin
-- this tests 2.1.1.1 (1) and 2.1.1.1 (2)
test_report ( "ARCH00267" ,
"Parameters are initialized " ,
(int_in = 5) and
(real_in = 3.14159) and
(bool_in = true) and -- note: bool covers enum types
(bit_in = '0') and
(chr_in = 'Z') and
(lev_in = WARNING) and
(time_in = 10ms) and
(phys_in = phys1_2) and
(int_inout = integer'right) and
(real_inout = real'right) and
(bool_inout = boolean'right) and
(bit_inout = bit'right) and
(chr_inout = character'right) and
(lev_inout = severity_level'right) and
(time_inout = time'right) and
(phys_inout = t_phys1'right) and
(acc_inout = null)
) ;
-- now set the inout & out parms
int_inout := 20 ;
real_inout := 25.5 ;
bool_inout := false ;
bit_inout := '0' ;
chr_inout := 'Y' ;
lev_inout := NOTE ;
time_inout := 2 ps;
phys_inout := phys1_3 ;
acc_inout := null ;
int_out := 20 ;
real_out := 25.5 ;
bool_out := true ;
bit_out := '1' ;
chr_out := 'Y' ;
lev_out := NOTE ;
time_out := 2 ps;
phys_out := phys1_3 ;
acc_out := null ;
end proc1 ;
begin
P :
process
variable int_inout : integer := integer'right ;
variable real_inout : real := real'right ;
variable bool_inout : boolean := boolean'right ;
variable bit_inout : bit := bit'right ;
variable chr_inout : character := character'right ;
variable lev_inout : severity_level := severity_level'right ;
variable time_inout : time := time'right ;
variable phys_inout : t_phys1 := t_phys1'right ;
variable acc_inout : a_bit_vector := null ;
variable int_out : integer := integer'right ;
variable real_out : real := real'right ;
variable bool_out : boolean := boolean'right ;
variable bit_out : bit := bit'right ;
variable chr_out : character := character'right ;
variable lev_out : severity_level := severity_level'right ;
variable time_out : time := time'right ;
variable phys_out : t_phys1 := t_phys1'right ;
variable acc_out : a_bit_vector := null ;
begin
proc1( int_in => 5,
real_in => 3.14159,
bool_in => true,
bit_in => '0',
chr_in => 'Z',
lev_in => WARNING,
time_in => 10ms,
phys_in => phys1_2,
int_inout => int_inout,
real_inout => real_inout,
bool_inout => bool_inout,
bit_inout => bit_inout,
chr_inout => chr_inout,
lev_inout => lev_inout,
time_inout => time_inout,
phys_inout => phys_inout,
acc_inout => acc_inout,
int_out => int_out,
real_out => real_out,
bool_out => bool_out,
bit_out => bit_out,
chr_out => chr_out,
lev_out => lev_out,
time_out => time_out,
phys_out => phys_out,
acc_out => acc_out
) ;
-- this tests 2.1.1.1 (3)
test_report ( "ARCH00267" ,
"Parameters are initialized " ,
(int_inout = 20) and
(real_inout = 25.5) and
(bool_inout = false) and
(bit_inout = '0') and
(chr_inout = 'Y') and
(lev_inout = NOTE) and
(time_inout = 2 ps) and
(phys_inout = phys1_3) and
(acc_inout = null) and
(int_out = 20) and
(real_out = 25.5) and
(bool_out = true) and
(bit_out = '1') and
(chr_out = 'Y') and
(lev_out = NOTE) and
(time_out = 2 ps) and
(phys_out = phys1_3) and
(acc_out = null)
) ;
wait ;
end process P ;
end ARCH00267 ;
entity ENT00267_Test_Bench is
end ENT00267_Test_Bench ;
architecture ARCH00267_Test_Bench of ENT00267_Test_Bench is
begin
L1:
block
component UUT
end component ;
for CIS1 : UUT use entity WORK.E00000 ( ARCH00267 ) ;
begin
CIS1 : UUT ;
end block L1 ;
end ARCH00267_Test_Bench ;
|
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.tb_package.all;
-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;
entity bit_in_gen is
Port ( command_i : in command_rec;
enable_o : out std_logic;
done_o : out std_logic_vector(gen_number downto 0)
);
end bit_in_gen;
architecture Behavioral of bit_in_gen is
signal s_enable : std_logic:='0';
signal s_done_o : std_logic;
begin
done_o(0) <= 'Z';
done_o(1) <= 'Z';
done_o(2) <= 'Z';
done_o(3) <= 'Z';
done_o(4) <= 'Z';
done_o(5) <= 'Z';
done_o(6) <= s_done_o;
enable_o <= s_enable;
p_main: process
variable value1 : string(1 to 8);
begin
s_done_o <= '0';
wait on command_i;
if command_i.gen_number=6 then
if command_i.mnemonic(1 to 6)="enable" then
if command_i.value1(8)='1' then
s_enable <= '1';
else
s_enable <= '0';
end if;
elsif command_i.mnemonic(1 to 4)="stop" then
-- start <= false;
end if;
s_done_o <= '1';
wait on s_done_o;
end if;
end process p_main;
end Behavioral;
|
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`protect end_protected
|
-- megafunction wizard: %Serial Flash Loader%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: altserial_flash_loader
-- ============================================================
-- File Name: SFL.vhd
-- Megafunction Name(s):
-- altserial_flash_loader
--
-- Simulation Library Files(s):
-- altera_mf
-- ============================================================
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 9.1 Build 222 10/21/2009 SJ Full Version
-- ************************************************************
--Copyright (C) 1991-2009 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any output files from any of the foregoing
--(including device programming or simulation files), and any
--associated documentation or information are expressly subject
--to the terms and conditions of the Altera Program License
--Subscription Agreement, Altera MegaCore Function License
--Agreement, or other applicable license agreement, including,
--without limitation, that your use is for the sole purpose of
--programming logic devices manufactured by Altera and sold by
--Altera or its authorized distributors. Please refer to the
--applicable agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY altera_mf;
USE altera_mf.all;
ENTITY SFL IS
PORT
(
noe_in : IN STD_LOGIC
);
END SFL;
ARCHITECTURE SYN OF sfl IS
COMPONENT altserial_flash_loader
GENERIC (
enable_shared_access : STRING;
enhanced_mode : NATURAL;
intended_device_family : STRING;
lpm_type : STRING
);
PORT (
noe : IN STD_LOGIC
);
END COMPONENT;
BEGIN
altserial_flash_loader_component : altserial_flash_loader
GENERIC MAP (
enable_shared_access => "OFF",
enhanced_mode => 0,
intended_device_family => "Arria GX",
lpm_type => "altserial_flash_loader"
)
PORT MAP (
noe => noe_in
);
END SYN;
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Arria GX"
-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
-- Retrieval info: CONSTANT: ENABLE_SHARED_ACCESS STRING "OFF"
-- Retrieval info: CONSTANT: ENHANCED_MODE NUMERIC "0"
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Arria GX"
-- Retrieval info: USED_PORT: noe_in 0 0 0 0 INPUT NODEFVAL "noe_in"
-- Retrieval info: CONNECT: @noe 0 0 0 0 noe_in 0 0 0 0
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL.vhd TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL.inc TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL.cmp FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL.bsf TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL_inst.vhd FALSE
-- Retrieval info: LIB_FILE: altera_mf
|
-- megafunction wizard: %Serial Flash Loader%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: altserial_flash_loader
-- ============================================================
-- File Name: SFL.vhd
-- Megafunction Name(s):
-- altserial_flash_loader
--
-- Simulation Library Files(s):
-- altera_mf
-- ============================================================
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 9.1 Build 222 10/21/2009 SJ Full Version
-- ************************************************************
--Copyright (C) 1991-2009 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any output files from any of the foregoing
--(including device programming or simulation files), and any
--associated documentation or information are expressly subject
--to the terms and conditions of the Altera Program License
--Subscription Agreement, Altera MegaCore Function License
--Agreement, or other applicable license agreement, including,
--without limitation, that your use is for the sole purpose of
--programming logic devices manufactured by Altera and sold by
--Altera or its authorized distributors. Please refer to the
--applicable agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY altera_mf;
USE altera_mf.all;
ENTITY SFL IS
PORT
(
noe_in : IN STD_LOGIC
);
END SFL;
ARCHITECTURE SYN OF sfl IS
COMPONENT altserial_flash_loader
GENERIC (
enable_shared_access : STRING;
enhanced_mode : NATURAL;
intended_device_family : STRING;
lpm_type : STRING
);
PORT (
noe : IN STD_LOGIC
);
END COMPONENT;
BEGIN
altserial_flash_loader_component : altserial_flash_loader
GENERIC MAP (
enable_shared_access => "OFF",
enhanced_mode => 0,
intended_device_family => "Arria GX",
lpm_type => "altserial_flash_loader"
)
PORT MAP (
noe => noe_in
);
END SYN;
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Arria GX"
-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
-- Retrieval info: CONSTANT: ENABLE_SHARED_ACCESS STRING "OFF"
-- Retrieval info: CONSTANT: ENHANCED_MODE NUMERIC "0"
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Arria GX"
-- Retrieval info: USED_PORT: noe_in 0 0 0 0 INPUT NODEFVAL "noe_in"
-- Retrieval info: CONNECT: @noe 0 0 0 0 noe_in 0 0 0 0
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL.vhd TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL.inc TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL.cmp FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL.bsf TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL SFL_inst.vhd FALSE
-- Retrieval info: LIB_FILE: altera_mf
|
-- ----------------------------------------------------------------------------
-- Title : Standard VITAL Memory Package
-- :
-- Library : Vital_Memory
-- :
-- Developers : IEEE DASC Timing Working Group (TWG), PAR 1076.4
-- : Ekambaram Balaji, LSI Logic Corporation
-- : Jose De Castro, Consultant
-- : Prakash Bare, GDA Technologies
-- : William Yam, LSI Logic Corporation
-- : Dennis Brophy, Model Technology
-- :
-- Purpose : This packages defines standard types, constants, functions
-- : and procedures for use in developing ASIC memory models.
-- :
-- ----------------------------------------------------------------------------
--
-- ----------------------------------------------------------------------------
-- Modification History :
-- ----------------------------------------------------------------------------
-- Ver:|Auth:| Date:| Changes Made:
-- 0.1 | eb |071796| First prototye as part of VITAL memory proposal
-- 0.2 | jdc |012897| Initial prototyping with proposed MTM scheme
-- 0.3 | jdc |090297| Extensive updates for TAG review (functional)
-- 0.4 | eb |091597| Changed naming conventions for VitalMemoryTable
-- | | | Added interface of VitalMemoryCrossPorts() &
-- | | | VitalMemoryViolation().
-- 0.5 | jdc |092997| Completed naming changes thoughout package body.
-- | | | Testing with simgle port test model looks ok.
-- 0.6 | jdc |121797| Major updates to the packages:
-- | | | - Implement VitalMemoryCrossPorts()
-- | | | - Use new VitalAddressValueType
-- | | | - Use new VitalCrossPortModeType enum
-- | | | - Overloading without SamePort args
-- | | | - Honor erroneous address values
-- | | | - Honor ports disabled with 'Z'
-- | | | - Implement implicit read 'M' table symbol
-- | | | - Cleanup buses to use (H DOWNTO L)
-- | | | - Message control via MsgOn,HeaderMsg,PortName
-- | | | - Tested with 1P1RW,2P2RW,4P2R2W,4P4RW cases
-- 0.7 | jdc |052698| Bug fixes to the packages:
-- | | | - Fix failure with negative Address values
-- | | | - Added debug messages for VMT table search
-- | | | - Remove 'S' for action column (only 's')
-- | | | - Remove 's' for response column (only 'S')
-- | | | - Remove 'X' for action and response columns
-- 0.8 | jdc |061298| Implemented VitalMemoryViolation()
-- | | | - Minimal functionality violation tables
-- | | | - Missing:
-- | | | - Cannot handle wide violation variables
-- | | | - Cannot handle sub-word cases
-- | | | Fixed IIC version of MemoryMatch
-- | | | Fixed 'M' vs 'm' switched on debug output
-- | | | TO BE DONE:
-- | | | - Implement 'd' corrupting a single bit
-- | | | - Implement 'D' corrupting a single bit
-- 0.9 |eb/sc|080498| Added UNDEF value for VitalPortFlagType
-- 0.10|eb/sc|080798| Added CORRUPT value for VitalPortFlagType
-- 0.11|eb/sc|081798| Added overloaded function interface for
-- | | | VitalDeclareMemory
-- 0.14| jdc |113198| Merging of memory functionality and version
-- | | | 1.4 9/17/98 of timing package from Prakash
-- 0.15| jdc |120198| Major development of VMV functionality
-- 0.16| jdc |120298| Complete VMV functionlality for initial testing
-- | | | - New ViolationTableCorruptMask() procedure
-- | | | - New MemoryTableCorruptMask() procedure
-- | | | - HandleMemoryAction():
-- | | | - Removed DataOutBus bogus output
-- | | | - Replaced DataOutTmp with DataInTmp
-- | | | - Added CorruptMask input handling
-- | | | - Implemented 'd','D' using CorruptMask
-- | | | - CorruptMask on 'd','C','L','D','E'
-- | | | - CorruptMask ignored on 'c','l','e'
-- | | | - Changed 'l','d','e' to set PortFlag to CORRUPT
-- | | | - Changed 'L','D','E' to set PortFlag to CORRUPT
-- | | | - Changed 'c','l','d','e' to ignore HighBit, LowBit
-- | | | - Changed 'C','L','D','E' to use HighBit, LowBit
-- | | | - HandleDataAction():
-- | | | - Added CorruptMask input handling
-- | | | - Implemented 'd','D' using CorruptMask
-- | | | - CorruptMask on 'd','C','L','D','E'
-- | | | - CorruptMask ignored on 'l','e'
-- | | | - Changed 'l','d','e' to set PortFlag to CORRUPT
-- | | | - Changed 'L','D','E' to set PortFlag to CORRUPT
-- | | | - Changed 'l','d','e' to ignore HighBit, LowBit
-- | | | - Changed 'L','D','E' to use HighBit, LowBit
-- | | | - MemoryTableLookUp():
-- | | | - Added MsgOn table debug output
-- | | | - Uses new MemoryTableCorruptMask()
-- | | | - ViolationTableLookUp():
-- | | | - Uses new ViolationTableCorruptMask()
-- 0.17| jdc |120898| - Added VitalMemoryViolationSymbolType,
-- | | | VitalMemoryViolationTableType data
-- | | | types but not used yet (need to discuss)
-- | | | - Added overload for VitalMemoryViolation()
-- | | | which does not have array flags
-- | | | - Bug fixes for VMV functionality:
-- | | | - ViolationTableLookUp() not handling '-' in
-- | | | scalar violation matching
-- | | | - VitalMemoryViolation() now normalizes
-- | | | VFlagArrayTmp'LEFT as LSB before calling
-- | | | ViolationTableLookUp() for proper scanning
-- | | | - ViolationTableCorruptMask() had to remove
-- | | | normalization of CorruptMaskTmp and
-- | | | ViolMaskTmp for proper MSB:LSB corruption
-- | | | - HandleMemoryAction(), HandleDataAction()
-- | | | - Removed 'D','E' since not being used
-- | | | - Use XOR instead of OR for corrupt masks
-- | | | - Now 'd' is sensitive to HighBit, LowBit
-- | | | - Fixed LowBit overflow in bit writeable case
-- | | | - MemoryTableCorruptMask()
-- | | | - ViolationTableCorruptMask()
-- | | | - VitalMemoryTable()
-- | | | - VitalMemoryCrossPorts()
-- | | | - Fixed VitalMemoryViolation() failing on
-- | | | error AddressValue from earlier VMT()
-- | | | - Minor cleanup of code formatting
-- 0.18| jdc |032599| - In VitalDeclareMemory()
-- | | | - Added BinaryLoadFile formal arg and
-- | | | modified LoadMemory() to handle bin
-- | | | - Added NOCHANGE to VitalPortFlagType
-- | | | - For VitalCrossPortModeType
-- | | | - Added CpContention enum
-- | | | - In HandleDataAction()
-- | | | - Set PortFlag := NOCHANGE for 'S'
-- | | | - In HandleMemoryAction()
-- | | | - Set PortFlag := NOCHANGE for 's'
-- | | | - In VitalMemoryTable() and
-- | | | VitalMemoryViolation()
-- | | | - Honor PortFlag = NOCHANGE returned
-- | | | from HandleMemoryAction()
-- | | | - In VitalMemoryCrossPorts()
-- | | | - Fixed Address = AddressJ for all
-- | | | conditions of DoWrCont & DoCpRead
-- | | | - Handle CpContention like WrContOnly
-- | | | under CpReadOnly conditions, with
-- | | | associated memory message changes
-- | | | - Handle PortFlag = NOCHANGE like
-- | | | PortFlag = READ for actions
-- | | | - Modeling change:
-- | | | - Need to init PortFlag every delta
-- | | | PortFlag_A := (OTHES => UNDEF);
-- | | | - Updated InternalTimingCheck code
-- 0.19| jdc |042599| - Fixes for bit-writeable cases
-- | | | - Check PortFlag after HandleDataAction
-- | | | in VitalMemoryViolation()
-- 0.20| jdc |042599| - Merge PortFlag changes from Prakash
-- | | | and Willian:
-- | | | VitalMemorySchedulePathDelay()
-- | | | VitalMemoryExpandPortFlag()
-- 0.21| jdc |072199| - Changed VitalCrossPortModeType enums,
-- | | | added new CpReadAndReadContention.
-- | | | - Fixed VitalMemoryCrossPorts() parameter
-- | | | SamePortFlag to INOUT so that it can
-- | | | set CORRUPT or READ value.
-- | | | - Fixed VitalMemoryTable() where PortFlag
-- | | | setting by HandleDataAction() is being
-- | | | ignored when HandleMemoryAction() sets
-- | | | PortFlagTmp to NOCHANGE.
-- | | | - Fixed VitalMemoryViolation() to set
-- | | | all bits of PortFlag when violating.
-- 0.22| jdc |072399| - Added HIGHZ to PortFlagType. HandleData
-- | | | checks whether the previous state is HIGHZ.
-- | | | If yes then portFlag should be NOCHANGE
-- | | | for VMPD to ignore IORetain corruption.
-- | | | The idea is that the first Z should be
-- | | | propagated but later ones should be ignored.
-- | | |
-- 0.23| jdc |100499| - Took code checked in by Dennis 09/28/99
-- | | | - Changed VitalPortFlagType to record of
-- | | | new VitalPortStateType to hold current,
-- | | | previous values and separate disable.
-- | | | Also created VitalDefaultPortFlag const.
-- | | | Removed usage of PortFlag NOCHANGE
-- | | | - VitalMemoryTable() changes:
-- | | | Optimized return when all curr = prev
-- | | | AddressValue is now INOUT to optimize
-- | | | Transfer PF.MemoryCurrent to MemoryPrevious
-- | | | Transfer PF.DataCurrent to DataPrevious
-- | | | Reset PF.OutputDisable to FALSE
-- | | | Expects PortFlag init in declaration
-- | | | No need to init PortFlag every delta
-- | | | - VitalMemorySchedulePathDelay() changes:
-- | | | Initialize with VitalDefaultPortFlag
-- | | | Check PortFlag.OutputDisable
-- | | | - HandleMemoryAction() changes:
-- | | | Set value of PortFlag.MemoryCurrent
-- | | | Never set PortFlag.OutputDisable
-- | | | - HandleDataAction() changes:
-- | | | Set value of PortFlag.DataCurrent
-- | | | Set PortFlag.DataCurrent for HIGHZ
-- | | | - VitalMemoryCrossPorts() changes:
-- | | | Check/set value of PF.MemoryCurrent
-- | | | Check value of PF.OutputDisable
-- | | | - VitalMemoryViolation() changes:
-- | | | Fixed bug - not reading inout PF value
-- | | | Clean up setting of PortFlag
-- 0.24| jdc |100899| - Modified update of PF.OutputDisable
-- | | | to correctly accomodate 2P1W1R case:
-- | | | the read port should not exhibit
-- | | | IO retain corrupt when reading
-- | | | addr unrelated to addr being written.
-- 0.25| jdc |100999| - VitalMemoryViolation() change:
-- | | | Fixed bug with RDNWR mode incorrectly
-- | | | updating the PF.OutputDisable
-- 0.26| jdc |100999| - VitalMemoryCrossPorts() change:
-- | | | Fixed bugs with update of PF
-- 0.27| jdc |101499| - VitalMemoryCrossPorts() change:
-- | | | Added DoRdWrCont message (ErrMcpRdWrCo,
-- | | | Memory cross port read/write data only
-- | | | contention)
-- | | | - VitalMemoryTable() change:
-- | | | Set PF.OutputDisable := TRUE for the
-- | | | optimized cases.
-- 0.28| pb |112399| - Added 8 VMPD procedures for vector
-- | | | PathCondition support. Now the total
-- | | | number of overloadings for VMPD is 24.
-- | | | - Number of overloadings for SetupHold
-- | | | procedures increased to 5. Scalar violations
-- | | | are not supported anymore. Vector checkEnabled
-- | | | support is provided through the new overloading
-- 0.29| jdc |120999| - HandleMemoryAction() HandleDataAction()
-- | | | Reinstated 'D' and 'E' actions but
-- | | | with new PortFlagType
-- | | | - Updated file handling syntax, must compile
-- | | | with -93 syntax now.
-- 0.30| jdc |022300| - Formated for 80 column max width
-- ----------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.Vital_Timing.all;
USE IEEE.Vital_Primitives.all;
LIBRARY STD;
USE STD.TEXTIO.ALL;
-- ----------------------------------------------------------------------------
PACKAGE BODY Vital_Memory IS
-- ----------------------------------------------------------------------------
-- Timing Section
-- ----------------------------------------------------------------------------
FILE LogFile : TEXT OPEN write_mode IS "delayLog";
FILE Output : TEXT OPEN write_mode IS "STD_OUTPUT";
-- Added for turning off the debug msg..
CONSTANT PrintDebugMsg : STD_ULOGIC := '0';
-- '0' - don't print in STD OUTPUT
-- '1' - print in STD OUTPUT
-- Type and constant definitions for type conversion.
TYPE MVL9_TO_CHAR_TBL IS ARRAY (STD_ULOGIC) OF character;
--constant MVL9_to_char: MVL9_TO_CHAR_TBL := "UX01ZWLH-";
CONSTANT MVL9_to_char: MVL9_TO_CHAR_TBL := "XX01ZX010";
-- ----------------------------------------------------------------------------
-- STD_LOGIC WRITE UTILITIES
-- ----------------------------------------------------------------------------
PROCEDURE WRITE(
l : INOUT line;
val : IN std_logic_vector;
justify : IN side := right;
field : IN width := 0
) IS
VARIABLE invect : std_logic_vector(val'LENGTH DOWNTO 1);
VARIABLE ins : STRING(val'LENGTH DOWNTO 1);
BEGIN
invect := val;
FOR I IN invect'length DOWNTO 1 LOOP
ins(I) := MVL9_to_char(invect(I));
END LOOP;
WRITE(L, ins, justify, field);
END;
PROCEDURE WRITE(
l : INOUT line;
val : IN std_ulogic;
justify : IN side := right;
field : in width := 0
) IS
VARIABLE ins : CHARACTER;
BEGIN
ins := MVL9_to_char(val);
WRITE(L, ins, justify, field);
END;
-- ----------------------------------------------------------------------------
PROCEDURE DelayValue(
InputTime : IN TIME ;
outline : INOUT LINE
) IS
CONSTANT header : STRING := "TIME'HIGH";
BEGIN
IF(InputTime = TIME'HIGH) THEN
WRITE(outline, header);
ELSE
WRITE(outline, InputTime);
END IF;
END DelayValue;
-- ----------------------------------------------------------------------------
PROCEDURE PrintScheduleDataArray (
ScheduleDataArray : IN VitalMemoryScheduleDataVectorType
) IS
VARIABLE outline1 : LINE;
VARIABLE outline2 : LINE;
VARIABLE value : TIME;
CONSTANT empty : STRING := " ";
CONSTANT header1 : STRING := "i Age PropDly RetainDly";
CONSTANT header2 : STRING := "i Sc.Value Output Lastvalue Sc.Time";
BEGIN
WRITE (outline1, empty);
WRITE (outline1, NOW);
outline2 := outline1;
WRITELINE (LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITE (outline1, header1);
outline2 := outline1;
WRITELINE (LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
FOR i IN ScheduleDataArray'RANGE LOOP
WRITE (outline1, i );
WRITE (outline1, empty);
DelayValue(ScheduleDataArray(i).InputAge, outline1);
WRITE (outline1, empty);
DelayValue(ScheduleDataArray(i).PropDelay, outline1);
WRITE (outline1, empty);
DelayValue(ScheduleDataArray(i).OutputRetainDelay, outline1);
outline2 := outline1;
WRITELINE (LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
END LOOP;
WRITE (outline1, header2);
outline2 := outline1;
WRITELINE (LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
FOR i IN ScheduleDataArray'RANGE LOOP
WRITE (outline1, i );
WRITE (outline1, empty);
WRITE (outline1, ScheduleDataArray(i).ScheduleValue);
WRITE (outline1, empty);
WRITE (outline1, ScheduleDataArray(i).OutputData);
WRITE (outline1, empty);
WRITE (outline1, ScheduleDataArray(i).LastOutputValue );
WRITE (outline1, empty);
DelayValue(ScheduleDataArray(i).ScheduleTime, outline1);
outline2 := outline1;
WRITELINE (LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
END LOOP;
WRITE (outline1, empty);
WRITE (outline2, empty);
WRITELINE (LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (Output, outline2);
END IF;
END PrintScheduleDataArray;
-- ----------------------------------------------------------------------------
PROCEDURE PrintArcType (
ArcType : IN VitalMemoryArcType
) IS
VARIABLE outline1, outline2 : LINE;
CONSTANT empty : STRING := " ";
CONSTANT cross : STRING := "CrossArc";
CONSTANT para : STRING := "ParallelArc";
CONSTANT sub : STRING := "SubWordArc";
CONSTANT Header1 : STRING := "Path considered @ ";
CONSTANT Header2 : STRING := " is ";
BEGIN
WRITELINE (LogFile, outline1);
WRITE (outline1, header1);
WRITE (outline1, NOW);
WRITE (outline1, empty);
WRITE (outline1, header2);
WRITE (outline1, empty);
case ArcType is
WHEN CrossArc =>
WRITE (outline1, cross);
WHEN ParallelArc =>
WRITE (outline1, para);
WHEN SubwordArc =>
WRITE (outline1, sub);
END CASE;
outline2 := outline1 ;
-- Appears on STD OUT
IF (PrintDebugMsg = '1') THEN
WRITELINE (Output, outline1);
END IF;
WRITELINE (LogFile, outline2);
END PrintArcType;
-- ----------------------------------------------------------------------------
-- This returns the value picked from the delay array
-- ----------------------------------------------------------------------------
PROCEDURE PrintDelay (
outbitpos : IN INTEGER;
InputArrayLow : IN INTEGER;
InputArrayHigh : IN INTEGER;
debugprop : IN VitalTimeArrayT;
debugretain : IN VitalTimeArrayT
) IS
VARIABLE outline1 : LINE;
VARIABLE outline2 : LINE;
VARIABLE outline3 : LINE;
VARIABLE outline4 : LINE;
VARIABLE outline5 : LINE;
VARIABLE outline6 : LINE;
CONSTANT empty : STRING := " ";
CONSTANT empty5 : STRING := " ";
CONSTANT header1 : STRING := "Prop. delays : ";
CONSTANT header2 : STRING := "Retain delays : ";
CONSTANT header3 : STRING := "output bit : ";
BEGIN
WRITE(outline1, header3);
WRITE(outline1, outbitpos);
outline2 := outline1;
WRITELINE(LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE(output, outline2);
END IF;
WRITE(outline1, header1);
WRITE (outline1, empty5);
FOR i IN InputArrayHigh DOWNTO InputArrayLow LOOP
DelayValue(debugprop(i), outline1);
WRITE(outline1, empty);
END LOOP;
outline2 := outline1;
WRITELINE(LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE(output, outline2);
END IF;
WRITE(outline1, header2);
WRITE (outline1, empty5);
FOR i in InputArrayHigh DOWNTO InputArrayLow LOOP
DelayValue(debugretain(i), outline1);
WRITE(outline1, empty);
END LOOP;
outline2 := outline1;
WRITELINE(LogFile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE(output, outline2);
END IF;
END PrintDelay;
-- ----------------------------------------------------------------------------
PROCEDURE DebugMsg1 IS
CONSTANT header1:STRING:= "******************************************";
CONSTANT header2 :STRING:="Entering the process because of an i/p change";
variable outline1, outline2 : LINE;
BEGIN
WRITE(outline1, header1);
outline2 := outline1;
WRITELINE (Logfile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITE(outline1, header2);
outline2 := outline1;
WRITELINE (Logfile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITE(outline1, header1);
outline2 := outline1;
WRITELINE (Logfile, outline1);
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
END DebugMsg1;
-- ----------------------------------------------------------------------------
PROCEDURE ScheduleDebugMsg IS
CONSTANT header1 : STRING := "******************************************";
CONSTANT header2 : STRING := "Finished executing all the procedures";
VARIABLE outline1 : LINE;
VARIABLE outline2 : LINE;
BEGIN
WRITE(outline1, header1);
outline2 := outline1;
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITELINE (Logfile, outline1);
WRITE(outline1, header2);
outline2 := outline1;
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITELINE (Logfile, outline1);
WRITE(outline1, header1);
outline2 := outline1;
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITELINE (Logfile, outline1);
END ScheduleDebugMsg;
-- ----------------------------------------------------------------------------
PROCEDURE PrintInputName(
InputSignalName : IN STRING
) IS
VARIABLE outline1 : LINE;
VARIABLE outline2 : LINE;
CONSTANT header1 : STRING := "***Changing input is ";
CONSTANT header2 : STRING := "(";
CONSTANT header3 : STRING := ")";
CONSTANT header4 : STRING := "****";
CONSTANT header5 : STRING := "******************************************";
CONSTANT header6 : STRING:="Entering the process because of an i/p change";
CONSTANT empty : STRING := " ";
BEGIN
WRITE(outline1, header5);
outline2 := outline1;
WRITELINE (output, outline1);
WRITELINE (Logfile, outline2);
WRITE(outline1, header6);
outline2 := outline1;
WRITELINE (output, outline1);
WRITELINE (Logfile, outline2);
WRITE(outline1, header5);
outline2 := outline1;
WRITELINE (output, outline1);
WRITELINE (Logfile, outline2);
WRITE(outline1, header1);
WRITE(outline1, InputSignalName);
WRITE(outline1, empty);
WRITE(outline1, now);
WRITE(outline1, empty);
WRITE(outline1, header4);
WRITELINE (output, outline1);
WRITELINE (Logfile, outline2);
END PrintInputName;
-- ----------------------------------------------------------------------------
PROCEDURE PrintInputChangeTime(
ChangeTimeArray : IN VitalTimeArrayT
) IS
VARIABLE outline1 : LINE;
VARIABLE outline2 : LINE;
CONSTANT header5 : STRING := "*************************************";
CONSTANT header6 : STRING:="ChangeTime Array : ";
CONSTANT empty : STRING := " ";
BEGIN
WRITE(outline1, header5);
outline2 := outline1;
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITELINE (Logfile, outline1);
WRITE(outline1, header6);
FOR i in ChangeTimeArray'range LOOP
WRITE(outline1, ChangeTimeArray(i));
WRITE(outline1, empty);
END LOOP;
outline2 := outline1;
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITELINE (Logfile, outline1);
WRITE(outline1, header5);
outline2 := outline1;
IF (PrintDebugMsg = '1') THEN
WRITELINE (output, outline2);
END IF;
WRITELINE (Logfile, outline1);
END PrintInputChangeTime;
-- ----------------------------------------------------------------------------
PROCEDURE PrintInputChangeTime(
ChangeTime : IN Time
) IS
VARIABLE ChangeTimeArray : VitalTimeArrayT(0 DOWNTO 0);
BEGIN
ChangeTimeArray(0) := ChangeTime;
PrintInputChangeTime(ChangeTimeArray);
END PrintInputChangeTime;
-- ----------------------------------------------------------------------------
-- for debug purpose
CONSTANT MaxNoInputBits : INTEGER := 1000;
TYPE VitalMemoryDelayType IS RECORD
PropDelay : TIME;
OutputRetainDelay : TIME;
END RECORD;
-- ----------------------------------------------------------------------------
-- PROCEDURE: IntToStr
--
-- PARAMETERS: InputInt - Integer to be converted to String.
-- ResultStr - String buffer for converted Integer
-- AppendPos - Position in buffer to place result
--
-- DESCRIPTION: This procedure is used to convert an input integer
-- into a string representation. The converted string
-- may be placed at a specific position in the result
-- buffer.
--
-- ----------------------------------------------------------------------------
PROCEDURE IntToStr (
InputInt : IN INTEGER ;
ResultStr : INOUT STRING ( 1 TO 256) ;
AppendPos : INOUT NATURAL
) IS
-- Look-up table. Given an int, we can get the character.
TYPE integer_table_type IS ARRAY (0 TO 9) OF CHARACTER ;
CONSTANT integer_table : integer_table_type :=
('0', '1', '2', '3', '4', '5', '6', '7', '8', '9') ;
-- Local variables used in this function.
VARIABLE inpVal : INTEGER := inputInt ;
VARIABLE divisor : INTEGER := 10 ;
VARIABLE tmpStrIndex : INTEGER := 1 ;
VARIABLE tmpStr : STRING ( 1 TO 256 ) ;
BEGIN
IF ( inpVal = 0 ) THEN
tmpStr(tmpStrIndex) := integer_table ( 0 ) ;
tmpStrIndex := tmpStrIndex + 1 ;
ELSE
WHILE ( inpVal > 0 ) LOOP
tmpStr(tmpStrIndex) := integer_table (inpVal mod divisor);
tmpStrIndex := tmpStrIndex + 1 ;
inpVal := inpVal / divisor ;
END LOOP ;
END IF ;
IF (appendPos /= 1 ) THEN
resultStr(appendPos) := ',' ;
appendPos := appendPos + 1 ;
END IF ;
FOR i IN tmpStrIndex-1 DOWNTO 1 LOOP
resultStr(appendPos) := tmpStr(i) ;
appendPos := appendPos + 1 ;
END LOOP ;
END IntToStr ;
-- ----------------------------------------------------------------------------
TYPE CheckType IS (
SetupCheck,
HoldCheck,
RecoveryCheck,
RemovalCheck,
PulseWidCheck,
PeriodCheck
);
TYPE CheckInfoType IS RECORD
Violation : BOOLEAN;
CheckKind : CheckType;
ObsTime : TIME;
ExpTime : TIME;
DetTime : TIME;
State : X01;
END RECORD;
TYPE LogicCvtTableType IS ARRAY (std_ulogic) OF CHARACTER;
TYPE HiLoStrType IS ARRAY (std_ulogic RANGE 'X' TO '1') OF STRING(1 TO 4);
CONSTANT LogicCvtTable : LogicCvtTableType
:= ( 'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-');
CONSTANT HiLoStr : HiLoStrType := (" X ", " Low", "High" );
TYPE EdgeSymbolMatchType IS ARRAY (X01,X01,VitalEdgeSymbolType) OF BOOLEAN;
-- last value, present value, edge symbol
CONSTANT EdgeSymbolMatch : EdgeSymbolMatchType :=
(
'X' =>
( 'X'=>( OTHERS => FALSE),
'0'=>('N'|'F'|'v'|'E'|'D'|'*' => TRUE, OTHERS => FALSE ),
'1'=>('P'|'R'|'^'|'E'|'A'|'*' => TRUE, OTHERS => FALSE )
),
'0' =>
( 'X'=>( 'r'|'p'|'R'|'A'|'*' => TRUE, OTHERS => FALSE ),
'0'=>( OTHERS => FALSE ),
'1'=>( '/'|'P'|'p'|'R'|'*' => TRUE, OTHERS => FALSE )
),
'1' =>
( 'X'=>( 'f'|'n'|'F'|'D'|'*' => TRUE, OTHERS => FALSE ),
'0'=>( '\'|'N'|'n'|'F'|'*' => TRUE, OTHERS => FALSE ),
'1'=>( OTHERS => FALSE )
)
);
-- ----------------------------------------------------------------------------
FUNCTION Minimum (
CONSTANT t1, t2 : IN TIME
) RETURN TIME IS
BEGIN
IF (t1 < t2) THEN RETURN (t1); ELSE RETURN (t2); END IF;
END Minimum;
-- ----------------------------------------------------------------------------
FUNCTION Maximum (
CONSTANT t1, t2 : IN TIME
) RETURN TIME IS
BEGIN
IF (t1 < t2) THEN RETURN (t2); ELSE RETURN (t1); END IF;
END Maximum;
-- ----------------------------------------------------------------------------
-- FUNCTION: VitalMemoryCalcDelay
-- Description: Select Transition dependent Delay.
-- Used internally by VitalMemorySelectDelay.
-- ----------------------------------------------------------------------------
FUNCTION VitalMemoryCalcDelay (
CONSTANT NewVal : IN STD_ULOGIC := 'X';
CONSTANT OldVal : IN STD_ULOGIC := 'X';
CONSTANT Delay : IN VitalDelayType01ZX
) RETURN VitalMemoryDelayType IS
VARIABLE Result : VitalMemoryDelayType;
BEGIN
CASE Oldval IS
WHEN '0' | 'L' =>
CASE Newval IS
WHEN '0' | 'L' =>
Result.PropDelay := Delay(tr10);
WHEN '1' | 'H' =>
Result.PropDelay := Delay(tr01);
WHEN 'Z' =>
Result.PropDelay := Delay(tr0Z);
WHEN OTHERS =>
Result.PropDelay := Minimum(Delay(tr01), Delay(tr0Z));
END CASE;
Result.OutputRetainDelay := Delay(tr0X);
WHEN '1' | 'H' =>
CASE Newval IS
WHEN '0' | 'L' =>
Result.PropDelay := Delay(tr10);
WHEN '1' | 'H' =>
Result.PropDelay := Delay(tr01);
WHEN 'Z' =>
Result.PropDelay := Delay(tr1Z);
WHEN OTHERS =>
Result.PropDelay := Minimum(Delay(tr10), Delay(tr1Z));
END CASE;
Result.OutputRetainDelay := Delay(tr1X);
WHEN 'Z' =>
CASE Newval IS
WHEN '0' | 'L' =>
Result.PropDelay := Delay(trZ0);
WHEN '1' | 'H' =>
Result.PropDelay := Delay(trZ1);
WHEN 'Z' =>
Result.PropDelay := Maximum(Delay(tr1Z), Delay(tr0Z));
WHEN OTHERS =>
Result.PropDelay := Minimum(Delay(trZ1), Delay(trZ0));
END CASE;
Result.OutputRetainDelay := Delay(trZX);
WHEN OTHERS =>
CASE Newval IS
WHEN '0' | 'L' =>
Result.PropDelay := Maximum(Delay(tr10), Delay(trZ0));
WHEN '1' | 'H' =>
Result.PropDelay := Maximum(Delay(tr01), Delay(trZ1));
WHEN 'Z' =>
Result.PropDelay := Maximum(Delay(tr1Z), Delay(tr0Z));
WHEN OTHERS =>
Result.PropDelay := Maximum(Delay(tr10), Delay(tr01));
END CASE;
Result.OutputRetainDelay := Minimum(Delay(tr1X), Delay(tr0X));
END CASE;
RETURN Result;
END VitalMemoryCalcDelay;
-- ----------------------------------------------------------------------------
FUNCTION VitalMemoryCalcDelay (
CONSTANT NewVal : IN STD_ULOGIC := 'X';
CONSTANT OldVal : IN STD_ULOGIC := 'X';
CONSTANT Delay : IN VitalDelayType01Z
) RETURN VitalMemoryDelayType IS
VARIABLE Result : VitalMemoryDelayType;
BEGIN
CASE Oldval IS
WHEN '0' | 'L' =>
CASE Newval IS
WHEN '0' | 'L' => Result.PropDelay := Delay(tr10);
WHEN '1' | 'H' => Result.PropDelay := Delay(tr01);
WHEN OTHERS =>
Result.PropDelay := Minimum(Delay(tr01), Delay(tr10));
END CASE;
Result.OutputRetainDelay := Delay(tr0Z);
WHEN '1' | 'H' =>
CASE Newval IS
WHEN '0' | 'L' => Result.PropDelay := Delay(tr10);
WHEN '1' | 'H' => Result.PropDelay := Delay(tr01);
WHEN OTHERS =>
Result.PropDelay := Minimum(Delay(tr10), Delay(tr01));
END CASE;
Result.OutputRetainDelay := Delay(tr1Z);
WHEN OTHERS =>
Result.PropDelay := Maximum(Delay(tr10),Delay(tr01));
Result.OutputRetainDelay := Minimum(Delay(tr1Z),Delay(tr0Z));
END CASE;
RETURN Result;
END VitalMemoryCalcDelay;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryUpdateInputChangeTime (
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
VARIABLE NumBitsPerSubword : INTEGER
) IS
VARIABLE LastInputValue : STD_LOGIC_VECTOR(InputSignal'LENGTH-1 downto 0);
VARIABLE InSignalNorm : STD_LOGIC_VECTOR(InputSignal'LENGTH-1 downto 0);
VARIABLE ChangeTimeNorm : VitalTimeArrayT(InputSignal'LENGTH-1 downto 0);
VARIABLE BitsPerWord : INTEGER;
BEGIN
LastInputValue := InputSignal'LAST_VALUE;
IF NumBitsPerSubword = DefaultNumBitsPerSubword THEN
BitsPerWord := InputSignal'LENGTH;
ELSE
BitsPerWord := NumBitsPerSubword;
END IF;
FOR i IN InSignalNorm'RANGE LOOP
IF (InSignalNorm(i) /= LastInputValue(i)) THEN
ChangeTimeNorm(i/BitsPerWord) := NOW - InputSignal'LAST_EVENT;
ELSE
ChangeTimeNorm(i/BitsPerWord) := InputChangeTimeArray(i);
END IF;
END LOOP;
FOR i IN ChangeTimeNorm'RANGE LOOP
ChangeTimeNorm(i) := ChangeTimeNorm(i/BitsPerword);
END LOOP;
InputChangeTimeArray := ChangeTimeNorm;
-- for debug purpose only
PrintInputChangeTime(InputChangeTimeArray);
END VitalMemoryUpdateInputChangeTime;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemoryUpdateInputChangeTime
-- Description: Time since previous event for each bit of the input
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryUpdateInputChangeTime (
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR
) IS
VARIABLE LastInputValue : STD_LOGIC_VECTOR(InputSignal'RANGE) ;
BEGIN
LastInputValue := InputSignal'LAST_VALUE;
FOR i IN InputSignal'RANGE LOOP
IF (InputSignal(i) /= LastInputValue(i)) THEN
InputChangeTimeArray(i) := NOW - InputSignal'LAST_EVENT;
END IF;
END LOOP;
-- for debug purpose only
PrintInputChangeTime(InputChangeTimeArray);
END VitalMemoryUpdateInputChangeTime;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryUpdateInputChangeTime (
VARIABLE InputChangeTime : INOUT TIME;
SIGNAL InputSignal : IN STD_ULOGIC
) IS
BEGIN
InputChangeTime := NOW - InputSignal'LAST_EVENT;
-- for debug purpose only
PrintInputChangeTime(InputChangeTime);
END VitalMemoryUpdateInputChangeTime;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryExpandPortFlag (
CONSTANT PortFlag : IN VitalPortFlagVectorType;
CONSTANT NumBitsPerSubword : IN INTEGER;
VARIABLE ExpandedPortFlag : OUT VitalPortFlagVectorType
) IS
VARIABLE PortFlagNorm : VitalPortFlagVectorType(
PortFlag'LENGTH-1 downto 0) := PortFlag;
VARIABLE ExpandedPortFlagNorm : VitalPortFlagVectorType(
ExpandedPortFlag'LENGTH-1 downto 0);
VARIABLE SubwordIndex : INTEGER;
BEGIN
FOR Index IN INTEGER RANGE 0 to ExpandedPortFlag'LENGTH-1 LOOP
IF NumBitsPerSubword = DefaultNumBitsPerSubword THEN
SubwordIndex := 0;
ELSE
SubwordIndex := Index / NumBitsPerSubword;
END IF;
ExpandedPortFlagNorm(Index) := PortFlagNorm(SubWordIndex);
END LOOP;
ExpandedPortFlag := ExpandedPortFlagNorm;
END VitalMemoryExpandPortFlag;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemorySelectDelay
-- Description : Select Propagation Delay. Used internally by
-- VitalMemoryAddPathDelay.
-- ----------------------------------------------------------------------------
-- ----------------------------------------------------------------------------
-- VitalDelayArrayType01ZX
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySelectDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
VARIABLE InputChangeTimeArray : IN VitalTimeArrayT;
CONSTANT OutputSignalName : IN STRING :="";
CONSTANT PathDelayArray : IN VitalDelayArrayType01ZX;
CONSTANT ArcType : IN VitalMemoryArcType;
CONSTANT PathConditionArray : IN VitalBoolArrayT;
CONSTANT OutputRetainFlag : IN BOOLEAN
) IS
VARIABLE InputArrayLow : INTEGER := 0;
VARIABLE InputArrayHigh : INTEGER := 0;
VARIABLE DelayArrayIndex : INTEGER := 0;
VARIABLE NumBitsPerSubWord : INTEGER := DefaultNumBitsPerSubword;
VARIABLE NewValue : STD_ULOGIC;
VARIABLE OldValue : STD_ULOGIC;
VARIABLE OutputLength : INTEGER := 0;
VARIABLE OutArrayIndex : INTEGER;
VARIABLE PropDelay : TIME;
VARIABLE RetainDelay : TIME;
VARIABLE CurPropDelay : TIME;
VARIABLE CurRetainDelay : TIME;
VARIABLE InputAge : TIME;
VARIABLE CurInputAge : TIME;
VARIABLE InputChangeTimeNorm : VitalTimeArrayT(
InputChangeTimeArray'LENGTH-1 downto 0):=InputChangeTimeArray;
VARIABLE DelayArrayNorm : VitalDelayArrayType01ZX(
PathDelayArray'LENGTH-1 downto 0):= PathDelayArray;
VARIABLE ScheduleDataArrayNorm : VitalMemoryScheduleDatavectorType
(ScheduleDataArray'LENGTH-1 downto 0):= ScheduleDataArray;
-- for debug purpose
VARIABLE debugprop : VitalTimeArrayT(MaxNoInputBits-1 downto 0);
VARIABLE debugretain : VitalTimeArrayT(MaxNoInputBits-1 downto 0);
BEGIN
-- for debug purpose
PrintArcType(ArcType);
OutputLength := ScheduleDataArray'LENGTH;
FOR OutBitPos IN 0 to (OutputLength -1) LOOP
NEXT WHEN PathConditionArray(OutBitPos) = FALSE;
NEXT WHEN ((ScheduleDataArrayNorm(OutBitPos).ScheduleValue
= ScheduleDataArrayNorm(OutBitPos).OutputData) AND
(ScheduleDataArrayNorm(OutBitPos).ScheduleTime <= NOW) AND
(OutputRetainFlag = FALSE ));
NewValue := ScheduleDataArrayNorm(OutBitPos).OutputData;
OldValue := ScheduleDataArrayNorm(OutBitPos).LastOutputValue;
PropDelay :=ScheduleDataArrayNorm(OutBitPos).PropDelay;
InputAge := ScheduleDataArrayNorm(OutBitPos).InputAge;
RetainDelay:=ScheduleDataArrayNorm(OutBitPos).OutputRetainDelay;
NumBitsPerSubWord:=ScheduleDataArrayNorm(OutBitPos).NumBitsPerSubWord;
CASE ArcType IS
WHEN ParallelArc =>
InputArrayLow := OutBitPos;
InputArrayHigh := OutBitPos;
DelayArrayIndex := OutBitPos;
WHEN CrossArc =>
InputArrayLow := 0;
InputArrayHigh := InputChangeTimeArray'LENGTH - 1 ;
DelayArrayIndex := OutBitPos;
WHEN SubwordArc =>
InputArrayLow := OutBitPos / NumBitsPerSubWord;
InputArrayHigh := OutBitPos / NumBitsPerSubWord;
DelayArrayIndex := OutBitPos +
(OutputLength * (OutBitPos / NumBitsPerSubWord));
END CASE;
FOR i IN InputArrayLow TO InputArrayHigh LOOP
(CurPropDelay,CurRetainDelay) :=
VitalMemoryCalcDelay (
NewValue, OldValue, DelayArrayNorm(DelayArrayIndex)
);
IF (OutputRetainFlag = FALSE) THEN
CurRetainDelay := TIME'HIGH;
END IF;
-- for debug purpose
debugprop(i) := CurPropDelay;
debugretain(i) := CurRetainDelay;
IF ArcType = CrossArc THEN
DelayArrayIndex := DelayArrayIndex + OutputLength;
END IF;
-- If there is one input change at a time, then choose the
-- delay from that input. If there is simultaneous input
-- change, then choose the minimum of propagation delays
IF (InputChangeTimeNorm(i) < 0 ns)THEN
CurInputAge := TIME'HIGH;
ELSE
CurInputAge := NOW - InputChangeTimeNorm(i);
END IF;
IF (CurInputAge < InputAge)THEN
PropDelay := CurPropDelay;
RetainDelay := CurRetainDelay;
InputAge := CurInputAge;
ELSIF (CurInputAge = InputAge)THEN
IF (CurPropDelay < PropDelay) THEN
PropDelay := CurPropDelay;
END IF;
IF (OutputRetainFlag = TRUE) THEN
IF (CurRetainDelay < RetainDelay) THEN
RetainDelay := CurRetainDelay;
END IF;
END IF;
END IF;
END LOOP;
-- Store it back to data strucutre
ScheduleDataArrayNorm(OutBitPos).PropDelay := PropDelay;
ScheduleDataArrayNorm(OutBitPos).OutputRetainDelay:= RetainDelay;
ScheduleDataArrayNorm(OutBitPos).InputAge := InputAge;
-- for debug purpose
PrintDelay(outbitPos,InputArrayLow, InputArrayHigh,
debugprop, debugretain);
END LOOP;
ScheduleDataArray := ScheduleDataArrayNorm;
END VitalMemorySelectDelay;
-- ----------------------------------------------------------------------------
-- VitalDelayArrayType01Z
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySelectDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
VARIABLE InputChangeTimeArray : IN VitalTimeArrayT;
CONSTANT OutputSignalName : IN STRING :="";
CONSTANT PathDelayArray : IN VitalDelayArrayType01Z;
CONSTANT ArcType : IN VitalMemoryArcType;
CONSTANT PathConditionArray : IN VitalBoolArrayT;
CONSTANT OutputRetainFlag : IN BOOLEAN
) IS
VARIABLE InputArrayLow : INTEGER := 0;
VARIABLE InputArrayHigh : INTEGER := 0;
VARIABLE DelayArrayIndex : INTEGER := 0;
VARIABLE NumBitsPerSubWord : INTEGER := DefaultNumBitsPerSubword;
VARIABLE NewValue : STD_ULOGIC;
VARIABLE OldValue : STD_ULOGIC;
VARIABLE OutputLength : INTEGER := 0;
VARIABLE OutArrayIndex : INTEGER;
VARIABLE PropDelay : TIME;
VARIABLE RetainDelay : TIME;
VARIABLE CurPropDelay : TIME;
VARIABLE CurRetainDelay : TIME;
VARIABLE InputAge : TIME;
VARIABLE CurInputAge : TIME;
VARIABLE InputChangeTimeNorm : VitalTimeArrayT(
InputChangeTimeArray'LENGTH-1 downto 0):=InputChangeTimeArray;
VARIABLE DelayArrayNorm : VitalDelayArrayType01Z(
PathDelayArray'LENGTH-1 downto 0):= PathDelayArray;
VARIABLE ScheduleDataArrayNorm : VitalMemoryScheduleDatavectorType
(ScheduleDataArray'LENGTH-1 downto 0):=ScheduleDataArray;
-- for debug purpose
VARIABLE debugprop : VitalTimeArrayT(MaxNoInputBits-1 downto 0);
VARIABLE debugretain : VitalTimeArrayT(MaxNoInputBits-1 downto 0);
BEGIN
-- for debug purpose
PrintArcType(ArcType);
OutputLength := ScheduleDataArray'LENGTH;
FOR OutBitPos IN 0 to (OutputLength -1) LOOP
NEXT WHEN PathConditionArray(OutBitPos) = FALSE;
NEXT WHEN ((ScheduleDataArrayNorm(OutBitPos).ScheduleValue
= ScheduleDataArrayNorm(OutBitPos).OutputData) AND
(ScheduleDataArrayNorm(OutBitPos).ScheduleTime <= NOW) AND
(OutputRetainFlag = FALSE));
NewValue := ScheduleDataArrayNorm(OutBitPos).OutputData;
OldValue := ScheduleDataArrayNorm(OutBitPos).LastOutputValue;
PropDelay :=ScheduleDataArrayNorm(OutBitPos).PropDelay;
InputAge := ScheduleDataArrayNorm(OutBitPos).InputAge;
RetainDelay:=ScheduleDataArrayNorm(OutBitPos).OutputRetainDelay;
NumBitsPerSubWord:=ScheduleDataArrayNorm(OutBitPos).NumBitsPerSubWord;
CASE ArcType IS
WHEN ParallelArc =>
InputArrayLow := OutBitPos;
InputArrayHigh := OutBitPos;
DelayArrayIndex := OutBitPos;
WHEN CrossArc =>
InputArrayLow := 0;
InputArrayHigh := InputChangeTimeArray'LENGTH-1;
DelayArrayIndex := OutBitPos;
WHEN SubwordArc =>
InputArrayLow := OutBitPos / NumBitsPerSubWord;
InputArrayHigh := OutBitPos / NumBitsPerSubWord;
DelayArrayIndex := OutBitPos +
(OutputLength * (OutBitPos / NumBitsPerSubWord));
END CASE;
FOR i IN InputArrayLow TO InputArrayHigh LOOP
(CurPropDelay, CurRetainDelay) :=
VitalMemoryCalcDelay (
NewValue, OldValue, DelayArrayNorm(DelayArrayIndex)
);
IF (OutputRetainFlag = FALSE) THEN
CurRetainDelay := TIME'HIGH;
END IF;
-- for debug purpose
debugprop(i) := CurPropDelay;
debugretain(i) := CurRetainDelay;
IF (ArcType = CrossArc) THEN
DelayArrayIndex := DelayArrayIndex + OutputLength;
END IF;
-- If there is one input change at a time, then choose the
-- delay from that input. If there is simultaneous input
-- change, then choose the minimum of propagation delays
IF (InputChangeTimeNorm(i) < 0 ns) THEN
CurInputAge := TIME'HIGH;
ELSE
CurInputAge := NOW - InputChangeTimeNorm(i);
END IF;
IF (CurInputAge < InputAge) THEN
PropDelay := CurPropDelay;
RetainDelay := CurRetainDelay;
InputAge := CurInputAge;
ELSIF (CurInputAge = InputAge) THEN
IF (CurPropDelay < PropDelay) THEN
PropDelay := CurPropDelay;
END IF;
IF (OutputRetainFlag = TRUE) THEN
IF (CurRetainDelay < RetainDelay) THEN
RetainDelay := CurRetainDelay;
END IF;
END IF;
END IF;
END LOOP;
-- Store it back to data strucutre
ScheduleDataArrayNorm(OutBitPos).PropDelay := PropDelay;
ScheduleDataArrayNorm(OutBitPos).OutputRetainDelay:= RetainDelay;
ScheduleDataArrayNorm(OutBitPos).InputAge := InputAge;
-- for debug purpose
PrintDelay(outbitPos, InputArrayLow, InputArrayHigh,
debugprop, debugretain);
END LOOP;
ScheduleDataArray := ScheduleDataArrayNorm;
END VitalMemorySelectDelay;
-- ----------------------------------------------------------------------------
-- VitalDelayArrayType01
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySelectDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
VARIABLE InputChangeTimeArray : IN VitalTimeArrayT;
CONSTANT OutputSignalName : IN STRING :="";
CONSTANT PathDelayArray : IN VitalDelayArrayType01;
CONSTANT ArcType : IN VitalMemoryArcType;
CONSTANT PathConditionArray : IN VitalBoolArrayT
) IS
VARIABLE CurPathDelay : VitalMemoryDelayType;
VARIABLE InputArrayLow : INTEGER := 0;
VARIABLE InputArrayHigh : INTEGER := 0;
VARIABLE DelayArrayIndex : INTEGER := 0;
VARIABLE NumBitsPerSubWord : INTEGER := DefaultNumBitsPerSubword;
VARIABLE NewValue : STD_ULOGIC;
VARIABLE OldValue : STD_ULOGIC;
VARIABLE OutputLength : INTEGER := 0;
VARIABLE OutArrayIndex : INTEGER;
VARIABLE PropDelay : TIME;
VARIABLE CurPropDelay : TIME;
VARIABLE InputAge : TIME;
VARIABLE CurInputAge : TIME;
VARIABLE InputChangeTimeNorm : VitalTimeArrayT(
InputChangeTimeArray'LENGTH-1 downto 0):= InputChangeTimeArray;
VARIABLE DelayArrayNorm : VitalDelayArrayType01(
PathDelayArray'LENGTH-1 downto 0):= PathDelayArray;
VARIABLE ScheduleDataArrayNorm : VitalMemoryScheduleDatavectorType
(ScheduleDataArray'LENGTH-1 downto 0):=ScheduleDataArray;
-- for debug purpose
VARIABLE debugprop : VitalTimeArrayT(MaxNoInputBits-1 downto 0);
VARIABLE debugretain : VitalTimeArrayT(MaxNoInputBits-1 downto 0);
BEGIN
-- for debug purpose
PrintArcType(ArcType);
OutputLength := ScheduleDataArray'LENGTH;
FOR OutBitPos IN 0 to (OutputLength -1) LOOP
NEXT WHEN PathConditionArray(OutBitPos) = FALSE;
NEXT WHEN ((ScheduleDataArrayNorm(OutBitPos).ScheduleValue
= ScheduleDataArrayNorm(OutBitPos).OutputData) AND
(ScheduleDataArrayNorm(OutBitPos).ScheduleTime <= NOW));
NewValue := ScheduleDataArrayNorm(OutBitPos).OutputData;
OldValue := ScheduleDataArrayNorm(OutBitPos).LastOutputValue;
PropDelay :=ScheduleDataArrayNorm(OutBitPos).PropDelay;
InputAge := ScheduleDataArrayNorm(OutBitPos).InputAge;
NumBitsPerSubWord:=ScheduleDataArrayNorm(OutBitPos).NumBitsPerSubWord;
CASE ArcType IS
WHEN ParallelArc =>
InputArrayLow := OutBitPos;
InputArrayHigh := OutBitPos;
DelayArrayIndex := OutBitPos;
WHEN CrossArc =>
InputArrayLow := 0;
InputArrayHigh := InputChangeTimeArray'LENGTH-1;
DelayArrayIndex := OutBitPos;
WHEN SubwordArc =>
InputArrayLow := OutBitPos / NumBitsPerSubWord;
InputArrayHigh := OutBitPos / NumBitsPerSubWord;
DelayArrayIndex := OutBitPos +
(OutputLength * (OutBitPos / NumBitsPerSubWord));
END CASE;
FOR i IN InputArrayLow TO InputArrayHigh LOOP
CurPropDelay:= VitalCalcDelay (NewValue,
OldValue, DelayArrayNorm(DelayArrayIndex));
-- for debug purpose
debugprop(i) := CurPropDelay;
debugretain(i) := TIME'HIGH;
IF (ArcType = CrossArc) THEN
DelayArrayIndex := DelayArrayIndex + OutputLength;
END IF;
-- If there is one input change at a time, then choose the
-- delay from that input. If there is simultaneous input
-- change, then choose the minimum of propagation delays
IF (InputChangeTimeNorm(i) < 0 ns) THEN
CurInputAge := TIME'HIGH;
ELSE
CurInputAge := NOW - InputChangeTimeNorm(i);
END IF;
IF (CurInputAge < InputAge) THEN
PropDelay := CurPropDelay;
InputAge := CurInputAge;
ELSIF (CurInputAge = InputAge) THEN
IF (CurPropDelay < PropDelay) THEN
PropDelay := CurPropDelay;
END IF;
END IF;
END LOOP;
-- Store it back to data strucutre
ScheduleDataArrayNorm(OutBitPos).PropDelay := PropDelay;
ScheduleDataArrayNorm(OutBitPos).InputAge := InputAge;
-- for debug purpose
PrintDelay(outbitPos, InputArrayLow, InputArrayHigh,
debugprop, debugretain);
END LOOP;
ScheduleDataArray := ScheduleDataArrayNorm;
END VitalMemorySelectDelay;
-- ----------------------------------------------------------------------------
-- VitalDelayArrayType
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySelectDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
VARIABLE InputChangeTimeArray : IN VitalTimeArrayT;
CONSTANT OutputSignalName : IN STRING :="";
CONSTANT PathDelayArray : IN VitalDelayArrayType;
CONSTANT ArcType : IN VitalMemoryArcType;
CONSTANT PathConditionArray : IN VitalBoolArrayT
) IS
VARIABLE InputArrayLow : INTEGER := 0;
VARIABLE InputArrayHigh : INTEGER := 0;
VARIABLE DelayArrayIndex : INTEGER := 0;
VARIABLE NumBitsPerSubWord : INTEGER := DefaultNumBitsPerSubword;
VARIABLE NewValue : STD_ULOGIC;
VARIABLE OldValue : STD_ULOGIC;
VARIABLE OutputLength : INTEGER := 0;
VARIABLE OutArrayIndex : INTEGER;
VARIABLE PropDelay : TIME;
VARIABLE CurPropDelay : TIME;
VARIABLE InputAge : TIME;
VARIABLE CurInputAge : TIME;
VARIABLE InputChangeTimeNorm : VitalTimeArrayT(
InputChangeTimeArray'LENGTH-1 downto 0) := InputChangeTimeArray;
VARIABLE DelayArrayNorm : VitalDelayArrayType(
PathDelayArray'LENGTH-1 downto 0) := PathDelayArray;
VARIABLE ScheduleDataArrayNorm : VitalMemoryScheduleDatavectorType
(ScheduleDataArray'LENGTH-1 downto 0) := ScheduleDataArray;
-- for debug purpose
VARIABLE debugprop : VitalTimeArrayT(MaxNoInputBits-1 downto 0);
VARIABLE debugretain : VitalTimeArrayT(MaxNoInputBits-1 downto 0);
BEGIN
-- for debug purpose
PrintArcType(ArcType);
OutputLength := ScheduleDataArray'LENGTH;
FOR OutBitPos IN 0 to (OutputLength -1) LOOP
NEXT WHEN PathConditionArray(OutBitPos) = FALSE;
NEXT WHEN ((ScheduleDataArrayNorm(OutBitPos).ScheduleValue
= ScheduleDataArrayNorm(OutBitPos).OutputData) AND
(ScheduleDataArrayNorm(OutBitPos).ScheduleTime <= NOW));
NewValue := ScheduleDataArrayNorm(OutBitPos).OutputData;
OldValue := ScheduleDataArrayNorm(OutBitPos).LastOutputValue;
PropDelay :=ScheduleDataArrayNorm(OutBitPos).PropDelay;
InputAge := ScheduleDataArrayNorm(OutBitPos).InputAge;
NumBitsPerSubWord:=ScheduleDataArrayNorm(OutBitPos).NumBitsPerSubWord;
CASE ArcType IS
WHEN ParallelArc =>
InputArrayLow := OutBitPos;
InputArrayHigh := OutBitPos;
DelayArrayIndex := OutBitPos;
WHEN CrossArc =>
InputArrayLow := 0;
InputArrayHigh := InputChangeTimeArray'LENGTH-1;
DelayArrayIndex := OutBitPos;
WHEN SubwordArc =>
InputArrayLow := OutBitPos / NumBitsPerSubWord;
InputArrayHigh := OutBitPos / NumBitsPerSubWord;
DelayArrayIndex := OutBitPos +
(OutputLength * (OutBitPos / NumBitsPerSubWord));
END CASE;
FOR i IN InputArrayLow TO InputArrayHigh LOOP
CurPropDelay := VitalCalcDelay (NewValue,
OldValue, DelayArrayNorm(DelayArrayIndex));
-- for debug purpose
debugprop(i) := CurPropDelay;
debugretain(i) := TIME'HIGH;
IF (ArcType = CrossArc) THEN
DelayArrayIndex := DelayArrayIndex + OutputLength;
END IF;
-- If there is one input change at a time, then choose the
-- delay from that input. If there is simultaneous input
-- change, then choose the minimum of propagation delays
IF (InputChangeTimeNorm(i) < 0 ns) THEN
CurInputAge := TIME'HIGH;
ELSE
CurInputAge := NOW - InputChangeTimeNorm(i);
END IF;
IF (CurInputAge < InputAge) THEN
PropDelay := CurPropDelay;
InputAge := CurInputAge;
ELSIF (CurInputAge = InputAge) THEN
IF (CurPropDelay < PropDelay) THEN
PropDelay := CurPropDelay;
END IF;
END IF;
END LOOP;
-- Store it back to data strucutre
ScheduleDataArrayNorm(OutBitPos).PropDelay := PropDelay;
ScheduleDataArrayNorm(OutBitPos).InputAge := InputAge;
-- for debug purpose
PrintDelay(outbitPos, InputArrayLow, InputArrayHigh,
debugprop, debugretain);
END LOOP;
ScheduleDataArray := ScheduleDataArrayNorm;
END VitalMemorySelectDelay;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemoryInitPathDelay
-- Description: To initialize Schedule Data structure for an
-- output.
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryInitPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
VARIABLE OutputDataArray : IN STD_LOGIC_VECTOR;
CONSTANT NumBitsPerSubWord : IN INTEGER := DefaultNumBitsPerSubword
) IS
BEGIN
-- Initialize the ScheduleData Structure.
FOR i IN OutputDataArray'RANGE LOOP
ScheduleDataArray(i).OutputData := OutputDataArray(i);
ScheduleDataArray(i).PropDelay := TIME'HIGH;
ScheduleDataArray(i).OutputRetainDelay := TIME'HIGH;
ScheduleDataArray(i).InputAge := TIME'HIGH;
ScheduleDataArray(i).NumBitsPerSubWord := NumBitsPerSubWord;
-- Update LastOutputValue of Output if the Output has
-- already been scheduled.
IF ((ScheduleDataArray(i).ScheduleValue /= OutputDataArray(i)) AND
(ScheduleDataArray(i).ScheduleTime <= NOW)) THEN
ScheduleDataArray(i).LastOutputValue
:= ScheduleDataArray(i).ScheduleValue;
END IF;
END LOOP;
-- for debug purpose
DebugMsg1;
PrintScheduleDataArray(ScheduleDataArray);
END VitalMemoryInitPathDelay;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryInitPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
VARIABLE OutputData : IN STD_ULOGIC
) IS
VARIABLE ScheduledataArray: VitalMemoryScheduleDataVectorType
(0 downto 0);
VARIABLE OutputDataArray : STD_LOGIC_VECTOR(0 downto 0);
BEGIN
ScheduledataArray(0) := ScheduleData;
OutputDataArray(0) := OutputData;
VitalMemoryInitPathDelay (
ScheduleDataArray => ScheduleDataArray,
OutputDataArray => OutputDataArray,
NumBitsPerSubWord => DefaultNumBitsPerSubword
);
-- for debug purpose
DebugMsg1;
PrintScheduleDataArray( ScheduleDataArray);
END VitalMemoryInitPathDelay;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemoryAddPathDelay
-- Description: Declare a path for one scalar/vector input to
-- the output for which Schedule Data has been
-- initialized previously.
-- ----------------------------------------------------------------------------
-- ----------------------------------------------------------------------------
-- #1
-- DelayType - VitalMemoryDelayType
-- Input - Scalar
-- Output - Scalar
-- Delay - Scalar
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelay : IN VitalDelayType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE
) IS
VARIABLE ScheduleDataArray :
VitalMemoryScheduleDataVectorType(0 downto 0);
VARIABLE PathDelayArray : VitalDelayArrayType(0 downto 0);
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE PathConditionArray : VitalBoolArrayT(0 downto 0);
BEGIN
PathConditionArray(0) := PathCondition;
ScheduleDataArray(0) := ScheduleData;
PathDelayArray(0) := PathDelay;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #2
-- DelayType - VitalMemoryDelayType
-- Input - Scalar
-- Output - Vector
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelayArray : IN VitalDelayArrayType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE
) IS
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE PathConditionArray :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
FOR i IN PathConditionArray'RANGE LOOP
PathConditionArray(i) := PathCondition;
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray
);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #3
-- DelayType - VitalMemoryDelayType
-- Input - Scalar
-- Output - Vector
-- Delay - Vector
-- Condition - Vector
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelayArray : IN VitalDelayArrayType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathConditionArray : IN VitalBoolArrayT
) IS
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArrayNorm :
VitalBoolArrayT(PathConditionArray'LENGTH-1 downto 0) := PathConditionArray; -- IR Mem400
VARIABLE PathConditionArrayExp :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'RIGHT).NumBitsPerSubword;
FOR i IN PathConditionArrayExp'RANGE LOOP
PathConditionArrayExp(i) := PathConditionArrayNorm(i/NumBitsPerSubword);
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArrayExp);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #4
-- DelayType - VitalMemoryDelayType
-- Input - Vector
-- Output - Scalar
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE
) IS
VARIABLE ScheduleDataArray : VitalMemoryScheduleDataVectorType(0 downto 0);
VARIABLE PathConditionArray : VitalBoolArrayT(0 downto 0);
BEGIN
PathConditionArray(0) := PathCondition;
ScheduleDataArray(0) := ScheduleData;
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #5
-- DelayType - VitalMemoryDelayType
-- Input - Vector
-- Output - Vector
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE
) IS
VARIABLE PathConditionArray :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
FOR i IN PathConditionArray'RANGE LOOP
PathConditionArray(i) := PathCondition;
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #6
-- DelayType - VitalMemoryDelayType
-- Input - Vector
-- Output - Vector
-- Delay - Vector
-- Condition - Vector
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathConditionArray : IN VitalBoolArrayT
) IS
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArrayNorm :
VitalBoolArrayT(PathConditionArray'LENGTH-1 downto 0) := PathConditionArray; -- IR MEM400;
VARIABLE PathConditionArrayExp :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'RIGHT).NumBitsPerSubword;
FOR i IN PathConditionArrayExp'RANGE LOOP
PathConditionArrayExp(i) := PathConditionArrayNorm(i/NumBitsPerSubword);
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArrayExp);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #7
-- DelayType - VitalMemoryDelayType01
-- Input - Scalar
-- Output - Scalar
-- Delay - Scalar
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelay : IN VitalDelayType01;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE
) IS
VARIABLE ScheduleDataArray :
VitalMemoryScheduleDataVectorType(0 downto 0);
VARIABLE PathDelayArray : VitalDelayArrayType01(0 downto 0);
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE PathConditionArray : VitalBoolArrayT(0 downto 0);
BEGIN
PathConditionArray(0) := PathCondition;
ScheduleDataArray(0) := ScheduleData;
PathDelayArray(0) := PathDelay;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #8
-- DelayType - VitalMemoryDelayType01
-- Input - Scalar
-- Output - Vector
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelayArray : IN VitalDelayArrayType01;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE
) IS
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE PathConditionArray :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
FOR i IN PathConditionArray'RANGE LOOP
PathConditionArray(i) := PathCondition;
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #9
-- DelayType - VitalMemoryDelayType01
-- Input - Scalar
-- Output - Vector
-- Delay - Vector
-- Condition - Vector
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelayArray : IN VitalDelayArrayType01;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathConditionArray: IN VitalBoolArrayT
) IS
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArrayNorm :
VitalBoolArrayT(PathConditionArray'LENGTH-1 downto 0) := PathConditionArray; -- IR MEM400;
VARIABLE PathConditionArrayExp :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'RIGHT).NumBitsPerSubword;
FOR i IN PathConditionArrayExp'RANGE LOOP
PathConditionArrayExp(i) := PathConditionArrayNorm(i/NumBitsPerSubword);
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArrayExp);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #10
-- DelayType - VitalMemoryDelayType01
-- Input - Vector
-- Output - Scalar
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray: INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE
)IS
VARIABLE ScheduleDataArray :
VitalMemoryScheduleDataVectorType(0 downto 0);
VARIABLE PathConditionArray : VitalBoolArrayT(0 downto 0);
BEGIN
PathConditionArray(0) := PathCondition;
ScheduleDataArray(0) := ScheduleData;
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #11
-- DelayType - VitalMemoryDelayType01
-- Input - Vector
-- Output - Vector
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE
) IS
VARIABLE PathConditionArray :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
FOR i IN PathConditionArray'RANGE LOOP
PathConditionArray(i) := PathCondition;
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #12
-- DelayType - VitalMemoryDelayType01
-- Input - Vector
-- Output - Vector
-- Delay - Vector
-- Condition - Vector
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathConditionArray : IN VitalBoolArrayT
) IS
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArrayNorm :
VitalBoolArrayT(PathConditionArray'LENGTH-1 downto 0) := PathConditionArray; -- IR MEM400;
VARIABLE PathConditionArrayExp :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'RIGHT).NumBitsPerSubword;
FOR i IN PathConditionArrayExp'RANGE LOOP
PathConditionArrayExp(i) := PathConditionArrayNorm(i/NumBitsPerSubword);
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArrayExp);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #13
-- DelayType - VitalMemoryDelayType01Z
-- Input - Scalar
-- Output - Scalar
-- Delay - Scalar
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelay : IN VitalDelayType01Z;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE
) IS
VARIABLE ScheduleDataArray :
VitalMemoryScheduleDataVectorType(0 downto 0);
VARIABLE PathDelayArray : VitalDelayArrayType01Z(0 downto 0);
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE PathConditionArray : VitalBoolArrayT(0 downto 0);
BEGIN
PathConditionArray(0) := PathCondition;
ScheduleDataArray(0) := ScheduleData;
PathDelayArray(0) := PathDelay;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #14
-- DelayType - VitalMemoryDelayType01Z
-- Input - Scalar
-- Output - Vector
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelayArray : IN VitalDelayArrayType01Z;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE
) IS
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE PathConditionArray :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
FOR i IN PathConditionArray'RANGE LOOP
PathConditionArray(i) := PathCondition;
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #15
-- DelayType - VitalMemoryDelayType01Z
-- Input - Scalar
-- Output - Vector
-- Delay - Vector
-- Condition - Vector
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelayArray : IN VitalDelayArrayType01Z;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathConditionArray: IN VitalBoolArrayT;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE
) IS
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArrayNorm : VitalBoolArrayT(PathConditionArray'LENGTH-1 downto 0);
VARIABLE PathConditionArrayExp : VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
NumBitsPerSubword := ScheduleDataArray(ScheduleDataArray'RIGHT).NumBitsPerSubword;
FOR i IN PathConditionArrayExp'RANGE LOOP
PathConditionArrayExp(i) := PathConditionArrayNorm(i/NumBitsPerSubword);
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArrayExp, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #16
-- DelayType - VitalMemoryDelayType01Z
-- Input - Vector
-- Output - Scalar
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01Z;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE;
CONSTANT OutputRetainBehavior : IN OutputRetainBehaviorType := BitCorrupt
) IS
VARIABLE ScheduleDataArray :
VitalMemoryScheduleDataVectorType(0 downto 0);
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArray : VitalBoolArrayT(0 downto 0);
BEGIN
PathConditionArray(0) := PathCondition;
ScheduleDataArray(0) := ScheduleData;
NumBitsPerSubword := ScheduleDataArray(0).NumBitsPerSubword;
IF (OutputRetainBehavior = WordCorrupt AND
ArcType = ParallelArc AND
OutputRetainFlag = TRUE) THEN
VitalMemoryUpdateInputChangeTime(
InputChangeTimeArray,
InputSignal,
NumBitsPerSubword
);
ELSE
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
END IF;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #17
-- DelayType - VitalMemoryDelayType01Z
-- Input - Vector
-- Output - Vector
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01Z;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE;
CONSTANT OutputRetainBehavior : IN OutputRetainBehaviorType := BitCorrupt
) IS
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArray :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
FOR i IN PathConditionArray'RANGE LOOP
PathConditionArray(i) := PathCondition;
END LOOP;
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'LEFT).NumBitsPerSubword;
IF (OutputRetainBehavior = WordCorrupt AND
ArcType = ParallelArc AND
OutputRetainFlag = TRUE) THEN
VitalMemoryUpdateInputChangeTime(
InputChangeTimeArray,
InputSignal,
NumBitsPerSubword
);
ELSE
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
END IF;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #18
-- DelayType - VitalMemoryDelayType01Z
-- Input - Vector
-- Output - Vector
-- Delay - Vector
-- Condition - Vector
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01Z;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathConditionArray : IN VitalBoolArrayT;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE;
CONSTANT OutputRetainBehavior : IN OutputRetainBehaviorType := BitCorrupt
) IS
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArrayNorm :
VitalBoolArrayT(PathConditionArray'LENGTH-1 downto 0);
VARIABLE PathConditionArrayExp :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
NumBitsPerSubword := ScheduleDataArray(ScheduleDataArray'RIGHT).NumBitsPerSubword;
FOR i IN PathConditionArrayExp'RANGE LOOP
PathConditionArrayExp(i) := PathConditionArrayNorm(i/NumBitsPerSubword);
END LOOP;
IF (OutputRetainBehavior = WordCorrupt AND
ArcType = ParallelArc AND
OutputRetainFlag = TRUE) THEN
VitalMemoryUpdateInputChangeTime(
InputChangeTimeArray, InputSignal,
NumBitsPerSubword);
ELSE
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
END IF;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArrayExp, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #19
-- DelayType - VitalMemoryDelayType01XZ
-- Input - Scalar
-- Output - Scalar
-- Delay - Scalar
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelay : IN VitalDelayType01ZX;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE
) IS
VARIABLE ScheduleDataArray :
VitalMemoryScheduleDataVectorType(0 downto 0);
VARIABLE PathDelayArray : VitalDelayArrayType01ZX(0 downto 0);
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE PathConditionArray : VitalBoolArrayT(0 downto 0);
BEGIN
PathConditionArray(0) := PathCondition;
ScheduleDataArray(0) := ScheduleData;
PathDelayArray(0) := PathDelay;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #20
-- DelayType - VitalMemoryDelayType01XZ
-- Input - Scalar
-- Output - Vector
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray :INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelayArray : IN VitalDelayArrayType01ZX;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE
) IS
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE PathConditionArray :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
FOR i IN PathConditionArray'RANGE LOOP
PathConditionArray(i) := PathCondition;
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #21
-- DelayType - VitalMemoryDelayType01XZ
-- Input - Scalar
-- Output - Vector
-- Delay - Vector
-- Condition - Vector
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray :INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_ULOGIC;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTime : INOUT TIME;
CONSTANT PathDelayArray : IN VitalDelayArrayType01ZX;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathConditionArray: IN VitalBoolArrayT;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE
) IS
VARIABLE InputChangeTimeArray : VitalTimeArrayT(0 downto 0);
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArrayNorm :
VitalBoolArrayT(PathConditionArray'LENGTH-1 downto 0) := PathConditionArray; -- IR MEM400;
VARIABLE PathConditionArrayExp :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'RIGHT).NumBitsPerSubword;
FOR i IN PathConditionArrayExp'RANGE LOOP
PathConditionArrayExp(i) := PathConditionArrayNorm(i/NumBitsPerSubword);
END LOOP;
VitalMemoryUpdateInputChangeTime(InputChangeTime, InputSignal);
InputChangeTimeArray(0) := InputChangeTime;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArrayExp, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #22
-- DelayType - VitalMemoryDelayType01XZ
-- Input - Vector
-- Output - Scalar
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01ZX;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE;
CONSTANT OutputRetainBehavior : IN OutputRetainBehaviorType := BitCorrupt
) IS
VARIABLE ScheduleDataArray :
VitalMemoryScheduleDataVectorType(0 downto 0);
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArray : VitalBoolArrayT(0 downto 0);
BEGIN
PathConditionArray(0) := PathCondition;
ScheduleDataArray(0) := ScheduleData;
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'LEFT).NumBitsPerSubword;
IF (OutputRetainBehavior = WordCorrupt AND
ArcType = ParallelArc AND
OutputRetainFlag = TRUE) THEN
VitalMemoryUpdateInputChangeTime(
InputChangeTimeArray, InputSignal,
NumBitsPerSubword);
ELSE
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
END IF;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #23
-- DelayType - VitalMemoryDelayType01XZ
-- Input - Vector
-- Output - Vector
-- Delay - Vector
-- Condition - Scalar
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01ZX;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathCondition : IN BOOLEAN := TRUE;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE;
CONSTANT OutputRetainBehavior : IN OutputRetainBehaviorType := BitCorrupt
) IS
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArray :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
FOR i IN PathConditionArray'RANGE LOOP
PathConditionArray(i) := PathCondition;
END LOOP;
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'LEFT).NumBitsPerSubword;
IF (OutputRetainBehavior = WordCorrupt AND
ArcType = ParallelArc AND
OutputRetainFlag = TRUE) THEN
VitalMemoryUpdateInputChangeTime(
InputChangeTimeArray, InputSignal,
NumBitsPerSubword);
ELSE
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
END IF;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArray, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- #24
-- DelayType - VitalMemoryDelayType01XZ
-- Input - Vector
-- Output - Vector
-- Delay - Vector
-- Condition - Vector
PROCEDURE VitalMemoryAddPathDelay (
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType;
SIGNAL InputSignal : IN STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
VARIABLE InputChangeTimeArray : INOUT VitalTimeArrayT;
CONSTANT PathDelayArray : IN VitalDelayArrayType01ZX;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT PathConditionArray : IN VitalBoolArrayT;
CONSTANT OutputRetainFlag : IN BOOLEAN := FALSE;
CONSTANT OutputRetainBehavior : IN OutputRetainBehaviorType := BitCorrupt
) IS
VARIABLE NumBitsPerSubword : INTEGER;
VARIABLE PathConditionArrayNorm :
VitalBoolArrayT(PathConditionArray'LENGTH-1 downto 0) := PathConditionArray; -- IR MEM400;
VARIABLE PathConditionArrayExp :
VitalBoolArrayT(ScheduleDataArray'LENGTH-1 downto 0);
BEGIN
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'RIGHT).NumBitsPerSubword;
FOR i IN PathConditionArrayExp'RANGE LOOP
PathConditionArrayExp(i) := PathConditionArrayNorm(i/NumBitsPerSubword);
END LOOP;
IF (OutputRetainBehavior = WordCorrupt AND
ArcType = ParallelArc AND
OutputRetainFlag = TRUE) THEN
VitalMemoryUpdateInputChangeTime(
InputChangeTimeArray, InputSignal,
NumBitsPerSubword);
ELSE
VitalMemoryUpdateInputChangeTime(InputChangeTimeArray, InputSignal);
END IF;
VitalMemorySelectDelay(
ScheduleDataArray, InputChangeTimeArray,
OutputSignalName, PathDelayArray,
ArcType, PathConditionArrayExp, OutputRetainFlag);
END VitalMemoryAddPathDelay;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemorySchedulePathDelay
-- Description: Schedule Output after Propagation Delay selected
-- by checking all the paths added thru'
-- VitalMemoryAddPathDelay.
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySchedulePathDelay (
SIGNAL OutSignal : OUT STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
CONSTANT PortFlag : IN VitalPortFlagType := VitalDefaultPortFlag;
CONSTANT OutputMap : IN VitalOutputMapType:= VitalDefaultOutputMap;
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType
) IS
VARIABLE Age : TIME;
VARIABLE PropDelay : TIME;
VARIABLE RetainDelay : TIME;
VARIABLE Data : STD_ULOGIC;
BEGIN
IF (PortFlag.OutputDisable /= TRUE) THEN
FOR i IN ScheduleDataArray'RANGE LOOP
PropDelay := ScheduleDataArray(i).PropDelay;
RetainDelay := ScheduleDataArray(i).OutputRetainDelay;
NEXT WHEN PropDelay = TIME'HIGH;
Age := ScheduleDataArray(i).InputAge;
Data := ScheduleDataArray(i).OutputData;
IF (Age < RetainDelay and RetainDelay < PropDelay) THEN
OutSignal(i) <= TRANSPORT 'X' AFTER (RetainDelay - Age);
END IF;
IF (Age <= PropDelay) THEN
OutSignal(i)<= TRANSPORT OutputMap(Data)AFTER (PropDelay-Age);
ScheduleDataArray(i).ScheduleValue := Data;
ScheduleDataArray(i).ScheduleTime := NOW + PropDelay - Age;
END IF;
END LOOP;
END IF;
-- for debug purpose
PrintScheduleDataArray(ScheduleDataArray);
-- for debug purpose
ScheduleDebugMsg;
END VitalMemorySchedulePathDelay;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemorySchedulePathDelay
-- Description: Schedule Output after Propagation Delay selected
-- by checking all the paths added thru'
-- VitalMemoryAddPathDelay.
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySchedulePathDelay (
SIGNAL OutSignal : OUT STD_LOGIC_VECTOR;
CONSTANT OutputSignalName : IN STRING :="";
CONSTANT PortFlag : IN VitalPortFlagVectorType;
CONSTANT OutputMap : IN VitalOutputMapType:= VitalDefaultOutputMap;
VARIABLE ScheduleDataArray : INOUT VitalMemoryScheduleDataVectorType
) IS
VARIABLE Age : TIME;
VARIABLE PropDelay : TIME;
VARIABLE RetainDelay : TIME;
VARIABLE Data : STD_ULOGIC;
VARIABLE ExpandedPortFlag :
VitalPortFlagVectorType(ScheduleDataArray'RANGE);
VARIABLE NumBitsPerSubword : INTEGER;
BEGIN
NumBitsPerSubword :=
ScheduleDataArray(ScheduleDataArray'LEFT).NumBitsPerSubword;
VitalMemoryExpandPortFlag( PortFlag, NumBitsPerSubword, ExpandedPortFlag );
FOR i IN ScheduleDataArray'RANGE LOOP
NEXT WHEN ExpandedPortFlag(i).OutputDisable = TRUE;
PropDelay := ScheduleDataArray(i).PropDelay;
RetainDelay := ScheduleDataArray(i).OutputRetainDelay;
NEXT WHEN PropDelay = TIME'HIGH;
Age := ScheduleDataArray(i).InputAge;
Data := ScheduleDataArray(i).OutputData;
IF (Age < RetainDelay and RetainDelay < PropDelay) THEN
OutSignal(i) <= TRANSPORT 'X' AFTER (RetainDelay - Age);
END IF;
IF (Age <= PropDelay) THEN
OutSignal(i)<= TRANSPORT OutputMap(Data)AFTER (PropDelay-Age);
ScheduleDataArray(i).ScheduleValue := Data;
ScheduleDataArray(i).ScheduleTime := NOW + PropDelay - Age;
END IF;
END LOOP;
-- for debug purpose
PrintScheduleDataArray(ScheduleDataArray);
-- for debug purpose
ScheduleDebugMsg;
END VitalMemorySchedulePathDelay;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySchedulePathDelay (
SIGNAL OutSignal : OUT STD_ULOGIC;
CONSTANT OutputSignalName: IN STRING :="";
CONSTANT PortFlag : IN VitalPortFlagType := VitalDefaultPortFlag;
CONSTANT OutputMap : IN VitalOutputMapType := VitalDefaultOutputMap;
VARIABLE ScheduleData : INOUT VitalMemoryScheduleDataType
) IS
VARIABLE Age : TIME;
VARIABLE PropDelay : TIME;
VARIABLE RetainDelay : TIME;
VARIABLE Data : STD_ULOGIC;
VARIABLE ScheduleDataArray : VitalMemoryScheduleDataVectorType (0 downto 0);
BEGIN
IF (PortFlag.OutputDisable /= TRUE) THEN
ScheduledataArray(0) := ScheduleData;
PropDelay := ScheduleDataArray(0).PropDelay;
RetainDelay := ScheduleDataArray(0).OutputRetainDelay;
Age := ScheduleDataArray(0).InputAge;
Data := ScheduleDataArray(0).OutputData;
IF (Age < RetainDelay and RetainDelay < PropDelay) THEN
OutSignal <= TRANSPORT 'X' AFTER (RetainDelay - Age);
END IF;
IF (Age <= PropDelay and PropDelay /= TIME'HIGH) THEN
OutSignal <= TRANSPORT OutputMap(Data) AFTER (PropDelay - Age);
ScheduleDataArray(0).ScheduleValue := Data;
ScheduleDataArray(0).ScheduleTime := NOW + PropDelay - Age;
END IF;
END IF;
-- for debug purpose
PrintScheduleDataArray(ScheduleDataArray);
-- for debug purpose
ScheduleDebugMsg;
END VitalMemorySchedulePathDelay;
-- ----------------------------------------------------------------------------
-- Procedure : InternalTimingCheck
-- ----------------------------------------------------------------------------
PROCEDURE InternalTimingCheck (
CONSTANT TestSignal : IN std_ulogic;
CONSTANT RefSignal : IN std_ulogic;
CONSTANT TestDelay : IN TIME := 0 ns;
CONSTANT RefDelay : IN TIME := 0 ns;
CONSTANT SetupHigh : IN TIME := 0 ns;
CONSTANT SetupLow : IN TIME := 0 ns;
CONSTANT HoldHigh : IN TIME := 0 ns;
CONSTANT HoldLow : IN TIME := 0 ns;
VARIABLE RefTime : IN TIME;
VARIABLE RefEdge : IN BOOLEAN;
VARIABLE TestTime : IN TIME;
VARIABLE TestEvent : IN BOOLEAN;
VARIABLE SetupEn : INOUT BOOLEAN;
VARIABLE HoldEn : INOUT BOOLEAN;
VARIABLE CheckInfo : INOUT CheckInfoType;
CONSTANT MsgOn : IN BOOLEAN
) IS
VARIABLE bias : TIME;
VARIABLE actualObsTime : TIME;
VARIABLE BC : TIME;
VARIABLE Message :LINE;
BEGIN
-- Check SETUP constraint
IF (RefEdge) THEN
IF (SetupEn) THEN
CheckInfo.ObsTime := RefTime - TestTime;
CheckInfo.State := To_X01(TestSignal);
CASE CheckInfo.State IS
WHEN '0' =>
CheckInfo.ExpTime := SetupLow;
-- start of new code IR245-246
BC := HoldHigh;
-- end of new code IR245-246
WHEN '1' =>
CheckInfo.ExpTime := SetupHigh;
-- start of new code IR245-246
BC := HoldLow;
-- end of new code IR245-246
WHEN 'X' =>
CheckInfo.ExpTime := Maximum(SetupHigh,SetupLow);
-- start of new code IR245-246
BC := Maximum(HoldHigh,HoldLow);
-- end of new code IR245-246
END CASE;
-- added the second condition for IR 245-246
CheckInfo.Violation :=
((CheckInfo.ObsTime < CheckInfo.ExpTime)
AND ( NOT ((CheckInfo.ObsTime = BC) and (BC = 0 ns))));
-- start of new code IR245-246
IF (CheckInfo.ExpTime = 0 ns) THEN
CheckInfo.CheckKind := HoldCheck;
ELSE
CheckInfo.CheckKind := SetupCheck;
END IF;
-- end of new code IR245-246
SetupEn := FALSE;
ELSE
CheckInfo.Violation := FALSE;
END IF;
-- Check HOLD constraint
ELSIF (TestEvent) THEN
IF HoldEn THEN
CheckInfo.ObsTime := TestTime - RefTime;
CheckInfo.State := To_X01(TestSignal);
CASE CheckInfo.State IS
WHEN '0' =>
CheckInfo.ExpTime := HoldHigh;
-- new code for unnamed IR
CheckInfo.State := '1';
-- start of new code IR245-246
BC := SetupLow;
-- end of new code IR245-246
WHEN '1' =>
CheckInfo.ExpTime := HoldLow;
-- new code for unnamed IR
CheckInfo.State := '0';
-- start of new code IR245-246
BC := SetupHigh;
-- end of new code IR245-246
WHEN 'X' =>
CheckInfo.ExpTime := Maximum(HoldHigh,HoldLow);
-- start of new code IR245-246
BC := Maximum(SetupHigh,SetupLow);
-- end of new code IR245-246
END CASE;
-- added the second condition for IR 245-246
CheckInfo.Violation :=
((CheckInfo.ObsTime < CheckInfo.ExpTime)
AND ( NOT ((CheckInfo.ObsTime = BC) and (BC = 0 ns))));
-- start of new code IR245-246
IF (CheckInfo.ExpTime = 0 ns) THEN
CheckInfo.CheckKind := SetupCheck;
ELSE
CheckInfo.CheckKind := HoldCheck;
END IF;
-- end of new code IR245-246
HoldEn := NOT CheckInfo.Violation;
ELSE
CheckInfo.Violation := FALSE;
END IF;
ELSE
CheckInfo.Violation := FALSE;
END IF;
-- Adjust report values to account for internal model delays
-- Note: TestDelay, RefDelay, TestTime, RefTime are non-negative
-- Note: bias may be negative or positive
IF MsgOn AND CheckInfo.Violation THEN
-- modified the code for correct reporting of violation in case of
-- order of signals being reversed because of internal delays
-- new variable
actualObsTime := (TestTime-TestDelay)-(RefTime-RefDelay);
bias := TestDelay - RefDelay;
IF (actualObsTime < 0 ns) THEN -- It should be a setup check
IF ( CheckInfo.CheckKind = HoldCheck) THEN
CheckInfo.CheckKind := SetupCheck;
CASE CheckInfo.State IS
WHEN '0' => CheckInfo.ExpTime := SetupLow;
WHEN '1' => CheckInfo.ExpTime := SetupHigh;
WHEN 'X' => CheckInfo.ExpTime := Maximum(SetupHigh,SetupLow);
END CASE;
END IF;
CheckInfo.ObsTime := -actualObsTime;
CheckInfo.ExpTime := CheckInfo.ExpTime + bias;
CheckInfo.DetTime := RefTime - RefDelay;
ELSE -- It should be a hold check
IF (CheckInfo.CheckKind = SetupCheck) THEN
CheckInfo.CheckKind := HoldCheck;
CASE CheckInfo.State IS
WHEN '0' =>
CheckInfo.ExpTime := HoldHigh;
CheckInfo.State := '1';
WHEN '1' =>
CheckInfo.ExpTime := HoldLow;
CheckInfo.State := '0';
WHEN 'X' =>
CheckInfo.ExpTime := Maximum(HoldHigh,HoldLow);
END CASE;
END IF;
CheckInfo.ObsTime := actualObsTime;
CheckInfo.ExpTime := CheckInfo.ExpTime - bias;
CheckInfo.DetTime := TestTime - TestDelay;
END IF;
END IF;
END InternalTimingCheck;
-- ----------------------------------------------------------------------------
-- Setup and Hold Time Check Routine
-- ----------------------------------------------------------------------------
PROCEDURE TimingArrayIndex (
SIGNAL InputSignal : IN Std_logic_vector;
CONSTANT ArrayIndexNorm : IN INTEGER;
VARIABLE Index : OUT INTEGER
) IS
BEGIN
IF (InputSignal'LEFT > InputSignal'RIGHT) THEN
Index := ArrayIndexNorm + InputSignal'RIGHT;
ELSE
Index := InputSignal'RIGHT - ArrayIndexNorm;
END IF;
END TimingArrayIndex;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryReportViolation (
CONSTANT TestSignalName : IN STRING := "";
CONSTANT RefSignalName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT CheckInfo : IN CheckInfoType;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING
) IS
VARIABLE Message : LINE;
BEGIN
IF (NOT CheckInfo.Violation) THEN
RETURN;
END IF;
Write ( Message, HeaderMsg );
CASE CheckInfo.CheckKind IS
WHEN SetupCheck => Write ( Message, STRING'(" SETUP ") );
WHEN HoldCheck => Write ( Message, STRING'(" HOLD ") );
WHEN RecoveryCheck => Write ( Message, STRING'(" RECOVERY ") );
WHEN RemovalCheck => Write ( Message, STRING'(" REMOVAL ") );
WHEN PulseWidCheck => Write ( Message, STRING'(" PULSE WIDTH "));
WHEN PeriodCheck => Write ( Message, STRING'(" PERIOD ") );
END CASE;
Write ( Message, HiLoStr(CheckInfo.State) );
Write ( Message, STRING'(" VIOLATION ON ") );
Write ( Message, TestSignalName );
IF (RefSignalName'LENGTH > 0) THEN
Write ( Message, STRING'(" WITH RESPECT TO ") );
Write ( Message, RefSignalName );
END IF;
Write ( Message, ';' & LF );
Write ( Message, STRING'(" Expected := ") );
Write ( Message, CheckInfo.ExpTime);
Write ( Message, STRING'("; Observed := ") );
Write ( Message, CheckInfo.ObsTime);
Write ( Message, STRING'("; At : ") );
Write ( Message, CheckInfo.DetTime);
ASSERT FALSE REPORT Message.ALL SEVERITY MsgSeverity;
DEALLOCATE (Message);
END VitalMemoryReportViolation;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryReportViolation (
CONSTANT TestSignalName : IN STRING := "";
CONSTANT RefSignalName : IN STRING := "";
CONSTANT TestArrayIndex : IN INTEGER;
CONSTANT RefArrayIndex : IN INTEGER;
SIGNAL TestSignal : IN std_logic_vector;
SIGNAL RefSignal : IN std_logic_vector;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT CheckInfo : IN CheckInfoType;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING
) IS
VARIABLE Message : LINE;
VARIABLE i, j : INTEGER;
BEGIN
IF (NOT CheckInfo.Violation) THEN
RETURN;
END IF;
Write ( Message, HeaderMsg );
CASE CheckInfo.CheckKind IS
WHEN SetupCheck => Write ( Message, STRING'(" SETUP ") );
WHEN HoldCheck => Write ( Message, STRING'(" HOLD ") );
WHEN PulseWidCheck => Write ( Message, STRING'(" PULSE WIDTH "));
WHEN PeriodCheck => Write ( Message, STRING'(" PERIOD ") );
WHEN OTHERS => Write ( Message, STRING'(" UNKNOWN ") );
END CASE;
Write ( Message, HiLoStr(CheckInfo.State) );
Write ( Message, STRING'(" VIOLATION ON ") );
Write ( Message, TestSignalName );
TimingArrayIndex(TestSignal, TestArrayIndex, i);
CASE MsgFormat IS
WHEN Scalar =>
NULL;
WHEN VectorEnum =>
Write ( Message, '_');
Write ( Message, i);
WHEN Vector =>
Write ( Message, '(');
Write ( Message, i);
Write ( Message, ')');
END CASE;
IF (RefSignalName'LENGTH > 0) THEN
Write ( Message, STRING'(" WITH RESPECT TO ") );
Write ( Message, RefSignalName );
END IF;
IF(RefSignal'LENGTH > 0) THEN
TimingArrayIndex(RefSignal, RefArrayIndex, j);
CASE MsgFormat IS
WHEN Scalar =>
NULL;
WHEN VectorEnum =>
Write ( Message, '_');
Write ( Message, j);
WHEN Vector =>
Write ( Message, '(');
Write ( Message, j);
Write ( Message, ')');
END CASE;
END IF;
Write ( Message, ';' & LF );
Write ( Message, STRING'(" Expected := ") );
Write ( Message, CheckInfo.ExpTime);
Write ( Message, STRING'("; Observed := ") );
Write ( Message, CheckInfo.ObsTime);
Write ( Message, STRING'("; At : ") );
Write ( Message, CheckInfo.DetTime);
ASSERT FALSE REPORT Message.ALL SEVERITY MsgSeverity;
DEALLOCATE (Message);
END VitalMemoryReportViolation;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryReportViolation (
CONSTANT TestSignalName : IN STRING := "";
CONSTANT RefSignalName : IN STRING := "";
CONSTANT TestArrayIndex : IN INTEGER;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT CheckInfo : IN CheckInfoType;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING
) IS
VARIABLE Message : LINE;
BEGIN
IF (NOT CheckInfo.Violation) THEN
RETURN;
END IF;
Write ( Message, HeaderMsg );
CASE CheckInfo.CheckKind IS
WHEN SetupCheck => Write ( Message, STRING'(" SETUP ") );
WHEN HoldCheck => Write ( Message, STRING'(" HOLD ") );
WHEN PulseWidCheck => Write ( Message, STRING'(" PULSE WIDTH "));
WHEN PeriodCheck => Write ( Message, STRING'(" PERIOD ") );
WHEN OTHERS => Write ( Message, STRING'(" UNKNOWN ") );
END CASE;
Write ( Message, HiLoStr(CheckInfo.State) );
Write ( Message, STRING'(" VIOLATION ON ") );
Write ( Message, TestSignalName );
CASE MsgFormat IS
WHEN Scalar =>
NULL;
WHEN VectorEnum =>
Write ( Message, '_');
Write ( Message, TestArrayIndex);
WHEN Vector =>
Write ( Message, '(');
Write ( Message, TestArrayIndex);
Write ( Message, ')');
END CASE;
IF (RefSignalName'LENGTH > 0) THEN
Write ( Message, STRING'(" WITH RESPECT TO ") );
Write ( Message, RefSignalName );
END IF;
Write ( Message, ';' & LF );
Write ( Message, STRING'(" Expected := ") );
Write ( Message, CheckInfo.ExpTime);
Write ( Message, STRING'("; Observed := ") );
Write ( Message, CheckInfo.ObsTime);
Write ( Message, STRING'("; At : ") );
Write ( Message, CheckInfo.DetTime);
ASSERT FALSE REPORT Message.ALL SEVERITY MsgSeverity;
DEALLOCATE (Message);
END VitalMemoryReportViolation;
-- ----------------------------------------------------------------------------
FUNCTION VitalMemoryTimingDataInit
RETURN VitalMemoryTimingDataType IS
BEGIN
RETURN (FALSE, 'X', 0 ns, FALSE, 'X', 0 ns, FALSE,
NULL, NULL, NULL, NULL, NULL, NULL);
END;
-- ----------------------------------------------------------------------------
-- Procedure: VitalSetupHoldCheck
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySetupHoldCheck (
VARIABLE Violation : OUT X01ArrayT;
VARIABLE TimingData : INOUT VitalMemoryTimingDataType;
SIGNAL TestSignal : IN std_ulogic;
CONSTANT TestSignalName: IN STRING := "";
CONSTANT TestDelay : IN TIME := 0 ns;
SIGNAL RefSignal : IN std_ulogic;
CONSTANT RefSignalName : IN STRING := "";
CONSTANT RefDelay : IN TIME := 0 ns;
CONSTANT SetupHigh : IN VitalDelayType;
CONSTANT SetupLow : IN VitalDelayType;
CONSTANT HoldHigh : IN VitalDelayType;
CONSTANT HoldLow : IN VitalDelayType;
CONSTANT CheckEnabled : IN VitalBoolArrayT;
CONSTANT RefTransition : IN VitalEdgeSymbolType;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
--IR252 3/23/98
CONSTANT EnableSetupOnTest : IN BOOLEAN := TRUE;
CONSTANT EnableSetupOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnTest : IN BOOLEAN := TRUE
) IS
VARIABLE CheckInfo : CheckInfoType;
VARIABLE CheckEnScalar : BOOLEAN := FALSE;
VARIABLE ViolationInt : X01ArrayT(CheckEnabled'RANGE);
VARIABLE RefEdge : BOOLEAN;
VARIABLE TestEvent : BOOLEAN;
VARIABLE TestDly : TIME := Maximum(0 ns, TestDelay);
VARIABLE RefDly : TIME := Maximum(0 ns, RefDelay);
VARIABLE bias : TIME;
BEGIN
-- Initialization of working area.
IF (TimingData.NotFirstFlag = FALSE) THEN
TimingData.TestLast := To_X01(TestSignal);
TimingData.RefLast := To_X01(RefSignal);
TimingData.NotFirstFlag := TRUE;
END IF;
-- Detect reference edges and record the time of the last edge
RefEdge := EdgeSymbolMatch(TimingData.RefLast, To_X01(RefSignal),
RefTransition);
TimingData.RefLast := To_X01(RefSignal);
IF (RefEdge) THEN
TimingData.RefTime := NOW;
--TimingData.HoldEnA.all := (TestSignal'RANGE=>TRUE);
--IR252 3/23/98
TimingData.SetupEn := TimingData.SetupEn AND EnableSetupOnRef;
TimingData.HoldEn := EnableHoldOnRef;
END IF;
-- Detect test (data) changes and record the time of the last change
TestEvent := TimingData.TestLast /= To_X01Z(TestSignal);
TimingData.TestLast := To_X01Z(TestSignal);
IF TestEvent THEN
TimingData.SetupEn := EnableSetupOnTest ; --IR252 3/23/98
TimingData.HoldEn := TimingData.HoldEn AND EnableHoldOnTest ;
--IR252 3/23/98
TimingData.TestTime := NOW;
END IF;
FOR i IN CheckEnabled'RANGE LOOP
IF CheckEnabled(i) = TRUE THEN
CheckEnScalar := TRUE;
END IF;
ViolationInt(i) := '0';
END LOOP;
IF (CheckEnScalar) THEN
InternalTimingCheck (
TestSignal => TestSignal,
RefSignal => RefSignal,
TestDelay => TestDly,
RefDelay => RefDly,
SetupHigh => SetupHigh,
SetupLow => SetupLow,
HoldHigh => HoldHigh,
HoldLow => HoldLow,
RefTime => TimingData.RefTime,
RefEdge => RefEdge,
TestTime => TimingData.TestTime,
TestEvent => TestEvent,
SetupEn => TimingData.SetupEn,
HoldEn => TimingData.HoldEn,
CheckInfo => CheckInfo,
MsgOn => MsgOn
);
-- Report any detected violations and set return violation flag
IF CheckInfo.Violation THEN
IF (MsgOn) THEN
VitalMemoryReportViolation (TestSignalName, RefSignalName,
HeaderMsg, CheckInfo, MsgSeverity );
END IF;
IF (XOn) THEN
FOR i IN CheckEnabled'RANGE LOOP
IF CheckEnabled(i) = TRUE THEN
ViolationInt(i) := 'X';
END IF;
END LOOP;
END IF;
END IF;
END IF;
Violation := ViolationInt;
END VitalMemorySetupHoldCheck;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySetupHoldCheck (
VARIABLE Violation : OUT X01ArrayT;
VARIABLE TimingData : INOUT VitalMemoryTimingDataType;
SIGNAL TestSignal : IN std_logic_vector;
CONSTANT TestSignalName: IN STRING := "";
CONSTANT TestDelay : IN VitalDelayArraytype;
SIGNAL RefSignal : IN std_ulogic;
CONSTANT RefSignalName : IN STRING := "";
CONSTANT RefDelay : IN TIME := 0 ns;
CONSTANT SetupHigh : IN VitalDelayArraytype;
CONSTANT SetupLow : IN VitalDelayArraytype;
CONSTANT HoldHigh : IN VitalDelayArraytype;
CONSTANT HoldLow : IN VitalDelayArraytype;
CONSTANT CheckEnabled : IN BOOLEAN := TRUE;
CONSTANT RefTransition : IN VitalEdgeSymbolType;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType;
--IR252 3/23/98
CONSTANT EnableSetupOnTest : IN BOOLEAN := TRUE;
CONSTANT EnableSetupOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnTest : IN BOOLEAN := TRUE
) IS
VARIABLE CheckInfo : CheckInfoType;
VARIABLE RefEdge : BOOLEAN;
VARIABLE TestEvent : VitalBoolArrayT(TestSignal'RANGE);
VARIABLE TestDly : TIME;
VARIABLE RefDly : TIME := Maximum(0 ns, RefDelay);
VARIABLE bias : TIME;
BEGIN
-- Initialization of working area.
IF (TimingData.NotFirstFlag = FALSE) THEN
TimingData.TestLastA := NEW std_logic_vector(TestSignal'RANGE);
TimingData.TestTimeA := NEW VitalTimeArrayT(TestSignal'RANGE);
TimingData.HoldEnA := NEW VitalBoolArrayT(TestSignal'RANGE);
TimingData.SetupEnA := NEW VitalBoolArrayT(TestSignal'RANGE);
FOR i IN TestSignal'RANGE LOOP
TimingData.TestLastA(i) := To_X01(TestSignal(i));
END LOOP;
TimingData.RefLast := To_X01(RefSignal);
TimingData.NotFirstFlag := TRUE;
END IF;
-- Detect reference edges and record the time of the last edge
RefEdge := EdgeSymbolMatch(TimingData.RefLast, To_X01(RefSignal),
RefTransition);
TimingData.RefLast := To_X01(RefSignal);
IF (RefEdge) THEN
TimingData.RefTime := NOW;
--TimingData.HoldEnA.all := (TestSignal'RANGE=>TRUE);
--IR252 3/23/98
FOR i IN TestSignal'RANGE LOOP
TimingData.SetupEnA(i)
:= TimingData.SetupEnA(i) AND EnableSetupOnRef;
TimingData.HoldEnA(i) := EnableHoldOnRef;
END LOOP;
END IF;
-- Detect test (data) changes and record the time of the last change
FOR i IN TestSignal'RANGE LOOP
TestEvent(i) := TimingData.TestLastA(i) /= To_X01Z(TestSignal(i));
TimingData.TestLastA(i) := To_X01Z(TestSignal(i));
IF TestEvent(i) THEN
TimingData.SetupEnA(i) := EnableSetupOnTest ; --IR252 3/23/98
TimingData.HoldEnA(i) := TimingData.HoldEnA(i) AND EnableHoldOnTest ;
--IR252 3/23/98
TimingData.TestTimeA(i) := NOW;
--TimingData.SetupEnA(i) := TRUE;
TimingData.TestTime := NOW;
END IF;
END LOOP;
FOR i IN TestSignal'RANGE LOOP
Violation(i) := '0';
IF (CheckEnabled) THEN
TestDly := Maximum(0 ns, TestDelay(i));
InternalTimingCheck (
TestSignal => TestSignal(i),
RefSignal => RefSignal,
TestDelay => TestDly,
RefDelay => RefDly,
SetupHigh => SetupHigh(i),
SetupLow => SetupLow(i),
HoldHigh => HoldHigh(i),
HoldLow => HoldLow(i),
RefTime => TimingData.RefTime,
RefEdge => RefEdge,
TestTime => TimingData.TestTimeA(i),
TestEvent => TestEvent(i),
SetupEn => TimingData.SetupEnA(i),
HoldEn => TimingData.HoldEnA(i),
CheckInfo => CheckInfo,
MsgOn => MsgOn
);
-- Report any detected violations and set return violation flag
IF CheckInfo.Violation THEN
IF (MsgOn) THEN
VitalMemoryReportViolation (TestSignalName, RefSignalName, i ,
HeaderMsg, CheckInfo, MsgFormat, MsgSeverity );
END IF;
IF (XOn) THEN
Violation(i) := 'X';
END IF;
END IF;
END IF;
END LOOP;
END VitalMemorySetupHoldCheck;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySetupHoldCheck (
VARIABLE Violation : OUT X01ArrayT;
VARIABLE TimingData : INOUT VitalMemoryTimingDataType;
SIGNAL TestSignal : IN std_logic_vector;
CONSTANT TestSignalName: IN STRING := "";
CONSTANT TestDelay : IN VitalDelayArraytype;
SIGNAL RefSignal : IN std_ulogic;
CONSTANT RefSignalName : IN STRING := "";
CONSTANT RefDelay : IN TIME := 0 ns;
CONSTANT SetupHigh : IN VitalDelayArraytype;
CONSTANT SetupLow : IN VitalDelayArraytype;
CONSTANT HoldHigh : IN VitalDelayArraytype;
CONSTANT HoldLow : IN VitalDelayArraytype;
CONSTANT CheckEnabled : IN VitalBoolArrayT;
CONSTANT RefTransition : IN VitalEdgeSymbolType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT NumBitsPerSubWord : IN INTEGER := 1;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType;
--IR252 3/23/98
CONSTANT EnableSetupOnTest : IN BOOLEAN := TRUE;
CONSTANT EnableSetupOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnTest : IN BOOLEAN := TRUE
) IS
VARIABLE CheckInfo : CheckInfoType;
VARIABLE ViolationInt : X01ArrayT(TestSignal'RANGE);
VARIABLE ViolationIntNorm: X01ArrayT(TestSignal'LENGTH-1 downto 0);
VARIABLE ViolationNorm : X01ArrayT(Violation'LENGTH-1 downto 0);
VARIABLE CheckEnInt : VitalBoolArrayT(TestSignal'RANGE);
VARIABLE CheckEnIntNorm : VitalBoolArrayT(TestSignal'LENGTH-1 downto 0);
VARIABLE CheckEnScalar : BOOLEAN := FALSE; --Mem IR 401
VARIABLE CheckEnabledNorm: VitalBoolArrayT(CheckEnabled'LENGTH-1 downto 0);
VARIABLE RefEdge : BOOLEAN;
VARIABLE TestEvent : VitalBoolArrayT(TestSignal'RANGE);
VARIABLE TestDly : TIME;
VARIABLE RefDly : TIME := Maximum(0 ns, RefDelay);
VARIABLE bias : TIME;
BEGIN
-- Initialization of working area.
IF (TimingData.NotFirstFlag = FALSE) THEN
TimingData.TestLastA := NEW std_logic_vector(TestSignal'RANGE);
TimingData.TestTimeA := NEW VitalTimeArrayT(TestSignal'RANGE);
TimingData.HoldEnA := NEW VitalBoolArrayT(TestSignal'RANGE);
TimingData.SetupEnA := NEW VitalBoolArrayT(TestSignal'RANGE);
FOR i IN TestSignal'RANGE LOOP
TimingData.TestLastA(i) := To_X01(TestSignal(i));
END LOOP;
TimingData.RefLast := To_X01(RefSignal);
TimingData.NotFirstFlag := TRUE;
END IF;
-- Detect reference edges and record the time of the last edge
RefEdge := EdgeSymbolMatch(TimingData.RefLast, To_X01(RefSignal),
RefTransition);
TimingData.RefLast := To_X01(RefSignal);
IF RefEdge THEN
TimingData.RefTime := NOW;
--TimingData.HoldEnA.all := (TestSignal'RANGE=>TRUE);
--IR252 3/23/98
FOR i IN TestSignal'RANGE LOOP
TimingData.SetupEnA(i)
:= TimingData.SetupEnA(i) AND EnableSetupOnRef;
TimingData.HoldEnA(i) := EnableHoldOnRef;
END LOOP;
END IF;
-- Detect test (data) changes and record the time of the last change
FOR i IN TestSignal'RANGE LOOP
TestEvent(i) := TimingData.TestLastA(i) /= To_X01Z(TestSignal(i));
TimingData.TestLastA(i) := To_X01Z(TestSignal(i));
IF TestEvent(i) THEN
TimingData.SetupEnA(i) := EnableSetupOnTest ; --IR252 3/23/98
TimingData.HoldEnA(i) := TimingData.HoldEnA(i) AND EnableHoldOnTest ;
--IR252 3/23/98
TimingData.TestTimeA(i) := NOW;
--TimingData.SetupEnA(i) := TRUE;
TimingData.TestTime := NOW;
END IF;
END LOOP;
IF ArcType = CrossArc THEN
CheckEnScalar := FALSE;
FOR i IN CheckEnabled'RANGE LOOP
IF CheckEnabled(i) = TRUE THEN
CheckEnScalar := TRUE;
END IF;
END LOOP;
FOR i IN CheckEnInt'RANGE LOOP
CheckEnInt(i) := CheckEnScalar;
END LOOP;
ELSE
FOR i IN CheckEnIntNorm'RANGE LOOP
CheckEnIntNorm(i) := CheckEnabledNorm(i / NumBitsPerSubWord );
END LOOP;
CheckEnInt := CheckEnIntNorm;
END IF;
FOR i IN TestSignal'RANGE LOOP
ViolationInt(i) := '0';
IF (CheckEnInt(i)) THEN
TestDly := Maximum(0 ns, TestDelay(i));
InternalTimingCheck (
TestSignal => TestSignal(i),
RefSignal => RefSignal,
TestDelay => TestDly,
RefDelay => RefDly,
SetupHigh => SetupHigh(i),
SetupLow => SetupLow(i),
HoldHigh => HoldHigh(i),
HoldLow => HoldLow(i),
RefTime => TimingData.RefTime,
RefEdge => RefEdge,
TestTime => TimingData.TestTimeA(i),
TestEvent => TestEvent(i),
SetupEn => TimingData.SetupEnA(i),
HoldEn => TimingData.HoldEnA(i),
CheckInfo => CheckInfo,
MsgOn => MsgOn
);
-- Report any detected violations and set return violation flag
IF CheckInfo.Violation THEN
IF (MsgOn) THEN
VitalMemoryReportViolation (TestSignalName, RefSignalName, i ,
HeaderMsg, CheckInfo, MsgFormat, MsgSeverity );
END IF;
IF (XOn) THEN
ViolationInt(i) := 'X';
END IF;
END IF;
END IF;
END LOOP;
IF (ViolationInt'LENGTH = Violation'LENGTH) THEN
Violation := ViolationInt;
ELSE
ViolationIntNorm := ViolationInt;
FOR i IN ViolationNorm'RANGE LOOP
ViolationNorm(i) := '0';
END LOOP;
FOR i IN ViolationIntNorm'RANGE LOOP
IF (ViolationIntNorm(i) = 'X') THEN
ViolationNorm(i / NumBitsPerSubWord) := 'X';
END IF;
END LOOP;
Violation := ViolationNorm;
END IF;
END VitalMemorySetupHoldCheck;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySetupHoldCheck (
VARIABLE Violation : OUT X01ArrayT;
VARIABLE TimingData : INOUT VitalMemoryTimingDataType;
SIGNAL TestSignal : IN std_logic_vector;
CONSTANT TestSignalName: IN STRING := "";
CONSTANT TestDelay : IN VitalDelayArraytype;
SIGNAL RefSignal : IN std_logic_vector;
CONSTANT RefSignalName : IN STRING := "";
CONSTANT RefDelay : IN VitalDelayArraytype;
CONSTANT SetupHigh : IN VitalDelayArraytype;
CONSTANT SetupLow : IN VitalDelayArraytype;
CONSTANT HoldHigh : IN VitalDelayArraytype;
CONSTANT HoldLow : IN VitalDelayArraytype;
CONSTANT CheckEnabled : IN BOOLEAN := TRUE;
CONSTANT RefTransition : IN VitalEdgeSymbolType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT NumBitsPerSubWord : IN INTEGER := 1;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType;
--IR252 3/23/98
CONSTANT EnableSetupOnTest : IN BOOLEAN := TRUE;
CONSTANT EnableSetupOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnTest : IN BOOLEAN := TRUE
) IS
VARIABLE CheckInfo : CheckInfoType;
VARIABLE RefEdge : VitalBoolArrayT(RefSignal'LENGTH-1 downto 0);
VARIABLE TestEvent : VitalBoolArrayT(TestSignal'LENGTH-1 downto 0);
VARIABLE TestDly : TIME;
VARIABLE RefDly : TIME;
VARIABLE bias : TIME;
VARIABLE NumTestBits : NATURAL := TestSignal'LENGTH;
VARIABLE NumRefBits : NATURAL := RefSignal'LENGTH;
VARIABLE NumChecks : NATURAL;
VARIABLE ViolationTest : X01ArrayT(NumTestBits-1 downto 0);
VARIABLE ViolationRef : X01ArrayT(NumRefBits-1 downto 0);
VARIABLE TestSignalNorm : std_logic_vector(NumTestBits-1 downto 0)
:= TestSignal;
VARIABLE TestDelayNorm : VitalDelayArraytype(NumTestBits-1 downto 0)
:= TestDelay;
VARIABLE RefSignalNorm : std_logic_vector(NumRefBits-1 downto 0)
:= RefSignal;
VARIABLE RefDelayNorm : VitalDelayArraytype(NumRefBits-1 downto 0)
:= RefDelay;
VARIABLE SetupHighNorm : VitalDelayArraytype(SetupHigh'LENGTH-1 downto 0)
:= SetupHigh;
VARIABLE SetupLowNorm : VitalDelayArraytype(SetupLow'LENGTH-1 downto 0)
:= SetupLow;
VARIABLE HoldHighNorm : VitalDelayArraytype(HoldHigh'LENGTH-1 downto 0)
:= HoldHigh;
VARIABLE HoldLowNorm : VitalDelayArraytype(HoldLow'LENGTH-1 downto 0)
:= HoldLow;
VARIABLE RefBitLow : NATURAL;
VARIABLE RefBitHigh : NATURAL;
VARIABLE EnArrayIndex : NATURAL;
VARIABLE TimingArrayIndex: NATURAL;
BEGIN
-- Initialization of working area.
IF (TimingData.NotFirstFlag = FALSE) THEN
TimingData.TestLastA := NEW std_logic_vector(NumTestBits-1 downto 0);
TimingData.TestTimeA := NEW VitalTimeArrayT(NumTestBits-1 downto 0);
TimingData.RefTimeA := NEW VitalTimeArrayT(NumRefBits-1 downto 0);
TimingData.RefLastA := NEW X01ArrayT(NumRefBits-1 downto 0);
IF (ArcType = CrossArc) THEN
NumChecks := RefSignal'LENGTH * TestSignal'LENGTH;
ELSE
NumChecks := TestSignal'LENGTH;
END IF;
TimingData.HoldEnA := NEW VitalBoolArrayT(NumChecks-1 downto 0);
TimingData.SetupEnA := NEW VitalBoolArrayT(NumChecks-1 downto 0);
FOR i IN TestSignalNorm'RANGE LOOP
TimingData.TestLastA(i) := To_X01(TestSignalNorm(i));
END LOOP;
FOR i IN RefSignalNorm'RANGE LOOP
TimingData.RefLastA(i) := To_X01(RefSignalNorm(i));
END LOOP;
TimingData.NotFirstFlag := TRUE;
END IF;
-- Detect reference edges and record the time of the last edge
FOR i IN RefSignalNorm'RANGE LOOP
RefEdge(i) := EdgeSymbolMatch(TimingData.RefLastA(i),
To_X01(RefSignalNorm(i)), RefTransition);
TimingData.RefLastA(i) := To_X01(RefSignalNorm(i));
IF (RefEdge(i)) THEN
TimingData.RefTimeA(i) := NOW;
END IF;
END LOOP;
-- Detect test (data) changes and record the time of the last change
FOR i IN TestSignalNorm'RANGE LOOP
TestEvent(i) := TimingData.TestLastA(i) /= To_X01Z(TestSignalNorm(i));
TimingData.TestLastA(i) := To_X01Z(TestSignalNorm(i));
IF (TestEvent(i)) THEN
TimingData.TestTimeA(i) := NOW;
END IF;
END LOOP;
FOR i IN ViolationTest'RANGE LOOP
ViolationTest(i) := '0';
END LOOP;
FOR i IN ViolationRef'RANGE LOOP
ViolationRef(i) := '0';
END LOOP;
FOR i IN TestSignalNorm'RANGE LOOP
IF (ArcType = CrossArc) THEN
FOR j IN RefSignalNorm'RANGE LOOP
IF (TestEvent(i)) THEN
--TimingData.SetupEnA(i*NumRefBits+j) := TRUE;
--IR252
TimingData.SetupEnA(i*NumRefBits+j) := EnableSetupOnTest;
TimingData.HoldEnA(i*NumRefBits+j)
:= TimingData.HoldEnA(i*NumRefBits+j) AND EnableHoldOnTest;
END IF;
IF (RefEdge(j)) THEN
--TimingData.HoldEnA(i*NumRefBits+j) := TRUE;
--IR252
TimingData.HoldEnA(i*NumRefBits+j) := EnableHoldOnRef;
TimingData.SetupEnA(i*NumRefBits+j)
:= TimingData.SetupEnA(i*NumRefBits+j) AND EnableSetupOnRef;
END IF;
END LOOP;
RefBitLow := 0;
RefBitHigh := NumRefBits-1;
TimingArrayIndex := i;
ELSE
IF ArcType = SubwordArc THEN
RefBitLow := i / NumBitsPerSubWord;
TimingArrayIndex := i + NumTestBits * RefBitLow;
ELSE
RefBitLow := i;
TimingArrayIndex := i;
END IF;
RefBitHigh := RefBitLow;
IF TestEvent(i) THEN
--TimingData.SetupEnA(i) := TRUE;
--IR252
TimingData.SetupEnA(i) := EnableSetupOnTest;
TimingData.HoldEnA(i) := TimingData.HoldEnA(i) AND EnableHoldOnTest;
END IF;
IF RefEdge(RefBitLow) THEN
--TimingData.HoldEnA(i) := TRUE;
--IR252
TimingData.HoldEnA(i) := EnableHoldOnRef;
TimingData.SetupEnA(i) := TimingData.SetupEnA(i) AND EnableSetupOnRef;
END IF;
END IF;
EnArrayIndex := i;
FOR j IN RefBitLow to RefBitHigh LOOP
IF (CheckEnabled) THEN
TestDly := Maximum(0 ns, TestDelayNorm(i));
RefDly := Maximum(0 ns, RefDelayNorm(j));
InternalTimingCheck (
TestSignal => TestSignalNorm(i),
RefSignal => RefSignalNorm(j),
TestDelay => TestDly,
RefDelay => RefDly,
SetupHigh => SetupHighNorm(TimingArrayIndex),
SetupLow => SetupLowNorm(TimingArrayIndex),
HoldHigh => HoldHighNorm(TimingArrayIndex),
HoldLow => HoldLowNorm(TimingArrayIndex),
RefTime => TimingData.RefTimeA(j),
RefEdge => RefEdge(j),
TestTime => TimingData.TestTimeA(i),
TestEvent => TestEvent(i),
SetupEn => TimingData.SetupEnA(EnArrayIndex),
HoldEn => TimingData.HoldEnA(EnArrayIndex),
CheckInfo => CheckInfo,
MsgOn => MsgOn
);
-- Report any detected violations and set return violation flag
IF (CheckInfo.Violation) THEN
IF (MsgOn) THEN
VitalMemoryReportViolation (TestSignalName, RefSignalName, i, j,
TestSignal, RefSignal, HeaderMsg, CheckInfo,
MsgFormat, MsgSeverity );
END IF;
IF (XOn) THEN
ViolationTest(i) := 'X';
ViolationRef(j) := 'X';
END IF;
END IF;
END IF;
TimingArrayIndex := TimingArrayIndex + NumRefBits;
EnArrayIndex := EnArrayIndex + NumRefBits;
END LOOP;
END LOOP;
IF (ArcType = CrossArc) THEN
Violation := ViolationRef;
ELSE
IF (Violation'LENGTH = ViolationRef'LENGTH) THEN
Violation := ViolationRef;
ELSE
Violation := ViolationTest;
END IF;
END IF;
END VitalMemorySetupHoldCheck;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySetupHoldCheck (
VARIABLE Violation : OUT X01ArrayT;
VARIABLE TimingData : INOUT VitalMemoryTimingDataType;
SIGNAL TestSignal : IN std_logic_vector;
CONSTANT TestSignalName: IN STRING := "";
CONSTANT TestDelay : IN VitalDelayArraytype;
SIGNAL RefSignal : IN std_logic_vector;
CONSTANT RefSignalName : IN STRING := "";
CONSTANT RefDelay : IN VitalDelayArraytype;
CONSTANT SetupHigh : IN VitalDelayArraytype;
CONSTANT SetupLow : IN VitalDelayArraytype;
CONSTANT HoldHigh : IN VitalDelayArraytype;
CONSTANT HoldLow : IN VitalDelayArraytype;
CONSTANT CheckEnabled : IN VitalBoolArrayT;
CONSTANT RefTransition : IN VitalEdgeSymbolType;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT NumBitsPerSubWord : IN INTEGER := 1;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType;
--IR252 3/23/98
CONSTANT EnableSetupOnTest : IN BOOLEAN := TRUE;
CONSTANT EnableSetupOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnTest : IN BOOLEAN := TRUE
) IS
VARIABLE CheckInfo : CheckInfoType;
VARIABLE RefEdge : VitalBoolArrayT(RefSignal'LENGTH-1 downto 0);
VARIABLE TestEvent : VitalBoolArrayT(TestSignal'LENGTH-1 downto 0);
VARIABLE TestDly : TIME;
VARIABLE RefDly : TIME;
VARIABLE bias : TIME;
VARIABLE NumTestBits : NATURAL := TestSignal'LENGTH;
VARIABLE NumRefBits : NATURAL := RefSignal'LENGTH;
VARIABLE NumChecks : NATURAL;
VARIABLE ViolationTest : X01ArrayT(NumTestBits-1 downto 0);
VARIABLE ViolationRef : X01ArrayT(NumRefBits-1 downto 0);
VARIABLE TestSignalNorm : std_logic_vector(NumTestBits-1 downto 0)
:= TestSignal;
VARIABLE TestDelayNorm : VitalDelayArraytype(NumTestBits-1 downto 0)
:= TestDelay;
VARIABLE RefSignalNorm : std_logic_vector(NumRefBits-1 downto 0)
:= RefSignal;
VARIABLE RefDelayNorm : VitalDelayArraytype(NumRefBits-1 downto 0)
:= RefDelay;
VARIABLE CheckEnNorm : VitalBoolArrayT(NumRefBits-1 downto 0)
:= CheckEnabled;
VARIABLE SetupHighNorm : VitalDelayArraytype(SetupHigh'LENGTH-1 downto 0)
:= SetupHigh;
VARIABLE SetupLowNorm : VitalDelayArraytype(SetupLow'LENGTH-1 downto 0)
:= SetupLow;
VARIABLE HoldHighNorm : VitalDelayArraytype(HoldHigh'LENGTH-1 downto 0)
:= HoldHigh;
VARIABLE HoldLowNorm : VitalDelayArraytype(HoldLow'LENGTH-1 downto 0)
:= HoldLow;
VARIABLE RefBitLow : NATURAL;
VARIABLE RefBitHigh : NATURAL;
VARIABLE EnArrayIndex : NATURAL;
VARIABLE TimingArrayIndex: NATURAL;
BEGIN
-- Initialization of working area.
IF (TimingData.NotFirstFlag = FALSE) THEN
TimingData.TestLastA := NEW std_logic_vector(NumTestBits-1 downto 0);
TimingData.TestTimeA := NEW VitalTimeArrayT(NumTestBits-1 downto 0);
TimingData.RefTimeA := NEW VitalTimeArrayT(NumRefBits-1 downto 0);
TimingData.RefLastA := NEW X01ArrayT(NumRefBits-1 downto 0);
IF ArcType = CrossArc THEN
NumChecks := RefSignal'LENGTH * TestSignal'LENGTH;
ELSE
NumChecks := TestSignal'LENGTH;
END IF;
TimingData.HoldEnA := NEW VitalBoolArrayT(NumChecks-1 downto 0);
TimingData.SetupEnA := NEW VitalBoolArrayT(NumChecks-1 downto 0);
FOR i IN TestSignalNorm'RANGE LOOP
TimingData.TestLastA(i) := To_X01(TestSignalNorm(i));
END LOOP;
FOR i IN RefSignalNorm'RANGE LOOP
TimingData.RefLastA(i) := To_X01(RefSignalNorm(i));
END LOOP;
TimingData.NotFirstFlag := TRUE;
END IF;
-- Detect reference edges and record the time of the last edge
FOR i IN RefSignalNorm'RANGE LOOP
RefEdge(i) := EdgeSymbolMatch(TimingData.RefLastA(i),
To_X01(RefSignalNorm(i)), RefTransition);
TimingData.RefLastA(i) := To_X01(RefSignalNorm(i));
IF RefEdge(i) THEN
TimingData.RefTimeA(i) := NOW;
END IF;
END LOOP;
-- Detect test (data) changes and record the time of the last change
FOR i IN TestSignalNorm'RANGE LOOP
TestEvent(i) := TimingData.TestLastA(i) /= To_X01Z(TestSignalNorm(i));
TimingData.TestLastA(i) := To_X01Z(TestSignalNorm(i));
IF TestEvent(i) THEN
TimingData.TestTimeA(i) := NOW;
END IF;
END LOOP;
FOR i IN ViolationTest'RANGE LOOP
ViolationTest(i) := '0';
END LOOP;
FOR i IN ViolationRef'RANGE LOOP
ViolationRef(i) := '0';
END LOOP;
FOR i IN TestSignalNorm'RANGE LOOP
IF (ArcType = CrossArc) THEN
FOR j IN RefSignalNorm'RANGE LOOP
IF (TestEvent(i)) THEN
--TimingData.SetupEnA(i*NumRefBits+j) := TRUE;
--IR252
TimingData.SetupEnA(i*NumRefBits+j) := EnableSetupOnTest;
TimingData.HoldEnA(i*NumRefBits+j)
:= TimingData.HoldEnA(i*NumRefBits+j) AND EnableHoldOnTest;
END IF;
IF (RefEdge(j)) THEN
--TimingData.HoldEnA(i*NumRefBits+j) := TRUE;
--IR252
TimingData.HoldEnA(i*NumRefBits+j) := EnableHoldOnRef;
TimingData.SetupEnA(i*NumRefBits+j)
:= TimingData.SetupEnA(i*NumRefBits+j) AND EnableSetupOnRef;
END IF;
END LOOP;
RefBitLow := 0;
RefBitHigh := NumRefBits-1;
TimingArrayIndex := i;
ELSE
IF (ArcType = SubwordArc) THEN
RefBitLow := i / NumBitsPerSubWord;
TimingArrayIndex := i + NumTestBits * RefBitLow;
ELSE
RefBitLow := i;
TimingArrayIndex := i;
END IF;
RefBitHigh := RefBitLow;
IF (TestEvent(i)) THEN
--TimingData.SetupEnA(i) := TRUE;
--IR252
TimingData.SetupEnA(i) := EnableSetupOnTest;
TimingData.HoldEnA(i) := TimingData.HoldEnA(i) AND EnableHoldOnTest;
END IF;
IF (RefEdge(RefBitLow)) THEN
--TimingData.HoldEnA(i) := TRUE;
--IR252
TimingData.HoldEnA(i) := EnableHoldOnRef;
TimingData.SetupEnA(i) := TimingData.SetupEnA(i) AND EnableSetupOnRef;
END IF;
END IF;
EnArrayIndex := i;
FOR j IN RefBitLow to RefBitHigh LOOP
IF (CheckEnNorm(j)) THEN
TestDly := Maximum(0 ns, TestDelayNorm(i));
RefDly := Maximum(0 ns, RefDelayNorm(j));
InternalTimingCheck (
TestSignal => TestSignalNorm(i),
RefSignal => RefSignalNorm(j),
TestDelay => TestDly,
RefDelay => RefDly,
SetupHigh => SetupHighNorm(TimingArrayIndex),
SetupLow => SetupLowNorm(TimingArrayIndex),
HoldHigh => HoldHighNorm(TimingArrayIndex),
HoldLow => HoldLowNorm(TimingArrayIndex),
RefTime => TimingData.RefTimeA(j),
RefEdge => RefEdge(j),
TestTime => TimingData.TestTimeA(i),
TestEvent => TestEvent(i),
SetupEn => TimingData.SetupEnA(EnArrayIndex),
HoldEn => TimingData.HoldEnA(EnArrayIndex),
CheckInfo => CheckInfo,
MsgOn => MsgOn
);
-- Report any detected violations and set return violation flag
IF (CheckInfo.Violation) THEN
IF (MsgOn) THEN
VitalMemoryReportViolation (TestSignalName, RefSignalName, i, j,
TestSignal, RefSignal, HeaderMsg, CheckInfo,
MsgFormat, MsgSeverity );
END IF;
IF (XOn) THEN
ViolationTest(i) := 'X';
ViolationRef(j) := 'X';
END IF;
END IF;
END IF;
TimingArrayIndex := TimingArrayIndex + NumRefBits;
EnArrayIndex := EnArrayIndex + NumRefBits;
END LOOP;
END LOOP;
IF (ArcType = CrossArc) THEN
Violation := ViolationRef;
ELSE
IF (Violation'LENGTH = ViolationRef'LENGTH) THEN
Violation := ViolationRef;
ELSE
Violation := ViolationTest;
END IF;
END IF;
END VitalMemorySetupHoldCheck;
-- ----------------------------------------------------------------------------
-- scalar violations not needed
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySetupHoldCheck (
VARIABLE Violation : OUT X01;
VARIABLE TimingData : INOUT VitalMemoryTimingDataType;
SIGNAL TestSignal : IN std_logic_vector;
CONSTANT TestSignalName: IN STRING := "";
CONSTANT TestDelay : IN VitalDelayArraytype;
SIGNAL RefSignal : IN std_ulogic;
CONSTANT RefSignalName : IN STRING := "";
CONSTANT RefDelay : IN TIME := 0 ns;
CONSTANT SetupHigh : IN VitalDelayArraytype;
CONSTANT SetupLow : IN VitalDelayArraytype;
CONSTANT HoldHigh : IN VitalDelayArraytype;
CONSTANT HoldLow : IN VitalDelayArraytype;
CONSTANT CheckEnabled : IN BOOLEAN := TRUE;
CONSTANT RefTransition : IN VitalEdgeSymbolType;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType;
--IR252 3/23/98
CONSTANT EnableSetupOnTest : IN BOOLEAN := TRUE;
CONSTANT EnableSetupOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnTest : IN BOOLEAN := TRUE
) IS
VARIABLE CheckInfo : CheckInfoType;
VARIABLE RefEdge : BOOLEAN;
VARIABLE TestEvent : VitalBoolArrayT(TestSignal'RANGE);
VARIABLE TestDly : TIME;
VARIABLE RefDly : TIME := Maximum(0 ns, RefDelay);
VARIABLE bias : TIME;
BEGIN
-- Initialization of working area.
IF (TimingData.NotFirstFlag = FALSE) THEN
TimingData.TestLastA := NEW std_logic_vector(TestSignal'RANGE);
TimingData.TestTimeA := NEW VitalTimeArrayT(TestSignal'RANGE);
TimingData.HoldEnA := NEW VitalBoolArrayT(TestSignal'RANGE);
TimingData.SetupEnA := NEW VitalBoolArrayT(TestSignal'RANGE);
FOR i IN TestSignal'RANGE LOOP
TimingData.TestLastA(i) := To_X01(TestSignal(i));
END LOOP;
TimingData.RefLast := To_X01(RefSignal);
TimingData.NotFirstFlag := TRUE;
END IF;
-- Detect reference edges and record the time of the last edge
RefEdge := EdgeSymbolMatch(TimingData.RefLast, To_X01(RefSignal),
RefTransition);
TimingData.RefLast := To_X01(RefSignal);
IF (RefEdge) THEN
TimingData.RefTime := NOW;
--TimingData.HoldEnA.all := (TestSignal'RANGE=>TRUE);
--IR252 3/23/98
FOR i IN TestSignal'RANGE LOOP
TimingData.SetupEnA(i)
:= TimingData.SetupEnA(i) AND EnableSetupOnRef;
TimingData.HoldEnA(i) := EnableHoldOnRef;
END LOOP;
END IF;
-- Detect test (data) changes and record the time of the last change
FOR i IN TestSignal'RANGE LOOP
TestEvent(i) := TimingData.TestLastA(i) /= To_X01Z(TestSignal(i));
TimingData.TestLastA(i) := To_X01Z(TestSignal(i));
IF TestEvent(i) THEN
TimingData.SetupEnA(i) := EnableSetupOnTest ; --IR252 3/23/98
TimingData.HoldEnA(i) := TimingData.HoldEnA(i) AND EnableHoldOnTest ;
--IR252 3/23/98
TimingData.TestTimeA(i) := NOW;
--TimingData.SetupEnA(i) := TRUE;
TimingData.TestTime := NOW;
END IF;
END LOOP;
Violation := '0';
FOR i IN TestSignal'RANGE LOOP
IF (CheckEnabled) THEN
TestDly := Maximum(0 ns, TestDelay(i));
InternalTimingCheck (
TestSignal => TestSignal(i),
RefSignal => RefSignal,
TestDelay => TestDly,
RefDelay => RefDly,
SetupHigh => SetupHigh(i),
SetupLow => SetupLow(i),
HoldHigh => HoldHigh(i),
HoldLow => HoldLow(i),
RefTime => TimingData.RefTime,
RefEdge => RefEdge,
TestTime => TimingData.TestTimeA(i),
TestEvent => TestEvent(i),
SetupEn => TimingData.SetupEnA(i),
HoldEn => TimingData.HoldEnA(i),
CheckInfo => CheckInfo,
MsgOn => MsgOn
);
-- Report any detected violations and set return violation flag
IF CheckInfo.Violation THEN
IF (MsgOn) THEN
VitalMemoryReportViolation (TestSignalName, RefSignalName, i ,
HeaderMsg, CheckInfo, MsgFormat, MsgSeverity );
END IF;
IF (XOn) THEN
Violation := 'X';
END IF;
END IF;
END IF;
END LOOP;
END VitalMemorySetupHoldCheck;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemorySetupHoldCheck (
VARIABLE Violation : OUT X01;
VARIABLE TimingData : INOUT VitalMemoryTimingDataType;
SIGNAL TestSignal : IN std_logic_vector;
CONSTANT TestSignalName: IN STRING := "";
CONSTANT TestDelay : IN VitalDelayArraytype;
SIGNAL RefSignal : IN std_logic_vector;
CONSTANT RefSignalName : IN STRING := "";
CONSTANT RefDelay : IN VitalDelayArraytype;
CONSTANT SetupHigh : IN VitalDelayArraytype;
CONSTANT SetupLow : IN VitalDelayArraytype;
CONSTANT HoldHigh : IN VitalDelayArraytype;
CONSTANT HoldLow : IN VitalDelayArraytype;
CONSTANT CheckEnabled : IN BOOLEAN := TRUE;
CONSTANT RefTransition : IN VitalEdgeSymbolType;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
CONSTANT ArcType : IN VitalMemoryArcType := CrossArc;
CONSTANT NumBitsPerSubWord : IN INTEGER := 1;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType;
--IR252 3/23/98
CONSTANT EnableSetupOnTest : IN BOOLEAN := TRUE;
CONSTANT EnableSetupOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnRef : IN BOOLEAN := TRUE;
CONSTANT EnableHoldOnTest : IN BOOLEAN := TRUE
) IS
VARIABLE CheckInfo : CheckInfoType;
VARIABLE RefEdge : VitalBoolArrayT(RefSignal'LENGTH-1 downto 0);
VARIABLE TestEvent : VitalBoolArrayT(TestSignal'LENGTH-1 downto 0);
VARIABLE TestDly : TIME;
VARIABLE RefDly : TIME;
VARIABLE bias : TIME;
VARIABLE NumTestBits : NATURAL := TestSignal'LENGTH;
VARIABLE NumRefBits : NATURAL := RefSignal'LENGTH;
VARIABLE NumChecks : NATURAL;
VARIABLE TestSignalNorm : std_logic_vector(NumTestBits-1 downto 0)
:= TestSignal;
VARIABLE TestDelayNorm : VitalDelayArraytype(NumTestBits-1 downto 0)
:= TestDelay;
VARIABLE RefSignalNorm : std_logic_vector(NumRefBits-1 downto 0)
:= RefSignal;
VARIABLE RefDelayNorm : VitalDelayArraytype(NumRefBits-1 downto 0)
:= RefDelay;
VARIABLE SetupHighNorm : VitalDelayArraytype(SetupHigh'LENGTH-1 downto 0)
:= SetupHigh;
VARIABLE SetupLowNorm : VitalDelayArraytype(SetupLow'LENGTH-1 downto 0)
:= SetupLow;
VARIABLE HoldHighNorm : VitalDelayArraytype(HoldHigh'LENGTH-1 downto 0)
:= HoldHigh;
VARIABLE HoldLowNorm : VitalDelayArraytype(HoldLow'LENGTH-1 downto 0)
:= HoldLow;
VARIABLE RefBitLow : NATURAL;
VARIABLE RefBitHigh : NATURAL;
VARIABLE EnArrayIndex : NATURAL;
VARIABLE TimingArrayIndex: NATURAL;
BEGIN
-- Initialization of working area.
IF (TimingData.NotFirstFlag = FALSE) THEN
TimingData.TestLastA := NEW std_logic_vector(NumTestBits-1 downto 0);
TimingData.TestTimeA := NEW VitalTimeArrayT(NumTestBits-1 downto 0);
TimingData.RefTimeA := NEW VitalTimeArrayT(NumRefBits-1 downto 0);
TimingData.RefLastA := NEW X01ArrayT(NumRefBits-1 downto 0);
IF (ArcType = CrossArc) THEN
NumChecks := RefSignal'LENGTH * TestSignal'LENGTH;
ELSE
NumChecks := TestSignal'LENGTH;
END IF;
TimingData.HoldEnA := NEW VitalBoolArrayT(NumChecks-1 downto 0);
TimingData.SetupEnA := NEW VitalBoolArrayT(NumChecks-1 downto 0);
FOR i IN TestSignalNorm'RANGE LOOP
TimingData.TestLastA(i) := To_X01(TestSignalNorm(i));
END LOOP;
FOR i IN RefSignalNorm'RANGE LOOP
TimingData.RefLastA(i) := To_X01(RefSignalNorm(i));
END LOOP;
TimingData.NotFirstFlag := TRUE;
END IF;
-- Detect reference edges and record the time of the last edge
FOR i IN RefSignalNorm'RANGE LOOP
RefEdge(i) := EdgeSymbolMatch(TimingData.RefLastA(i),
To_X01(RefSignalNorm(i)), RefTransition);
TimingData.RefLastA(i) := To_X01(RefSignalNorm(i));
IF (RefEdge(i)) THEN
TimingData.RefTimeA(i) := NOW;
END IF;
END LOOP;
-- Detect test (data) changes and record the time of the last change
FOR i IN TestSignalNorm'RANGE LOOP
TestEvent(i) := TimingData.TestLastA(i) /= To_X01Z(TestSignalNorm(i));
TimingData.TestLastA(i) := To_X01Z(TestSignalNorm(i));
IF (TestEvent(i)) THEN
TimingData.TestTimeA(i) := NOW;
END IF;
END LOOP;
FOR i IN TestSignalNorm'RANGE LOOP
IF (ArcType = CrossArc) THEN
FOR j IN RefSignalNorm'RANGE LOOP
IF (TestEvent(i)) THEN
--TimingData.SetupEnA(i*NumRefBits+j) := TRUE;
--IR252
TimingData.SetupEnA(i*NumRefBits+j) := EnableSetupOnTest;
TimingData.HoldEnA(i*NumRefBits+j)
:= TimingData.HoldEnA(i*NumRefBits+j) AND EnableHoldOnTest;
END IF;
IF (RefEdge(j)) THEN
--TimingData.HoldEnA(i*NumRefBits+j) := TRUE;
--IR252
TimingData.HoldEnA(i*NumRefBits+j) := EnableHoldOnRef;
TimingData.SetupEnA(i*NumRefBits+j)
:= TimingData.SetupEnA(i*NumRefBits+j) AND EnableSetupOnRef;
END IF;
END LOOP;
RefBitLow := 0;
RefBitHigh := NumRefBits-1;
TimingArrayIndex := i;
ELSE
IF (ArcType = SubwordArc) THEN
RefBitLow := i / NumBitsPerSubWord;
TimingArrayIndex := i + NumTestBits * RefBitLow;
ELSE
RefBitLow := i;
TimingArrayIndex := i;
END IF;
RefBitHigh := RefBitLow;
IF (TestEvent(i)) THEN
--TimingData.SetupEnA(i) := TRUE;
--IR252
TimingData.SetupEnA(i) := EnableSetupOnTest;
TimingData.HoldEnA(i) := TimingData.HoldEnA(i) AND EnableHoldOnTest;
END IF;
IF (RefEdge(RefBitLow)) THEN
--TimingData.HoldEnA(i) := TRUE;
--IR252
TimingData.HoldEnA(i) := EnableHoldOnRef;
TimingData.SetupEnA(i) := TimingData.SetupEnA(i) AND EnableSetupOnRef;
END IF;
END IF;
EnArrayIndex := i;
Violation := '0';
FOR j IN RefBitLow to RefBitHigh LOOP
IF (CheckEnabled) THEN
TestDly := Maximum(0 ns, TestDelayNorm(i));
RefDly := Maximum(0 ns, RefDelayNorm(j));
InternalTimingCheck (
TestSignal => TestSignalNorm(i),
RefSignal => RefSignalNorm(j),
TestDelay => TestDly,
RefDelay => RefDly,
SetupHigh => SetupHighNorm(TimingArrayIndex),
SetupLow => SetupLowNorm(TimingArrayIndex),
HoldHigh => HoldHighNorm(TimingArrayIndex),
HoldLow => HoldLowNorm(TimingArrayIndex),
RefTime => TimingData.RefTimeA(j),
RefEdge => RefEdge(j),
TestTime => TimingData.TestTimeA(i),
TestEvent => TestEvent(i),
SetupEn => TimingData.SetupEnA(EnArrayIndex),
HoldEn => TimingData.HoldEnA(EnArrayIndex),
CheckInfo => CheckInfo,
MsgOn => MsgOn
);
-- Report any detected violations and set return violation flag
IF (CheckInfo.Violation) THEN
IF (MsgOn) THEN
VitalMemoryReportViolation (TestSignalName, RefSignalName, i, j,
TestSignal, RefSignal, HeaderMsg, CheckInfo,
MsgFormat, MsgSeverity );
END IF;
IF (XOn) THEN
Violation := 'X';
END IF;
END IF;
END IF;
TimingArrayIndex := TimingArrayIndex + NumRefBits;
EnArrayIndex := EnArrayIndex + NumRefBits;
END LOOP;
END LOOP;
END VitalMemorySetupHoldCheck;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryPeriodPulseCheck (
VARIABLE Violation : OUT X01;
VARIABLE PeriodData : INOUT VitalPeriodDataArrayType;
SIGNAL TestSignal : IN std_logic_vector;
CONSTANT TestSignalName : IN STRING := "";
CONSTANT TestDelay : IN VitalDelayArraytype;
CONSTANT Period : IN VitalDelayArraytype;
CONSTANT PulseWidthHigh : IN VitalDelayArraytype;
CONSTANT PulseWidthLow : IN VitalDelayArraytype;
CONSTANT CheckEnabled : IN BOOLEAN := TRUE;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType
) IS
VARIABLE TestDly : VitalDelayType;
VARIABLE CheckInfo : CheckInfoType;
VARIABLE PeriodObs : VitalDelayType;
VARIABLE PulseTest : BOOLEAN;
VARIABLE PeriodTest: BOOLEAN;
VARIABLE TestValue : X01;
BEGIN
-- Initialize for no violation
Violation := '0'; --MEM IR 402
FOR i IN TestSignal'RANGE LOOP
TestDly := Maximum(0 ns, TestDelay(i));
TestValue := To_X01(TestSignal(i));
IF (PeriodData(i).NotFirstFlag = FALSE) THEN
PeriodData(i).Rise := -Maximum(Period(i),
Maximum(PulseWidthHigh(i),PulseWidthLow(i)));
PeriodData(i).Fall := -Maximum(Period(i),
Maximum(PulseWidthHigh(i),PulseWidthLow(i)));
PeriodData(i).Last := TestValue;
PeriodData(i).NotFirstFlag := TRUE;
END IF;
-- Initialize for no violation
-- Violation := '0'; --Mem IR 402
-- No violation possible if no test signal change
NEXT WHEN (PeriodData(i).Last = TestValue);
-- record starting pulse times
IF (EdgeSymbolMatch(PeriodData(i).Last, TestValue, 'P')) THEN
-- Compute period times, then record the High Rise Time
PeriodObs := NOW - PeriodData(i).Rise;
PeriodData(i).Rise := NOW;
PeriodTest := TRUE;
ELSIF (EdgeSymbolMatch(PeriodData(i).Last, TestValue, 'N')) THEN
-- Compute period times, then record the Low Fall Time
PeriodObs := NOW - PeriodData(i).Fall;
PeriodData(i).Fall := NOW;
PeriodTest := TRUE;
ELSE
PeriodTest := FALSE;
END IF;
-- do checks on pulse ends
IF (EdgeSymbolMatch(PeriodData(i).Last, TestValue, 'p')) THEN
-- Compute pulse times
CheckInfo.ObsTime := NOW - PeriodData(i).Fall;
CheckInfo.ExpTime := PulseWidthLow(i);
PulseTest := TRUE;
ELSIF (EdgeSymbolMatch(PeriodData(i).Last, TestValue, 'n')) THEN
-- Compute pulse times
CheckInfo.ObsTime := NOW - PeriodData(i).Rise;
CheckInfo.ExpTime := PulseWidthHigh(i);
PulseTest := TRUE;
ELSE
PulseTest := FALSE;
END IF;
IF (PulseTest AND CheckEnabled) THEN
-- Verify Pulse Width [ignore 1st edge]
IF (CheckInfo.ObsTime < CheckInfo.ExpTime) THEN
IF (XOn) THEN
Violation := 'X';
END IF;
IF (MsgOn) THEN
CheckInfo.Violation := TRUE;
CheckInfo.CheckKind := PulseWidCheck;
CheckInfo.DetTime := NOW - TestDly;
CheckInfo.State := PeriodData(i).Last;
VitalMemoryReportViolation (TestSignalName, "", i,
HeaderMsg, CheckInfo, MsgFormat, MsgSeverity );
END IF; -- MsgOn
END IF;
END IF;
IF (PeriodTest AND CheckEnabled) THEN
-- Verify the Period [ignore 1st edge]
CheckInfo.ObsTime := PeriodObs;
CheckInfo.ExpTime := Period(i);
IF ( CheckInfo.ObsTime < CheckInfo.ExpTime ) THEN
IF (XOn) THEN
Violation := 'X';
END IF;
IF (MsgOn) THEN
CheckInfo.Violation := TRUE;
CheckInfo.CheckKind := PeriodCheck;
CheckInfo.DetTime := NOW - TestDly;
CheckInfo.State := TestValue;
VitalMemoryReportViolation (TestSignalName, "", i,
HeaderMsg, CheckInfo, MsgFormat, MsgSeverity );
END IF; -- MsgOn
END IF;
END IF;
PeriodData(i).Last := TestValue;
END LOOP;
END VitalMemoryPeriodPulseCheck;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryPeriodPulseCheck (
VARIABLE Violation : OUT X01ArrayT;
VARIABLE PeriodData : INOUT VitalPeriodDataArrayType;
SIGNAL TestSignal : IN std_logic_vector;
CONSTANT TestSignalName : IN STRING := "";
CONSTANT TestDelay : IN VitalDelayArraytype;
CONSTANT Period : IN VitalDelayArraytype;
CONSTANT PulseWidthHigh : IN VitalDelayArraytype;
CONSTANT PulseWidthLow : IN VitalDelayArraytype;
CONSTANT CheckEnabled : IN BOOLEAN := TRUE;
CONSTANT HeaderMsg : IN STRING := " ";
CONSTANT XOn : IN BOOLEAN := TRUE;
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING;
CONSTANT MsgFormat : IN VitalMemoryMsgFormatType
)IS
VARIABLE TestDly : VitalDelayType;
VARIABLE CheckInfo : CheckInfoType;
VARIABLE PeriodObs : VitalDelayType;
VARIABLE PulseTest : BOOLEAN;
VARIABLE PeriodTest: BOOLEAN;
VARIABLE TestValue : X01;
BEGIN
FOR i IN TestSignal'RANGE LOOP
TestDly := Maximum(0 ns, TestDelay(i));
TestValue := To_X01(TestSignal(i));
IF (PeriodData(i).NotFirstFlag = FALSE) THEN
PeriodData(i).Rise := -Maximum(Period(i),
Maximum(PulseWidthHigh(i),PulseWidthLow(i)));
PeriodData(i).Fall := -Maximum(Period(i),
Maximum(PulseWidthHigh(i),PulseWidthLow(i)));
PeriodData(i).Last := TestValue;
PeriodData(i).NotFirstFlag := TRUE;
END IF;
-- Initialize for no violation
Violation(i) := '0';
-- No violation possible if no test signal change
NEXT WHEN (PeriodData(i).Last = TestValue);
-- record starting pulse times
IF (EdgeSymbolMatch(PeriodData(i).Last, TestValue, 'P')) THEN
-- Compute period times, then record the High Rise Time
PeriodObs := NOW - PeriodData(i).Rise;
PeriodData(i).Rise := NOW;
PeriodTest := TRUE;
ELSIF (EdgeSymbolMatch(PeriodData(i).Last, TestValue, 'N')) THEN
-- Compute period times, then record the Low Fall Time
PeriodObs := NOW - PeriodData(i).Fall;
PeriodData(i).Fall := NOW;
PeriodTest := TRUE;
ELSE
PeriodTest := FALSE;
END IF;
-- do checks on pulse ends
IF (EdgeSymbolMatch(PeriodData(i).Last, TestValue, 'p')) THEN
-- Compute pulse times
CheckInfo.ObsTime := NOW - PeriodData(i).Fall;
CheckInfo.ExpTime := PulseWidthLow(i);
PulseTest := TRUE;
ELSIF (EdgeSymbolMatch(PeriodData(i).Last, TestValue, 'n')) THEN
-- Compute pulse times
CheckInfo.ObsTime := NOW - PeriodData(i).Rise;
CheckInfo.ExpTime := PulseWidthHigh(i);
PulseTest := TRUE;
ELSE
PulseTest := FALSE;
END IF;
IF (PulseTest AND CheckEnabled) THEN
-- Verify Pulse Width [ignore 1st edge]
IF (CheckInfo.ObsTime < CheckInfo.ExpTime) THEN
IF (XOn) THEN
Violation(i) := 'X';
END IF;
IF (MsgOn) THEN
CheckInfo.Violation := TRUE;
CheckInfo.CheckKind := PulseWidCheck;
CheckInfo.DetTime := NOW - TestDly;
CheckInfo.State := PeriodData(i).Last;
VitalMemoryReportViolation (TestSignalName, "", i,
HeaderMsg, CheckInfo, MsgFormat, MsgSeverity );
END IF; -- MsgOn
END IF;
END IF;
IF (PeriodTest AND CheckEnabled) THEN
-- Verify the Period [ignore 1st edge]
CheckInfo.ObsTime := PeriodObs;
CheckInfo.ExpTime := Period(i);
IF ( CheckInfo.ObsTime < CheckInfo.ExpTime ) THEN
IF (XOn) THEN
Violation(i) := 'X';
END IF;
IF (MsgOn) THEN
CheckInfo.Violation := TRUE;
CheckInfo.CheckKind := PeriodCheck;
CheckInfo.DetTime := NOW - TestDly;
CheckInfo.State := TestValue;
VitalMemoryReportViolation (TestSignalName, "", i,
HeaderMsg, CheckInfo, MsgFOrmat, MsgSeverity );
END IF; -- MsgOn
END IF;
END IF;
PeriodData(i).Last := TestValue;
END LOOP;
END VitalMemoryPeriodPulseCheck;
-- ----------------------------------------------------------------------------
-- Functionality Section
-- ----------------------------------------------------------------------------
-- Look-up table. Given an int, we can get the 4-bit bit_vector.
TYPE HexToBitvTableType IS ARRAY (NATURAL RANGE <>) OF
std_logic_vector(3 DOWNTO 0) ;
CONSTANT HexToBitvTable : HexToBitvTableType (0 TO 15) :=
(
"0000", "0001", "0010", "0011",
"0100", "0101", "0110", "0111",
"1000", "1001", "1010", "1011",
"1100", "1101", "1110", "1111"
) ;
-- ----------------------------------------------------------------------------
-- Misc Utilities Local Utilities
-- ----------------------------------------------------------------------------
-- ----------------------------------------------------------------------------
-- Procedure: IsSpace
-- Parameters: ch -- input character
-- Description: Returns TRUE or FALSE depending on the input character
-- being white space or not.
-- ----------------------------------------------------------------------------
FUNCTION IsSpace (ch : character)
RETURN boolean IS
BEGIN
RETURN ((ch = ' ') OR (ch = CR) OR (ch = HT) OR (ch = NUL));
END IsSpace;
-- ----------------------------------------------------------------------------
-- Procedure: LenOfString
-- Parameters: Str -- input string
-- Description: Returns the NATURAL length of the input string.
-- as terminated by the first NUL character.
-- ----------------------------------------------------------------------------
FUNCTION LenOfString (Str : STRING)
RETURN NATURAL IS
VARIABLE StrRight : NATURAL;
BEGIN
StrRight := Str'RIGHT;
FOR i IN Str'RANGE LOOP
IF (Str(i) = NUL) THEN
StrRight := i - 1;
EXIT;
END IF;
END LOOP;
RETURN (StrRight);
END LenOfString;
-- ----------------------------------------------------------------------------
-- Procedure: HexToInt
-- Parameters: Hex -- input character or string
-- Description: Converts input character or string interpreted as a
-- hexadecimal representation to integer value.
-- ----------------------------------------------------------------------------
FUNCTION HexToInt(Hex : CHARACTER) RETURN INTEGER IS
CONSTANT HexChars : STRING := "0123456789ABCDEFabcdef";
CONSTANT XHiChar : CHARACTER := 'X';
CONSTANT XLoChar : CHARACTER := 'x';
BEGIN
IF (Hex = XLoChar OR Hex = XHiChar) THEN
RETURN (23);
END IF;
FOR i IN 1 TO 16 LOOP
IF(Hex = HexChars(i)) THEN
RETURN (i-1);
END IF;
END LOOP;
FOR i IN 17 TO 22 LOOP
IF (Hex = HexChars(i)) THEN
RETURN (i-7);
END IF;
END LOOP;
ASSERT FALSE REPORT
"Invalid character received by HexToInt function"
SEVERITY WARNING;
RETURN (0);
END HexToInt;
-- ----------------------------------------------------------------------------
FUNCTION HexToInt (Hex : STRING) RETURN INTEGER IS
VARIABLE Value : INTEGER := 0;
VARIABLE Length : INTEGER;
BEGIN
Length := LenOfString(hex);
IF (Length > 8) THEN
ASSERT FALSE REPORT
"Invalid string length received by HexToInt function"
SEVERITY WARNING;
ELSE
FOR i IN 1 TO Length LOOP
Value := Value + HexToInt(Hex(i)) * 16 ** (Length - i);
END LOOP;
END IF;
RETURN (Value);
END HexToInt;
-- ----------------------------------------------------------------------------
-- Procedure: HexToBitv
-- Parameters: Hex -- Input hex string
-- Description: Converts input hex string to a std_logic_vector
-- ----------------------------------------------------------------------------
FUNCTION HexToBitv(
Hex : STRING
) RETURN std_logic_vector is
VARIABLE Index : INTEGER := 0 ;
VARIABLE ValHexToInt : INTEGER ;
VARIABLE BitsPerHex : INTEGER := 4 ; -- Denotes no. of bits per hex char.
VARIABLE HexLen : NATURAL := (BitsPerHex * LenOfString(Hex)) ;
VARIABLE TableVal : std_logic_vector(3 DOWNTO 0) ;
VARIABLE Result : std_logic_vector(HexLen-1 DOWNTO 0) ;
BEGIN
-- Assign 4-bit wide bit vector to result directly from a look-up table.
Index := 0 ;
WHILE ( Index < HexLen ) LOOP
ValHexToInt := HexToInt( Hex((HexLen - Index)/BitsPerHex ) );
IF ( ValHexToInt = 23 ) THEN
TableVal := "XXXX";
ELSE
-- Look up from the table.
TableVal := HexToBitvTable( ValHexToInt ) ;
END IF;
-- Assign now.
Result(Index+3 DOWNTO Index) := TableVal ;
-- Get ready for next block of 4-bits.
Index := Index + 4 ;
END LOOP ;
RETURN Result ;
END HexToBitv ;
-- ----------------------------------------------------------------------------
-- Procedure: BinToBitv
-- Parameters: Bin -- Input bin string
-- Description: Converts input bin string to a std_logic_vector
-- ----------------------------------------------------------------------------
FUNCTION BinToBitv(
Bin : STRING
) RETURN std_logic_vector is
VARIABLE Index : INTEGER := 0 ;
VARIABLE Length : NATURAL := LenOfString(Bin);
VARIABLE BitVal : std_ulogic;
VARIABLE Result : std_logic_vector(Length-1 DOWNTO 0) ;
BEGIN
Index := 0 ;
WHILE ( Index < Length ) LOOP
IF (Bin(Length-Index) = '0') THEN
BitVal := '0';
ELSIF (Bin(Length-Index) = '1') THEN
BitVal := '1';
ELSE
BitVal := 'X';
END IF ;
-- Assign now.
Result(Index) := BitVal ;
Index := Index + 1 ;
END LOOP ;
RETURN Result ;
END BinToBitv ;
-- ----------------------------------------------------------------------------
-- For Memory Table Modeling
-- ----------------------------------------------------------------------------
TYPE To_MemoryCharType IS ARRAY (VitalMemorySymbolType) OF CHARACTER;
CONSTANT To_MemoryChar : To_MemoryCharType :=
( '/', '\', 'P', 'N', 'r', 'f', 'p', 'n', 'R', 'F', '^', 'v',
'E', 'A', 'D', '*', 'X', '0', '1', '-', 'B', 'Z', 'S',
'g', 'u', 'i', 'G', 'U', 'I',
'w', 's',
'c', 'l', 'd', 'e', 'C', 'L',
'M', 'm', 't' );
TYPE ValidMemoryTableInputType IS ARRAY (VitalMemorySymbolType) OF BOOLEAN;
CONSTANT ValidMemoryTableInput : ValidMemoryTableInputType :=
-- '/', '\', 'P', 'N', 'r', 'f',
( TRUE, TRUE, TRUE, TRUE, TRUE, TRUE,
-- 'p', 'n', 'R', 'F', '^', 'v',
TRUE, TRUE, TRUE, TRUE, TRUE, TRUE,
-- 'E', 'A', 'D', '*',
TRUE, TRUE, TRUE, TRUE,
-- 'X', '0', '1', '-', 'B', 'Z',
TRUE, TRUE, TRUE, TRUE, TRUE, FALSE,
-- 'S',
TRUE,
-- 'g', 'u', 'i', 'G', 'U', 'I',
FALSE, FALSE, FALSE, FALSE, FALSE, FALSE,
-- 'w', 's',
FALSE, FALSE,
-- 'c', 'l', 'd', 'e', 'C', 'L',
FALSE, FALSE, FALSE, FALSE, FALSE, FALSE,
-- 'M', 'm', 't'
FALSE, FALSE, FALSE);
TYPE MemoryTableMatchType IS ARRAY (X01,X01,VitalMemorySymbolType) OF BOOLEAN;
-- last value, present value, table symbol
CONSTANT MemoryTableMatch : MemoryTableMatchType := (
( -- X (lastvalue)
-- / \ P N r f
-- p n R F ^ v
-- E A D *
-- X 0 1 - B Z S
-- g u i G U I
-- w s
-- c l d e, C L
-- m t
( FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,
TRUE, FALSE,FALSE,TRUE, FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE),
( FALSE,FALSE,FALSE,TRUE, FALSE,FALSE,
FALSE,FALSE,FALSE,TRUE, FALSE,TRUE,
TRUE, FALSE,TRUE, TRUE,
FALSE,TRUE, FALSE,TRUE, TRUE, FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE),
( FALSE,FALSE,TRUE, FALSE,FALSE,FALSE,
FALSE,FALSE,TRUE, FALSE,TRUE, FALSE,
TRUE, TRUE, FALSE,TRUE,
FALSE,FALSE,TRUE, TRUE, TRUE, FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE)
),
(-- 0 (lastvalue)
-- / \ P N r f
-- p n R F ^ v
-- E A D *
-- X 0 1 - B Z S
-- g u i G U I
-- w s
-- c l d e, C L
-- m t
( FALSE,FALSE,FALSE,FALSE,TRUE, FALSE,
TRUE, FALSE,TRUE, FALSE,FALSE,FALSE,
FALSE,TRUE, FALSE,TRUE,
TRUE, FALSE,FALSE,TRUE, FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE),
( FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,
FALSE,TRUE, FALSE,TRUE, TRUE, FALSE,TRUE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE),
( TRUE, FALSE,TRUE, FALSE,FALSE,FALSE,
TRUE, FALSE,TRUE, FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,TRUE,
FALSE,FALSE,TRUE, TRUE, TRUE, FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE)
),
(-- 1 (lastvalue)
-- / \ P N r f
-- p n R F ^ v
-- E A D *
-- X 0 1 - B Z S
-- g u i G U I
-- w s
-- c l d e, C L
-- m t
( FALSE,FALSE,FALSE,FALSE,FALSE,TRUE ,
FALSE,TRUE, FALSE,TRUE, FALSE,FALSE,
FALSE,FALSE,TRUE, TRUE,
TRUE, FALSE,FALSE,TRUE, FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE),
( FALSE,TRUE, FALSE,TRUE, FALSE,FALSE,
FALSE,TRUE, FALSE,TRUE, FALSE,FALSE,
FALSE,FALSE,FALSE,TRUE,
FALSE,TRUE, FALSE,TRUE, TRUE, FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE),
( FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,TRUE, TRUE, TRUE, FALSE,TRUE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,
FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,
FALSE,FALSE,FALSE)
)
);
-- ----------------------------------------------------------------------------
-- Error Message Types and Tables
-- ----------------------------------------------------------------------------
TYPE VitalMemoryErrorType IS (
ErrGoodAddr, -- 'g' Good address (no transition)
ErrUnknAddr, -- 'u' 'X' levels in address (no transition)
ErrInvaAddr, -- 'i' Invalid address (no transition)
ErrGoodTrAddr, -- 'G' Good address (with transition)
ErrUnknTrAddr, -- 'U' 'X' levels in address (with transition)
ErrInvaTrAddr, -- 'I' Invalid address (with transition)
ErrWrDatMem, -- 'w' Writing data to memory
ErrNoChgMem, -- 's' Retaining previous memory contents
ErrCrAllMem, -- 'c' Corrupting entire memory with 'X'
ErrCrWrdMem, -- 'l' Corrupting a word in memory with 'X'
ErrCrBitMem, -- 'd' Corrupting a single bit in memory with 'X'
ErrCrDatMem, -- 'e' Corrupting a word with 'X' based on data in
ErrCrAllSubMem,-- 'C' Corrupting a sub-word entire memory with 'X'
ErrCrWrdSubMem,-- 'L' Corrupting a sub-word in memory with 'X'
ErrCrBitSubMem,-- 'D' Corrupting a single bit of a memory sub-word with 'X'
ErrCrDatSubMem,-- 'E' Corrupting a sub-word with 'X' based on data in
ErrCrWrdOut, -- 'l' Corrupting data out with 'X'
ErrCrBitOut, -- 'd' Corrupting a single bit of data out with 'X'
ErrCrDatOut, -- 'e' Corrupting data out with 'X' based on data in
ErrCrWrdSubOut,-- 'L' Corrupting data out sub-word with 'X'
ErrCrBitSubOut,-- 'D' Corrupting a single bit of data out sub-word with 'X'
ErrCrDatSubOut,-- 'E' Corrupting data out sub-word with 'X' based on data in
ErrImplOut, -- 'M' Implicit read from memory to data out
ErrReadOut, -- 'm' Reading data from memory to data out
ErrAssgOut, -- 't' Transfering from data in to data out
ErrAsgXOut, -- 'X' Assigning unknown level to data out
ErrAsg0Out, -- '0' Assigning low level to data out
ErrAsg1Out, -- '1' Assigning high level to data out
ErrAsgZOut, -- 'Z' Assigning high impedence to data out
ErrAsgSOut, -- 'S' Keeping data out at steady value
ErrAsgXMem, -- 'X' Assigning unknown level to memory location
ErrAsg0Mem, -- '0' Assigning low level to memory location
ErrAsg1Mem, -- '1' Assigning high level to memory location
ErrAsgZMem, -- 'Z' Assigning high impedence to memory location
ErrDefMemAct, -- No memory table match, using default action
ErrInitMem, -- Initialize memory contents
ErrMcpWrCont, -- Memory cross port to same port write contention
ErrMcpCpCont, -- Memory cross port read/write data/memory contention
ErrMcpCpRead, -- Memory cross port read to same port
ErrMcpRdWrCo, -- Memory cross port read/write data only contention
ErrMcpCpWrCont,-- Memory cross port to cross port write contention
ErrUnknMemDo, -- Unknown memory action
ErrUnknDatDo, -- Unknown data action
ErrUnknSymbol, -- Illegal memory symbol
ErrLdIlgArg,
ErrLdAddrRng,
ErrLdMemInfo,
ErrLdFileEmpty,
ErrPrintString
);
TYPE VitalMemoryErrorSeverityType IS
ARRAY (VitalMemoryErrorType) OF SEVERITY_LEVEL;
CONSTANT VitalMemoryErrorSeverity :
VitalMemoryErrorSeverityType := (
ErrGoodAddr => NOTE,
ErrUnknAddr => WARNING,
ErrInvaAddr => WARNING,
ErrGoodTrAddr => NOTE,
ErrUnknTrAddr => WARNING,
ErrInvaTrAddr => WARNING,
ErrWrDatMem => NOTE,
ErrNoChgMem => NOTE,
ErrCrAllMem => WARNING,
ErrCrWrdMem => WARNING,
ErrCrBitMem => WARNING,
ErrCrDatMem => WARNING,
ErrCrAllSubMem => WARNING,
ErrCrWrdSubMem => WARNING,
ErrCrBitSubMem => WARNING,
ErrCrDatSubMem => WARNING,
ErrCrWrdOut => WARNING,
ErrCrBitOut => WARNING,
ErrCrDatOut => WARNING,
ErrCrWrdSubOut => WARNING,
ErrCrBitSubOut => WARNING,
ErrCrDatSubOut => WARNING,
ErrImplOut => NOTE,
ErrReadOut => NOTE,
ErrAssgOut => NOTE,
ErrAsgXOut => NOTE,
ErrAsg0Out => NOTE,
ErrAsg1Out => NOTE,
ErrAsgZOut => NOTE,
ErrAsgSOut => NOTE,
ErrAsgXMem => NOTE,
ErrAsg0Mem => NOTE,
ErrAsg1Mem => NOTE,
ErrAsgZMem => NOTE,
ErrDefMemAct => NOTE,
ErrInitMem => NOTE,
ErrMcpWrCont => WARNING,
ErrMcpCpCont => WARNING,
ErrMcpCpRead => WARNING,
ErrMcpRdWrCo => WARNING,
ErrMcpCpWrCont => WARNING,
ErrUnknMemDo => ERROR,
ErrUnknDatDo => ERROR,
ErrUnknSymbol => ERROR,
ErrLdIlgArg => ERROR,
ErrLdAddrRng => WARNING,
ErrLdMemInfo => NOTE,
ErrLdFileEmpty => ERROR,
ErrPrintString => WARNING
);
-- ----------------------------------------------------------------------------
CONSTANT MsgGoodAddr : STRING
:= "Good address (no transition)";
CONSTANT MsgUnknAddr : STRING
:= "Unknown address (no transition)";
CONSTANT MsgInvaAddr : STRING
:= "Invalid address (no transition)";
CONSTANT MsgGoodTrAddr : STRING
:= "Good address (with transition)";
CONSTANT MsgUnknTrAddr : STRING
:= "Unknown address (with transition)";
CONSTANT MsgInvaTrAddr : STRING
:= "Invalid address (with transition)";
CONSTANT MsgNoChgMem : STRING
:= "Retaining previous memory contents";
CONSTANT MsgWrDatMem : STRING
:= "Writing data to memory";
CONSTANT MsgCrAllMem : STRING
:= "Corrupting entire memory with 'X'";
CONSTANT MsgCrWrdMem : STRING
:= "Corrupting a word in memory with 'X'";
CONSTANT MsgCrBitMem : STRING
:= "Corrupting a single bit in memory with 'X'";
CONSTANT MsgCrDatMem : STRING
:= "Corrupting a word with 'X' based on data in";
CONSTANT MsgCrAllSubMem : STRING
:= "Corrupting a sub-word entire memory with 'X'";
CONSTANT MsgCrWrdSubMem : STRING
:= "Corrupting a sub-word in memory with 'X'";
CONSTANT MsgCrBitSubMem : STRING
:= "Corrupting a single bit of a sub-word with 'X'";
CONSTANT MsgCrDatSubMem : STRING
:= "Corrupting a sub-word with 'X' based on data in";
CONSTANT MsgCrWrdOut : STRING
:= "Corrupting data out with 'X'";
CONSTANT MsgCrBitOut : STRING
:= "Corrupting a single bit of data out with 'X'";
CONSTANT MsgCrDatOut : STRING
:= "Corrupting data out with 'X' based on data in";
CONSTANT MsgCrWrdSubOut : STRING
:= "Corrupting data out sub-word with 'X'";
CONSTANT MsgCrBitSubOut : STRING
:= "Corrupting a single bit of data out sub-word with 'X'";
CONSTANT MsgCrDatSubOut : STRING
:= "Corrupting data out sub-word with 'X' based on data in";
CONSTANT MsgImplOut : STRING
:= "Implicit read from memory to data out";
CONSTANT MsgReadOut : STRING
:= "Reading data from memory to data out";
CONSTANT MsgAssgOut : STRING
:= "Transfering from data in to data out";
CONSTANT MsgAsgXOut : STRING
:= "Assigning unknown level to data out";
CONSTANT MsgAsg0Out : STRING
:= "Assigning low level to data out";
CONSTANT MsgAsg1Out : STRING
:= "Assigning high level to data out";
CONSTANT MsgAsgZOut : STRING
:= "Assigning high impedance to data out";
CONSTANT MsgAsgSOut : STRING
:= "Keeping data out at steady value";
CONSTANT MsgAsgXMem : STRING
:= "Assigning unknown level to memory location";
CONSTANT MsgAsg0Mem : STRING
:= "Assigning low level to memory location";
CONSTANT MsgAsg1Mem : STRING
:= "Assigning high level to memory location";
CONSTANT MsgAsgZMem : STRING
:= "Assigning high impedance to memory location";
CONSTANT MsgDefMemAct : STRING
:= "No memory table match, using default action";
CONSTANT MsgInitMem : STRING
:= "Initializing memory contents";
CONSTANT MsgMcpWrCont : STRING
:= "Same port write contention";
CONSTANT MsgMcpCpCont : STRING
:= "Cross port read/write data/memory contention";
CONSTANT MsgMcpCpRead : STRING
:= "Cross port read to same port";
CONSTANT MsgMcpRdWrCo : STRING
:= "Cross port read/write data only contention";
CONSTANT MsgMcpCpWrCont : STRING
:= "Cross port write contention";
CONSTANT MsgUnknMemDo : STRING
:= "Unknown memory action";
CONSTANT MsgUnknDatDo : STRING
:= "Unknown data action";
CONSTANT MsgUnknSymbol : STRING
:= "Illegal memory symbol";
CONSTANT MsgLdIlgArg : STRING
:= "Illegal bit arguments while loading memory.";
CONSTANT MsgLdMemInfo : STRING
:= "Loading data from the file into memory.";
CONSTANT MsgLdAddrRng : STRING
:= "Address out of range while loading memory.";
CONSTANT MsgLdFileEmpty : STRING
:= "Memory load file is empty.";
CONSTANT MsgPrintString : STRING
:= "";
CONSTANT MsgUnknown : STRING
:= "Unknown error message.";
CONSTANT MsgVMT : STRING
:= "VitalMemoryTable";
CONSTANT MsgVMV : STRING
:= "VitalMemoryViolation";
CONSTANT MsgVDM : STRING
:= "VitalDeclareMemory";
CONSTANT MsgVMCP : STRING
:= "VitalMemoryCrossPorts";
-- ----------------------------------------------------------------------------
-- LOCAL Utilities
-- ----------------------------------------------------------------------------
-- ----------------------------------------------------------------------------
-- Procedure: MemoryMessage
-- Parameters: ErrorId -- Input error code
-- Description: This function looks up the input error code and returns
-- the string value of the associated message.
-- ----------------------------------------------------------------------------
FUNCTION MemoryMessage (
CONSTANT ErrorId : IN VitalMemoryErrorType
) RETURN STRING IS
BEGIN
CASE ErrorId IS
WHEN ErrGoodAddr => RETURN MsgGoodAddr ;
WHEN ErrUnknAddr => RETURN MsgUnknAddr ;
WHEN ErrInvaAddr => RETURN MsgInvaAddr ;
WHEN ErrGoodTrAddr => RETURN MsgGoodTrAddr ;
WHEN ErrUnknTrAddr => RETURN MsgUnknTrAddr ;
WHEN ErrInvaTrAddr => RETURN MsgInvaTrAddr ;
WHEN ErrWrDatMem => RETURN MsgWrDatMem ;
WHEN ErrNoChgMem => RETURN MsgNoChgMem ;
WHEN ErrCrAllMem => RETURN MsgCrAllMem ;
WHEN ErrCrWrdMem => RETURN MsgCrWrdMem ;
WHEN ErrCrBitMem => RETURN MsgCrBitMem ;
WHEN ErrCrDatMem => RETURN MsgCrDatMem ;
WHEN ErrCrAllSubMem => RETURN MsgCrAllSubMem;
WHEN ErrCrWrdSubMem => RETURN MsgCrWrdSubMem;
WHEN ErrCrBitSubMem => RETURN MsgCrBitSubMem;
WHEN ErrCrDatSubMem => RETURN MsgCrDatSubMem;
WHEN ErrCrWrdOut => RETURN MsgCrWrdOut ;
WHEN ErrCrBitOut => RETURN MsgCrBitOut ;
WHEN ErrCrDatOut => RETURN MsgCrDatOut ;
WHEN ErrCrWrdSubOut => RETURN MsgCrWrdSubOut;
WHEN ErrCrBitSubOut => RETURN MsgCrBitSubOut;
WHEN ErrCrDatSubOut => RETURN MsgCrDatSubOut;
WHEN ErrImplOut => RETURN MsgImplOut ;
WHEN ErrReadOut => RETURN MsgReadOut ;
WHEN ErrAssgOut => RETURN MsgAssgOut ;
WHEN ErrAsgXOut => RETURN MsgAsgXOut ;
WHEN ErrAsg0Out => RETURN MsgAsg0Out ;
WHEN ErrAsg1Out => RETURN MsgAsg1Out ;
WHEN ErrAsgZOut => RETURN MsgAsgZOut ;
WHEN ErrAsgSOut => RETURN MsgAsgSOut ;
WHEN ErrAsgXMem => RETURN MsgAsgXMem ;
WHEN ErrAsg0Mem => RETURN MsgAsg0Mem ;
WHEN ErrAsg1Mem => RETURN MsgAsg1Mem ;
WHEN ErrAsgZMem => RETURN MsgAsgZMem ;
WHEN ErrDefMemAct => RETURN MsgDefMemAct ;
WHEN ErrInitMem => RETURN MsgInitMem ;
WHEN ErrMcpWrCont => RETURN MsgMcpWrCont ;
WHEN ErrMcpCpCont => RETURN MsgMcpCpCont ;
WHEN ErrMcpCpRead => RETURN MsgMcpCpRead ;
WHEN ErrMcpRdWrCo => RETURN MsgMcpRdWrCo ;
WHEN ErrMcpCpWrCont => RETURN MsgMcpCpWrCont;
WHEN ErrUnknMemDo => RETURN MsgUnknMemDo ;
WHEN ErrUnknDatDo => RETURN MsgUnknDatDo ;
WHEN ErrUnknSymbol => RETURN MsgUnknSymbol ;
WHEN ErrLdIlgArg => RETURN MsgLdIlgArg ;
WHEN ErrLdAddrRng => RETURN MsgLdAddrRng ;
WHEN ErrLdMemInfo => RETURN MsgLdMemInfo ;
WHEN ErrLdFileEmpty => RETURN MsgLdFileEmpty;
WHEN ErrPrintString => RETURN MsgPrintString;
WHEN OTHERS => RETURN MsgUnknown ;
END CASE;
END;
-- ----------------------------------------------------------------------------
-- Procedure: PrintMemoryMessage
-- Parameters: Routine -- String identifying the calling routine
-- ErrorId -- Input error code for message lookup
-- Info -- Output string or character
-- InfoStr -- Additional output string
-- Info1 -- Additional output integer
-- Info2 -- Additional output integer
-- Info3 -- Additional output integer
-- Description: This procedure prints out a memory status message
-- given the input error id and other status information.
-- ----------------------------------------------------------------------------
PROCEDURE PrintMemoryMessage (
CONSTANT Routine : IN STRING;
CONSTANT ErrorId : IN VitalMemoryErrorType
) IS
BEGIN
ASSERT FALSE
REPORT Routine & ": " & MemoryMessage(ErrorId)
SEVERITY VitalMemoryErrorSeverity(ErrorId);
END;
-- ----------------------------------------------------------------------------
PROCEDURE PrintMemoryMessage (
CONSTANT Routine : IN STRING;
CONSTANT ErrorId : IN VitalMemoryErrorType;
CONSTANT Info : IN STRING
) IS
BEGIN
ASSERT FALSE
REPORT Routine & ": " & MemoryMessage(ErrorId) & " " & Info
SEVERITY VitalMemoryErrorSeverity(ErrorId);
END;
-- ----------------------------------------------------------------------------
PROCEDURE PrintMemoryMessage (
CONSTANT Routine : IN STRING;
CONSTANT ErrorId : IN VitalMemoryErrorType;
CONSTANT Info1 : IN STRING;
CONSTANT Info2 : IN STRING
) IS
BEGIN
ASSERT FALSE
REPORT Routine & ": " & MemoryMessage(ErrorId) & " " & Info1 & " " & Info2
SEVERITY VitalMemoryErrorSeverity(ErrorId);
END;
-- ----------------------------------------------------------------------------
PROCEDURE PrintMemoryMessage (
CONSTANT Routine : IN STRING;
CONSTANT ErrorId : IN VitalMemoryErrorType;
CONSTANT Info : IN CHARACTER
) IS
BEGIN
ASSERT FALSE
REPORT Routine & ": " & MemoryMessage(ErrorId) & " " & Info
SEVERITY VitalMemoryErrorSeverity(ErrorId);
END;
-- ----------------------------------------------------------------------------
PROCEDURE PrintMemoryMessage (
CONSTANT Routine : IN STRING;
CONSTANT ErrorId : IN VitalMemoryErrorType;
CONSTANT InfoStr : IN STRING;
CONSTANT Info1 : IN NATURAL
) IS
VARIABLE TmpStr : STRING ( 1 TO 256 ) ;
VARIABLE TmpInt : INTEGER := 1;
BEGIN
IntToStr(Info1,TmpStr,TmpInt);
ASSERT FALSE
REPORT Routine & ": " & MemoryMessage(ErrorId) & " " & InfoStr & " " & TmpStr
SEVERITY VitalMemoryErrorSeverity(ErrorId);
END;
-- ----------------------------------------------------------------------------
PROCEDURE PrintMemoryMessage (
CONSTANT Routine : IN STRING;
CONSTANT ErrorId : IN VitalMemoryErrorType;
CONSTANT InfoStr : IN STRING;
CONSTANT Info1 : IN NATURAL;
CONSTANT Info2 : IN NATURAL
) IS
VARIABLE TmpStr : STRING ( 1 TO 256 ) ;
VARIABLE TmpInt : INTEGER := 1;
BEGIN
IntToStr(Info1,TmpStr,TmpInt);
IntToStr(Info2,TmpStr,TmpInt);
ASSERT FALSE
REPORT Routine & ": " & MemoryMessage(ErrorId) & " " & InfoStr & " " & TmpStr
SEVERITY VitalMemoryErrorSeverity(ErrorId);
END;
-- ----------------------------------------------------------------------------
PROCEDURE PrintMemoryMessage (
CONSTANT Routine : IN STRING;
CONSTANT ErrorId : IN VitalMemoryErrorType;
CONSTANT InfoStr : IN STRING;
CONSTANT Info1 : IN NATURAL;
CONSTANT Info2 : IN NATURAL;
CONSTANT Info3 : IN NATURAL
) IS
VARIABLE TmpStr : STRING ( 1 TO 256 ) ;
VARIABLE TmpInt : INTEGER := 1;
BEGIN
IntToStr(Info1,TmpStr,TmpInt);
IntToStr(Info2,TmpStr,TmpInt);
IntToStr(Info3,TmpStr,TmpInt);
ASSERT FALSE
REPORT Routine & ": " & MemoryMessage(ErrorId) & " " & InfoStr & " " & TmpStr
SEVERITY VitalMemoryErrorSeverity(ErrorId);
END;
-- ----------------------------------------------------------------------------
PROCEDURE PrintMemoryMessage (
CONSTANT Routine : IN STRING;
CONSTANT Table : IN VitalMemoryTableType;
CONSTANT Index : IN INTEGER;
CONSTANT InfoStr : IN STRING
) IS
CONSTANT TableEntries : INTEGER := Table'LENGTH(1);
CONSTANT TableWidth : INTEGER := Table'LENGTH(2);
VARIABLE TmpStr : STRING ( 1 TO 256 ) ;
VARIABLE TmpInt : INTEGER := 1;
BEGIN
IF (Index < 0 AND Index > TableEntries-1) THEN
ASSERT FALSE
REPORT Routine & ": Memory table search failure"
SEVERITY ERROR;
END IF;
ColLoop:
FOR i IN 0 TO TableWidth-1 LOOP
IF (i >= 64) THEN
TmpStr(TmpInt) := '.';
TmpInt := TmpInt + 1;
TmpStr(TmpInt) := '.';
TmpInt := TmpInt + 1;
TmpStr(TmpInt) := '.';
TmpInt := TmpInt + 1;
EXIT ColLoop;
END IF;
TmpStr(TmpInt) := ''';
TmpInt := TmpInt + 1;
TmpStr(TmpInt) := To_MemoryChar(Table(Index,i));
TmpInt := TmpInt + 1;
TmpStr(TmpInt) := ''';
TmpInt := TmpInt + 1;
IF (i < TableWidth-1) THEN
TmpStr(TmpInt) := ',';
TmpInt := TmpInt + 1;
END IF;
END LOOP;
ASSERT FALSE
REPORT Routine & ": Port=" & InfoStr & " TableRow=" & TmpStr
SEVERITY NOTE;
END;
-- ----------------------------------------------------------------------------
-- Procedure: DecodeAddress
-- Parameters: Address - Converted address.
-- AddrFlag - Flag to indicte address match
-- MemoryData - Information about memory characteristics
-- PrevAddressBus - Previous input address value
-- AddressBus - Input address value.
-- Description: This procedure is used for transforming a valid
-- address value to an integer in order to access memory.
-- It performs address bound checking as well.
-- Sets Address to -1 for unknowns
-- Sets Address to -2 for out of range
-- ----------------------------------------------------------------------------
PROCEDURE DecodeAddress (
VARIABLE Address : INOUT INTEGER;
VARIABLE AddrFlag : INOUT VitalMemorySymbolType;
VARIABLE MemoryData : IN VitalMemoryDataType;
CONSTANT PrevAddressBus : IN std_logic_vector;
CONSTANT AddressBus : IN std_logic_vector
) IS
VARIABLE Power : NATURAL;
VARIABLE AddrUnkn : BOOLEAN;
BEGIN
Power := 0;
AddrUnkn := FALSE;
-- It is assumed that always Address'LEFT represents the Most significant bit.
FOR i IN AddressBus'RANGE LOOP
Power := Power * 2;
IF (AddressBus(i) /= '1' AND AddressBus(i) /= '0') THEN
AddrUnkn := TRUE;
Power := 0;
EXIT;
ELSIF (AddressBus(i) = '1') THEN
Power := Power + 1;
END IF;
END LOOP;
Address := Power;
AddrFlag := 'g';
IF (AddrUnkn) THEN
AddrFlag := 'u'; -- unknown addr
Address := -1;
END IF;
IF ( Power > (MemoryData.NoOfWords - 1)) THEN
AddrFlag := 'i'; -- invalid addr
Address := -2;
END IF;
IF (PrevAddressBus /= AddressBus) THEN
CASE AddrFlag IS
WHEN 'g' => AddrFlag := 'G';
WHEN 'u' => AddrFlag := 'U';
WHEN 'i' => AddrFlag := 'I';
WHEN OTHERS =>
ASSERT FALSE REPORT
"DecodeAddress: Internal error. [AddrFlag]="
& To_MemoryChar(AddrFlag)
SEVERITY ERROR;
END CASE;
END IF;
END DecodeAddress;
-- ----------------------------------------------------------------------------
-- Procedure: DecodeData
-- Parameters: DataFlag - Flag to indicte data match
-- PrevDataInBus - Previous input data value
-- DataInBus - Input data value.
-- HighBit - High bit offset value.
-- LowBit - Low bit offset value.
-- Description: This procedure is used for interpreting the input data
-- as a data flag for subsequent table matching.
-- ----------------------------------------------------------------------------
PROCEDURE DecodeData (
VARIABLE DataFlag : INOUT VitalMemorySymbolType;
CONSTANT PrevDataInBus : IN std_logic_vector;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT HighBit : IN NATURAL;
CONSTANT LowBit : IN NATURAL
) IS
VARIABLE DataUnkn : BOOLEAN := FALSE;
BEGIN
FOR i IN LowBit TO HighBit LOOP
IF DataInBus(i) /= '1' AND DataInBus(i) /= '0' THEN
DataUnkn := TRUE;
EXIT;
END IF;
END LOOP;
DataFlag := 'g';
IF (DataUnkn) THEN
DataFlag := 'u'; -- unknown addr
END IF;
IF (PrevDataInBus(HighBit DOWNTO LowBit) /=
DataInBus(HighBit DOWNTO LowBit)) THEN
CASE DataFlag IS
WHEN 'g' => DataFlag := 'G';
WHEN 'u' => DataFlag := 'U';
WHEN OTHERS =>
ASSERT FALSE REPORT
"DecodeData: Internal error. [DataFlag]="
& To_MemoryChar(DataFlag)
SEVERITY ERROR;
END CASE;
END IF;
END DecodeData;
-- ----------------------------------------------------------------------------
-- Procedure: WriteMemory
-- Parameters: MemoryPtr - Pointer to the memory array.
-- DataInBus - Input Data to be written.
-- Address - Address of the memory location.
-- BitPosition - Position of bit in memory location.
-- HighBit - High bit offset value.
-- LowBit - Low bit offset value.
-- Description: This procedure is used to write to a memory location
-- on a bit/byte/word basis.
-- The high bit and low bit offset are used for byte write
-- operations.These parameters specify the data byte for write.
-- In the case of word write the complete memory word is used.
-- This procedure is overloaded for bit,byte and word write
-- memory operations.The number of parameters may vary.
-- ----------------------------------------------------------------------------
PROCEDURE WriteMemory (
VARIABLE MemoryPtr : INOUT VitalMemoryDataType;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT Address : IN INTEGER;
CONSTANT HighBit : IN NATURAL;
CONSTANT LowBit : IN NATURAL
) IS
VARIABLE TmpData : std_logic_vector(DataInBus'LENGTH - 1 DOWNTO 0);
BEGIN
-- Address bound checking.
IF ( Address < 0 OR Address > (MemoryPtr.NoOfWords - 1)) THEN
PrintMemoryMessage ( "WriteMemory", ErrPrintString,
"Aborting write operation as address is out of range.") ;
RETURN;
END IF;
TmpData := To_UX01(DataInBus);
FOR i in LowBit to HighBit LOOP
MemoryPtr.MemoryArrayPtr(Address).all(i) := TmpData(i);
END LOOP;
END WriteMemory;
-- ----------------------------------------------------------------------------
PROCEDURE WriteMemory (
VARIABLE MemoryPtr : INOUT VitalMemoryDataType;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT Address : IN INTEGER;
CONSTANT BitPosition : IN NATURAL
) IS
VARIABLE HighBit : NATURAL;
VARIABLE LowBit : NATURAL;
BEGIN
HighBit := BitPosition;
LowBit := BitPosition;
WriteMemory (MemoryPtr, DataInBus, Address, HighBit, LowBit);
END WriteMemory;
-- ----------------------------------------------------------------------------
PROCEDURE WriteMemory (
VARIABLE MemoryPtr : INOUT VitalMemoryDataType;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT Address : IN INTEGER
) IS
VARIABLE HighBit : NATURAL;
VARIABLE LowBit : NATURAL;
BEGIN
HighBit := MemoryPtr.NoOfBitsPerWord - 1;
LowBit := 0;
WriteMemory (MemoryPtr, DataInBus, Address, HighBit, LowBit);
END WriteMemory;
-- ----------------------------------------------------------------------------
-- Procedure: ReadMemory
-- Parameters: MemoryPtr - Pointer to the memory array.
-- DataOut - Output Data to be read in this.
-- Address - Address of the memory location.
-- BitPosition - Position of bit in memory location.
-- HighBit - High bit offset value.
-- LowBit - Low bit offset value.
-- Description: This procedure is used to read from a memory location
-- on a bit/byte/word basis.
-- The high bit and low bit offset are used for byte write
-- operations.These parameters specify the data byte for
-- read.In the case of word write the complete memory word
-- is used.This procedure is overloaded for bit,byte and
-- word write memory operations.The number of parameters
-- may vary.
-- ----------------------------------------------------------------------------
PROCEDURE ReadMemory (
VARIABLE MemoryPtr : INOUT VitalMemoryDataType;
VARIABLE DataOut : OUT std_logic_vector;
CONSTANT Address : IN INTEGER;
CONSTANT HighBit : IN NATURAL;
CONSTANT LowBit : IN NATURAL
) IS
VARIABLE DataOutTmp : std_logic_vector(MemoryPtr.NoOfBitsPerWord-1 DOWNTO 0);
VARIABLE length : NATURAL := (HighBit - LowBit + 1);
BEGIN
-- Address bound checking.
IF ( Address > (MemoryPtr.NoOfWords - 1)) THEN
PrintMemoryMessage (
"ReadMemory",ErrInvaAddr,
"[Address,NoOfWords]=",Address,MemoryPtr.NoOfWords
);
FOR i in LowBit to HighBit LOOP
DataOutTmp(i) := 'X';
END LOOP;
ELSE
FOR i in LowBit to HighBit LOOP
DataOutTmp(i) := MemoryPtr.MemoryArrayPtr (Address).all(i);
END LOOP;
END IF;
DataOut := DataOutTmp;
END ReadMemory;
-- ----------------------------------------------------------------------------
PROCEDURE ReadMemory (
VARIABLE MemoryPtr : INOUT VitalMemoryDataType;
VARIABLE DataOut : OUT std_logic_vector;
CONSTANT Address : IN INTEGER;
CONSTANT BitPosition : IN NATURAL
) IS
VARIABLE HighBit : NATURAL;
VARIABLE LowBit : NATURAL;
BEGIN
HighBit := BitPosition;
LowBit := BitPosition;
ReadMemory (MemoryPtr, DataOut, Address, HighBit, LowBit);
END ReadMemory;
-- ----------------------------------------------------------------------------
PROCEDURE ReadMemory (
VARIABLE MemoryPtr : INOUT VitalMemoryDataType;
VARIABLE DataOut : OUT std_logic_vector;
CONSTANT Address : IN INTEGER
) IS
VARIABLE HighBit : NATURAL;
VARIABLE LowBit : NATURAL;
BEGIN
HighBit := MemoryPtr.NoOfBitsPerWord - 1;
LowBit := 0;
ReadMemory (MemoryPtr, DataOut, Address, HighBit, LowBit);
END ReadMemory;
-- ----------------------------------------------------------------------------
-- Procedure: LoadMemory
-- Parameters: MemoryPtr - Pointer to the memory array.
-- FileName - Name of the output file.
-- HighBit - High bit offset value.
-- LowBit - Low bit offset value.
-- Description: This procedure is used to load the contents of the memory
-- from a specified input file.
-- The high bit and low bit offset are used so that same task
-- can be used for all bit/byte/word write operations.
-- In the case of a bit write RAM the HighBit and LowBit have
-- the same value.
-- This procedure is overloaded for word write operations.
-- ----------------------------------------------------------------------------
PROCEDURE LoadMemory (
VARIABLE MemoryPtr : INOUT VitalMemoryDataType;
CONSTANT FileName : IN STRING;
CONSTANT BinaryFile : IN BOOLEAN := FALSE
) IS
FILE Fptr : TEXT OPEN read_mode IS FileName;
VARIABLE OneLine : LINE;
VARIABLE Ignore : CHARACTER;
VARIABLE Index : NATURAL := 1;
VARIABLE LineNo : NATURAL := 0;
VARIABLE Address : INTEGER := 0;
VARIABLE DataInBus : std_logic_vector(MemoryPtr.NoOfBitsPerWord-1 DOWNTO 0);
VARIABLE AddrStr : STRING(1 TO 80) ;
VARIABLE DataInStr : STRING(1 TO 255) ;
BEGIN
IF (ENDFILE(fptr)) THEN
PrintMemoryMessage (MsgVDM, ErrLdFileEmpty,
"[FileName]="&FileName);
RETURN;
END IF ;
PrintMemoryMessage (
MsgVDM,ErrLdMemInfo, "[FileName]="&FileName
);
WHILE (NOT ENDFILE(fptr)) LOOP
ReadLine(Fptr, OneLine);
LineNo := LineNo + 1 ;
-- First ignoring leading spaces.
WHILE (OneLine'LENGTH /= 0 and IsSpace(OneLine(1))) LOOP
READ (OneLine, Ignore) ; -- Ignoring the space character.
END LOOP ;
-- Note that, by now oneline has been "stripped" of its leading spaces.
IF ( OneLine(1) = '@' ) THEN
READ (OneLine, Ignore); -- Ignore the '@' character and read the string.
-- Now strip off spaces, if any, between '@' and Address string.
WHILE (OneLine'LENGTH /= 0 and IsSpace(OneLine(1))) LOOP
READ (OneLine, Ignore) ; -- Ignoring the space character.
END LOOP ;
-- Now get the string which represents the address into string variable.
Index := 1;
WHILE (OneLine'LENGTH /= 0 AND (NOT(IsSpace(OneLine(1))))) LOOP
READ(OneLine, AddrStr(Index));
Index := Index + 1;
END LOOP ;
AddrStr(Index) := NUL;
-- Now convert the hex string into a hex integer
Address := HexToInt(AddrStr) ;
ELSE
IF ( LineNo /= 1 ) THEN
Address := Address + 1;
END IF;
END IF ;
IF ( Address > (MemoryPtr.NoOfWords - 1) ) THEN
PrintMemoryMessage (MsgVDM, ErrLdAddrRng,
"[Address,lineno]=", Address, LineNo) ;
EXIT ;
END IF;
-- Now strip off spaces, between Address string and DataInBus string.
WHILE (OneLine'LENGTH /= 0 AND IsSpace(OneLine(1))) LOOP
READ (OneLine, Ignore) ; -- Ignoring the space character.
END LOOP ;
Index := 1;
WHILE (OneLine'LENGTH /= 0 AND (NOT(IsSpace(OneLine(1))))) LOOP
READ(OneLine, DataInStr(Index));
Index := Index + 1;
END LOOP ;
DataInStr(Index) := NUL;
IF (BinaryFile) THEN
DataInBus := BinToBitv (DataInStr);
ELSE
DataInBus := HexToBitv (DataInStr);
END IF ;
WriteMemory (MemoryPtr, DataInBus, Address);
END LOOP ;
END LoadMemory;
-- ----------------------------------------------------------------------------
-- Procedure: MemoryMatch
-- Parameters: Symbol - Symbol from memory table
-- TestFlag - Interpreted data or address symbol
-- In2 - input from VitalMemoryTable procedure
-- to memory table
-- In2LastValue - Previous value of input
-- Err - TRUE if symbol is not a valid input symbol
-- ReturnValue - TRUE if match occurred
-- Description: This procedure sets ReturnValue to true if in2 matches
-- symbol (from the memory table). If symbol is an edge
-- value edge is set to true and in2 and in2LastValue are
-- checked against symbol. Err is set to true if symbol
-- is an invalid value for the input portion of the memory
-- table.
-- ----------------------------------------------------------------------------
PROCEDURE MemoryMatch (
CONSTANT Symbol : IN VitalMemorySymbolType;
CONSTANT In2 : IN std_ulogic;
CONSTANT In2LastValue : IN std_ulogic;
VARIABLE Err : OUT BOOLEAN;
VARIABLE ReturnValue : OUT BOOLEAN
) IS
BEGIN
IF (NOT ValidMemoryTableInput(Symbol) ) THEN
PrintMemoryMessage(MsgVMT,ErrUnknSymbol,To_MemoryChar(Symbol));
Err := TRUE;
ReturnValue := FALSE;
ELSE
ReturnValue := MemoryTableMatch(To_X01(In2LastValue), To_X01(In2), Symbol);
Err := FALSE;
END IF;
END;
-- ----------------------------------------------------------------------------
PROCEDURE MemoryMatch (
CONSTANT Symbol : IN VitalMemorySymbolType;
CONSTANT TestFlag : IN VitalMemorySymbolType;
VARIABLE Err : OUT BOOLEAN;
VARIABLE ReturnValue : OUT BOOLEAN
) IS
BEGIN
Err := FALSE;
ReturnValue := FALSE;
CASE Symbol IS
WHEN 'g'|'u'|'i'|'G'|'U'|'I'|'-'|'*'|'S' =>
IF (Symbol = TestFlag) THEN
ReturnValue := TRUE;
ELSE
CASE Symbol IS
WHEN '-' =>
ReturnValue := TRUE;
Err := FALSE;
WHEN '*' =>
IF (TestFlag = 'G' OR
TestFlag = 'U' OR
TestFlag = 'I') THEN
ReturnValue := TRUE;
Err := FALSE;
END IF;
WHEN 'S' =>
IF (TestFlag = 'g' OR
TestFlag = 'u' OR
TestFlag = 'i') THEN
ReturnValue := TRUE;
Err := FALSE;
END IF;
WHEN OTHERS =>
ReturnValue := FALSE;
END CASE;
END IF;
WHEN OTHERS =>
Err := TRUE;
RETURN;
END CASE;
END;
-- ----------------------------------------------------------------------------
-- Procedure: MemoryTableCorruptMask
-- Description: Compute memory and data corruption masks for memory table
-- ----------------------------------------------------------------------------
PROCEDURE MemoryTableCorruptMask (
VARIABLE CorruptMask : OUT std_logic_vector;
CONSTANT Action : IN VitalMemorySymbolType;
CONSTANT EnableIndex : IN INTEGER;
CONSTANT BitsPerWord : IN INTEGER;
CONSTANT BitsPerSubWord : IN INTEGER;
CONSTANT BitsPerEnable : IN INTEGER
) IS
VARIABLE CorruptMaskTmp : std_logic_vector (CorruptMask'RANGE)
:= (OTHERS => '0');
VARIABLE ViolFlAryPosn : INTEGER;
VARIABLE HighBit : INTEGER;
VARIABLE LowBit : INTEGER;
BEGIN
CASE (Action) IS
WHEN 'c'|'l'|'e' =>
-- Corrupt whole word
CorruptMaskTmp := (OTHERS => 'X');
CorruptMask := CorruptMaskTmp;
RETURN;
WHEN 'd'|'C'|'L'|'D'|'E' =>
-- Process corruption below
WHEN OTHERS =>
-- No data or memory corruption
CorruptMaskTmp := (OTHERS => '0');
CorruptMask := CorruptMaskTmp;
RETURN;
END CASE;
IF (Action = 'd') THEN
CorruptMaskTmp := (OTHERS => 'X');
CorruptMask := CorruptMaskTmp;
RETURN;
END IF;
-- Remaining are subword cases 'C', 'L', 'D', 'E'
CorruptMaskTmp := (OTHERS => '0');
LowBit := 0;
HighBit := BitsPerSubWord-1;
SubWordLoop:
FOR i IN 0 TO BitsPerEnable-1 LOOP
IF (i = EnableIndex) THEN
FOR j IN HighBit TO LowBit LOOP
CorruptMaskTmp(j) := 'X';
END LOOP;
END IF;
-- Calculate HighBit and LowBit
LowBit := LowBit + BitsPerSubWord;
IF (LowBit > BitsPerWord) THEN
LowBit := BitsPerWord;
END IF;
HighBit := LowBit + BitsPerSubWord;
IF (HighBit > BitsPerWord) THEN
HighBit := BitsPerWord;
ELSE
HighBit := HighBit - 1;
END IF;
END LOOP;
CorruptMask := CorruptMaskTmp;
RETURN;
END;
-- ----------------------------------------------------------------------------
PROCEDURE MemoryTableCorruptMask (
VARIABLE CorruptMask : OUT std_logic_vector;
CONSTANT Action : IN VitalMemorySymbolType
) IS
VARIABLE CorruptMaskTmp : std_logic_vector (0 TO CorruptMask'LENGTH-1)
:= (OTHERS => '0');
VARIABLE ViolFlAryPosn : INTEGER;
VARIABLE HighBit : INTEGER;
VARIABLE LowBit : INTEGER;
BEGIN
CASE (Action) IS
WHEN 'c'|'l'|'d'|'e'|'C'|'L'|'D'|'E' =>
-- Corrupt whole word
CorruptMaskTmp := (OTHERS => 'X');
CorruptMask := CorruptMaskTmp;
RETURN;
WHEN OTHERS =>
-- No data or memory corruption
CorruptMaskTmp := (OTHERS => '0');
CorruptMask := CorruptMaskTmp;
RETURN;
END CASE;
RETURN;
END;
-- ----------------------------------------------------------------------------
-- Procedure: MemoryTableCorruptMask
-- Description: Compute memory and data corruption masks for violation table
-- ----------------------------------------------------------------------------
PROCEDURE ViolationTableCorruptMask (
VARIABLE CorruptMask : OUT std_logic_vector;
CONSTANT Action : IN VitalMemorySymbolType;
CONSTANT ViolationFlags : IN std_logic_vector;
CONSTANT ViolationFlagsArray : IN std_logic_vector;
CONSTANT ViolationSizesArray : IN VitalMemoryViolFlagSizeType;
CONSTANT ViolationTable : IN VitalMemoryTableType;
CONSTANT TableIndex : IN INTEGER;
CONSTANT BitsPerWord : IN INTEGER;
CONSTANT BitsPerSubWord : IN INTEGER;
CONSTANT BitsPerEnable : IN INTEGER
) IS
VARIABLE CorruptMaskTmp : std_logic_vector (CorruptMask'RANGE)
:= (OTHERS => '0');
VARIABLE ViolMaskTmp : std_logic_vector (CorruptMask'RANGE)
:= (OTHERS => '0');
VARIABLE ViolFlAryPosn : INTEGER;
VARIABLE HighBit : INTEGER;
VARIABLE LowBit : INTEGER;
CONSTANT ViolFlagsSize : INTEGER := ViolationFlags'LENGTH;
CONSTANT ViolFlArySize : INTEGER := ViolationFlagsArray'LENGTH;
CONSTANT TableEntries : INTEGER := ViolationTable'LENGTH(1);
CONSTANT TableWidth : INTEGER := ViolationTable'LENGTH(2);
CONSTANT DatActionNdx : INTEGER := TableWidth - 1;
CONSTANT MemActionNdx : INTEGER := TableWidth - 2;
BEGIN
CASE (Action) IS
WHEN 'c'|'l'|'e' =>
-- Corrupt whole word
CorruptMaskTmp := (OTHERS => 'X');
CorruptMask := CorruptMaskTmp;
RETURN;
WHEN 'd'|'C'|'L'|'D'|'E' =>
-- Process corruption below
WHEN OTHERS =>
-- No data or memory corruption
CorruptMaskTmp := (OTHERS => '0');
CorruptMask := CorruptMaskTmp;
RETURN;
END CASE;
RowLoop: -- Check each element of the ViolationFlags
FOR j IN 0 TO ViolFlagsSize LOOP
IF (j = ViolFlagsSize) THEN
ViolFlAryPosn := 0;
RowLoop2: -- Check relevant elements of the ViolationFlagsArray
FOR k IN 0 TO MemActionNdx - ViolFlagsSize - 1 LOOP
IF (ViolationTable(TableIndex, k + ViolFlagsSize) = 'X') THEN
MaskLoop: -- Set the 'X' bits in the violation mask
FOR m IN INTEGER RANGE 0 TO CorruptMask'LENGTH-1 LOOP
IF (m <= ViolationSizesArray(k)-1) THEN
ViolMaskTmp(m) := ViolMaskTmp(m) XOR
ViolationFlagsArray(ViolFlAryPosn+m);
ELSE
EXIT MaskLoop;
END IF;
END LOOP;
END IF;
ViolFlAryPosn := ViolFlAryPosn + ViolationSizesArray(k);
END LOOP;
ELSE
IF (ViolationTable(TableIndex, j) = 'X') THEN
ViolMaskTmp(0) := ViolMaskTmp(0) XOR ViolationFlags(j);
END IF;
END IF;
END LOOP;
IF (Action = 'd') THEN
CorruptMask := ViolMaskTmp;
RETURN;
END IF;
-- Remaining are subword cases 'C', 'L', 'D', 'E'
CorruptMaskTmp := (OTHERS => '0');
LowBit := 0;
HighBit := BitsPerSubWord-1;
SubWordLoop:
FOR i IN 0 TO BitsPerEnable-1 LOOP
IF (ViolMaskTmp(i) = 'X') THEN
FOR j IN HighBit TO LowBit LOOP
CorruptMaskTmp(j) := 'X';
END LOOP;
END IF;
-- Calculate HighBit and LowBit
LowBit := LowBit + BitsPerSubWord;
IF (LowBit > BitsPerWord) THEN
LowBit := BitsPerWord;
END IF;
HighBit := LowBit + BitsPerSubWord;
IF (HighBit > BitsPerWord) THEN
HighBit := BitsPerWord;
ELSE
HighBit := HighBit - 1;
END IF;
END LOOP;
CorruptMask := CorruptMaskTmp;
RETURN;
END;
-- ----------------------------------------------------------------------------
-- Procedure: MemoryTableLookUp
-- Parameters: MemoryAction - Output memory action to be performed
-- DataAction - Output data action to be performed
-- PrevControls - Previous data in for edge detection
-- PrevEnableBus - Previous enables for edge detection
-- Controls - Agregate of scalar control lines
-- EnableBus - Concatenation of vector control lines
-- EnableIndex - Current slice of vector control lines
-- AddrFlag - Matching symbol from address decoding
-- DataFlag - Matching symbol from data decoding
-- MemoryTable - Input memory action table
-- PortName - Port name string for messages
-- HeaderMsg - Header string for messages
-- MsgOn - Control message output
--
-- Description: This function is used to find the output of the
-- MemoryTable corresponding to a given set of inputs.
--
-- ----------------------------------------------------------------------------
PROCEDURE MemoryTableLookUp (
VARIABLE MemoryAction : OUT VitalMemorySymbolType;
VARIABLE DataAction : OUT VitalMemorySymbolType;
VARIABLE MemoryCorruptMask : OUT std_logic_vector;
VARIABLE DataCorruptMask : OUT std_logic_vector;
CONSTANT PrevControls : IN std_logic_vector;
CONSTANT Controls : IN std_logic_vector;
CONSTANT AddrFlag : IN VitalMemorySymbolType;
CONSTANT DataFlag : IN VitalMemorySymbolType;
CONSTANT MemoryTable : IN VitalMemoryTableType;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE
) IS
CONSTANT ControlsSize : INTEGER := Controls'LENGTH;
CONSTANT TableEntries : INTEGER := MemoryTable'LENGTH(1);
CONSTANT TableWidth : INTEGER := MemoryTable'LENGTH(2);
CONSTANT DatActionNdx : INTEGER := TableWidth - 1;
CONSTANT MemActionNdx : INTEGER := TableWidth - 2;
CONSTANT DataInBusNdx : INTEGER := TableWidth - 3;
CONSTANT AddressBusNdx : INTEGER := TableWidth - 4;
VARIABLE AddrFlagTable : VitalMemorySymbolType;
VARIABLE Match : BOOLEAN;
VARIABLE Err : BOOLEAN := FALSE;
VARIABLE TableAlias : VitalMemoryTableType(
0 TO TableEntries - 1,
0 TO TableWidth - 1)
:= MemoryTable;
BEGIN
ColLoop: -- Compare each entry in the table
FOR i IN TableAlias'RANGE(1) LOOP
RowLoop: -- Check each element of the Controls
FOR j IN 0 TO ControlsSize LOOP
IF (j = ControlsSize) THEN
-- a match occurred, now check AddrFlag, DataFlag
MemoryMatch(TableAlias(i,AddressBusNdx),AddrFlag,Err,Match);
IF (Match) THEN
MemoryMatch(TableAlias(i,DataInBusNdx),DataFlag,Err,Match);
IF (Match) THEN
MemoryTableCorruptMask (
CorruptMask => MemoryCorruptMask ,
Action => TableAlias(i, MemActionNdx)
);
MemoryTableCorruptMask (
CorruptMask => DataCorruptMask ,
Action => TableAlias(i, DatActionNdx)
);
-- get the return memory and data actions
MemoryAction := TableAlias(i, MemActionNdx);
DataAction := TableAlias(i, DatActionNdx);
-- DEBUG: The lines below report table search
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMT,TableAlias,i,PortName);
END IF;
-- DEBUG: The lines above report table search
RETURN;
END IF;
END IF;
ELSE
-- Match memory table inputs
MemoryMatch ( TableAlias(i,j),
Controls(j), PrevControls(j),
Err, Match);
END IF;
EXIT RowLoop WHEN NOT(Match);
EXIT ColLoop WHEN Err;
END LOOP RowLoop;
END LOOP ColLoop;
-- no match found, return default action
MemoryAction := 's'; -- no change to memory
DataAction := 'S'; -- no change to dataout
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMT,ErrDefMemAct,HeaderMsg,PortName);
END IF;
RETURN;
END;
-- ----------------------------------------------------------------------------
PROCEDURE MemoryTableLookUp (
VARIABLE MemoryAction : OUT VitalMemorySymbolType;
VARIABLE DataAction : OUT VitalMemorySymbolType;
VARIABLE MemoryCorruptMask : OUT std_logic_vector;
VARIABLE DataCorruptMask : OUT std_logic_vector;
CONSTANT PrevControls : IN std_logic_vector;
CONSTANT PrevEnableBus : IN std_logic_vector;
CONSTANT Controls : IN std_logic_vector;
CONSTANT EnableBus : IN std_logic_vector;
CONSTANT EnableIndex : IN INTEGER;
CONSTANT BitsPerWord : IN INTEGER;
CONSTANT BitsPerSubWord : IN INTEGER;
CONSTANT BitsPerEnable : IN INTEGER;
CONSTANT AddrFlag : IN VitalMemorySymbolType;
CONSTANT DataFlag : IN VitalMemorySymbolType;
CONSTANT MemoryTable : IN VitalMemoryTableType;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE
) IS
CONSTANT ControlsSize : INTEGER := Controls'LENGTH;
CONSTANT TableEntries : INTEGER := MemoryTable'LENGTH(1);
CONSTANT TableWidth : INTEGER := MemoryTable'LENGTH(2);
CONSTANT DatActionNdx : INTEGER := TableWidth - 1;
CONSTANT MemActionNdx : INTEGER := TableWidth - 2;
CONSTANT DataInBusNdx : INTEGER := TableWidth - 3;
CONSTANT AddressBusNdx : INTEGER := TableWidth - 4;
VARIABLE AddrFlagTable : VitalMemorySymbolType;
VARIABLE Match : BOOLEAN;
VARIABLE Err : BOOLEAN := FALSE;
VARIABLE TableAlias : VitalMemoryTableType(
0 TO TableEntries - 1,
0 TO TableWidth - 1)
:= MemoryTable;
BEGIN
ColLoop: -- Compare each entry in the table
FOR i IN TableAlias'RANGE(1) LOOP
RowLoop: -- Check each element of the Controls
FOR j IN 0 TO ControlsSize LOOP
IF (j = ControlsSize) THEN
-- a match occurred, now check EnableBus, AddrFlag, DataFlag
IF (EnableIndex >= 0) THEN
RowLoop2: -- Check relevant elements of the EnableBus
FOR k IN 0 TO AddressBusNdx - ControlsSize - 1 LOOP
MemoryMatch ( TableAlias(i,k + ControlsSize),
EnableBus(k * BitsPerEnable + EnableIndex),
PrevEnableBus(k * BitsPerEnable + EnableIndex),
Err, Match);
EXIT RowLoop2 WHEN NOT(Match);
END LOOP;
END IF;
IF (Match) THEN
MemoryMatch(TableAlias(i,AddressBusNdx),AddrFlag,Err,Match);
IF (Match) THEN
MemoryMatch(TableAlias(i,DataInBusNdx),DataFlag,Err,Match);
IF (Match) THEN
MemoryTableCorruptMask (
CorruptMask => MemoryCorruptMask ,
Action => TableAlias(i, MemActionNdx),
EnableIndex => EnableIndex ,
BitsPerWord => BitsPerWord ,
BitsPerSubWord => BitsPerSubWord ,
BitsPerEnable => BitsPerEnable
);
MemoryTableCorruptMask (
CorruptMask => DataCorruptMask ,
Action => TableAlias(i, DatActionNdx),
EnableIndex => EnableIndex ,
BitsPerWord => BitsPerWord ,
BitsPerSubWord => BitsPerSubWord ,
BitsPerEnable => BitsPerEnable
);
-- get the return memory and data actions
MemoryAction := TableAlias(i, MemActionNdx);
DataAction := TableAlias(i, DatActionNdx);
-- DEBUG: The lines below report table search
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMT,TableAlias,i,PortName);
END IF;
-- DEBUG: The lines above report table search
RETURN;
END IF;
END IF;
END IF;
ELSE
-- Match memory table inputs
MemoryMatch ( TableAlias(i,j),
Controls(j), PrevControls(j),
Err, Match);
END IF;
EXIT RowLoop WHEN NOT(Match);
EXIT ColLoop WHEN Err;
END LOOP RowLoop;
END LOOP ColLoop;
-- no match found, return default action
MemoryAction := 's'; -- no change to memory
DataAction := 'S'; -- no change to dataout
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMT,ErrDefMemAct,HeaderMsg,PortName);
END IF;
RETURN;
END;
-- ----------------------------------------------------------------------------
-- Procedure: ViolationTableLookUp
-- Parameters: MemoryAction - Output memory action to be performed
-- DataAction - Output data action to be performed
-- TimingDataArray - This is currently not used (comment out)
-- ViolationArray - Aggregation of violation variables
-- ViolationTable - Input memory violation table
-- PortName - Port name string for messages
-- HeaderMsg - Header string for messages
-- MsgOn - Control message output
-- Description: This function is used to find the output of the
-- ViolationTable corresponding to a given set of inputs.
-- ----------------------------------------------------------------------------
PROCEDURE ViolationTableLookUp (
VARIABLE MemoryAction : OUT VitalMemorySymbolType;
VARIABLE DataAction : OUT VitalMemorySymbolType;
VARIABLE MemoryCorruptMask : OUT std_logic_vector;
VARIABLE DataCorruptMask : OUT std_logic_vector;
CONSTANT ViolationFlags : IN std_logic_vector;
CONSTANT ViolationFlagsArray : IN std_logic_vector;
CONSTANT ViolationSizesArray : IN VitalMemoryViolFlagSizeType;
CONSTANT ViolationTable : IN VitalMemoryTableType;
CONSTANT BitsPerWord : IN INTEGER;
CONSTANT BitsPerSubWord : IN INTEGER;
CONSTANT BitsPerEnable : IN INTEGER;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE
) IS
CONSTANT ViolFlagsSize : INTEGER := ViolationFlags'LENGTH;
CONSTANT ViolFlArySize : INTEGER := ViolationFlagsArray'LENGTH;
VARIABLE ViolFlAryPosn : INTEGER;
VARIABLE ViolFlAryItem : std_ulogic;
CONSTANT ViolSzArySize : INTEGER := ViolationSizesArray'LENGTH;
CONSTANT TableEntries : INTEGER := ViolationTable'LENGTH(1);
CONSTANT TableWidth : INTEGER := ViolationTable'LENGTH(2);
CONSTANT DatActionNdx : INTEGER := TableWidth - 1;
CONSTANT MemActionNdx : INTEGER := TableWidth - 2;
VARIABLE HighBit : NATURAL := 0;
VARIABLE LowBit : NATURAL := 0;
VARIABLE Match : BOOLEAN;
VARIABLE Err : BOOLEAN := FALSE;
VARIABLE TableAlias : VitalMemoryTableType(
0 TO TableEntries - 1,
0 TO TableWidth - 1)
:= ViolationTable;
BEGIN
ColLoop: -- Compare each entry in the table
FOR i IN TableAlias'RANGE(1) LOOP
RowLoop: -- Check each element of the ViolationFlags
FOR j IN 0 TO ViolFlagsSize LOOP
IF (j = ViolFlagsSize) THEN
ViolFlAryPosn := 0;
RowLoop2: -- Check relevant elements of the ViolationFlagsArray
FOR k IN 0 TO MemActionNdx - ViolFlagsSize - 1 LOOP
ViolFlAryItem := '0';
SubwordLoop: -- Check for 'X' in ViolationFlagsArray chunk
FOR s IN ViolFlAryPosn TO ViolFlAryPosn+ViolationSizesArray(k)-1 LOOP
IF (ViolationFlagsArray(s) = 'X') THEN
ViolFlAryItem := 'X';
EXIT SubwordLoop;
END IF;
END LOOP;
MemoryMatch ( TableAlias(i,k + ViolFlagsSize),
ViolFlAryItem,ViolFlAryItem,
Err, Match);
ViolFlAryPosn := ViolFlAryPosn + ViolationSizesArray(k);
EXIT RowLoop2 WHEN NOT(Match);
END LOOP;
IF (Match) THEN
-- Compute memory and data corruption masks
ViolationTableCorruptMask(
CorruptMask => MemoryCorruptMask ,
Action => TableAlias(i, MemActionNdx),
ViolationFlags => ViolationFlags ,
ViolationFlagsArray => ViolationFlagsArray ,
ViolationSizesArray => ViolationSizesArray ,
ViolationTable => ViolationTable ,
TableIndex => i ,
BitsPerWord => BitsPerWord ,
BitsPerSubWord => BitsPerSubWord ,
BitsPerEnable => BitsPerEnable
);
ViolationTableCorruptMask(
CorruptMask => DataCorruptMask ,
Action => TableAlias(i, DatActionNdx),
ViolationFlags => ViolationFlags ,
ViolationFlagsArray => ViolationFlagsArray ,
ViolationSizesArray => ViolationSizesArray ,
ViolationTable => ViolationTable ,
TableIndex => i ,
BitsPerWord => BitsPerWord ,
BitsPerSubWord => BitsPerSubWord ,
BitsPerEnable => BitsPerEnable
);
-- get the return memory and data actions
MemoryAction := TableAlias(i, MemActionNdx);
DataAction := TableAlias(i, DatActionNdx);
-- DEBUG: The lines below report table search
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMV,TableAlias,i,PortName);
END IF;
-- DEBUG: The lines above report table search
RETURN;
END IF;
ELSE
-- Match violation table inputs
Err := FALSE;
Match := FALSE;
IF (TableAlias(i,j) /= 'X' AND
TableAlias(i,j) /= '0' AND
TableAlias(i,j) /= '-') THEN
Err := TRUE;
ELSIF (TableAlias(i,j) = '-' OR
(TableAlias(i,j) = 'X' AND ViolationFlags(j) = 'X') OR
(TableAlias(i,j) = '0' AND ViolationFlags(j) = '0')) THEN
Match := TRUE;
END IF;
END IF;
EXIT RowLoop WHEN NOT(Match);
EXIT ColLoop WHEN Err;
END LOOP RowLoop;
END LOOP ColLoop;
-- no match found, return default action
MemoryAction := 's'; -- no change to memory
DataAction := 'S'; -- no change to dataout
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMV,ErrDefMemAct,HeaderMsg,PortName);
END IF;
RETURN;
END;
-- ----------------------------------------------------------------------------
-- Procedure: HandleMemoryAction
-- Parameters: MemoryData - Pointer to memory data structure
-- PortFlag - Indicates read/write mode of port
-- CorruptMask - XOR'ed with DataInBus when corrupting
-- DataInBus - Current data bus in
-- Address - Current address integer
-- HighBit - Current address high bit
-- LowBit - Current address low bit
-- MemoryTable - Input memory action table
-- MemoryAction - Memory action to be performed
-- PortName - Port name string for messages
-- HeaderMsg - Header string for messages
-- MsgOn - Control message output
-- Description: This procedure performs the specified memory action on
-- the input memory data structure.
-- ----------------------------------------------------------------------------
PROCEDURE HandleMemoryAction (
VARIABLE MemoryData : INOUT VitalMemoryDataType;
VARIABLE PortFlag : INOUT VitalPortFlagType;
CONSTANT CorruptMask : IN std_logic_vector;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT Address : IN INTEGER;
CONSTANT HighBit : IN NATURAL;
CONSTANT LowBit : IN NATURAL;
CONSTANT MemoryTable : IN VitalMemoryTableType;
CONSTANT MemoryAction : IN VitalMemorySymbolType;
CONSTANT CallerName : IN STRING;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE
) IS
VARIABLE DataInTmp : std_logic_vector(DataInBus'RANGE)
:= DataInBus;
BEGIN
-- Handle the memory action
CASE MemoryAction IS
WHEN 'w' =>
-- Writing data to memory
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrWrDatMem,HeaderMsg,PortName);
END IF;
WriteMemory(MemoryData,DataInBus,Address,HighBit,LowBit);
PortFlag.MemoryCurrent := WRITE;
WHEN 's' =>
-- Retaining previous memory contents
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrNoChgMem,HeaderMsg,PortName);
END IF;
-- Set memory current to quiet state
PortFlag.MemoryCurrent := READ;
WHEN 'c' =>
-- Corrupting entire memory with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrAllMem,HeaderMsg,PortName);
END IF;
DataInTmp := (OTHERS => 'X');
-- No need to CorruptMask
FOR i IN 0 TO MemoryData.NoOfWords-1 LOOP
WriteMemory(MemoryData,DataInTmp,i);
END LOOP;
PortFlag.MemoryCurrent := CORRUPT;
WHEN 'l' =>
-- Corrupting a word in memory with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrWrdMem,HeaderMsg,PortName);
END IF;
DataInTmp := (OTHERS => 'X');
-- No need to CorruptMask
WriteMemory(MemoryData,DataInTmp,Address);
PortFlag.MemoryCurrent := CORRUPT;
WHEN 'd' =>
-- Corrupting a single bit in memory with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrBitMem,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataInTmp,Address);
DataInTmp := DataInTmp XOR CorruptMask;
WriteMemory(MemoryData,DataInTmp,Address,HighBit,LowBit);
PortFlag.MemoryCurrent := CORRUPT;
WHEN 'e' =>
-- Corrupting a word with 'X' based on data in
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrDatMem,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataInTmp,Address);
IF (DataInTmp /= DataInBus) THEN
DataInTmp := (OTHERS => 'X');
-- No need to CorruptMask
WriteMemory(MemoryData,DataInTmp,Address);
END IF;
PortFlag.MemoryCurrent := CORRUPT;
WHEN 'C' =>
-- Corrupting a sub-word entire memory with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrAllSubMem,HeaderMsg,PortName);
END IF;
FOR i IN 0 TO MemoryData.NoOfWords-1 LOOP
ReadMemory(MemoryData,DataInTmp,i);
DataInTmp := DataInTmp XOR CorruptMask;
WriteMemory(MemoryData,DataInTmp,i,HighBit,LowBit);
END LOOP;
PortFlag.MemoryCurrent := CORRUPT;
WHEN 'L' =>
-- Corrupting a sub-word in memory with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrWrdSubMem,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataInTmp,Address);
DataInTmp := DataInTmp XOR CorruptMask;
WriteMemory(MemoryData,DataInTmp,Address,HighBit,LowBit);
PortFlag.MemoryCurrent := CORRUPT;
WHEN 'D' =>
-- Corrupting a single bit of a memory sub-word with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrBitSubMem,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataInTmp,Address);
DataInTmp := DataInTmp XOR CorruptMask;
WriteMemory(MemoryData,DataInTmp,Address,HighBit,LowBit);
PortFlag.MemoryCurrent := CORRUPT;
WHEN 'E' =>
-- Corrupting a sub-word with 'X' based on data in
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrDatSubMem,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataInTmp,Address);
IF (DataInBus(HighBit DOWNTO LowBit) /=
DataInTmp(HighBit DOWNTO LowBit)) THEN
DataInTmp(HighBit DOWNTO LowBit) := (OTHERS => 'X');
WriteMemory(MemoryData,DataInTmp,Address,HighBit,LowBit);
END IF;
--PortFlag := WRITE;
PortFlag.MemoryCurrent := CORRUPT;
WHEN '0' =>
-- Assigning low level to memory location
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrAsg0Mem,HeaderMsg,PortName);
END IF;
DataInTmp := (OTHERS => '0');
WriteMemory(MemoryData,DataInTmp,Address, HighBit, LowBit);
PortFlag.MemoryCurrent := WRITE;
WHEN '1' =>
-- Assigning high level to memory location
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrAsg1Mem,HeaderMsg,PortName);
END IF;
DataInTmp := (OTHERS => '1');
WriteMemory(MemoryData,DataInTmp,Address, HighBit, LowBit);
PortFlag.MemoryCurrent := WRITE;
WHEN 'Z' =>
-- Assigning high impedence to memory location
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrAsgZMem,HeaderMsg,PortName);
END IF;
DataInTmp := (OTHERS => 'Z');
WriteMemory(MemoryData,DataInTmp,Address, HighBit, LowBit);
PortFlag.MemoryCurrent := WRITE;
WHEN OTHERS =>
-- Unknown memory action
PortFlag.MemoryCurrent := UNDEF;
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrUnknMemDo,HeaderMsg,PortName);
END IF;
END CASE;
-- Note: HandleMemoryAction does not change the PortFlag.OutputDisable
END;
-- ----------------------------------------------------------------------------
-- Procedure: HandleDataAction
-- Parameters: DataOutBus - Output result of the data action
-- MemoryData - Input pointer to memory data structure
-- PortFlag - Indicates read/write mode of port
-- CorruptMask - XOR'ed with DataInBus when corrupting
-- DataInBus - Current data bus in
-- Address - Current address integer
-- HighBit - Current address high bit
-- LowBit - Current address low bit
-- MemoryTable - Input memory action table
-- DataAction - Data action to be performed
-- PortName - Port name string for messages
-- HeaderMsg - Header string for messages
-- MsgOn - Control message output
-- Description: This procedure performs the specified data action based
-- on the input memory data structure. Checks whether
-- the previous state is HighZ. If yes then portFlag
-- should be NOCHANGE for VMPD to ignore IORetain
-- corruption. The idea is that the first Z should be
-- propagated but later ones should be ignored.
-- ----------------------------------------------------------------------------
PROCEDURE HandleDataAction (
VARIABLE DataOutBus : INOUT std_logic_vector;
VARIABLE MemoryData : INOUT VitalMemoryDataType;
VARIABLE PortFlag : INOUT VitalPortFlagType;
CONSTANT CorruptMask : IN std_logic_vector;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT Address : IN INTEGER;
CONSTANT HighBit : IN NATURAL;
CONSTANT LowBit : IN NATURAL;
CONSTANT MemoryTable : IN VitalMemoryTableType;
CONSTANT DataAction : IN VitalMemorySymbolType;
CONSTANT CallerName : IN STRING;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE
) IS
VARIABLE DataOutTmp : std_logic_vector(DataOutBus'RANGE)
:= DataOutBus;
BEGIN
-- Handle the data action
CASE DataAction IS
WHEN 'l' =>
-- Corrupting data out with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrWrdOut,HeaderMsg,PortName);
END IF;
DataOutTmp := (OTHERS => 'X');
-- No need to CorruptMask
PortFlag.DataCurrent := CORRUPT;
WHEN 'd' =>
-- Corrupting a single bit of data out with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrBitOut,HeaderMsg,PortName);
END IF;
DataOutTmp(HighBit DOWNTO LowBit) :=
DataOutTmp(HighBit DOWNTO LowBit) XOR
CorruptMask(HighBit DOWNTO LowBit);
PortFlag.DataCurrent := CORRUPT;
WHEN 'e' =>
-- Corrupting data out with 'X' based on data in
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrDatOut,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataOutTmp,Address);
IF (DataOutTmp /= DataInBus) THEN
DataOutTmp := (OTHERS => 'X');
-- No need to CorruptMask
END IF;
PortFlag.DataCurrent := CORRUPT;
WHEN 'L' =>
-- Corrupting data out sub-word with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrWrdSubOut,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataOutTmp,Address);
DataOutTmp(HighBit DOWNTO LowBit) :=
DataOutTmp(HighBit DOWNTO LowBit) XOR
CorruptMask(HighBit DOWNTO LowBit);
PortFlag.DataCurrent := CORRUPT;
WHEN 'D' =>
-- Corrupting a single bit of data out sub-word with 'X'
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrBitSubOut,HeaderMsg,PortName);
END IF;
DataOutTmp(HighBit DOWNTO LowBit) :=
DataOutTmp(HighBit DOWNTO LowBit) XOR
CorruptMask(HighBit DOWNTO LowBit);
PortFlag.DataCurrent := CORRUPT;
WHEN 'E' =>
-- Corrupting data out sub-word with 'X' based on data in
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrCrDatSubOut,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataOutTmp,Address);
IF (DataInBus(HighBit DOWNTO LowBit) /=
DataOutTmp(HighBit DOWNTO LowBit)) THEN
DataOutTmp(HighBit DOWNTO LowBit) := (OTHERS => 'X');
-- No need to CorruptMask
END IF;
PortFlag.DataCurrent := CORRUPT;
WHEN 'M' =>
-- Implicit read from memory to data out
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrImplOut,HeaderMsg,PortName);
END IF;
PortFlag.DataCurrent := READ;
WHEN 'm' =>
-- Reading data from memory to data out
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrReadOut,HeaderMsg,PortName);
END IF;
ReadMemory(MemoryData,DataOutTmp,Address);
PortFlag.DataCurrent := READ;
WHEN 't' =>
-- Transfering from data in to data out
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrAssgOut,HeaderMsg,PortName);
END IF;
DataOutTmp := DataInBus;
PortFlag.DataCurrent := READ;
WHEN '0' =>
-- Assigning low level to data out
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrAsg0Out,HeaderMsg,PortName);
END IF;
DataOutTmp := (OTHERS => '0');
PortFlag.DataCurrent := READ;
WHEN '1' =>
-- Assigning high level to data out
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrAsg1Out,HeaderMsg,PortName);
END IF;
DataOutTmp := (OTHERS => '1');
PortFlag.DataCurrent := READ;
WHEN 'Z' =>
-- Assigning high impedence to data out
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrAsgZOut,HeaderMsg,PortName);
END IF;
DataOutTmp := (OTHERS => 'Z');
PortFlag.DataCurrent := HIGHZ;
WHEN 'S' =>
-- Keeping data out at steady value
PortFlag.OutputDisable := TRUE;
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrAsgSOut,HeaderMsg,PortName);
END IF;
WHEN OTHERS =>
-- Unknown data action
PortFlag.DataCurrent := UNDEF;
IF (MsgOn) THEN
PrintMemoryMessage(CallerName,ErrUnknDatDo,HeaderMsg,PortName);
END IF;
END CASE;
DataOutBus(HighBit DOWNTO LowBit) := DataOutTmp(HighBit DOWNTO LowBit);
END;
-- ----------------------------------------------------------------------------
-- Memory Table Modeling Primitives
-- ----------------------------------------------------------------------------
-- ----------------------------------------------------------------------------
-- Procedure: VitalDeclareMemory
-- Parameters: NoOfWords - Number of words in the memory
-- NoOfBitsPerWord - Number of bits per word in memory
-- NoOfBitsPerSubWord - Number of bits per sub word
-- MemoryLoadFile - Name of data file to load
-- Description: This function is intended to be used to initialize
-- memory data declarations, i.e. to be executed duing
-- simulation elaboration time. Handles the allocation
-- and initialization of memory for the memory data.
-- Default NoOfBitsPerSubWord is NoOfBitsPerWord.
-- ----------------------------------------------------------------------------
IMPURE FUNCTION VitalDeclareMemory (
CONSTANT NoOfWords : IN POSITIVE;
CONSTANT NoOfBitsPerWord : IN POSITIVE;
CONSTANT MemoryLoadFile : IN string := "";
CONSTANT BinaryLoadFile : IN BOOLEAN := FALSE
) RETURN VitalMemoryDataType IS
VARIABLE MemoryPtr : VitalMemoryDataType;
BEGIN
MemoryPtr := VitalDeclareMemory(
NoOfWords => NoOfWords,
NoOfBitsPerWord => NoOfBitsPerWord,
NoOfBitsPerSubWord => NoOfBitsPerWord,
MemoryLoadFile => MemoryLoadFile,
BinaryLoadFile => BinaryLoadFile
);
RETURN MemoryPtr;
END;
-- ----------------------------------------------------------------------------
IMPURE FUNCTION VitalDeclareMemory (
CONSTANT NoOfWords : IN POSITIVE;
CONSTANT NoOfBitsPerWord : IN POSITIVE;
CONSTANT NoOfBitsPerSubWord : IN POSITIVE;
CONSTANT MemoryLoadFile : IN string := "";
CONSTANT BinaryLoadFile : IN BOOLEAN := FALSE
) RETURN VitalMemoryDataType IS
VARIABLE MemoryPtr : VitalMemoryDataType;
VARIABLE BitsPerEnable : NATURAL
:= ((NoOfBitsPerWord-1)
/NoOfBitsPerSubWord)+1;
BEGIN
PrintMemoryMessage(MsgVDM,ErrInitMem);
MemoryPtr := new VitalMemoryArrayRecType '(
NoOfWords => NoOfWords,
NoOfBitsPerWord => NoOfBitsPerWord,
NoOfBitsPerSubWord => NoOfBitsPerSubWord,
NoOfBitsPerEnable => BitsPerEnable,
MemoryArrayPtr => NULL
);
MemoryPtr.MemoryArrayPtr
:= new MemoryArrayType (0 to MemoryPtr.NoOfWords - 1);
FOR i IN 0 TO MemoryPtr.NoOfWords - 1 LOOP
MemoryPtr.MemoryArrayPtr(i)
:= new MemoryWordType (MemoryPtr.NoOfBitsPerWord - 1 DOWNTO 0);
END LOOP;
IF (MemoryLoadFile /= "") THEN
LoadMemory (MemoryPtr, MemoryLoadFile, BinaryLoadFile);
END IF;
RETURN MemoryPtr;
END;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemoryTable
-- Parameters: DataOutBus - Output candidate zero delay data bus out
-- MemoryData - Pointer to memory data structure
-- PrevControls - Previous data in for edge detection
-- PrevEnableBus - Previous enables for edge detection
-- PrevDataInBus - Previous data bus for edge detection
-- PrevAddressBus - Previous address bus for edge detection
-- PortFlag - Indicates port operating mode
-- PortFlagArray - Vector form of PortFlag for sub-word
-- Controls - Agregate of scalar control lines
-- EnableBus - Concatenation of vector control lines
-- DataInBus - Input value of data bus in
-- AddressBus - Input value of address bus in
-- AddressValue - Decoded value of the AddressBus
-- MemoryTable - Input memory action table
-- PortType - The type of port (currently not used)
-- PortName - Port name string for messages
-- HeaderMsg - Header string for messages
-- MsgOn - Control the generation of messages
-- MsgSeverity - Control level of message generation
-- Description: This procedure implements the majority of the memory
-- modeling functionality via lookup of the memory action
-- tables and performing the specified actions if matches
-- are found, or the default actions otherwise. The
-- overloadings are provided for the word and sub-word
-- (using the EnableBus and PortFlagArray arguments) addressing
-- cases.
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryTable (
VARIABLE DataOutBus : INOUT std_logic_vector;
VARIABLE MemoryData : INOUT VitalMemoryDataType;
VARIABLE PrevControls : INOUT std_logic_vector;
VARIABLE PrevDataInBus : INOUT std_logic_vector;
VARIABLE PrevAddressBus : INOUT std_logic_vector;
VARIABLE PortFlag : INOUT VitalPortFlagVectorType;
CONSTANT Controls : IN std_logic_vector;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT AddressBus : IN std_logic_vector;
VARIABLE AddressValue : INOUT VitalAddressValueType;
CONSTANT MemoryTable : IN VitalMemoryTableType;
CONSTANT PortType : IN VitalPortType := UNDEF;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING
) IS
VARIABLE DataOutTmp : std_logic_vector(DataOutBus'RANGE)
:= DataOutBus;
VARIABLE MemoryAction : VitalMemorySymbolType;
VARIABLE DataAction : VitalMemorySymbolType;
VARIABLE HighBit : NATURAL := MemoryData.NoOfBitsPerWord-1;
VARIABLE LowBit : NATURAL := 0;
VARIABLE Address : INTEGER := 0;
VARIABLE PortFlagTmp : VitalPortFlagType;
VARIABLE AddrFlag : VitalMemorySymbolType := 'g'; -- good addr
VARIABLE DataFlag : VitalMemorySymbolType := 'g'; -- good data
VARIABLE MemCorruptMask : std_logic_vector (DataOutBus'RANGE);
VARIABLE DatCorruptMask : std_logic_vector (DataOutBus'RANGE);
BEGIN
-- Optimize for case when all current inputs are same as previous
IF (PrevDataInBus = DataInBus
AND PrevAddressBus = AddressBus
AND PrevControls = Controls
AND PortFlag(0).MemoryCurrent = PortFlag(0).MemoryPrevious
AND PortFlag(0).DataCurrent = PortFlag(0).DataPrevious) THEN
PortFlag(0).OutputDisable := TRUE;
RETURN;
END IF;
PortFlag(0).DataPrevious := PortFlag(0).DataCurrent;
PortFlag(0).MemoryPrevious := PortFlag(0).MemoryCurrent;
PortFlag(0).OutputDisable := FALSE;
PortFlagTmp := PortFlag(0);
-- Convert address bus to integer value and table lookup flag
DecodeAddress(
Address => Address ,
AddrFlag => AddrFlag ,
MemoryData => MemoryData ,
PrevAddressBus => PrevAddressBus ,
AddressBus => AddressBus
);
-- Interpret data bus as a table lookup flag
DecodeData (
DataFlag => DataFlag ,
PrevDataInBus => PrevDataInBus ,
DataInBus => DataInBus ,
HighBit => HighBit ,
LowBit => LowBit
);
-- Lookup memory and data actions
MemoryTableLookUp(
MemoryAction => MemoryAction ,
DataAction => DataAction ,
MemoryCorruptMask => MemCorruptMask ,
DataCorruptMask => DatCorruptMask ,
PrevControls => PrevControls ,
Controls => Controls ,
AddrFlag => AddrFlag ,
DataFlag => DataFlag ,
MemoryTable => MemoryTable ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
-- Handle data action before memory action
-- This allows reading previous memory contents
HandleDataAction(
DataOutBus => DataOutTmp ,
MemoryData => MemoryData ,
PortFlag => PortFlagTmp ,
CorruptMask => DatCorruptMask ,
DataInBus => DataInBus ,
Address => Address ,
HighBit => HighBit ,
LowBit => LowBit ,
MemoryTable => MemoryTable ,
DataAction => DataAction ,
CallerName => MsgVMT ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
HandleMemoryAction(
MemoryData => MemoryData ,
PortFlag => PortFlagTmp ,
CorruptMask => MemCorruptMask ,
DataInBus => DataInBus ,
Address => Address ,
HighBit => HighBit ,
LowBit => LowBit ,
MemoryTable => MemoryTable ,
MemoryAction => MemoryAction ,
CallerName => MsgVMT ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
-- Set the output PortFlag(0) value
IF (DataAction = 'S') THEN
PortFlagTmp.OutputDisable := TRUE;
END IF;
IF (PortFlagTmp.DataCurrent = PortFlagTmp.DataPrevious
AND PortFlagTmp.DataCurrent = HIGHZ) THEN
PortFlagTmp.OutputDisable := TRUE;
END IF;
PortFlag(0) := PortFlagTmp;
-- Set previous values for subsequent edge detection
PrevControls := Controls;
PrevDataInBus := DataInBus;
PrevAddressBus := AddressBus;
-- Set the candidate zero delay return value
DataOutBus := DataOutTmp;
-- Set the output AddressValue for VitalMemoryCrossPorts
AddressValue := Address;
END VitalMemoryTable;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryTable (
VARIABLE DataOutBus : INOUT std_logic_vector;
VARIABLE MemoryData : INOUT VitalMemoryDataType;
VARIABLE PrevControls : INOUT std_logic_vector;
VARIABLE PrevEnableBus : INOUT std_logic_vector;
VARIABLE PrevDataInBus : INOUT std_logic_vector;
VARIABLE PrevAddressBus : INOUT std_logic_vector;
VARIABLE PortFlagArray : INOUT VitalPortFlagVectorType;
CONSTANT Controls : IN std_logic_vector;
CONSTANT EnableBus : IN std_logic_vector;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT AddressBus : IN std_logic_vector;
VARIABLE AddressValue : INOUT VitalAddressValueType;
CONSTANT MemoryTable : IN VitalMemoryTableType;
CONSTANT PortType : IN VitalPortType := UNDEF;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING
) IS
VARIABLE BitsPerWord : NATURAL := MemoryData.NoOfBitsPerWord;
VARIABLE BitsPerSubWord : NATURAL := MemoryData.NoOfBitsPerSubWord;
VARIABLE BitsPerEnable : NATURAL := MemoryData.NoOfBitsPerEnable;
VARIABLE DataOutTmp : std_logic_vector(DataOutBus'RANGE)
:= DataOutBus;
VARIABLE MemoryAction : VitalMemorySymbolType;
VARIABLE DataAction : VitalMemorySymbolType;
VARIABLE HighBit : NATURAL := BitsPerSubWord-1;
VARIABLE LowBit : NATURAL := 0;
VARIABLE Address : INTEGER := 0;
VARIABLE PortFlagTmp : VitalPortFlagType;
VARIABLE AddrFlag : VitalMemorySymbolType := 'g'; -- good addr
VARIABLE DataFlag : VitalMemorySymbolType := 'g'; -- good data
VARIABLE MemCorruptMask : std_logic_vector (DataOutBus'RANGE);
VARIABLE DatCorruptMask : std_logic_vector (DataOutBus'RANGE);
BEGIN
-- Optimize for case when all current inputs are same as previous
IF (PrevDataInBus = DataInBus
AND PrevAddressBus = AddressBus
AND PrevControls = Controls) THEN
CheckFlags:
FOR i IN 0 TO BitsPerEnable-1 LOOP
IF (PortFlagArray(i).MemoryCurrent /= PortFlagArray(i).MemoryPrevious
OR PortFlagArray(i).DataCurrent /= PortFlagArray(i).DataPrevious) THEN
EXIT CheckFlags;
END IF;
IF (i = BitsPerEnable-1) THEN
FOR j IN 0 TO BitsPerEnable-1 LOOP
PortFlagArray(j).OutputDisable := TRUE;
END LOOP;
RETURN;
END IF;
END LOOP;
END IF;
-- Convert address bus to integer value and table lookup flag
DecodeAddress(
Address => Address,
AddrFlag => AddrFlag,
MemoryData => MemoryData,
PrevAddressBus => PrevAddressBus,
AddressBus => AddressBus
);
-- Perform independent operations for each sub-word
FOR i IN 0 TO BitsPerEnable-1 LOOP
-- Set the output PortFlag(i) value
PortFlagArray(i).DataPrevious := PortFlagArray(i).DataCurrent;
PortFlagArray(i).MemoryPrevious := PortFlagArray(i).MemoryCurrent;
PortFlagArray(i).OutputDisable := FALSE;
PortFlagTmp := PortFlagArray(i);
-- Interpret data bus as a table lookup flag
DecodeData (
DataFlag => DataFlag ,
PrevDataInBus => PrevDataInBus ,
DataInBus => DataInBus ,
HighBit => HighBit ,
LowBit => LowBit
);
-- Lookup memory and data actions
MemoryTableLookUp(
MemoryAction => MemoryAction ,
DataAction => DataAction ,
MemoryCorruptMask => MemCorruptMask ,
DataCorruptMask => DatCorruptMask ,
PrevControls => PrevControls ,
PrevEnableBus => PrevEnableBus ,
Controls => Controls ,
EnableBus => EnableBus ,
EnableIndex => i ,
BitsPerWord => BitsPerWord ,
BitsPerSubWord => BitsPerSubWord ,
BitsPerEnable => BitsPerEnable ,
AddrFlag => AddrFlag ,
DataFlag => DataFlag ,
MemoryTable => MemoryTable ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
-- Handle data action before memory action
-- This allows reading previous memory contents
HandleDataAction(
DataOutBus => DataOutTmp ,
MemoryData => MemoryData ,
PortFlag => PortFlagTmp ,
CorruptMask => DatCorruptMask ,
DataInBus => DataInBus ,
Address => Address ,
HighBit => HighBit ,
LowBit => LowBit ,
MemoryTable => MemoryTable ,
DataAction => DataAction ,
CallerName => MsgVMT ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
HandleMemoryAction(
MemoryData => MemoryData ,
PortFlag => PortFlagTmp ,
CorruptMask => MemCorruptMask ,
DataInBus => DataInBus ,
Address => Address ,
HighBit => HighBit ,
LowBit => LowBit ,
MemoryTable => MemoryTable ,
MemoryAction => MemoryAction ,
CallerName => MsgVMT ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
-- Set the output PortFlag(i) value
IF (DataAction = 'S') THEN
PortFlagTmp.OutputDisable := TRUE;
END IF;
IF (PortFlagTmp.DataCurrent = PortFlagTmp.DataPrevious
AND PortFlagTmp.DataCurrent = HIGHZ) THEN
PortFlagTmp.OutputDisable := TRUE;
END IF;
PortFlagArray(i) := PortFlagTmp;
IF (i < BitsPerEnable-1) THEN
-- Calculate HighBit and LowBit
LowBit := LowBit + BitsPerSubWord;
IF (LowBit > BitsPerWord) THEN
LowBit := BitsPerWord;
END IF;
HighBit := LowBit + BitsPerSubWord;
IF (HighBit > BitsPerWord) THEN
HighBit := BitsPerWord;
ELSE
HighBit := HighBit - 1;
END IF;
END IF;
END LOOP;
-- Set previous values for subsequent edge detection
PrevControls := Controls;
PrevEnableBus := EnableBus;
PrevDataInBus := DataInBus;
PrevAddressBus := AddressBus;
-- Set the candidate zero delay return value
DataOutBus := DataOutTmp;
-- Set the output AddressValue for VitalMemoryCrossPorts
AddressValue := Address;
END VitalMemoryTable;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemoryCrossPorts
-- Parameters: DataOutBus - Output candidate zero delay data bus out
-- MemoryData - Pointer to memory data structure
-- SamePortFlag - Operating mode for same port
-- SamePortAddressValue - Operating modes for cross ports
-- CrossPortAddressArray - Decoded AddressBus for cross ports
-- CrossPortMode - Write contention and crossport read control
-- PortName - Port name string for messages
-- HeaderMsg - Header string for messages
-- MsgOn - Control the generation of messages
-- Description: These procedures control the effect of memory operations
-- on a given port due to operations on other ports in a
-- multi-port memory.
-- This includes data write through when reading and writing
-- to the same address, as well as write contention when
-- there are multiple write to the same address.
-- If addresses do not match then data bus is unchanged.
-- The DataOutBus can be diabled with 'Z' value.
-- If the WritePortFlag is 'CORRUPT', that would mean
-- that the whole memory is corrupted. So, for corrupting
-- the Read port, the Addresses need not be compared.
--
-- CrossPortMode Enum Description
-- 1. CpRead Allows Cross Port Read Only
-- No contention checking.
-- 2. WriteContention Allows for write contention checks
-- only between multiple write ports
-- 3. ReadWriteContention Allows contention between read and
-- write ports. The action is to corrupt
-- the memory and the output bus.
-- 4. CpReadAndWriteContention Is a combination of 1 & 2
-- 5. CpReadAndReadContention Allows contention between read and
-- write ports. The action is to corrupt
-- the dataout bus only. The cp read is
-- performed if not contending.
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryCrossPorts (
VARIABLE DataOutBus : INOUT std_logic_vector;
VARIABLE MemoryData : INOUT VitalMemoryDataType;
VARIABLE SamePortFlag : INOUT VitalPortFlagVectorType;
CONSTANT SamePortAddressValue : IN VitalAddressValueType;
CONSTANT CrossPortFlagArray : IN VitalPortFlagVectorType;
CONSTANT CrossPortAddressArray : IN VitalAddressValueVectorType;
CONSTANT CrossPortMode : IN VitalCrossPortModeType
:= CpReadAndWriteContention;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE
) IS
VARIABLE BitsPerWord : NATURAL := MemoryData.NoOfBitsPerWord;
VARIABLE BitsPerSubWord : NATURAL := MemoryData.NoOfBitsPerSubWord;
VARIABLE BitsPerEnable : NATURAL := MemoryData.NoOfBitsPerEnable;
VARIABLE DataOutTmp : std_logic_vector(DataOutBus'RANGE) := (OTHERS => 'Z');
VARIABLE MemoryTmp : std_logic_vector(DataOutBus'RANGE);
VARIABLE CrossPorts : NATURAL := CrossPortAddressArray'LENGTH;
VARIABLE LowBit : NATURAL := 0;
VARIABLE HighBit : NATURAL := BitsPerSubWord-1;
VARIABLE Address : VitalAddressValueType := SamePortAddressValue;
VARIABLE AddressJ : VitalAddressValueType;
VARIABLE AddressK : VitalAddressValueType;
VARIABLE PortFlagI : VitalPortFlagType;
VARIABLE PortFlagIJ : VitalPortFlagType;
VARIABLE PortFlagIK : VitalPortFlagType;
VARIABLE DoCpRead : BOOLEAN := FALSE;
VARIABLE DoWrCont : BOOLEAN := FALSE;
VARIABLE DoCpCont : BOOLEAN := FALSE;
VARIABLE DoRdWrCont : BOOLEAN := FALSE;
VARIABLE CpWrCont : BOOLEAN := FALSE;
VARIABLE ModeWrCont : BOOLEAN :=
(CrossPortMode=WriteContention) OR
(CrossPortMode=CpReadAndWriteContention);
VARIABLE ModeCpRead : BOOLEAN :=
(CrossPortMode=CpRead) OR
(CrossPortMode=CpReadAndWriteContention);
VARIABLE ModeCpCont : BOOLEAN := (CrossPortMode=ReadWriteContention);
VARIABLE ModeRdWrCont : BOOLEAN := (CrossPortMode=CpReadAndReadContention);
BEGIN
-- Check for disabled port (i.e. OTHERS => 'Z')
IF (DataOutBus = DataOutTmp) THEN
RETURN;
ELSE
DataOutTmp := DataOutBus;
END IF;
-- Check for error in address
IF (Address < 0) THEN
RETURN;
END IF;
ReadMemory(MemoryData,MemoryTmp,Address);
SubWordLoop: -- For each slice of the sub-word I
FOR i IN 0 TO BitsPerEnable-1 LOOP
PortFlagI := SamePortFlag(i);
-- For each cross port J: check with same port address
FOR j IN 0 TO CrossPorts-1 LOOP
PortFlagIJ := CrossPortFlagArray(i+j*BitsPerEnable);
AddressJ := CrossPortAddressArray(j);
IF (AddressJ < 0) THEN
NEXT;
END IF;
DoWrCont := (Address = AddressJ) AND
(ModeWrCont = TRUE) AND
((PortFlagI.MemoryCurrent = WRITE) OR
(PortFlagI.MemoryCurrent = CORRUPT)) AND
((PortFlagIJ.MemoryCurrent = WRITE) OR
(PortFlagIJ.MemoryCurrent = CORRUPT)) ;
DoCpRead := (Address = AddressJ) AND
(ModeCpRead = TRUE) AND
((PortFlagI.MemoryCurrent = READ) OR
(PortFlagI.OutputDisable = TRUE)) AND
((PortFlagIJ.MemoryCurrent = WRITE) OR
(PortFlagIJ.MemoryCurrent = CORRUPT)) ;
DoCpCont := (Address = AddressJ) AND
(ModeCpCont = TRUE) AND
((PortFlagI.MemoryCurrent = READ) OR
(PortFlagI.OutputDisable = TRUE)) AND
((PortFlagIJ.MemoryCurrent = WRITE) OR
(PortFlagIJ.MemoryCurrent = CORRUPT)) ;
DoRdWrCont:= (Address = AddressJ) AND
(ModeRdWrCont = TRUE) AND
((PortFlagI.MemoryCurrent = READ) OR
(PortFlagI.OutputDisable = TRUE)) AND
((PortFlagIJ.MemoryCurrent = WRITE) OR
(PortFlagIJ.MemoryCurrent = CORRUPT)) ;
IF (DoWrCont OR DoCpCont) THEN
-- Corrupt dataout and memory
MemoryTmp(HighBit DOWNTO LowBit) := (OTHERS => 'X');
DataOutTmp(HighBit DOWNTO LowBit) := (OTHERS => 'X');
SamePortFlag(i).MemoryCurrent := CORRUPT;
SamePortFlag(i).DataCurrent := CORRUPT;
SamePortFlag(i).OutputDisable := FALSE;
EXIT;
END IF;
IF (DoCpRead) THEN
-- Update dataout with memory
DataOutTmp(HighBit DOWNTO LowBit) :=
MemoryTmp(HighBit DOWNTO LowBit);
SamePortFlag(i).MemoryCurrent := READ;
SamePortFlag(i).DataCurrent := READ;
SamePortFlag(i).OutputDisable := FALSE;
EXIT;
END IF;
IF (DoRdWrCont) THEN
-- Corrupt dataout only
DataOutTmp(HighBit DOWNTO LowBit) := (OTHERS => 'X');
SamePortFlag(i).DataCurrent := CORRUPT;
SamePortFlag(i).OutputDisable := FALSE;
EXIT;
END IF;
END LOOP;
IF (i < BitsPerEnable-1) THEN
-- Calculate HighBit and LowBit
LowBit := LowBit + BitsPerSubWord;
IF (LowBit > BitsPerWord) THEN
LowBit := BitsPerWord;
END IF;
HighBit := LowBit + BitsPerSubWord;
IF (HighBit > BitsPerWord) THEN
HighBit := BitsPerWord;
ELSE
HighBit := HighBit - 1;
END IF;
END IF;
END LOOP; -- SubWordLoop
DataOutBus := DataOutTmp;
IF (DoWrCont) THEN
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMCP,ErrMcpWrCont,HeaderMsg,PortName);
END IF;
WriteMemory(MemoryData,MemoryTmp,Address);
END IF;
IF (DoCpCont) THEN
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMCP,ErrMcpCpCont,HeaderMsg,PortName);
END IF;
WriteMemory(MemoryData,MemoryTmp,Address);
END IF;
IF (DoCpRead) THEN
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMCP,ErrMcpCpRead,HeaderMsg,PortName);
END IF;
END IF;
IF (DoRdWrCont) THEN
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMCP,ErrMcpRdWrCo,HeaderMsg,PortName);
END IF;
END IF;
END VitalMemoryCrossPorts;
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryCrossPorts (
VARIABLE MemoryData : INOUT VitalMemoryDataType;
CONSTANT CrossPortFlagArray : IN VitalPortFlagVectorType;
CONSTANT CrossPortAddressArray : IN VitalAddressValueVectorType;
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE
) IS
VARIABLE BitsPerWord : NATURAL := MemoryData.NoOfBitsPerWord;
VARIABLE BitsPerSubWord : NATURAL := MemoryData.NoOfBitsPerSubWord;
VARIABLE BitsPerEnable : NATURAL := MemoryData.NoOfBitsPerEnable;
VARIABLE MemoryTmp : std_logic_vector(BitsPerWord-1 DOWNTO 0);
VARIABLE CrossPorts : NATURAL := CrossPortAddressArray'LENGTH;
VARIABLE LowBit : NATURAL := 0;
VARIABLE HighBit : NATURAL := BitsPerSubWord-1;
VARIABLE AddressJ : VitalAddressValueType;
VARIABLE AddressK : VitalAddressValueType;
VARIABLE PortFlagIJ : VitalPortFlagType;
VARIABLE PortFlagIK : VitalPortFlagType;
VARIABLE CpWrCont : BOOLEAN := FALSE;
BEGIN
SubWordLoop: -- For each slice of the sub-word I
FOR i IN 0 TO BitsPerEnable-1 LOOP
-- For each cross port J: check with each cross port K
FOR j IN 0 TO CrossPorts-1 LOOP
PortFlagIJ := CrossPortFlagArray(i+j*BitsPerEnable);
AddressJ := CrossPortAddressArray(j);
-- Check for error in address
IF (AddressJ < 0) THEN
NEXT;
END IF;
ReadMemory(MemoryData,MemoryTmp,AddressJ);
-- For each cross port K
FOR k IN 0 TO CrossPorts-1 LOOP
IF (k <= j) THEN
NEXT;
END IF;
PortFlagIK := CrossPortFlagArray(i+k*BitsPerEnable);
AddressK := CrossPortAddressArray(k);
-- Check for error in address
IF (AddressK < 0) THEN
NEXT;
END IF;
CpWrCont := ( (AddressJ = AddressK) AND
(PortFlagIJ.MemoryCurrent = WRITE) AND
(PortFlagIK.MemoryCurrent = WRITE) ) OR
( (PortFlagIJ.MemoryCurrent = WRITE) AND
(PortFlagIK.MemoryCurrent = CORRUPT) ) OR
( (PortFlagIJ.MemoryCurrent = CORRUPT) AND
(PortFlagIK.MemoryCurrent = WRITE) ) OR
( (PortFlagIJ.MemoryCurrent = CORRUPT) AND
(PortFlagIK.MemoryCurrent = CORRUPT) ) ;
IF (CpWrCont) THEN
-- Corrupt memory only
MemoryTmp(HighBit DOWNTO LowBit) := (OTHERS => 'X');
EXIT;
END IF;
END LOOP; -- FOR k IN 0 TO CrossPorts-1 LOOP
IF (CpWrCont = TRUE) THEN
IF (MsgOn) THEN
PrintMemoryMessage(MsgVMCP,ErrMcpCpWrCont,HeaderMsg);
END IF;
WriteMemory(MemoryData,MemoryTmp,AddressJ);
END IF;
END LOOP; -- FOR j IN 0 TO CrossPorts-1 LOOP
IF (i < BitsPerEnable-1) THEN
-- Calculate HighBit and LowBit
LowBit := LowBit + BitsPerSubWord;
IF (LowBit > BitsPerWord) THEN
LowBit := BitsPerWord;
END IF;
HighBit := LowBit + BitsPerSubWord;
IF (HighBit > BitsPerWord) THEN
HighBit := BitsPerWord;
ELSE
HighBit := HighBit - 1;
END IF;
END IF;
END LOOP; -- SubWordLoop
END VitalMemoryCrossPorts;
-- ----------------------------------------------------------------------------
-- Procedure: VitalMemoryViolation
-- Parameters: DataOutBus - Output zero delay data bus out
-- MemoryData - Pointer to memory data structure
-- PortFlag - Indicates port operating mode
-- TimingDataArray - This is currently not used (comment out)
-- ViolationArray - Aggregation of violation variables
-- DataInBus - Input value of data bus in
-- AddressBus - Input value of address bus in
-- AddressValue - Decoded value of the AddressBus
-- ViolationTable - Input memory violation table
-- PortName - Port name string for messages
-- HeaderMsg - Header string for messages
-- MsgOn - Control the generation of messages
-- MsgSeverity - Control level of message generation
-- Description: This procedure is intended to implement all actions on the
-- memory contents and data out bus as a result of timing viols.
-- It uses the memory action table to perform various corruption
-- policies specified by the user.
-- ----------------------------------------------------------------------------
PROCEDURE VitalMemoryViolation (
VARIABLE DataOutBus : INOUT std_logic_vector;
VARIABLE MemoryData : INOUT VitalMemoryDataType;
VARIABLE PortFlag : INOUT VitalPortFlagVectorType;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT AddressValue : IN VitalAddressValueType;
CONSTANT ViolationFlags : IN std_logic_vector;
CONSTANT ViolationFlagsArray : IN X01ArrayT;
CONSTANT ViolationSizesArray : IN VitalMemoryViolFlagSizeType;
CONSTANT ViolationTable : IN VitalMemoryTableType;
CONSTANT PortType : IN VitalPortType;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING
) IS
VARIABLE BitsPerWord : NATURAL := MemoryData.NoOfBitsPerWord;
VARIABLE BitsPerSubWord : NATURAL := MemoryData.NoOfBitsPerSubWord;
VARIABLE BitsPerEnable : NATURAL := MemoryData.NoOfBitsPerEnable;
VARIABLE DataOutTmp : std_logic_vector(DataOutBus'RANGE)
:= DataOutBus;
VARIABLE MemoryAction : VitalMemorySymbolType;
VARIABLE DataAction : VitalMemorySymbolType;
-- VMT relies on the corrupt masks so HighBit/LowBit are full word
VARIABLE HighBit : NATURAL := BitsPerWord-1;
VARIABLE LowBit : NATURAL := 0;
VARIABLE PortFlagTmp : VitalPortFlagType;
VARIABLE VFlagArrayTmp : std_logic_vector
(0 TO ViolationFlagsArray'LENGTH-1);
VARIABLE MemCorruptMask : std_logic_vector (DataOutBus'RANGE);
VARIABLE DatCorruptMask : std_logic_vector (DataOutBus'RANGE);
BEGIN
-- Don't do anything if given an error address
IF (AddressValue < 0) THEN
RETURN;
END IF;
FOR i IN ViolationFlagsArray'RANGE LOOP
VFlagArrayTmp(i) := ViolationFlagsArray(i);
END LOOP;
-- Lookup memory and data actions
ViolationTableLookUp(
MemoryAction => MemoryAction ,
DataAction => DataAction ,
MemoryCorruptMask => MemCorruptMask ,
DataCorruptMask => DatCorruptMask ,
ViolationFlags => ViolationFlags ,
ViolationFlagsArray => VFlagArrayTmp ,
ViolationSizesArray => ViolationSizesArray ,
ViolationTable => ViolationTable ,
BitsPerWord => BitsPerWord ,
BitsPerSubWord => BitsPerSubWord ,
BitsPerEnable => BitsPerEnable ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
-- Need to read incoming PF value (was not before)
PortFlagTmp := PortFlag(0);
IF (PortType = READ OR PortType = RDNWR) THEN
-- Handle data action before memory action
-- This allows reading previous memory contents
HandleDataAction(
DataOutBus => DataOutTmp ,
MemoryData => MemoryData ,
PortFlag => PortFlagTmp ,
CorruptMask => DatCorruptMask ,
DataInBus => DataInBus ,
Address => AddressValue ,
HighBit => HighBit ,
LowBit => LowBit ,
MemoryTable => ViolationTable ,
DataAction => DataAction ,
CallerName => MsgVMV ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
END IF;
IF (PortType = WRITE OR PortType = RDNWR) THEN
HandleMemoryAction(
MemoryData => MemoryData ,
PortFlag => PortFlagTmp ,
CorruptMask => MemCorruptMask ,
DataInBus => DataInBus ,
Address => AddressValue ,
HighBit => HighBit ,
LowBit => LowBit ,
MemoryTable => ViolationTable ,
MemoryAction => MemoryAction ,
CallerName => MsgVMV ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn
);
END IF;
-- Check if we need to turn off PF.OutputDisable
IF (DataAction /= 'S') THEN
PortFlagTmp.OutputDisable := FALSE;
-- Set the output PortFlag(0) value
-- Note that all bits of PortFlag get PortFlagTmp
FOR i IN PortFlag'RANGE LOOP
PortFlag(i) := PortFlagTmp;
END LOOP;
END IF;
-- Set the candidate zero delay return value
DataOutBus := DataOutTmp;
END;
PROCEDURE VitalMemoryViolation (
VARIABLE DataOutBus : INOUT std_logic_vector;
VARIABLE MemoryData : INOUT VitalMemoryDataType;
VARIABLE PortFlag : INOUT VitalPortFlagVectorType;
CONSTANT DataInBus : IN std_logic_vector;
CONSTANT AddressValue : IN VitalAddressValueType;
CONSTANT ViolationFlags : IN std_logic_vector;
CONSTANT ViolationTable : IN VitalMemoryTableType;
CONSTANT PortType : IN VitalPortType;
CONSTANT PortName : IN STRING := "";
CONSTANT HeaderMsg : IN STRING := "";
CONSTANT MsgOn : IN BOOLEAN := TRUE;
CONSTANT MsgSeverity : IN SEVERITY_LEVEL := WARNING
) IS
VARIABLE VFlagArrayTmp : X01ArrayT (0 TO 0);
BEGIN
VitalMemoryViolation (
DataOutBus => DataOutBus ,
MemoryData => MemoryData ,
PortFlag => PortFlag ,
DataInBus => DataInBus ,
AddressValue => AddressValue ,
ViolationFlags => ViolationFlags ,
ViolationFlagsArray => VFlagArrayTmp ,
ViolationSizesArray => ( 0 => 0 ) ,
ViolationTable => ViolationTable ,
PortType => PortType ,
PortName => PortName ,
HeaderMsg => HeaderMsg ,
MsgOn => MsgOn ,
MsgSeverity => MsgSeverity
);
END;
END Vital_Memory ;
|
-- This should be okay
architecture rtl of fifo is
-- Comment
signal a : std_logic;
-- Okay comment
signal b : std_logic_vector;
begin
-- Comment 1
a <= b;
-- Comment 2
c <= d;
-- Comment 3
e <= f;
-- BQ1/M3S1
rx_tdata_remapped <= rx_tdata(119 downto 112) & rx_tdata(127 downto 120) &
-- BI1/M2S1
rx_tdata(87 downto 80) & rx_tdata(95 downto 88) &
-- BQ0/M3S0
rx_tdata(103 downto 96) & rx_tdata(111 downto 104) &
-- BQ0/M2S0
rx_tdata(71 downto 64) & rx_tdata(79 downto 72) &
-- AQ1/M1S1
rx_tdata(55 downto 48) & rx_tdata(63 downto 56) &
-- AI1/M0S1
rx_tdata(23 downto 16) & rx_tdata(31 downto 24) &
-- AQ0/M1S0
rx_tdata(39 downto 32) & rx_tdata(47 downto 40) &
-- AI0/M0S0
rx_tdata(7 downto 0) & rx_tdata(15 downto 8);
end architecture rtl;
|
----------------------------------------------------------------------------------
--
-- comparator.vhd
--
-- (c) 2015
-- L. Schrittwieser
-- N. Huesser
--
----------------------------------------------------------------------------------
--
-- Old descision piece for the trigger units; obsolete
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity comparator is
generic (
Width : integer := 14
);
port (
AxDI : in unsigned(Width - 1 downto 0);
BxDI : in unsigned(Width - 1 downto 0);
GreaterxSO : out std_logic;
EqualxSO : out std_logic;
LowerxSO : out std_logic
);
end comparator;
architecture Behavioral of comparator is
begin
process(AxDI, BxDI)
begin
GreaterxSO <= '0';
EqualxSO <= '0';
LowerxSO <= '0';
if AxDI > BxDI then
GreaterxSO <= '1';
elsif AxDI = BxDI then
EqualxSO <= '1';
else
LowerxSO <= '1';
end if;
end process;
end Behavioral;
|
entity tc4 is
end;
library ieee;
use ieee.std_logic_1164.all;
architecture behav of tc4 is
signal clk : std_logic;
signal tg : std_logic;
begin
process (clk) is
begin
if falling_edge(clk) and tg then
null;
end if;
end process;
end behav;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:axi_gpio:2.0
-- IP Revision: 15
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY axi_gpio_v2_0_15;
USE axi_gpio_v2_0_15.axi_gpio;
ENTITY zynq_design_1_axi_gpio_0_1 IS
PORT (
s_axi_aclk : IN STD_LOGIC;
s_axi_aresetn : IN STD_LOGIC;
s_axi_awaddr : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_araddr : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
gpio_io_o : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END zynq_design_1_axi_gpio_0_1;
ARCHITECTURE zynq_design_1_axi_gpio_0_1_arch OF zynq_design_1_axi_gpio_0_1 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : STRING;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF zynq_design_1_axi_gpio_0_1_arch: ARCHITECTURE IS "yes";
COMPONENT axi_gpio IS
GENERIC (
C_FAMILY : STRING;
C_S_AXI_ADDR_WIDTH : INTEGER;
C_S_AXI_DATA_WIDTH : INTEGER;
C_GPIO_WIDTH : INTEGER;
C_GPIO2_WIDTH : INTEGER;
C_ALL_INPUTS : INTEGER;
C_ALL_INPUTS_2 : INTEGER;
C_ALL_OUTPUTS : INTEGER;
C_ALL_OUTPUTS_2 : INTEGER;
C_INTERRUPT_PRESENT : INTEGER;
C_DOUT_DEFAULT : STD_LOGIC_VECTOR(31 DOWNTO 0);
C_TRI_DEFAULT : STD_LOGIC_VECTOR(31 DOWNTO 0);
C_IS_DUAL : INTEGER;
C_DOUT_DEFAULT_2 : STD_LOGIC_VECTOR(31 DOWNTO 0);
C_TRI_DEFAULT_2 : STD_LOGIC_VECTOR(31 DOWNTO 0)
);
PORT (
s_axi_aclk : IN STD_LOGIC;
s_axi_aresetn : IN STD_LOGIC;
s_axi_awaddr : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_araddr : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
ip2intc_irpt : OUT STD_LOGIC;
gpio_io_i : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
gpio_io_o : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
gpio_io_t : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
gpio2_io_i : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
gpio2_io_o : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
gpio2_io_t : OUT STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END COMPONENT axi_gpio;
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF s_axi_aclk: SIGNAL IS "xilinx.com:signal:clock:1.0 S_AXI_ACLK CLK";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_aresetn: SIGNAL IS "xilinx.com:signal:reset:1.0 S_AXI_ARESETN RST";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awaddr: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWADDR";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wdata: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WDATA";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wstrb: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WSTRB";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bresp: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BRESP";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_araddr: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARADDR";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rdata: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RDATA";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rresp: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RRESP";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RREADY";
ATTRIBUTE X_INTERFACE_INFO OF gpio_io_o: SIGNAL IS "xilinx.com:interface:gpio:1.0 GPIO TRI_O";
BEGIN
U0 : axi_gpio
GENERIC MAP (
C_FAMILY => "zynq",
C_S_AXI_ADDR_WIDTH => 9,
C_S_AXI_DATA_WIDTH => 32,
C_GPIO_WIDTH => 8,
C_GPIO2_WIDTH => 32,
C_ALL_INPUTS => 0,
C_ALL_INPUTS_2 => 0,
C_ALL_OUTPUTS => 1,
C_ALL_OUTPUTS_2 => 0,
C_INTERRUPT_PRESENT => 0,
C_DOUT_DEFAULT => X"00000000",
C_TRI_DEFAULT => X"FFFFFFFF",
C_IS_DUAL => 0,
C_DOUT_DEFAULT_2 => X"00000000",
C_TRI_DEFAULT_2 => X"FFFFFFFF"
)
PORT MAP (
s_axi_aclk => s_axi_aclk,
s_axi_aresetn => s_axi_aresetn,
s_axi_awaddr => s_axi_awaddr,
s_axi_awvalid => s_axi_awvalid,
s_axi_awready => s_axi_awready,
s_axi_wdata => s_axi_wdata,
s_axi_wstrb => s_axi_wstrb,
s_axi_wvalid => s_axi_wvalid,
s_axi_wready => s_axi_wready,
s_axi_bresp => s_axi_bresp,
s_axi_bvalid => s_axi_bvalid,
s_axi_bready => s_axi_bready,
s_axi_araddr => s_axi_araddr,
s_axi_arvalid => s_axi_arvalid,
s_axi_arready => s_axi_arready,
s_axi_rdata => s_axi_rdata,
s_axi_rresp => s_axi_rresp,
s_axi_rvalid => s_axi_rvalid,
s_axi_rready => s_axi_rready,
gpio_io_i => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
gpio_io_o => gpio_io_o,
gpio2_io_i => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32))
);
END zynq_design_1_axi_gpio_0_1_arch;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:axi_gpio:2.0
-- IP Revision: 15
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY axi_gpio_v2_0_15;
USE axi_gpio_v2_0_15.axi_gpio;
ENTITY zynq_design_1_axi_gpio_0_1 IS
PORT (
s_axi_aclk : IN STD_LOGIC;
s_axi_aresetn : IN STD_LOGIC;
s_axi_awaddr : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_araddr : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
gpio_io_o : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END zynq_design_1_axi_gpio_0_1;
ARCHITECTURE zynq_design_1_axi_gpio_0_1_arch OF zynq_design_1_axi_gpio_0_1 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : STRING;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF zynq_design_1_axi_gpio_0_1_arch: ARCHITECTURE IS "yes";
COMPONENT axi_gpio IS
GENERIC (
C_FAMILY : STRING;
C_S_AXI_ADDR_WIDTH : INTEGER;
C_S_AXI_DATA_WIDTH : INTEGER;
C_GPIO_WIDTH : INTEGER;
C_GPIO2_WIDTH : INTEGER;
C_ALL_INPUTS : INTEGER;
C_ALL_INPUTS_2 : INTEGER;
C_ALL_OUTPUTS : INTEGER;
C_ALL_OUTPUTS_2 : INTEGER;
C_INTERRUPT_PRESENT : INTEGER;
C_DOUT_DEFAULT : STD_LOGIC_VECTOR(31 DOWNTO 0);
C_TRI_DEFAULT : STD_LOGIC_VECTOR(31 DOWNTO 0);
C_IS_DUAL : INTEGER;
C_DOUT_DEFAULT_2 : STD_LOGIC_VECTOR(31 DOWNTO 0);
C_TRI_DEFAULT_2 : STD_LOGIC_VECTOR(31 DOWNTO 0)
);
PORT (
s_axi_aclk : IN STD_LOGIC;
s_axi_aresetn : IN STD_LOGIC;
s_axi_awaddr : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_araddr : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
ip2intc_irpt : OUT STD_LOGIC;
gpio_io_i : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
gpio_io_o : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
gpio_io_t : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
gpio2_io_i : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
gpio2_io_o : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
gpio2_io_t : OUT STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END COMPONENT axi_gpio;
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF s_axi_aclk: SIGNAL IS "xilinx.com:signal:clock:1.0 S_AXI_ACLK CLK";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_aresetn: SIGNAL IS "xilinx.com:signal:reset:1.0 S_AXI_ARESETN RST";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awaddr: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWADDR";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wdata: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WDATA";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wstrb: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WSTRB";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bresp: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BRESP";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_araddr: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARADDR";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rdata: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RDATA";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rresp: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RRESP";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RREADY";
ATTRIBUTE X_INTERFACE_INFO OF gpio_io_o: SIGNAL IS "xilinx.com:interface:gpio:1.0 GPIO TRI_O";
BEGIN
U0 : axi_gpio
GENERIC MAP (
C_FAMILY => "zynq",
C_S_AXI_ADDR_WIDTH => 9,
C_S_AXI_DATA_WIDTH => 32,
C_GPIO_WIDTH => 8,
C_GPIO2_WIDTH => 32,
C_ALL_INPUTS => 0,
C_ALL_INPUTS_2 => 0,
C_ALL_OUTPUTS => 1,
C_ALL_OUTPUTS_2 => 0,
C_INTERRUPT_PRESENT => 0,
C_DOUT_DEFAULT => X"00000000",
C_TRI_DEFAULT => X"FFFFFFFF",
C_IS_DUAL => 0,
C_DOUT_DEFAULT_2 => X"00000000",
C_TRI_DEFAULT_2 => X"FFFFFFFF"
)
PORT MAP (
s_axi_aclk => s_axi_aclk,
s_axi_aresetn => s_axi_aresetn,
s_axi_awaddr => s_axi_awaddr,
s_axi_awvalid => s_axi_awvalid,
s_axi_awready => s_axi_awready,
s_axi_wdata => s_axi_wdata,
s_axi_wstrb => s_axi_wstrb,
s_axi_wvalid => s_axi_wvalid,
s_axi_wready => s_axi_wready,
s_axi_bresp => s_axi_bresp,
s_axi_bvalid => s_axi_bvalid,
s_axi_bready => s_axi_bready,
s_axi_araddr => s_axi_araddr,
s_axi_arvalid => s_axi_arvalid,
s_axi_arready => s_axi_arready,
s_axi_rdata => s_axi_rdata,
s_axi_rresp => s_axi_rresp,
s_axi_rvalid => s_axi_rvalid,
s_axi_rready => s_axi_rready,
gpio_io_i => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
gpio_io_o => gpio_io_o,
gpio2_io_i => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32))
);
END zynq_design_1_axi_gpio_0_1_arch;
|
-- *************************************
-- * Circuito para generar objetos VGA *
-- *************************************
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity gen_obj is -- Generador de objetos estáticos
port(
obj_on : out std_logic;
pixel_x, pixel_y: in std_logic_vector(9 downto 0);
obj_rgb : out std_logic_vector(2 downto 0)
);
end gen_obj;
--------------------
-- Pared vertical --
--------------------
architecture pared of gen_obj is
-- Coordenadas x, y (0, 0)
signal px_x, px_y: unsigned(9 downto 0);
----------------------------------------------
-- Pared vertical (4 x Resolución vertical) --
----------------------------------------------
-- Borde horizontal(x) izquierdo y derecho
constant PARED_X_I: integer := 32;
constant PARED_X_D: integer := 35;
begin
px_x <= unsigned(pixel_x);
px_y <= unsigned(pixel_y);
-- Pixel dentro de la pared
obj_on <=
'1' when (px_x >= PARED_X_I) and (px_x <= PARED_X_D) else
'0';
-- Salida RGB de la pared
obj_rgb <= "001"; -- Azul
end pared;
-----------------------------
-- Barra vertical (4 x 72) --
-----------------------------
architecture barra of gen_obj is
-- Coordenadas x, y (0, 0) hasta (639, 479)
signal px_x, px_y: unsigned(9 downto 0);
constant MAX_X: integer := 640;
constant MAX_Y: integer := 480;
constant BAR_X_DIM: integer := 4; -- Dimensión/tamaño
constant BAR_Y_DIM: integer := 72;
-- Borde horizontal(x) izquierdo y derecho
constant BAR_X_I: integer := 600;
constant BAR_X_D: integer := BAR_X_I + BAR_X_DIM - 1;
-- Borde vertical(y) superior e inferior
constant BAR_Y_S: integer := MAX_Y/2 - BAR_Y_DIM/2; -- 204
constant BAR_Y_I: integer := BAR_Y_S + BAR_Y_DIM - 1;
begin
px_x <= unsigned(pixel_x);
px_y <= unsigned(pixel_y);
-- Pixel dentro de la barra
obj_on <=
'1' when (px_x >= BAR_X_I) and (px_x <= BAR_X_D) and
(px_y >= BAR_Y_S) and (px_y <= BAR_Y_I) else
'0';
-- Salida RGB de la barra
obj_rgb <= "010"; -- Verde
end barra;
----------------------------------------------
-- Bola (delimitada por un cuadrado de 8x8) --
----------------------------------------------
architecture bola of gen_obj is
-- Coordenadas x, y (0, 0)
signal px_x, px_y: unsigned(9 downto 0);
constant BOLA_DIM: integer := 8; -- Dimensión
-- Borde horizontal(x) izquierdo y derecho
signal bola_x_i, bola_x_d: unsigned(9 downto 0);
-- Borde vertical(y) superior e inferior
signal bola_y_s, bola_y_i: unsigned(9 downto 0);
-- Señal que indica si las coordenadas del barrido se encuentran dentro de la
-- región cuadrada
signal cuadrado_on: std_logic;
----------------------------
-- Imagen ROM de una bola --
----------------------------
type tipo_rom is array (0 to 7) of std_logic_vector(0 to 7);
-- Definición de la memoria ROM
constant BOLA_ROM: tipo_rom :=
(
"00111100", -- ****
"01111110", -- ******
"11111111", -- ********
"11111111", -- ********
"11111111", -- ********
"11111111", -- ********
"01111110", -- ******
"00111100" -- ****
);
signal rom_dir, rom_col: unsigned(2 downto 0);
signal rom_datos: std_logic_vector(7 downto 0);
signal rom_bit: std_logic;
begin
px_x <= unsigned(pixel_x);
px_y <= unsigned(pixel_y);
-- Declaración temporal
bola_x_i <= to_unsigned(580, 10);
bola_x_d <= to_unsigned(587, 10);
bola_y_s <= to_unsigned(238, 10);
bola_y_i <= to_unsigned(245, 10);
-- Pixel dentro del cuadrado de 8x8
cuadrado_on <=
'1' when (px_x >= bola_x_i) and (px_x <= bola_x_d) and
(px_y >= bola_y_s) and (px_y <= bola_y_i) else
'0';
-- Mapear la ubicación del píxel actual a la dir/col ROM
rom_dir <= px_y(2 downto 0) - bola_y_s(2 downto 0);
rom_col <= px_x(2 downto 0) - bola_x_i(2 downto 0);
rom_datos <= BOLA_ROM(to_integer(rom_dir));
rom_bit <= rom_datos(to_integer(rom_col));
obj_on <=
'1' when (cuadrado_on = '1') and (rom_bit = '1') else
'0';
-- Salida RGB de la bola
obj_rgb <= "100"; -- Rojo
end bola;
|
-- ==============================================================
-- File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2014.1
-- Copyright (C) 2014 Xilinx Inc. All rights reserved.
--
-- ==============================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity indices_if_ap_fifo is
generic (
DATA_WIDTH : integer := 32;
ADDR_WIDTH : integer := 16;
DEPTH : integer := 1);
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
if_empty_n : OUT STD_LOGIC;
if_read_ce : IN STD_LOGIC;
if_read : IN STD_LOGIC;
if_dout : OUT STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
if_full_n : OUT STD_LOGIC;
if_write_ce : IN STD_LOGIC;
if_write : IN STD_LOGIC;
if_din : IN STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0));
end entity;
architecture rtl of indices_if_ap_fifo is
type memtype is array (0 to DEPTH - 1) of STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
signal mStorage : memtype := (others => (others => '0'));
signal mInPtr : UNSIGNED(ADDR_WIDTH - 1 downto 0) := (others => '0');
signal mOutPtr : UNSIGNED(ADDR_WIDTH - 1 downto 0) := (others => '0');
signal internal_empty_n, internal_full_n : STD_LOGIC;
signal mFlag_nEF_hint : STD_LOGIC := '0'; -- 0: empty hint, 1: full hint
begin
if_dout <= mStorage(CONV_INTEGER(mOutPtr));
if_empty_n <= internal_empty_n;
if_full_n <= internal_full_n;
internal_empty_n <= '0' when mInPtr = mOutPtr and mFlag_nEF_hint = '0' else '1';
internal_full_n <= '0' when mInptr = mOutPtr and mFlag_nEF_hint = '1' else '1';
process (clk, reset)
begin
if reset = '1' then
mInPtr <= (others => '0');
mOutPtr <= (others => '0');
mFlag_nEF_hint <= '0'; -- empty hint
elsif clk'event and clk = '1' then
if if_read_ce = '1' and if_read = '1' and internal_empty_n = '1' then
if (mOutPtr = DEPTH -1) then
mOutPtr <= (others => '0');
mFlag_nEF_hint <= not mFlag_nEF_hint;
else
mOutPtr <= mOutPtr + 1;
end if;
end if;
if if_write_ce = '1' and if_write = '1' and internal_full_n = '1' then
mStorage(CONV_INTEGER(mInPtr)) <= if_din;
if (mInPtr = DEPTH -1) then
mInPtr <= (others => '0');
mFlag_nEF_hint <= not mFlag_nEF_hint;
else
mInPtr <= mInPtr + 1;
end if;
end if;
end if;
end process;
end architecture;
|
-- ==============================================================
-- File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2014.1
-- Copyright (C) 2014 Xilinx Inc. All rights reserved.
--
-- ==============================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity indices_if_ap_fifo is
generic (
DATA_WIDTH : integer := 32;
ADDR_WIDTH : integer := 16;
DEPTH : integer := 1);
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
if_empty_n : OUT STD_LOGIC;
if_read_ce : IN STD_LOGIC;
if_read : IN STD_LOGIC;
if_dout : OUT STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
if_full_n : OUT STD_LOGIC;
if_write_ce : IN STD_LOGIC;
if_write : IN STD_LOGIC;
if_din : IN STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0));
end entity;
architecture rtl of indices_if_ap_fifo is
type memtype is array (0 to DEPTH - 1) of STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
signal mStorage : memtype := (others => (others => '0'));
signal mInPtr : UNSIGNED(ADDR_WIDTH - 1 downto 0) := (others => '0');
signal mOutPtr : UNSIGNED(ADDR_WIDTH - 1 downto 0) := (others => '0');
signal internal_empty_n, internal_full_n : STD_LOGIC;
signal mFlag_nEF_hint : STD_LOGIC := '0'; -- 0: empty hint, 1: full hint
begin
if_dout <= mStorage(CONV_INTEGER(mOutPtr));
if_empty_n <= internal_empty_n;
if_full_n <= internal_full_n;
internal_empty_n <= '0' when mInPtr = mOutPtr and mFlag_nEF_hint = '0' else '1';
internal_full_n <= '0' when mInptr = mOutPtr and mFlag_nEF_hint = '1' else '1';
process (clk, reset)
begin
if reset = '1' then
mInPtr <= (others => '0');
mOutPtr <= (others => '0');
mFlag_nEF_hint <= '0'; -- empty hint
elsif clk'event and clk = '1' then
if if_read_ce = '1' and if_read = '1' and internal_empty_n = '1' then
if (mOutPtr = DEPTH -1) then
mOutPtr <= (others => '0');
mFlag_nEF_hint <= not mFlag_nEF_hint;
else
mOutPtr <= mOutPtr + 1;
end if;
end if;
if if_write_ce = '1' and if_write = '1' and internal_full_n = '1' then
mStorage(CONV_INTEGER(mInPtr)) <= if_din;
if (mInPtr = DEPTH -1) then
mInPtr <= (others => '0');
mFlag_nEF_hint <= not mFlag_nEF_hint;
else
mInPtr <= mInPtr + 1;
end if;
end if;
end if;
end process;
end architecture;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003, Gaisler Research
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: atahost_dma_fifo
-- File: atahost_dma_fifo.vhd
-- Author: Erik Jagre - Gaisler Research
-- Description: Generic FIFO, based on syncram in grlib
-----------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.std_logic_arith.all;
library techmap;
use techmap.gencomp.all;
entity atahost_dma_fifo is
generic(tech : integer:=0; abits : integer:=3;
dbits : integer:=32; depth : integer:=8);
port( clk : in std_logic;
reset : in std_logic;
write_enable : in std_logic;
read_enable : in std_logic;
data_in : in std_logic_vector(dbits-1 downto 0);
data_out : out std_logic_vector(dbits-1 downto 0);
write_error : out std_logic:='0';
read_error : out std_logic:='0';
level : out natural range 0 to depth;
empty : out std_logic:='1';
full : out std_logic:='0');
end;
architecture rtl of atahost_dma_fifo is
type state_type is (full_state, empty_state, idle_state);
type reg_type is record
state : state_type;
level : integer range 0 to depth;
aw : integer range 0 to depth;
ar : integer range 0 to depth;
data_o : std_logic_vector(dbits-1 downto 0);
rd : std_logic;
wr : std_logic;
erd : std_logic;
ewr : std_logic;
reset : std_logic;
adr : std_logic_vector(abits-1 downto 0);
end record;
constant RESET_VECTOR : reg_type := (empty_state,0,0,0,
conv_std_logic_vector(0,dbits),'0','0','0','0','0',(others=>'0'));
signal r,ri : reg_type;
signal s_ram_adr : std_logic_vector(abits-1 downto 0);
begin
-- comb:process(write_enable, read_enable, data_in,reset, r) Erik 2007-02-08
comb:process(write_enable, read_enable, reset, r)
variable v : reg_type;
variable vfull, vempty : std_logic;
begin
v:=r;
v.wr:=write_enable; v.rd:=read_enable; v.reset:=reset;
case r.state is
when full_state=>
if write_enable='1' and read_enable='0' and reset='0' then
v.ewr:='1'; v.state:=full_state;
elsif write_enable='0' and read_enable='1' and reset='0' then
v.adr:=conv_std_logic_vector(r.ar,abits);
if r.ar=depth-1 then v.ar:=0; else v.ar:=r.ar+1; end if;
v.level:=r.level-1;
if r.aw=v.ar then v.state:=empty_state;
else v.state:=idle_state; end if;
v.ewr:='0';
end if;
when empty_state=>
if write_enable='1' and read_enable='0' and reset='0' then
v.adr:=conv_std_logic_vector(r.aw,abits);
if r.aw=depth-1 then v.aw:=0; else v.aw:=r.aw+1; end if;
v.level:=r.level+1;
if v.aw=r.ar then v.state:=full_state;
else v.state:=idle_state; end if;
v.erd:='0';
elsif write_enable='0' and read_enable='1' and reset='0' then
v.erd:='1'; v.state:=empty_state;
end if;
when idle_state=>
if write_enable='1' and read_enable='0' and reset='0' then
v.adr:=conv_std_logic_vector(r.aw,abits);
if r.aw=depth-1 then v.aw:=0; else v.aw:=r.aw+1; end if;
v.level:=r.level+1;
if v.level=depth then v.state:=full_state;
else v.state:=idle_state; end if;
elsif write_enable='0' and read_enable='1' and reset='0' then
v.adr:=conv_std_logic_vector(r.ar,abits);
if r.ar=depth-1 then v.ar:=0; else v.ar:=r.ar+1; end if;
v.level:=r.level-1;
if v.level=0 then v.state:=empty_state;
else v.state:=idle_state; end if;
end if;
end case;
if r.level=0 then vempty:='1'; vfull:='0';
elsif r.level=depth then vempty:='0'; vfull:='1';
else vempty:='0'; vfull:='0'; end if;
--reset logic
if (reset='1') then v:=RESET_VECTOR; end if;
ri<=v;
s_ram_adr<=v.adr;
--assigning outport
write_error<=v.ewr; read_error<=v.erd; level<=v.level;
empty<=vempty; full<=vfull;
end process;
ram : syncram
generic map(tech=>tech, abits=>abits, dbits=>dbits)
port map (
clk => clk,
address => s_ram_adr,
datain => data_in,
dataout => data_out,
enable => read_enable,
write => write_enable
);
sync:process(clk) --Activate on clock & reset
begin
if clk'event and clk='1' then r<=ri; end if;
end process;
end; |
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003, Gaisler Research
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: atahost_dma_fifo
-- File: atahost_dma_fifo.vhd
-- Author: Erik Jagre - Gaisler Research
-- Description: Generic FIFO, based on syncram in grlib
-----------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.std_logic_arith.all;
library techmap;
use techmap.gencomp.all;
entity atahost_dma_fifo is
generic(tech : integer:=0; abits : integer:=3;
dbits : integer:=32; depth : integer:=8);
port( clk : in std_logic;
reset : in std_logic;
write_enable : in std_logic;
read_enable : in std_logic;
data_in : in std_logic_vector(dbits-1 downto 0);
data_out : out std_logic_vector(dbits-1 downto 0);
write_error : out std_logic:='0';
read_error : out std_logic:='0';
level : out natural range 0 to depth;
empty : out std_logic:='1';
full : out std_logic:='0');
end;
architecture rtl of atahost_dma_fifo is
type state_type is (full_state, empty_state, idle_state);
type reg_type is record
state : state_type;
level : integer range 0 to depth;
aw : integer range 0 to depth;
ar : integer range 0 to depth;
data_o : std_logic_vector(dbits-1 downto 0);
rd : std_logic;
wr : std_logic;
erd : std_logic;
ewr : std_logic;
reset : std_logic;
adr : std_logic_vector(abits-1 downto 0);
end record;
constant RESET_VECTOR : reg_type := (empty_state,0,0,0,
conv_std_logic_vector(0,dbits),'0','0','0','0','0',(others=>'0'));
signal r,ri : reg_type;
signal s_ram_adr : std_logic_vector(abits-1 downto 0);
begin
-- comb:process(write_enable, read_enable, data_in,reset, r) Erik 2007-02-08
comb:process(write_enable, read_enable, reset, r)
variable v : reg_type;
variable vfull, vempty : std_logic;
begin
v:=r;
v.wr:=write_enable; v.rd:=read_enable; v.reset:=reset;
case r.state is
when full_state=>
if write_enable='1' and read_enable='0' and reset='0' then
v.ewr:='1'; v.state:=full_state;
elsif write_enable='0' and read_enable='1' and reset='0' then
v.adr:=conv_std_logic_vector(r.ar,abits);
if r.ar=depth-1 then v.ar:=0; else v.ar:=r.ar+1; end if;
v.level:=r.level-1;
if r.aw=v.ar then v.state:=empty_state;
else v.state:=idle_state; end if;
v.ewr:='0';
end if;
when empty_state=>
if write_enable='1' and read_enable='0' and reset='0' then
v.adr:=conv_std_logic_vector(r.aw,abits);
if r.aw=depth-1 then v.aw:=0; else v.aw:=r.aw+1; end if;
v.level:=r.level+1;
if v.aw=r.ar then v.state:=full_state;
else v.state:=idle_state; end if;
v.erd:='0';
elsif write_enable='0' and read_enable='1' and reset='0' then
v.erd:='1'; v.state:=empty_state;
end if;
when idle_state=>
if write_enable='1' and read_enable='0' and reset='0' then
v.adr:=conv_std_logic_vector(r.aw,abits);
if r.aw=depth-1 then v.aw:=0; else v.aw:=r.aw+1; end if;
v.level:=r.level+1;
if v.level=depth then v.state:=full_state;
else v.state:=idle_state; end if;
elsif write_enable='0' and read_enable='1' and reset='0' then
v.adr:=conv_std_logic_vector(r.ar,abits);
if r.ar=depth-1 then v.ar:=0; else v.ar:=r.ar+1; end if;
v.level:=r.level-1;
if v.level=0 then v.state:=empty_state;
else v.state:=idle_state; end if;
end if;
end case;
if r.level=0 then vempty:='1'; vfull:='0';
elsif r.level=depth then vempty:='0'; vfull:='1';
else vempty:='0'; vfull:='0'; end if;
--reset logic
if (reset='1') then v:=RESET_VECTOR; end if;
ri<=v;
s_ram_adr<=v.adr;
--assigning outport
write_error<=v.ewr; read_error<=v.erd; level<=v.level;
empty<=vempty; full<=vfull;
end process;
ram : syncram
generic map(tech=>tech, abits=>abits, dbits=>dbits)
port map (
clk => clk,
address => s_ram_adr,
datain => data_in,
dataout => data_out,
enable => read_enable,
write => write_enable
);
sync:process(clk) --Activate on clock & reset
begin
if clk'event and clk='1' then r<=ri; end if;
end process;
end; |
library verilog;
use verilog.vl_types.all;
entity Memory_ShiftOutput is
port(
Mem_data_out : in vl_logic_vector(31 downto 0);
Mem_addr_in : in vl_logic_vector(1 downto 0);
IR : in vl_logic_vector(31 downto 26);
Mem_data_shift : out vl_logic_vector(31 downto 0)
);
end Memory_ShiftOutput;
|
library verilog;
use verilog.vl_types.all;
entity Memory_ShiftOutput is
port(
Mem_data_out : in vl_logic_vector(31 downto 0);
Mem_addr_in : in vl_logic_vector(1 downto 0);
IR : in vl_logic_vector(31 downto 26);
Mem_data_shift : out vl_logic_vector(31 downto 0)
);
end Memory_ShiftOutput;
|
-- Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
-- --------------------------------------------------------------------------------
-- Tool Version: Vivado v.2017.2 (win64) Build 1909853 Thu Jun 15 18:39:09 MDT 2017
-- Date : Wed Sep 20 21:13:47 2017
-- Host : EffulgentTome running 64-bit major release (build 9200)
-- Command : write_vhdl -force -mode funcsim -rename_top zqynq_lab_1_design_auto_pc_3 -prefix
-- zqynq_lab_1_design_auto_pc_3_ zqynq_lab_1_design_auto_pc_3_sim_netlist.vhdl
-- Design : zqynq_lab_1_design_auto_pc_3
-- Purpose : This VHDL netlist is a functional simulation representation of the design and should not be modified or
-- synthesized. This netlist cannot be used for SDF annotated simulation.
-- Device : xc7z020clg484-1
-- --------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter is
port (
aclk : in STD_LOGIC;
aresetn : in STD_LOGIC;
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awregion : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awuser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_awvalid : in STD_LOGIC;
s_axi_awready : out STD_LOGIC;
s_axi_wid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_wdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_wstrb : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_wlast : in STD_LOGIC;
s_axi_wuser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_wvalid : in STD_LOGIC;
s_axi_wready : out STD_LOGIC;
s_axi_bid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_buser : out STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_bvalid : out STD_LOGIC;
s_axi_bready : in STD_LOGIC;
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arregion : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_aruser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_arvalid : in STD_LOGIC;
s_axi_arready : out STD_LOGIC;
s_axi_rid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_rdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_rlast : out STD_LOGIC;
s_axi_ruser : out STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_rvalid : out STD_LOGIC;
s_axi_rready : in STD_LOGIC;
m_axi_awid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_awaddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_awlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_awsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_awlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_awcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awuser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_awvalid : out STD_LOGIC;
m_axi_awready : in STD_LOGIC;
m_axi_wid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_wlast : out STD_LOGIC;
m_axi_wuser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_wvalid : out STD_LOGIC;
m_axi_wready : in STD_LOGIC;
m_axi_bid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_buser : in STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_bvalid : in STD_LOGIC;
m_axi_bready : out STD_LOGIC;
m_axi_arid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_araddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_arlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_arsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_arlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_aruser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arvalid : out STD_LOGIC;
m_axi_arready : in STD_LOGIC;
m_axi_rid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_rlast : in STD_LOGIC;
m_axi_ruser : in STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_rvalid : in STD_LOGIC;
m_axi_rready : out STD_LOGIC
);
attribute C_AXI_ADDR_WIDTH : integer;
attribute C_AXI_ADDR_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 32;
attribute C_AXI_ARUSER_WIDTH : integer;
attribute C_AXI_ARUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_AWUSER_WIDTH : integer;
attribute C_AXI_AWUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_BUSER_WIDTH : integer;
attribute C_AXI_BUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_DATA_WIDTH : integer;
attribute C_AXI_DATA_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 32;
attribute C_AXI_ID_WIDTH : integer;
attribute C_AXI_ID_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 12;
attribute C_AXI_RUSER_WIDTH : integer;
attribute C_AXI_RUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_SUPPORTS_READ : integer;
attribute C_AXI_SUPPORTS_READ of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_SUPPORTS_USER_SIGNALS : integer;
attribute C_AXI_SUPPORTS_USER_SIGNALS of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 0;
attribute C_AXI_SUPPORTS_WRITE : integer;
attribute C_AXI_SUPPORTS_WRITE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_WUSER_WIDTH : integer;
attribute C_AXI_WUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_FAMILY : string;
attribute C_FAMILY of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "zynq";
attribute C_IGNORE_ID : integer;
attribute C_IGNORE_ID of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 0;
attribute C_M_AXI_PROTOCOL : integer;
attribute C_M_AXI_PROTOCOL of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 0;
attribute C_S_AXI_PROTOCOL : integer;
attribute C_S_AXI_PROTOCOL of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_TRANSLATION_MODE : integer;
attribute C_TRANSLATION_MODE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 2;
attribute DowngradeIPIdentifiedWarnings : string;
attribute DowngradeIPIdentifiedWarnings of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "yes";
attribute P_AXI3 : integer;
attribute P_AXI3 of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute P_AXI4 : integer;
attribute P_AXI4 of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 0;
attribute P_AXILITE : integer;
attribute P_AXILITE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 2;
attribute P_AXILITE_SIZE : string;
attribute P_AXILITE_SIZE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "3'b010";
attribute P_CONVERSION : integer;
attribute P_CONVERSION of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 2;
attribute P_DECERR : string;
attribute P_DECERR of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "2'b11";
attribute P_INCR : string;
attribute P_INCR of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "2'b01";
attribute P_PROTECTION : integer;
attribute P_PROTECTION of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute P_SLVERR : string;
attribute P_SLVERR of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "2'b10";
end zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter;
architecture STRUCTURE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter is
signal \<const0>\ : STD_LOGIC;
signal \^m_axi_arready\ : STD_LOGIC;
signal \^m_axi_awready\ : STD_LOGIC;
signal \^m_axi_bid\ : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^m_axi_bresp\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^m_axi_buser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^m_axi_bvalid\ : STD_LOGIC;
signal \^m_axi_rdata\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^m_axi_rid\ : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^m_axi_rlast\ : STD_LOGIC;
signal \^m_axi_rresp\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^m_axi_ruser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^m_axi_rvalid\ : STD_LOGIC;
signal \^m_axi_wready\ : STD_LOGIC;
signal \^s_axi_araddr\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^s_axi_arburst\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^s_axi_arcache\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_arid\ : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^s_axi_arlen\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_arlock\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^s_axi_arprot\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \^s_axi_arqos\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_arsize\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \^s_axi_aruser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^s_axi_arvalid\ : STD_LOGIC;
signal \^s_axi_awaddr\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^s_axi_awburst\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^s_axi_awcache\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_awid\ : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^s_axi_awlen\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_awlock\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^s_axi_awprot\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \^s_axi_awqos\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_awsize\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \^s_axi_awuser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^s_axi_awvalid\ : STD_LOGIC;
signal \^s_axi_bready\ : STD_LOGIC;
signal \^s_axi_rready\ : STD_LOGIC;
signal \^s_axi_wdata\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^s_axi_wlast\ : STD_LOGIC;
signal \^s_axi_wstrb\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_wuser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^s_axi_wvalid\ : STD_LOGIC;
begin
\^m_axi_arready\ <= m_axi_arready;
\^m_axi_awready\ <= m_axi_awready;
\^m_axi_bid\(11 downto 0) <= m_axi_bid(11 downto 0);
\^m_axi_bresp\(1 downto 0) <= m_axi_bresp(1 downto 0);
\^m_axi_buser\(0) <= m_axi_buser(0);
\^m_axi_bvalid\ <= m_axi_bvalid;
\^m_axi_rdata\(31 downto 0) <= m_axi_rdata(31 downto 0);
\^m_axi_rid\(11 downto 0) <= m_axi_rid(11 downto 0);
\^m_axi_rlast\ <= m_axi_rlast;
\^m_axi_rresp\(1 downto 0) <= m_axi_rresp(1 downto 0);
\^m_axi_ruser\(0) <= m_axi_ruser(0);
\^m_axi_rvalid\ <= m_axi_rvalid;
\^m_axi_wready\ <= m_axi_wready;
\^s_axi_araddr\(31 downto 0) <= s_axi_araddr(31 downto 0);
\^s_axi_arburst\(1 downto 0) <= s_axi_arburst(1 downto 0);
\^s_axi_arcache\(3 downto 0) <= s_axi_arcache(3 downto 0);
\^s_axi_arid\(11 downto 0) <= s_axi_arid(11 downto 0);
\^s_axi_arlen\(3 downto 0) <= s_axi_arlen(3 downto 0);
\^s_axi_arlock\(0) <= s_axi_arlock(0);
\^s_axi_arprot\(2 downto 0) <= s_axi_arprot(2 downto 0);
\^s_axi_arqos\(3 downto 0) <= s_axi_arqos(3 downto 0);
\^s_axi_arsize\(2 downto 0) <= s_axi_arsize(2 downto 0);
\^s_axi_aruser\(0) <= s_axi_aruser(0);
\^s_axi_arvalid\ <= s_axi_arvalid;
\^s_axi_awaddr\(31 downto 0) <= s_axi_awaddr(31 downto 0);
\^s_axi_awburst\(1 downto 0) <= s_axi_awburst(1 downto 0);
\^s_axi_awcache\(3 downto 0) <= s_axi_awcache(3 downto 0);
\^s_axi_awid\(11 downto 0) <= s_axi_awid(11 downto 0);
\^s_axi_awlen\(3 downto 0) <= s_axi_awlen(3 downto 0);
\^s_axi_awlock\(0) <= s_axi_awlock(0);
\^s_axi_awprot\(2 downto 0) <= s_axi_awprot(2 downto 0);
\^s_axi_awqos\(3 downto 0) <= s_axi_awqos(3 downto 0);
\^s_axi_awsize\(2 downto 0) <= s_axi_awsize(2 downto 0);
\^s_axi_awuser\(0) <= s_axi_awuser(0);
\^s_axi_awvalid\ <= s_axi_awvalid;
\^s_axi_bready\ <= s_axi_bready;
\^s_axi_rready\ <= s_axi_rready;
\^s_axi_wdata\(31 downto 0) <= s_axi_wdata(31 downto 0);
\^s_axi_wlast\ <= s_axi_wlast;
\^s_axi_wstrb\(3 downto 0) <= s_axi_wstrb(3 downto 0);
\^s_axi_wuser\(0) <= s_axi_wuser(0);
\^s_axi_wvalid\ <= s_axi_wvalid;
m_axi_araddr(31 downto 0) <= \^s_axi_araddr\(31 downto 0);
m_axi_arburst(1 downto 0) <= \^s_axi_arburst\(1 downto 0);
m_axi_arcache(3 downto 0) <= \^s_axi_arcache\(3 downto 0);
m_axi_arid(11 downto 0) <= \^s_axi_arid\(11 downto 0);
m_axi_arlen(7) <= \<const0>\;
m_axi_arlen(6) <= \<const0>\;
m_axi_arlen(5) <= \<const0>\;
m_axi_arlen(4) <= \<const0>\;
m_axi_arlen(3 downto 0) <= \^s_axi_arlen\(3 downto 0);
m_axi_arlock(0) <= \^s_axi_arlock\(0);
m_axi_arprot(2 downto 0) <= \^s_axi_arprot\(2 downto 0);
m_axi_arqos(3 downto 0) <= \^s_axi_arqos\(3 downto 0);
m_axi_arregion(3) <= \<const0>\;
m_axi_arregion(2) <= \<const0>\;
m_axi_arregion(1) <= \<const0>\;
m_axi_arregion(0) <= \<const0>\;
m_axi_arsize(2 downto 0) <= \^s_axi_arsize\(2 downto 0);
m_axi_aruser(0) <= \^s_axi_aruser\(0);
m_axi_arvalid <= \^s_axi_arvalid\;
m_axi_awaddr(31 downto 0) <= \^s_axi_awaddr\(31 downto 0);
m_axi_awburst(1 downto 0) <= \^s_axi_awburst\(1 downto 0);
m_axi_awcache(3 downto 0) <= \^s_axi_awcache\(3 downto 0);
m_axi_awid(11 downto 0) <= \^s_axi_awid\(11 downto 0);
m_axi_awlen(7) <= \<const0>\;
m_axi_awlen(6) <= \<const0>\;
m_axi_awlen(5) <= \<const0>\;
m_axi_awlen(4) <= \<const0>\;
m_axi_awlen(3 downto 0) <= \^s_axi_awlen\(3 downto 0);
m_axi_awlock(0) <= \^s_axi_awlock\(0);
m_axi_awprot(2 downto 0) <= \^s_axi_awprot\(2 downto 0);
m_axi_awqos(3 downto 0) <= \^s_axi_awqos\(3 downto 0);
m_axi_awregion(3) <= \<const0>\;
m_axi_awregion(2) <= \<const0>\;
m_axi_awregion(1) <= \<const0>\;
m_axi_awregion(0) <= \<const0>\;
m_axi_awsize(2 downto 0) <= \^s_axi_awsize\(2 downto 0);
m_axi_awuser(0) <= \^s_axi_awuser\(0);
m_axi_awvalid <= \^s_axi_awvalid\;
m_axi_bready <= \^s_axi_bready\;
m_axi_rready <= \^s_axi_rready\;
m_axi_wdata(31 downto 0) <= \^s_axi_wdata\(31 downto 0);
m_axi_wid(11) <= \<const0>\;
m_axi_wid(10) <= \<const0>\;
m_axi_wid(9) <= \<const0>\;
m_axi_wid(8) <= \<const0>\;
m_axi_wid(7) <= \<const0>\;
m_axi_wid(6) <= \<const0>\;
m_axi_wid(5) <= \<const0>\;
m_axi_wid(4) <= \<const0>\;
m_axi_wid(3) <= \<const0>\;
m_axi_wid(2) <= \<const0>\;
m_axi_wid(1) <= \<const0>\;
m_axi_wid(0) <= \<const0>\;
m_axi_wlast <= \^s_axi_wlast\;
m_axi_wstrb(3 downto 0) <= \^s_axi_wstrb\(3 downto 0);
m_axi_wuser(0) <= \^s_axi_wuser\(0);
m_axi_wvalid <= \^s_axi_wvalid\;
s_axi_arready <= \^m_axi_arready\;
s_axi_awready <= \^m_axi_awready\;
s_axi_bid(11 downto 0) <= \^m_axi_bid\(11 downto 0);
s_axi_bresp(1 downto 0) <= \^m_axi_bresp\(1 downto 0);
s_axi_buser(0) <= \^m_axi_buser\(0);
s_axi_bvalid <= \^m_axi_bvalid\;
s_axi_rdata(31 downto 0) <= \^m_axi_rdata\(31 downto 0);
s_axi_rid(11 downto 0) <= \^m_axi_rid\(11 downto 0);
s_axi_rlast <= \^m_axi_rlast\;
s_axi_rresp(1 downto 0) <= \^m_axi_rresp\(1 downto 0);
s_axi_ruser(0) <= \^m_axi_ruser\(0);
s_axi_rvalid <= \^m_axi_rvalid\;
s_axi_wready <= \^m_axi_wready\;
GND: unisim.vcomponents.GND
port map (
G => \<const0>\
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity zqynq_lab_1_design_auto_pc_3 is
port (
aclk : in STD_LOGIC;
aresetn : in STD_LOGIC;
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awvalid : in STD_LOGIC;
s_axi_awready : out STD_LOGIC;
s_axi_wid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_wdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_wstrb : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_wlast : in STD_LOGIC;
s_axi_wvalid : in STD_LOGIC;
s_axi_wready : out STD_LOGIC;
s_axi_bid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_bvalid : out STD_LOGIC;
s_axi_bready : in STD_LOGIC;
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arvalid : in STD_LOGIC;
s_axi_arready : out STD_LOGIC;
s_axi_rid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_rdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_rlast : out STD_LOGIC;
s_axi_rvalid : out STD_LOGIC;
s_axi_rready : in STD_LOGIC;
m_axi_awid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_awaddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_awlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_awsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_awlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_awcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awvalid : out STD_LOGIC;
m_axi_awready : in STD_LOGIC;
m_axi_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_wlast : out STD_LOGIC;
m_axi_wvalid : out STD_LOGIC;
m_axi_wready : in STD_LOGIC;
m_axi_bid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_bvalid : in STD_LOGIC;
m_axi_bready : out STD_LOGIC;
m_axi_arid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_araddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_arlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_arsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_arlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arvalid : out STD_LOGIC;
m_axi_arready : in STD_LOGIC;
m_axi_rid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_rlast : in STD_LOGIC;
m_axi_rvalid : in STD_LOGIC;
m_axi_rready : out STD_LOGIC
);
attribute NotValidForBitStream : boolean;
attribute NotValidForBitStream of zqynq_lab_1_design_auto_pc_3 : entity is true;
attribute CHECK_LICENSE_TYPE : string;
attribute CHECK_LICENSE_TYPE of zqynq_lab_1_design_auto_pc_3 : entity is "zqynq_lab_1_design_auto_pc_3,axi_protocol_converter_v2_1_13_axi_protocol_converter,{}";
attribute DowngradeIPIdentifiedWarnings : string;
attribute DowngradeIPIdentifiedWarnings of zqynq_lab_1_design_auto_pc_3 : entity is "yes";
attribute X_CORE_INFO : string;
attribute X_CORE_INFO of zqynq_lab_1_design_auto_pc_3 : entity is "axi_protocol_converter_v2_1_13_axi_protocol_converter,Vivado 2017.2";
end zqynq_lab_1_design_auto_pc_3;
architecture STRUCTURE of zqynq_lab_1_design_auto_pc_3 is
signal NLW_inst_m_axi_aruser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_m_axi_awuser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_m_axi_wid_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
signal NLW_inst_m_axi_wuser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_s_axi_buser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_s_axi_ruser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
attribute C_AXI_ADDR_WIDTH : integer;
attribute C_AXI_ADDR_WIDTH of inst : label is 32;
attribute C_AXI_ARUSER_WIDTH : integer;
attribute C_AXI_ARUSER_WIDTH of inst : label is 1;
attribute C_AXI_AWUSER_WIDTH : integer;
attribute C_AXI_AWUSER_WIDTH of inst : label is 1;
attribute C_AXI_BUSER_WIDTH : integer;
attribute C_AXI_BUSER_WIDTH of inst : label is 1;
attribute C_AXI_DATA_WIDTH : integer;
attribute C_AXI_DATA_WIDTH of inst : label is 32;
attribute C_AXI_ID_WIDTH : integer;
attribute C_AXI_ID_WIDTH of inst : label is 12;
attribute C_AXI_RUSER_WIDTH : integer;
attribute C_AXI_RUSER_WIDTH of inst : label is 1;
attribute C_AXI_SUPPORTS_READ : integer;
attribute C_AXI_SUPPORTS_READ of inst : label is 1;
attribute C_AXI_SUPPORTS_USER_SIGNALS : integer;
attribute C_AXI_SUPPORTS_USER_SIGNALS of inst : label is 0;
attribute C_AXI_SUPPORTS_WRITE : integer;
attribute C_AXI_SUPPORTS_WRITE of inst : label is 1;
attribute C_AXI_WUSER_WIDTH : integer;
attribute C_AXI_WUSER_WIDTH of inst : label is 1;
attribute C_FAMILY : string;
attribute C_FAMILY of inst : label is "zynq";
attribute C_IGNORE_ID : integer;
attribute C_IGNORE_ID of inst : label is 0;
attribute C_M_AXI_PROTOCOL : integer;
attribute C_M_AXI_PROTOCOL of inst : label is 0;
attribute C_S_AXI_PROTOCOL : integer;
attribute C_S_AXI_PROTOCOL of inst : label is 1;
attribute C_TRANSLATION_MODE : integer;
attribute C_TRANSLATION_MODE of inst : label is 2;
attribute DowngradeIPIdentifiedWarnings of inst : label is "yes";
attribute P_AXI3 : integer;
attribute P_AXI3 of inst : label is 1;
attribute P_AXI4 : integer;
attribute P_AXI4 of inst : label is 0;
attribute P_AXILITE : integer;
attribute P_AXILITE of inst : label is 2;
attribute P_AXILITE_SIZE : string;
attribute P_AXILITE_SIZE of inst : label is "3'b010";
attribute P_CONVERSION : integer;
attribute P_CONVERSION of inst : label is 2;
attribute P_DECERR : string;
attribute P_DECERR of inst : label is "2'b11";
attribute P_INCR : string;
attribute P_INCR of inst : label is "2'b01";
attribute P_PROTECTION : integer;
attribute P_PROTECTION of inst : label is 1;
attribute P_SLVERR : string;
attribute P_SLVERR of inst : label is "2'b10";
begin
inst: entity work.zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter
port map (
aclk => aclk,
aresetn => aresetn,
m_axi_araddr(31 downto 0) => m_axi_araddr(31 downto 0),
m_axi_arburst(1 downto 0) => m_axi_arburst(1 downto 0),
m_axi_arcache(3 downto 0) => m_axi_arcache(3 downto 0),
m_axi_arid(11 downto 0) => m_axi_arid(11 downto 0),
m_axi_arlen(7 downto 0) => m_axi_arlen(7 downto 0),
m_axi_arlock(0) => m_axi_arlock(0),
m_axi_arprot(2 downto 0) => m_axi_arprot(2 downto 0),
m_axi_arqos(3 downto 0) => m_axi_arqos(3 downto 0),
m_axi_arready => m_axi_arready,
m_axi_arregion(3 downto 0) => m_axi_arregion(3 downto 0),
m_axi_arsize(2 downto 0) => m_axi_arsize(2 downto 0),
m_axi_aruser(0) => NLW_inst_m_axi_aruser_UNCONNECTED(0),
m_axi_arvalid => m_axi_arvalid,
m_axi_awaddr(31 downto 0) => m_axi_awaddr(31 downto 0),
m_axi_awburst(1 downto 0) => m_axi_awburst(1 downto 0),
m_axi_awcache(3 downto 0) => m_axi_awcache(3 downto 0),
m_axi_awid(11 downto 0) => m_axi_awid(11 downto 0),
m_axi_awlen(7 downto 0) => m_axi_awlen(7 downto 0),
m_axi_awlock(0) => m_axi_awlock(0),
m_axi_awprot(2 downto 0) => m_axi_awprot(2 downto 0),
m_axi_awqos(3 downto 0) => m_axi_awqos(3 downto 0),
m_axi_awready => m_axi_awready,
m_axi_awregion(3 downto 0) => m_axi_awregion(3 downto 0),
m_axi_awsize(2 downto 0) => m_axi_awsize(2 downto 0),
m_axi_awuser(0) => NLW_inst_m_axi_awuser_UNCONNECTED(0),
m_axi_awvalid => m_axi_awvalid,
m_axi_bid(11 downto 0) => m_axi_bid(11 downto 0),
m_axi_bready => m_axi_bready,
m_axi_bresp(1 downto 0) => m_axi_bresp(1 downto 0),
m_axi_buser(0) => '0',
m_axi_bvalid => m_axi_bvalid,
m_axi_rdata(31 downto 0) => m_axi_rdata(31 downto 0),
m_axi_rid(11 downto 0) => m_axi_rid(11 downto 0),
m_axi_rlast => m_axi_rlast,
m_axi_rready => m_axi_rready,
m_axi_rresp(1 downto 0) => m_axi_rresp(1 downto 0),
m_axi_ruser(0) => '0',
m_axi_rvalid => m_axi_rvalid,
m_axi_wdata(31 downto 0) => m_axi_wdata(31 downto 0),
m_axi_wid(11 downto 0) => NLW_inst_m_axi_wid_UNCONNECTED(11 downto 0),
m_axi_wlast => m_axi_wlast,
m_axi_wready => m_axi_wready,
m_axi_wstrb(3 downto 0) => m_axi_wstrb(3 downto 0),
m_axi_wuser(0) => NLW_inst_m_axi_wuser_UNCONNECTED(0),
m_axi_wvalid => m_axi_wvalid,
s_axi_araddr(31 downto 0) => s_axi_araddr(31 downto 0),
s_axi_arburst(1 downto 0) => s_axi_arburst(1 downto 0),
s_axi_arcache(3 downto 0) => s_axi_arcache(3 downto 0),
s_axi_arid(11 downto 0) => s_axi_arid(11 downto 0),
s_axi_arlen(3 downto 0) => s_axi_arlen(3 downto 0),
s_axi_arlock(1 downto 0) => s_axi_arlock(1 downto 0),
s_axi_arprot(2 downto 0) => s_axi_arprot(2 downto 0),
s_axi_arqos(3 downto 0) => s_axi_arqos(3 downto 0),
s_axi_arready => s_axi_arready,
s_axi_arregion(3 downto 0) => B"0000",
s_axi_arsize(2 downto 0) => s_axi_arsize(2 downto 0),
s_axi_aruser(0) => '0',
s_axi_arvalid => s_axi_arvalid,
s_axi_awaddr(31 downto 0) => s_axi_awaddr(31 downto 0),
s_axi_awburst(1 downto 0) => s_axi_awburst(1 downto 0),
s_axi_awcache(3 downto 0) => s_axi_awcache(3 downto 0),
s_axi_awid(11 downto 0) => s_axi_awid(11 downto 0),
s_axi_awlen(3 downto 0) => s_axi_awlen(3 downto 0),
s_axi_awlock(1 downto 0) => s_axi_awlock(1 downto 0),
s_axi_awprot(2 downto 0) => s_axi_awprot(2 downto 0),
s_axi_awqos(3 downto 0) => s_axi_awqos(3 downto 0),
s_axi_awready => s_axi_awready,
s_axi_awregion(3 downto 0) => B"0000",
s_axi_awsize(2 downto 0) => s_axi_awsize(2 downto 0),
s_axi_awuser(0) => '0',
s_axi_awvalid => s_axi_awvalid,
s_axi_bid(11 downto 0) => s_axi_bid(11 downto 0),
s_axi_bready => s_axi_bready,
s_axi_bresp(1 downto 0) => s_axi_bresp(1 downto 0),
s_axi_buser(0) => NLW_inst_s_axi_buser_UNCONNECTED(0),
s_axi_bvalid => s_axi_bvalid,
s_axi_rdata(31 downto 0) => s_axi_rdata(31 downto 0),
s_axi_rid(11 downto 0) => s_axi_rid(11 downto 0),
s_axi_rlast => s_axi_rlast,
s_axi_rready => s_axi_rready,
s_axi_rresp(1 downto 0) => s_axi_rresp(1 downto 0),
s_axi_ruser(0) => NLW_inst_s_axi_ruser_UNCONNECTED(0),
s_axi_rvalid => s_axi_rvalid,
s_axi_wdata(31 downto 0) => s_axi_wdata(31 downto 0),
s_axi_wid(11 downto 0) => s_axi_wid(11 downto 0),
s_axi_wlast => s_axi_wlast,
s_axi_wready => s_axi_wready,
s_axi_wstrb(3 downto 0) => s_axi_wstrb(3 downto 0),
s_axi_wuser(0) => '0',
s_axi_wvalid => s_axi_wvalid
);
end STRUCTURE;
|
-- Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
-- --------------------------------------------------------------------------------
-- Tool Version: Vivado v.2017.2 (win64) Build 1909853 Thu Jun 15 18:39:09 MDT 2017
-- Date : Wed Sep 20 21:13:47 2017
-- Host : EffulgentTome running 64-bit major release (build 9200)
-- Command : write_vhdl -force -mode funcsim -rename_top zqynq_lab_1_design_auto_pc_3 -prefix
-- zqynq_lab_1_design_auto_pc_3_ zqynq_lab_1_design_auto_pc_3_sim_netlist.vhdl
-- Design : zqynq_lab_1_design_auto_pc_3
-- Purpose : This VHDL netlist is a functional simulation representation of the design and should not be modified or
-- synthesized. This netlist cannot be used for SDF annotated simulation.
-- Device : xc7z020clg484-1
-- --------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter is
port (
aclk : in STD_LOGIC;
aresetn : in STD_LOGIC;
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awregion : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awuser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_awvalid : in STD_LOGIC;
s_axi_awready : out STD_LOGIC;
s_axi_wid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_wdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_wstrb : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_wlast : in STD_LOGIC;
s_axi_wuser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_wvalid : in STD_LOGIC;
s_axi_wready : out STD_LOGIC;
s_axi_bid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_buser : out STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_bvalid : out STD_LOGIC;
s_axi_bready : in STD_LOGIC;
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arregion : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_aruser : in STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_arvalid : in STD_LOGIC;
s_axi_arready : out STD_LOGIC;
s_axi_rid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_rdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_rlast : out STD_LOGIC;
s_axi_ruser : out STD_LOGIC_VECTOR ( 0 to 0 );
s_axi_rvalid : out STD_LOGIC;
s_axi_rready : in STD_LOGIC;
m_axi_awid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_awaddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_awlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_awsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_awlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_awcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awuser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_awvalid : out STD_LOGIC;
m_axi_awready : in STD_LOGIC;
m_axi_wid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_wlast : out STD_LOGIC;
m_axi_wuser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_wvalid : out STD_LOGIC;
m_axi_wready : in STD_LOGIC;
m_axi_bid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_buser : in STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_bvalid : in STD_LOGIC;
m_axi_bready : out STD_LOGIC;
m_axi_arid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_araddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_arlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_arsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_arlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_aruser : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arvalid : out STD_LOGIC;
m_axi_arready : in STD_LOGIC;
m_axi_rid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_rlast : in STD_LOGIC;
m_axi_ruser : in STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_rvalid : in STD_LOGIC;
m_axi_rready : out STD_LOGIC
);
attribute C_AXI_ADDR_WIDTH : integer;
attribute C_AXI_ADDR_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 32;
attribute C_AXI_ARUSER_WIDTH : integer;
attribute C_AXI_ARUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_AWUSER_WIDTH : integer;
attribute C_AXI_AWUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_BUSER_WIDTH : integer;
attribute C_AXI_BUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_DATA_WIDTH : integer;
attribute C_AXI_DATA_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 32;
attribute C_AXI_ID_WIDTH : integer;
attribute C_AXI_ID_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 12;
attribute C_AXI_RUSER_WIDTH : integer;
attribute C_AXI_RUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_SUPPORTS_READ : integer;
attribute C_AXI_SUPPORTS_READ of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_SUPPORTS_USER_SIGNALS : integer;
attribute C_AXI_SUPPORTS_USER_SIGNALS of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 0;
attribute C_AXI_SUPPORTS_WRITE : integer;
attribute C_AXI_SUPPORTS_WRITE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_AXI_WUSER_WIDTH : integer;
attribute C_AXI_WUSER_WIDTH of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_FAMILY : string;
attribute C_FAMILY of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "zynq";
attribute C_IGNORE_ID : integer;
attribute C_IGNORE_ID of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 0;
attribute C_M_AXI_PROTOCOL : integer;
attribute C_M_AXI_PROTOCOL of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 0;
attribute C_S_AXI_PROTOCOL : integer;
attribute C_S_AXI_PROTOCOL of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute C_TRANSLATION_MODE : integer;
attribute C_TRANSLATION_MODE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 2;
attribute DowngradeIPIdentifiedWarnings : string;
attribute DowngradeIPIdentifiedWarnings of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "yes";
attribute P_AXI3 : integer;
attribute P_AXI3 of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute P_AXI4 : integer;
attribute P_AXI4 of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 0;
attribute P_AXILITE : integer;
attribute P_AXILITE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 2;
attribute P_AXILITE_SIZE : string;
attribute P_AXILITE_SIZE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "3'b010";
attribute P_CONVERSION : integer;
attribute P_CONVERSION of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 2;
attribute P_DECERR : string;
attribute P_DECERR of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "2'b11";
attribute P_INCR : string;
attribute P_INCR of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "2'b01";
attribute P_PROTECTION : integer;
attribute P_PROTECTION of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is 1;
attribute P_SLVERR : string;
attribute P_SLVERR of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter : entity is "2'b10";
end zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter;
architecture STRUCTURE of zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter is
signal \<const0>\ : STD_LOGIC;
signal \^m_axi_arready\ : STD_LOGIC;
signal \^m_axi_awready\ : STD_LOGIC;
signal \^m_axi_bid\ : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^m_axi_bresp\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^m_axi_buser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^m_axi_bvalid\ : STD_LOGIC;
signal \^m_axi_rdata\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^m_axi_rid\ : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^m_axi_rlast\ : STD_LOGIC;
signal \^m_axi_rresp\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^m_axi_ruser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^m_axi_rvalid\ : STD_LOGIC;
signal \^m_axi_wready\ : STD_LOGIC;
signal \^s_axi_araddr\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^s_axi_arburst\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^s_axi_arcache\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_arid\ : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^s_axi_arlen\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_arlock\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^s_axi_arprot\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \^s_axi_arqos\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_arsize\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \^s_axi_aruser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^s_axi_arvalid\ : STD_LOGIC;
signal \^s_axi_awaddr\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^s_axi_awburst\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^s_axi_awcache\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_awid\ : STD_LOGIC_VECTOR ( 11 downto 0 );
signal \^s_axi_awlen\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_awlock\ : STD_LOGIC_VECTOR ( 1 downto 0 );
signal \^s_axi_awprot\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \^s_axi_awqos\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_awsize\ : STD_LOGIC_VECTOR ( 2 downto 0 );
signal \^s_axi_awuser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^s_axi_awvalid\ : STD_LOGIC;
signal \^s_axi_bready\ : STD_LOGIC;
signal \^s_axi_rready\ : STD_LOGIC;
signal \^s_axi_wdata\ : STD_LOGIC_VECTOR ( 31 downto 0 );
signal \^s_axi_wlast\ : STD_LOGIC;
signal \^s_axi_wstrb\ : STD_LOGIC_VECTOR ( 3 downto 0 );
signal \^s_axi_wuser\ : STD_LOGIC_VECTOR ( 0 to 0 );
signal \^s_axi_wvalid\ : STD_LOGIC;
begin
\^m_axi_arready\ <= m_axi_arready;
\^m_axi_awready\ <= m_axi_awready;
\^m_axi_bid\(11 downto 0) <= m_axi_bid(11 downto 0);
\^m_axi_bresp\(1 downto 0) <= m_axi_bresp(1 downto 0);
\^m_axi_buser\(0) <= m_axi_buser(0);
\^m_axi_bvalid\ <= m_axi_bvalid;
\^m_axi_rdata\(31 downto 0) <= m_axi_rdata(31 downto 0);
\^m_axi_rid\(11 downto 0) <= m_axi_rid(11 downto 0);
\^m_axi_rlast\ <= m_axi_rlast;
\^m_axi_rresp\(1 downto 0) <= m_axi_rresp(1 downto 0);
\^m_axi_ruser\(0) <= m_axi_ruser(0);
\^m_axi_rvalid\ <= m_axi_rvalid;
\^m_axi_wready\ <= m_axi_wready;
\^s_axi_araddr\(31 downto 0) <= s_axi_araddr(31 downto 0);
\^s_axi_arburst\(1 downto 0) <= s_axi_arburst(1 downto 0);
\^s_axi_arcache\(3 downto 0) <= s_axi_arcache(3 downto 0);
\^s_axi_arid\(11 downto 0) <= s_axi_arid(11 downto 0);
\^s_axi_arlen\(3 downto 0) <= s_axi_arlen(3 downto 0);
\^s_axi_arlock\(0) <= s_axi_arlock(0);
\^s_axi_arprot\(2 downto 0) <= s_axi_arprot(2 downto 0);
\^s_axi_arqos\(3 downto 0) <= s_axi_arqos(3 downto 0);
\^s_axi_arsize\(2 downto 0) <= s_axi_arsize(2 downto 0);
\^s_axi_aruser\(0) <= s_axi_aruser(0);
\^s_axi_arvalid\ <= s_axi_arvalid;
\^s_axi_awaddr\(31 downto 0) <= s_axi_awaddr(31 downto 0);
\^s_axi_awburst\(1 downto 0) <= s_axi_awburst(1 downto 0);
\^s_axi_awcache\(3 downto 0) <= s_axi_awcache(3 downto 0);
\^s_axi_awid\(11 downto 0) <= s_axi_awid(11 downto 0);
\^s_axi_awlen\(3 downto 0) <= s_axi_awlen(3 downto 0);
\^s_axi_awlock\(0) <= s_axi_awlock(0);
\^s_axi_awprot\(2 downto 0) <= s_axi_awprot(2 downto 0);
\^s_axi_awqos\(3 downto 0) <= s_axi_awqos(3 downto 0);
\^s_axi_awsize\(2 downto 0) <= s_axi_awsize(2 downto 0);
\^s_axi_awuser\(0) <= s_axi_awuser(0);
\^s_axi_awvalid\ <= s_axi_awvalid;
\^s_axi_bready\ <= s_axi_bready;
\^s_axi_rready\ <= s_axi_rready;
\^s_axi_wdata\(31 downto 0) <= s_axi_wdata(31 downto 0);
\^s_axi_wlast\ <= s_axi_wlast;
\^s_axi_wstrb\(3 downto 0) <= s_axi_wstrb(3 downto 0);
\^s_axi_wuser\(0) <= s_axi_wuser(0);
\^s_axi_wvalid\ <= s_axi_wvalid;
m_axi_araddr(31 downto 0) <= \^s_axi_araddr\(31 downto 0);
m_axi_arburst(1 downto 0) <= \^s_axi_arburst\(1 downto 0);
m_axi_arcache(3 downto 0) <= \^s_axi_arcache\(3 downto 0);
m_axi_arid(11 downto 0) <= \^s_axi_arid\(11 downto 0);
m_axi_arlen(7) <= \<const0>\;
m_axi_arlen(6) <= \<const0>\;
m_axi_arlen(5) <= \<const0>\;
m_axi_arlen(4) <= \<const0>\;
m_axi_arlen(3 downto 0) <= \^s_axi_arlen\(3 downto 0);
m_axi_arlock(0) <= \^s_axi_arlock\(0);
m_axi_arprot(2 downto 0) <= \^s_axi_arprot\(2 downto 0);
m_axi_arqos(3 downto 0) <= \^s_axi_arqos\(3 downto 0);
m_axi_arregion(3) <= \<const0>\;
m_axi_arregion(2) <= \<const0>\;
m_axi_arregion(1) <= \<const0>\;
m_axi_arregion(0) <= \<const0>\;
m_axi_arsize(2 downto 0) <= \^s_axi_arsize\(2 downto 0);
m_axi_aruser(0) <= \^s_axi_aruser\(0);
m_axi_arvalid <= \^s_axi_arvalid\;
m_axi_awaddr(31 downto 0) <= \^s_axi_awaddr\(31 downto 0);
m_axi_awburst(1 downto 0) <= \^s_axi_awburst\(1 downto 0);
m_axi_awcache(3 downto 0) <= \^s_axi_awcache\(3 downto 0);
m_axi_awid(11 downto 0) <= \^s_axi_awid\(11 downto 0);
m_axi_awlen(7) <= \<const0>\;
m_axi_awlen(6) <= \<const0>\;
m_axi_awlen(5) <= \<const0>\;
m_axi_awlen(4) <= \<const0>\;
m_axi_awlen(3 downto 0) <= \^s_axi_awlen\(3 downto 0);
m_axi_awlock(0) <= \^s_axi_awlock\(0);
m_axi_awprot(2 downto 0) <= \^s_axi_awprot\(2 downto 0);
m_axi_awqos(3 downto 0) <= \^s_axi_awqos\(3 downto 0);
m_axi_awregion(3) <= \<const0>\;
m_axi_awregion(2) <= \<const0>\;
m_axi_awregion(1) <= \<const0>\;
m_axi_awregion(0) <= \<const0>\;
m_axi_awsize(2 downto 0) <= \^s_axi_awsize\(2 downto 0);
m_axi_awuser(0) <= \^s_axi_awuser\(0);
m_axi_awvalid <= \^s_axi_awvalid\;
m_axi_bready <= \^s_axi_bready\;
m_axi_rready <= \^s_axi_rready\;
m_axi_wdata(31 downto 0) <= \^s_axi_wdata\(31 downto 0);
m_axi_wid(11) <= \<const0>\;
m_axi_wid(10) <= \<const0>\;
m_axi_wid(9) <= \<const0>\;
m_axi_wid(8) <= \<const0>\;
m_axi_wid(7) <= \<const0>\;
m_axi_wid(6) <= \<const0>\;
m_axi_wid(5) <= \<const0>\;
m_axi_wid(4) <= \<const0>\;
m_axi_wid(3) <= \<const0>\;
m_axi_wid(2) <= \<const0>\;
m_axi_wid(1) <= \<const0>\;
m_axi_wid(0) <= \<const0>\;
m_axi_wlast <= \^s_axi_wlast\;
m_axi_wstrb(3 downto 0) <= \^s_axi_wstrb\(3 downto 0);
m_axi_wuser(0) <= \^s_axi_wuser\(0);
m_axi_wvalid <= \^s_axi_wvalid\;
s_axi_arready <= \^m_axi_arready\;
s_axi_awready <= \^m_axi_awready\;
s_axi_bid(11 downto 0) <= \^m_axi_bid\(11 downto 0);
s_axi_bresp(1 downto 0) <= \^m_axi_bresp\(1 downto 0);
s_axi_buser(0) <= \^m_axi_buser\(0);
s_axi_bvalid <= \^m_axi_bvalid\;
s_axi_rdata(31 downto 0) <= \^m_axi_rdata\(31 downto 0);
s_axi_rid(11 downto 0) <= \^m_axi_rid\(11 downto 0);
s_axi_rlast <= \^m_axi_rlast\;
s_axi_rresp(1 downto 0) <= \^m_axi_rresp\(1 downto 0);
s_axi_ruser(0) <= \^m_axi_ruser\(0);
s_axi_rvalid <= \^m_axi_rvalid\;
s_axi_wready <= \^m_axi_wready\;
GND: unisim.vcomponents.GND
port map (
G => \<const0>\
);
end STRUCTURE;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity zqynq_lab_1_design_auto_pc_3 is
port (
aclk : in STD_LOGIC;
aresetn : in STD_LOGIC;
s_axi_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_awvalid : in STD_LOGIC;
s_axi_awready : out STD_LOGIC;
s_axi_wid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_wdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_wstrb : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_wlast : in STD_LOGIC;
s_axi_wvalid : in STD_LOGIC;
s_axi_wready : out STD_LOGIC;
s_axi_bid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_bvalid : out STD_LOGIC;
s_axi_bready : in STD_LOGIC;
s_axi_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
s_axi_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
s_axi_arvalid : in STD_LOGIC;
s_axi_arready : out STD_LOGIC;
s_axi_rid : out STD_LOGIC_VECTOR ( 11 downto 0 );
s_axi_rdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
s_axi_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
s_axi_rlast : out STD_LOGIC;
s_axi_rvalid : out STD_LOGIC;
s_axi_rready : in STD_LOGIC;
m_axi_awid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_awaddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_awlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_awsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_awlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_awcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_awregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_awvalid : out STD_LOGIC;
m_axi_awready : in STD_LOGIC;
m_axi_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_wlast : out STD_LOGIC;
m_axi_wvalid : out STD_LOGIC;
m_axi_wready : in STD_LOGIC;
m_axi_bid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_bvalid : in STD_LOGIC;
m_axi_bready : out STD_LOGIC;
m_axi_arid : out STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_araddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_arlen : out STD_LOGIC_VECTOR ( 7 downto 0 );
m_axi_arsize : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arburst : out STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_arlock : out STD_LOGIC_VECTOR ( 0 to 0 );
m_axi_arcache : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
m_axi_arregion : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arqos : out STD_LOGIC_VECTOR ( 3 downto 0 );
m_axi_arvalid : out STD_LOGIC;
m_axi_arready : in STD_LOGIC;
m_axi_rid : in STD_LOGIC_VECTOR ( 11 downto 0 );
m_axi_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
m_axi_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
m_axi_rlast : in STD_LOGIC;
m_axi_rvalid : in STD_LOGIC;
m_axi_rready : out STD_LOGIC
);
attribute NotValidForBitStream : boolean;
attribute NotValidForBitStream of zqynq_lab_1_design_auto_pc_3 : entity is true;
attribute CHECK_LICENSE_TYPE : string;
attribute CHECK_LICENSE_TYPE of zqynq_lab_1_design_auto_pc_3 : entity is "zqynq_lab_1_design_auto_pc_3,axi_protocol_converter_v2_1_13_axi_protocol_converter,{}";
attribute DowngradeIPIdentifiedWarnings : string;
attribute DowngradeIPIdentifiedWarnings of zqynq_lab_1_design_auto_pc_3 : entity is "yes";
attribute X_CORE_INFO : string;
attribute X_CORE_INFO of zqynq_lab_1_design_auto_pc_3 : entity is "axi_protocol_converter_v2_1_13_axi_protocol_converter,Vivado 2017.2";
end zqynq_lab_1_design_auto_pc_3;
architecture STRUCTURE of zqynq_lab_1_design_auto_pc_3 is
signal NLW_inst_m_axi_aruser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_m_axi_awuser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_m_axi_wid_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
signal NLW_inst_m_axi_wuser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_s_axi_buser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
signal NLW_inst_s_axi_ruser_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
attribute C_AXI_ADDR_WIDTH : integer;
attribute C_AXI_ADDR_WIDTH of inst : label is 32;
attribute C_AXI_ARUSER_WIDTH : integer;
attribute C_AXI_ARUSER_WIDTH of inst : label is 1;
attribute C_AXI_AWUSER_WIDTH : integer;
attribute C_AXI_AWUSER_WIDTH of inst : label is 1;
attribute C_AXI_BUSER_WIDTH : integer;
attribute C_AXI_BUSER_WIDTH of inst : label is 1;
attribute C_AXI_DATA_WIDTH : integer;
attribute C_AXI_DATA_WIDTH of inst : label is 32;
attribute C_AXI_ID_WIDTH : integer;
attribute C_AXI_ID_WIDTH of inst : label is 12;
attribute C_AXI_RUSER_WIDTH : integer;
attribute C_AXI_RUSER_WIDTH of inst : label is 1;
attribute C_AXI_SUPPORTS_READ : integer;
attribute C_AXI_SUPPORTS_READ of inst : label is 1;
attribute C_AXI_SUPPORTS_USER_SIGNALS : integer;
attribute C_AXI_SUPPORTS_USER_SIGNALS of inst : label is 0;
attribute C_AXI_SUPPORTS_WRITE : integer;
attribute C_AXI_SUPPORTS_WRITE of inst : label is 1;
attribute C_AXI_WUSER_WIDTH : integer;
attribute C_AXI_WUSER_WIDTH of inst : label is 1;
attribute C_FAMILY : string;
attribute C_FAMILY of inst : label is "zynq";
attribute C_IGNORE_ID : integer;
attribute C_IGNORE_ID of inst : label is 0;
attribute C_M_AXI_PROTOCOL : integer;
attribute C_M_AXI_PROTOCOL of inst : label is 0;
attribute C_S_AXI_PROTOCOL : integer;
attribute C_S_AXI_PROTOCOL of inst : label is 1;
attribute C_TRANSLATION_MODE : integer;
attribute C_TRANSLATION_MODE of inst : label is 2;
attribute DowngradeIPIdentifiedWarnings of inst : label is "yes";
attribute P_AXI3 : integer;
attribute P_AXI3 of inst : label is 1;
attribute P_AXI4 : integer;
attribute P_AXI4 of inst : label is 0;
attribute P_AXILITE : integer;
attribute P_AXILITE of inst : label is 2;
attribute P_AXILITE_SIZE : string;
attribute P_AXILITE_SIZE of inst : label is "3'b010";
attribute P_CONVERSION : integer;
attribute P_CONVERSION of inst : label is 2;
attribute P_DECERR : string;
attribute P_DECERR of inst : label is "2'b11";
attribute P_INCR : string;
attribute P_INCR of inst : label is "2'b01";
attribute P_PROTECTION : integer;
attribute P_PROTECTION of inst : label is 1;
attribute P_SLVERR : string;
attribute P_SLVERR of inst : label is "2'b10";
begin
inst: entity work.zqynq_lab_1_design_auto_pc_3_axi_protocol_converter_v2_1_13_axi_protocol_converter
port map (
aclk => aclk,
aresetn => aresetn,
m_axi_araddr(31 downto 0) => m_axi_araddr(31 downto 0),
m_axi_arburst(1 downto 0) => m_axi_arburst(1 downto 0),
m_axi_arcache(3 downto 0) => m_axi_arcache(3 downto 0),
m_axi_arid(11 downto 0) => m_axi_arid(11 downto 0),
m_axi_arlen(7 downto 0) => m_axi_arlen(7 downto 0),
m_axi_arlock(0) => m_axi_arlock(0),
m_axi_arprot(2 downto 0) => m_axi_arprot(2 downto 0),
m_axi_arqos(3 downto 0) => m_axi_arqos(3 downto 0),
m_axi_arready => m_axi_arready,
m_axi_arregion(3 downto 0) => m_axi_arregion(3 downto 0),
m_axi_arsize(2 downto 0) => m_axi_arsize(2 downto 0),
m_axi_aruser(0) => NLW_inst_m_axi_aruser_UNCONNECTED(0),
m_axi_arvalid => m_axi_arvalid,
m_axi_awaddr(31 downto 0) => m_axi_awaddr(31 downto 0),
m_axi_awburst(1 downto 0) => m_axi_awburst(1 downto 0),
m_axi_awcache(3 downto 0) => m_axi_awcache(3 downto 0),
m_axi_awid(11 downto 0) => m_axi_awid(11 downto 0),
m_axi_awlen(7 downto 0) => m_axi_awlen(7 downto 0),
m_axi_awlock(0) => m_axi_awlock(0),
m_axi_awprot(2 downto 0) => m_axi_awprot(2 downto 0),
m_axi_awqos(3 downto 0) => m_axi_awqos(3 downto 0),
m_axi_awready => m_axi_awready,
m_axi_awregion(3 downto 0) => m_axi_awregion(3 downto 0),
m_axi_awsize(2 downto 0) => m_axi_awsize(2 downto 0),
m_axi_awuser(0) => NLW_inst_m_axi_awuser_UNCONNECTED(0),
m_axi_awvalid => m_axi_awvalid,
m_axi_bid(11 downto 0) => m_axi_bid(11 downto 0),
m_axi_bready => m_axi_bready,
m_axi_bresp(1 downto 0) => m_axi_bresp(1 downto 0),
m_axi_buser(0) => '0',
m_axi_bvalid => m_axi_bvalid,
m_axi_rdata(31 downto 0) => m_axi_rdata(31 downto 0),
m_axi_rid(11 downto 0) => m_axi_rid(11 downto 0),
m_axi_rlast => m_axi_rlast,
m_axi_rready => m_axi_rready,
m_axi_rresp(1 downto 0) => m_axi_rresp(1 downto 0),
m_axi_ruser(0) => '0',
m_axi_rvalid => m_axi_rvalid,
m_axi_wdata(31 downto 0) => m_axi_wdata(31 downto 0),
m_axi_wid(11 downto 0) => NLW_inst_m_axi_wid_UNCONNECTED(11 downto 0),
m_axi_wlast => m_axi_wlast,
m_axi_wready => m_axi_wready,
m_axi_wstrb(3 downto 0) => m_axi_wstrb(3 downto 0),
m_axi_wuser(0) => NLW_inst_m_axi_wuser_UNCONNECTED(0),
m_axi_wvalid => m_axi_wvalid,
s_axi_araddr(31 downto 0) => s_axi_araddr(31 downto 0),
s_axi_arburst(1 downto 0) => s_axi_arburst(1 downto 0),
s_axi_arcache(3 downto 0) => s_axi_arcache(3 downto 0),
s_axi_arid(11 downto 0) => s_axi_arid(11 downto 0),
s_axi_arlen(3 downto 0) => s_axi_arlen(3 downto 0),
s_axi_arlock(1 downto 0) => s_axi_arlock(1 downto 0),
s_axi_arprot(2 downto 0) => s_axi_arprot(2 downto 0),
s_axi_arqos(3 downto 0) => s_axi_arqos(3 downto 0),
s_axi_arready => s_axi_arready,
s_axi_arregion(3 downto 0) => B"0000",
s_axi_arsize(2 downto 0) => s_axi_arsize(2 downto 0),
s_axi_aruser(0) => '0',
s_axi_arvalid => s_axi_arvalid,
s_axi_awaddr(31 downto 0) => s_axi_awaddr(31 downto 0),
s_axi_awburst(1 downto 0) => s_axi_awburst(1 downto 0),
s_axi_awcache(3 downto 0) => s_axi_awcache(3 downto 0),
s_axi_awid(11 downto 0) => s_axi_awid(11 downto 0),
s_axi_awlen(3 downto 0) => s_axi_awlen(3 downto 0),
s_axi_awlock(1 downto 0) => s_axi_awlock(1 downto 0),
s_axi_awprot(2 downto 0) => s_axi_awprot(2 downto 0),
s_axi_awqos(3 downto 0) => s_axi_awqos(3 downto 0),
s_axi_awready => s_axi_awready,
s_axi_awregion(3 downto 0) => B"0000",
s_axi_awsize(2 downto 0) => s_axi_awsize(2 downto 0),
s_axi_awuser(0) => '0',
s_axi_awvalid => s_axi_awvalid,
s_axi_bid(11 downto 0) => s_axi_bid(11 downto 0),
s_axi_bready => s_axi_bready,
s_axi_bresp(1 downto 0) => s_axi_bresp(1 downto 0),
s_axi_buser(0) => NLW_inst_s_axi_buser_UNCONNECTED(0),
s_axi_bvalid => s_axi_bvalid,
s_axi_rdata(31 downto 0) => s_axi_rdata(31 downto 0),
s_axi_rid(11 downto 0) => s_axi_rid(11 downto 0),
s_axi_rlast => s_axi_rlast,
s_axi_rready => s_axi_rready,
s_axi_rresp(1 downto 0) => s_axi_rresp(1 downto 0),
s_axi_ruser(0) => NLW_inst_s_axi_ruser_UNCONNECTED(0),
s_axi_rvalid => s_axi_rvalid,
s_axi_wdata(31 downto 0) => s_axi_wdata(31 downto 0),
s_axi_wid(11 downto 0) => s_axi_wid(11 downto 0),
s_axi_wlast => s_axi_wlast,
s_axi_wready => s_axi_wready,
s_axi_wstrb(3 downto 0) => s_axi_wstrb(3 downto 0),
s_axi_wuser(0) => '0',
s_axi_wvalid => s_axi_wvalid
);
end STRUCTURE;
|
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`protect end_protected
|
library ieee;
use ieee.std_logic_1164.all;
library ieee;
use ieee.numeric_std.all;
entity add_191 is
port (
result : out std_logic_vector(30 downto 0);
in_a : in std_logic_vector(30 downto 0);
in_b : in std_logic_vector(30 downto 0)
);
end add_191;
architecture augh of add_191 is
signal carry_inA : std_logic_vector(32 downto 0);
signal carry_inB : std_logic_vector(32 downto 0);
signal carry_res : std_logic_vector(32 downto 0);
begin
-- To handle the CI input, the operation is '1' + CI
-- If CI is not present, the operation is '1' + '0'
carry_inA <= '0' & in_a & '1';
carry_inB <= '0' & in_b & '0';
-- Compute the result
carry_res <= std_logic_vector(unsigned(carry_inA) + unsigned(carry_inB));
-- Set the outputs
result <= carry_res(31 downto 1);
end architecture;
|
library ieee;
use ieee.std_logic_1164.all;
library ieee;
use ieee.numeric_std.all;
entity add_191 is
port (
result : out std_logic_vector(30 downto 0);
in_a : in std_logic_vector(30 downto 0);
in_b : in std_logic_vector(30 downto 0)
);
end add_191;
architecture augh of add_191 is
signal carry_inA : std_logic_vector(32 downto 0);
signal carry_inB : std_logic_vector(32 downto 0);
signal carry_res : std_logic_vector(32 downto 0);
begin
-- To handle the CI input, the operation is '1' + CI
-- If CI is not present, the operation is '1' + '0'
carry_inA <= '0' & in_a & '1';
carry_inB <= '0' & in_b & '0';
-- Compute the result
carry_res <= std_logic_vector(unsigned(carry_inA) + unsigned(carry_inB));
-- Set the outputs
result <= carry_res(31 downto 1);
end architecture;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (C) 1992-2014 Altera Corporation. All rights reserved.
-- Your use of Altera Corporation's design tools, logic functions and other
-- software and tools, and its AMPP partner logic functions, and any output
-- files any of the foregoing (including device programming or simulation
-- files), and any associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License Subscription
-- Agreement, Altera MegaCore Function License Agreement, or other applicable
-- license agreement, including, without limitation, that your use is for the
-- sole purpose of programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the applicable
-- agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
--***************************************************
--*** ***
--*** FLOATING POINT CORE LIBRARY ***
--*** ***
--*** FP_ATANLUT.VHD ***
--*** ***
--*** Function: ArcTangent Look Up Table ***
--*** (Generated by MATLAB Utility) ***
--*** ***
--*** 22/12/09 ML ***
--*** ***
--*** (c) 2009 Altera Corporation ***
--*** ***
--*** Change History ***
--*** ***
--*** ***
--*** ***
--***************************************************
ENTITY fp_atanlut IS
PORT (
add : IN STD_LOGIC_VECTOR (10 DOWNTO 1);
data : OUT STD_LOGIC_VECTOR (36 DOWNTO 1)
);
END fp_atanlut;
ARCHITECTURE rtl OF fp_atanlut IS
BEGIN
pca: PROCESS (add)
BEGIN
CASE add IS
WHEN "0000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
WHEN "0000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(255,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262058,18);
WHEN "0000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(511,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261461,18);
WHEN "0000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259840,18);
WHEN "0000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256682,18);
WHEN "0000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251477,18);
WHEN "0000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243713,18);
WHEN "0000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(1791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232877,18);
WHEN "0000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218459,18);
WHEN "0000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199947,18);
WHEN "0000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2559,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176830,18);
WHEN "0000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(2815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148596,18);
WHEN "0000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114736,18);
WHEN "0000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3327,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74739,18);
WHEN "0000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3583,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(28094,18);
WHEN "0000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(3838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236436,18);
WHEN "0000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174967,18);
WHEN "0000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105322,18);
WHEN "0000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26992,18);
WHEN "0000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(4861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201613,18);
WHEN "0000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104389,18);
WHEN "0000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5372,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259100,18);
WHEN "0000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5628,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140951,18);
WHEN "0000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(5884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11580,18);
WHEN "0000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132624,18);
WHEN "0000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241434,18);
WHEN "0000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75361,18);
WHEN "0000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(6905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158188,18);
WHEN "0000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227268,18);
WHEN "0000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7416,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19954,18);
WHEN "0000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7671,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60030,18);
WHEN "0000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(7926,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84851,18);
WHEN "0000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93916,18);
WHEN "0000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8436,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86725,18);
WHEN "0000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62776,18);
WHEN "0000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(8946,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21573,18);
WHEN "0000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9200,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224760,18);
WHEN "0000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(147552,18);
WHEN "0000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51596,18);
WHEN "0000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(9964,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198541,18);
WHEN "0000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63603,18);
WHEN "0000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170578,18);
WHEN "0000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10727,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256827,18);
WHEN "0000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(10982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59715,18);
WHEN "0000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103038,18);
WHEN "0000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124162,18);
WHEN "0000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11744,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122599,18);
WHEN "0000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(11998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97859,18);
WHEN "0000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12252,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49456,18);
WHEN "0000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239047,18);
WHEN "0000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(12759,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141859,18);
WHEN "0000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19553,18);
WHEN "0000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133790,18);
WHEN "0000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221944,18);
WHEN "0000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(13773,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21390,18);
WHEN "0000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14026,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55937,18);
WHEN "0000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62963,18);
WHEN "0000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14532,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41991,18);
WHEN "0000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(14784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254689,18);
WHEN "0000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176296,18);
WHEN "0000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68480,18);
WHEN "0000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192916,18);
WHEN "0000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(15795,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24844,18);
WHEN "0000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88083,18);
WHEN "0001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120021,18);
WHEN "0001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120191,18);
WHEN "0001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(16803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88130,18);
WHEN "0001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23371,18);
WHEN "0001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17306,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187599,18);
WHEN "0001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56063,18);
WHEN "0001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(17809,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152592,18);
WHEN "0001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214584,18);
WHEN "0001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241584,18);
WHEN "0001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233135,18);
WHEN "0001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(18813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188785,18);
WHEN "0001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108082,18);
WHEN "0001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252719,18);
WHEN "0001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97960,18);
WHEN "0001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(19815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167646,18);
WHEN "0001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20065,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199187,18);
WHEN "0001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192140,18);
WHEN "0001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146062,18);
WHEN "0001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(20815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60512,18);
WHEN "0001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197196,18);
WHEN "0001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21314,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31389,18);
WHEN "0001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86943,18);
WHEN "0001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(21812,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101281,18);
WHEN "0001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22061,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73969,18);
WHEN "0001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4579,18);
WHEN "0001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154826,18);
WHEN "0001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(22806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(262139,18);
WHEN "0001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(63948,18);
WHEN "0001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23303,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84120,18);
WHEN "0001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60088,18);
WHEN "0001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(23798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253578,18);
WHEN "0001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(139883,18);
WHEN "0001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242876,18);
WHEN "0001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37856,18);
WHEN "0001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(24788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48697,18);
WHEN "0001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(12847,18);
WHEN "0001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25281,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192040,18);
WHEN "0001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61583,18);
WHEN "0001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(25774,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145360,18);
WHEN "0001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180824,18);
WHEN "0001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167574,18);
WHEN "0001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105213,18);
WHEN "0001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(26757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255489,18);
WHEN "0001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93717,18);
WHEN "0001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27248,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143796,18);
WHEN "0001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27493,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143189,18);
WHEN "0001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27738,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91508,18);
WHEN "0001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(27982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250512,18);
WHEN "0001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95529,18);
WHEN "0001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150463,18);
WHEN "0001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152791,18);
WHEN "0001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(28959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102135,18);
WHEN "0001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260263,18);
WHEN "0001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102513,18);
WHEN "0001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29689,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152801,18);
WHEN "0001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(29932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148615,18);
WHEN "0001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30175,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89586,18);
WHEN "0001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30417,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237492,18);
WHEN "0001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67684,18);
WHEN "0001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(30902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104088,18);
WHEN "0001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31144,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84201,18);
WHEN "0001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31386,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7666,18);
WHEN "0001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31627,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136273,18);
WHEN "0001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(31868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207526,18);
WHEN "0010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(221074,18);
WHEN "0010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176570,18);
WHEN "0010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73668,18);
WHEN "0010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(32831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174167,18);
WHEN "0010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215584,18);
WHEN "0010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197579,18);
WHEN "0010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119815,18);
WHEN "0010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(33790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244102,18);
WHEN "0010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45819,18);
WHEN "0010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34269,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48923,18);
WHEN "0010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253089,18);
WHEN "0010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133701,18);
WHEN "0010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(34984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214724,18);
WHEN "0010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233694,18);
WHEN "0010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35460,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190291,18);
WHEN "0010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84200,18);
WHEN "0010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(35935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(177249,18);
WHEN "0010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206983,18);
WHEN "0010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173093,18);
WHEN "0010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75271,18);
WHEN "0010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(36882,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175356,18);
WHEN "0010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210901,18);
WHEN "0010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181607,18);
WHEN "0010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87173,18);
WHEN "0010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(37825,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(189450,18);
WHEN "0010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38060,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226000,18);
WHEN "0010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196531,18);
WHEN "0010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38530,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100754,18);
WHEN "0010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200528,18);
WHEN "0010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(38998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233423,18);
WHEN "0010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199158,18);
WHEN "0010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97454,18);
WHEN "0010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(190176,18);
WHEN "0010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(39932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214908,18);
WHEN "0010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171374,18);
WHEN "0010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59307,18);
WHEN "0010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40630,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140580,18);
WHEN "0010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(40862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152786,18);
WHEN "0010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41094,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95661,18);
WHEN "0010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231088,18);
WHEN "0010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41557,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34520,18);
WHEN "0010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(41788,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29989,18);
WHEN "0010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42018,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217242,18);
WHEN "0010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71738,18);
WHEN "0010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117517,18);
WHEN "0010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42709,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92187,18);
WHEN "0010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(42938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257648,18);
WHEN "0010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43168,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89371,18);
WHEN "0010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111402,18);
WHEN "0010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43626,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61360,18);
WHEN "0010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(43854,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201155,18);
WHEN "0010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6265,18);
WHEN "0010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44311,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184374,18);
WHEN "0010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44766,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32631,18);
WHEN "0010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(44993,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69583,18);
WHEN "0010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45220,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32865,18);
WHEN "0010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45446,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184401,18);
WHEN "0010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261830,18);
WHEN "0010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(45899,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2795,18);
WHEN "0010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193515,18);
WHEN "0010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46350,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47349,18);
WHEN "0010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88377,18);
WHEN "0010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(46800,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54250,18);
WHEN "0011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206908,18);
WHEN "0011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47249,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21864,18);
WHEN "0011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47473,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23207,18);
WHEN "0011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210741,18);
WHEN "0011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(47920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59984,18);
WHEN "0011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48143,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95032,18);
WHEN "0011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48366,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53554,18);
WHEN "0011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197504,18);
WHEN "0011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(48811,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2412,18);
WHEN "0011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254526,18);
WHEN "0011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49254,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167234,18);
WHEN "0011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49476,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2502,18);
WHEN "0011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49697,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22299,18);
WHEN "0011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(49917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226451,18);
WHEN "0011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90499,18);
WHEN "0011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50358,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138562,18);
WHEN "0011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50578,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108329,18);
WHEN "0011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(50797,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(261779,18);
WHEN "0011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74462,18);
WHEN "0011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51236,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70506,18);
WHEN "0011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249754,18);
WHEN "0011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87760,18);
WHEN "0011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(51891,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108660,18);
WHEN "0011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52109,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50158,18);
WHEN "0011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174249,18);
WHEN "0011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218642,18);
WHEN "0011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52760,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183192,18);
WHEN "0011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(52977,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67756,18);
WHEN "0011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53193,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134338,18);
WHEN "0011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53409,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120655,18);
WHEN "0011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(26571,18);
WHEN "0011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(53840,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114096,18);
WHEN "0011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54055,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(120953,18);
WHEN "0011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47013,18);
WHEN "0011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154291,18);
WHEN "0011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54698,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(180519,18);
WHEN "0011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(54912,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125572,18);
WHEN "0011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55125,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251472,18);
WHEN "0011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33813,18);
WHEN "0011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55551,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258909,18);
WHEN "0011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140212,18);
WHEN "0011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(55976,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201898,18);
WHEN "0011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181710,18);
WHEN "0011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79540,18);
WHEN "0011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56611,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157424,18);
WHEN "0011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(56822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153114,18);
WHEN "0011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57033,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66506,18);
WHEN "0011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57243,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159643,18);
WHEN "0011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170281,18);
WHEN "0011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98325,18);
WHEN "0011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(57872,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205822,18);
WHEN "0011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230535,18);
WHEN "0011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172373,18);
WHEN "0011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58499,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31247,18);
WHEN "0011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69214,18);
WHEN "0011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(58915,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24044,18);
WHEN "0011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157797,18);
WHEN "0011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59329,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208248,18);
WHEN "0011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59536,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175318,18);
WHEN "0011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58929,18);
WHEN "0011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(59949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121149,18);
WHEN "0011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99760,18);
WHEN "0011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60360,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256834,18);
WHEN "0011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60566,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68012,18);
WHEN "0100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60771,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57516,18);
WHEN "0100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(60975,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225277,18);
WHEN "0100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46944,18);
WHEN "0100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46741,18);
WHEN "0100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61587,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224608,18);
WHEN "0100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56198,18);
WHEN "0100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(61994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65741,18);
WHEN "0100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(253182,18);
WHEN "0100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62399,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94178,18);
WHEN "0100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62601,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112967,18);
WHEN "0100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(62803,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47353,18);
WHEN "0100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63004,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(159433,18);
WHEN "0100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187015,18);
WHEN "0100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63406,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130055,18);
WHEN "0100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250654,18);
WHEN "0100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(63807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24481,18);
WHEN "0100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237930,18);
WHEN "0100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104530,18);
WHEN "0100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64405,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148532,18);
WHEN "0100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64604,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107758,18);
WHEN "0100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(64802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244320,18);
WHEN "0100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65001,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33897,18);
WHEN "0100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(747,18);
WHEN "0100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65396,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144844,18);
WHEN "0100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65593,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204016,18);
WHEN "0100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65790,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178238,18);
WHEN "0100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(65987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67488,18);
WHEN "0100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66183,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133888,18);
WHEN "0100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115273,18);
WHEN "0100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11625,18);
WHEN "0100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66770,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(85072,18);
WHEN "0100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(66965,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73455,18);
WHEN "0100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67159,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238902,18);
WHEN "0100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67354,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57115,18);
WHEN "0100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52371,18);
WHEN "0100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67741,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224661,18);
WHEN "0100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(67935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49688,18);
WHEN "0100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51735,18);
WHEN "0100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68320,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230798,18);
WHEN "0100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68513,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62585,18);
WHEN "0100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68705,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(71382,18);
WHEN "0100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(68896,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257190,18);
WHEN "0100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69088,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95722,18);
WHEN "0100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69279,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111268,18);
WHEN "0100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69470,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41689,18);
WHEN "0100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69660,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149135,18);
WHEN "0100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(69850,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171468,18);
WHEN "0100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70040,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108696,18);
WHEN "0100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70229,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222974,18);
WHEN "0100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252170,18);
WHEN "0100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196294,18);
WHEN "0100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(55362,18);
WHEN "0100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(70984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91533,18);
WHEN "0100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71172,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42680,18);
WHEN "0100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71359,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170964,18);
WHEN "0100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71546,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214261,18);
WHEN "0100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172591,18);
WHEN "0100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(71920,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45977,18);
WHEN "0100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72106,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96586,18);
WHEN "0100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62298,18);
WHEN "0100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72477,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205284,18);
WHEN "0100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72663,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1281,18);
WHEN "0100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(72847,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236752,18);
WHEN "0100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125293,18);
WHEN "0101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73216,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191223,18);
WHEN "0101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73400,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172431,18);
WHEN "0101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68949,18);
WHEN "0101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73767,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(142957,18);
WHEN "0101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(73950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132346,18);
WHEN "0101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74133,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37152,18);
WHEN "0101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119559,18);
WHEN "0101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117461,18);
WHEN "0101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30899,18);
WHEN "0101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(74860,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122058,18);
WHEN "0101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128837,18);
WHEN "0101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51281,18);
WHEN "0101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151578,18);
WHEN "0101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75582,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167630,18);
WHEN "0101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75762,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(99484,18);
WHEN "0101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(75941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(209334,18);
WHEN "0101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76120,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235084,18);
WHEN "0101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76299,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176784,18);
WHEN "0101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76478,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34487,18);
WHEN "0101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70389,18);
WHEN "0101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(76834,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22400,18);
WHEN "0101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152718,18);
WHEN "0101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199256,18);
WHEN "0101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77365,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162070,18);
WHEN "0101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77542,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "0101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98901,18);
WHEN "0101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(77894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(73038,18);
WHEN "0101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78069,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225832,18);
WHEN "0101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78245,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33058,18);
WHEN "0101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78420,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19065,18);
WHEN "0101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78594,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183917,18);
WHEN "0101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3392,18);
WHEN "0101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(78943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1843,18);
WHEN "0101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79116,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179336,18);
WHEN "0101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79290,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11651,18);
WHEN "0101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23144,18);
WHEN "0101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79635,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213885,18);
WHEN "0101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59656,18);
WHEN "0101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(79980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(84815,18);
WHEN "0101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80152,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27291,18);
WHEN "0101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80323,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149301,18);
WHEN "0101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188773,18);
WHEN "0101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145784,18);
WHEN "0101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(80836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20408,18);
WHEN "0101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74865,18);
WHEN "0101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81176,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47089,18);
WHEN "0101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199302,18);
WHEN "0101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7293,18);
WHEN "0101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81683,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257575,18);
WHEN "0101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(81852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163796,18);
WHEN "0101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250325,18);
WHEN "0101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(255100,18);
WHEN "0101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178203,18);
WHEN "0101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82524,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19719,18);
WHEN "0101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82691,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41874,18);
WHEN "0101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(82857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244755,18);
WHEN "0101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104158,18);
WHEN "0101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83190,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144458,18);
WHEN "0101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83356,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(103598,18);
WHEN "0101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83521,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243810,18);
WHEN "0101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40895,18);
WHEN "0101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(83852,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19229,18);
WHEN "0101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84016,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178903,18);
WHEN "0101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84180,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257864,18);
WHEN "0110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84344,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(256201,18);
WHEN "0110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84508,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174008,18);
WHEN "0110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84672,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11377,18);
WHEN "0110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30546,18);
WHEN "0110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(84997,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(231607,18);
WHEN "0110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(90368,18);
WHEN "0110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85322,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131213,18);
WHEN "0110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92091,18);
WHEN "0110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85645,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235245,18);
WHEN "0110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36483,18);
WHEN "0110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(85968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20191,18);
WHEN "0110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186467,18);
WHEN "0110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86289,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11121,18);
WHEN "0110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86449,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18541,18);
WHEN "0110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86608,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208828,18);
WHEN "0110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86768,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57793,18);
WHEN "0110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(86927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89826,18);
WHEN "0110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87086,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42884,18);
WHEN "0110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87244,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179213,18);
WHEN "0110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236772,18);
WHEN "0110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215665,18);
WHEN "0110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87718,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115995,18);
WHEN "0110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(87875,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200010,18);
WHEN "0110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205672,18);
WHEN "0110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88189,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133084,18);
WHEN "0110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88345,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244498,18);
WHEN "0110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15731,18);
WHEN "0110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88657,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233323,18);
WHEN "0110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88813,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110948,18);
WHEN "0110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(88968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173002,18);
WHEN "0110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157449,18);
WHEN "0110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89278,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64397,18);
WHEN "0110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89432,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156101,18);
WHEN "0110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170525,18);
WHEN "0110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89740,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107780,18);
WHEN "0110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(89893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230119,18);
WHEN "0110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90047,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13365,18);
WHEN "0110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(244062,18);
WHEN "0110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90352,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135889,18);
WHEN "0110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213247,18);
WHEN "0110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214103,18);
WHEN "0110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(138570,18);
WHEN "0110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(90959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248907,18);
WHEN "0110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20937,18);
WHEN "0110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241208,18);
WHEN "0110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91412,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123401,18);
WHEN "0110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191920,18);
WHEN "0110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91712,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184734,18);
WHEN "0110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(91862,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101960,18);
WHEN "0110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92011,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205858,18);
WHEN "0110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92160,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234399,18);
WHEN "0110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92309,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187700,18);
WHEN "0110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92458,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(65877,18);
WHEN "0110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92606,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131192,18);
WHEN "0110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92754,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(121618,18);
WHEN "0110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(92902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37273,18);
WHEN "0110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93049,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140418,18);
WHEN "0110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93196,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169029,18);
WHEN "0110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93343,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123223,18);
WHEN "0110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93490,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3119,18);
WHEN "0110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70981,18);
WHEN "0110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93782,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64784,18);
WHEN "0110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(93927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246792,18);
WHEN "0110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94073,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92836,18);
WHEN "0111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127326,18);
WHEN "0111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88237,18);
WHEN "0111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237834,18);
WHEN "0111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51950,18);
WHEN "0111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54995,18);
WHEN "0111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(94939,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247090,18);
WHEN "0111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104069,18);
WHEN "0111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95226,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150342,18);
WHEN "0111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123886,18);
WHEN "0111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24825,18);
WHEN "0111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95654,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(115424,18);
WHEN "0111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95796,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133663,18);
WHEN "0111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(95938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79665,18);
WHEN "0111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96079,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215697,18);
WHEN "0111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17594,18);
WHEN "0111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96362,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9768,18);
WHEN "0111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192343,18);
WHEN "0111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41154,18);
WHEN "0111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80615,18);
WHEN "0111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(96923,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48704,18);
WHEN "0111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207691,18);
WHEN "0111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33412,18);
WHEN "0111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50281,18);
WHEN "0111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97479,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258422,18);
WHEN "0111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133671,18);
WHEN "0111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200444,18);
WHEN "0111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(97894,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196720,18);
WHEN "0111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98032,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122625,18);
WHEN "0111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98169,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240430,18);
WHEN "0111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25971,18);
WHEN "0111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98444,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3664,18);
WHEN "0111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173633,18);
WHEN "0111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11717,18);
WHEN "0111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98853,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42330,18);
WHEN "0111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(98989,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3456,18);
WHEN "0111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99124,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157363,18);
WHEN "0111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99259,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242035,18);
WHEN "0111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99394,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257599,18);
WHEN "0111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99529,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(204180,18);
WHEN "0111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99664,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81908,18);
WHEN "0111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99798,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153051,18);
WHEN "0111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(99932,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155593,18);
WHEN "0111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89662,18);
WHEN "0111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217528,18);
WHEN "0111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100333,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15031,18);
WHEN "0111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6586,18);
WHEN "0111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100598,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192320,18);
WHEN "0111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100731,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48074,18);
WHEN "0111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98261,18);
WHEN "0111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(100995,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80868,18);
WHEN "0111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101126,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258163,18);
WHEN "0111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101258,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105988,18);
WHEN "0111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101389,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148759,18);
WHEN "0111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124458,18);
WHEN "0111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33214,18);
WHEN "0111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101781,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137298,18);
WHEN "0111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(101911,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174695,18);
WHEN "0111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145532,18);
WHEN "0111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49937,18);
WHEN "0111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102300,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150182,18);
WHEN "0111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184251,18);
WHEN "0111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152273,18);
WHEN "0111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102687,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54374,18);
WHEN "0111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102815,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152827,18);
WHEN "1000000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(102943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185617,18);
WHEN "1000000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103071,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152870,18);
WHEN "1000000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103199,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54715,18);
WHEN "1000000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103326,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153425,18);
WHEN "1000000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103453,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(186982,18);
WHEN "1000000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155515,18);
WHEN "1000000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103707,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59152,18);
WHEN "1000000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103833,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160165,18);
WHEN "1000001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(103959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196538,18);
WHEN "1000001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168399,18);
WHEN "1000001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(75875,18);
WHEN "1000001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104336,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(181239,18);
WHEN "1000001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222475,18);
WHEN "1000001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104586,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199709,18);
WHEN "1000001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104711,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113070,18);
WHEN "1000001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104835,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224830,18);
WHEN "1000010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(104960,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10829,18);
WHEN "1000010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105083,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257625,18);
WHEN "1000010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178916,18);
WHEN "1000010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105331,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36971,18);
WHEN "1000010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105454,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94064,18);
WHEN "1000010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105577,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(88176,18);
WHEN "1000010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105700,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19436,18);
WHEN "1000010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150116,18);
WHEN "1000011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(105944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218198,18);
WHEN "1000011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106066,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223809,18);
WHEN "1000011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106188,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167077,18);
WHEN "1000011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106310,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48129,18);
WHEN "1000011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106431,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(129236,18);
WHEN "1000011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106552,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148382,18);
WHEN "1000011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105692,18);
WHEN "1000011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106794,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1293,18);
WHEN "1000100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(106914,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97458,18);
WHEN "1000100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107034,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(132167,18);
WHEN "1000100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107154,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105548,18);
WHEN "1000100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107274,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17728,18);
WHEN "1000100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107393,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130976,18);
WHEN "1000100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(183276,18);
WHEN "1000100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107631,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(174753,18);
WHEN "1000100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107750,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105533,18);
WHEN "1000101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107868,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(237887,18);
WHEN "1000101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(107987,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47653,18);
WHEN "1000101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108105,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59244,18);
WHEN "1000101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108223,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10643,18);
WHEN "1000101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(164119,18);
WHEN "1000101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108457,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257653,18);
WHEN "1000101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29228,18);
WHEN "1000101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108692,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3255,18);
WHEN "1000110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108808,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179862,18);
WHEN "1000110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(108925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34885,18);
WHEN "1000110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109041,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92737,18);
WHEN "1000110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109157,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91399,18);
WHEN "1000110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30995,18);
WHEN "1000110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173795,18);
WHEN "1000110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109503,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257779,18);
WHEN "1000110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20928,18);
WHEN "1000111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109733,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249798,18);
WHEN "1000111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158081,18);
WHEN "1000111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(109963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8045,18);
WHEN "1000111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61959,18);
WHEN "1000111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(57801,18);
WHEN "1000111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257841,18);
WHEN "1000111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110418,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137913,18);
WHEN "1000111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110531,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(222429,18);
WHEN "1001000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110644,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249369,18);
WHEN "1001000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218855,18);
WHEN "1001000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110870,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131010,18);
WHEN "1001000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(110982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248102,18);
WHEN "1001000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45965,18);
WHEN "1001000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111207,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49010,18);
WHEN "1001000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111318,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(257360,18);
WHEN "1001000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111430,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146848,18);
WHEN "1001001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111541,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241886,18);
WHEN "1001001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111653,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(18306,18);
WHEN "1001001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111764,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(520,18);
WHEN "1001001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111874,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188648,18);
WHEN "1001001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(111985,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58525,18);
WHEN "1001001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112095,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134560,18);
WHEN "1001001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112205,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154730,18);
WHEN "1001001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112315,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(119156,18);
WHEN "1001010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112425,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(27960,18);
WHEN "1001010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112534,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143406,18);
WHEN "1001010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203471,18);
WHEN "1001010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112752,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208276,18);
WHEN "1001010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157941,18);
WHEN "1001010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(112970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52586,18);
WHEN "1001010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154475,18);
WHEN "1001010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113186,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201584,18);
WHEN "1001011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194033,18);
WHEN "1001011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113402,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(131941,18);
WHEN "1001011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15429,18);
WHEN "1001011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113617,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106759,18);
WHEN "1001011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143905,18);
WHEN "1001011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113831,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126988,18);
WHEN "1001011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(113938,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(56126,18);
WHEN "1001011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114044,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193581,18);
WHEN "1001100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114151,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15184,18);
WHEN "1001100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114257,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45342,18);
WHEN "1001100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114363,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22027,18);
WHEN "1001100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114468,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207502,18);
WHEN "1001100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114574,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77597,18);
WHEN "1001100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114679,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156717,18);
WHEN "1001100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114784,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182836,18);
WHEN "1001100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114889,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156070,18);
WHEN "1001101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(114994,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(76538,18);
WHEN "1001101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206498,18);
WHEN "1001101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21782,18);
WHEN "1001101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115307,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46791,18);
WHEN "1001101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115411,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19500,18);
WHEN "1001101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115514,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202167,18);
WHEN "1001101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70622,18);
WHEN "1001101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(149267,18);
WHEN "1001110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115824,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(176075,18);
WHEN "1001110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(115927,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151160,18);
WHEN "1001110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74638,18);
WHEN "1001110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116132,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(208767,18);
WHEN "1001110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116235,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29375,18);
WHEN "1001110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116337,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(60864,18);
WHEN "1001110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41205,18);
WHEN "1001110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116540,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232655,18);
WHEN "1001111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116642,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111041,18);
WHEN "1001111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116743,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200765,18);
WHEN "1001111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116844,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239796,18);
WHEN "1001111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(116945,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228248,18);
WHEN "1001111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117046,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166234,18);
WHEN "1001111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117147,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(53867,18);
WHEN "1001111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117247,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153404,18);
WHEN "1001111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202814,18);
WHEN "1010000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117447,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202209,18);
WHEN "1010000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117547,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(151701,18);
WHEN "1010000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117647,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(51403,18);
WHEN "1010000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117746,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163571,18);
WHEN "1010000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(226171,18);
WHEN "1010000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(117944,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239317,18);
WHEN "1010000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203118,18);
WHEN "1010000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117687,18);
WHEN "1010001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118240,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245278,18);
WHEN "1010001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61714,18);
WHEN "1010001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118437,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(91393,18);
WHEN "1010001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118535,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(72282,18);
WHEN "1010001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4490,18);
WHEN "1010001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118730,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(150272,18);
WHEN "1010001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247594,18);
WHEN "1010001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(118925,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34421,18);
WHEN "1010010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119022,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35150,18);
WHEN "1010010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249890,18);
WHEN "1010010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119215,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154463,18);
WHEN "1010010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119312,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11120,18);
WHEN "1010010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119408,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82116,18);
WHEN "1010010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119504,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105413,18);
WHEN "1010010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81120,18);
WHEN "1010010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119696,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9344,18);
WHEN "1010011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(152339,18);
WHEN "1010011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248066,18);
WHEN "1010011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(119982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(34490,18);
WHEN "1010011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120077,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36005,18);
WHEN "1010011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120171,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252718,18);
WHEN "1010011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160448,18);
WHEN "1010011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120361,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21445,18);
WHEN "1010011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120455,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97961,18);
WHEN "1010100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120549,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(127955,18);
WHEN "1010100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120643,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111535,18);
WHEN "1010100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48807,18);
WHEN "1010100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120830,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202019,18);
WHEN "1010100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(120924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46988,18);
WHEN "1010100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121017,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(108109,18);
WHEN "1010100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121110,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123341,18);
WHEN "1010100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(92789,18);
WHEN "1010101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121296,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16558,18);
WHEN "1010101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156895,18);
WHEN "1010101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121480,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251761,18);
WHEN "1010101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39116,18);
WHEN "1010101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121665,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43350,18);
WHEN "1010101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2424,18);
WHEN "1010101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121848,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178584,18);
WHEN "1010101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(121940,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47646,18);
WHEN "1010110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122031,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134000,18);
WHEN "1010110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122122,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175604,18);
WHEN "1010110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122213,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172562,18);
WHEN "1010110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122304,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(124974,18);
WHEN "1010110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122395,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(32943,18);
WHEN "1010110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122485,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158715,18);
WHEN "1010110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122575,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240246,18);
WHEN "1010110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122666,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15495,18);
WHEN "1010111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122756,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8850,18);
WHEN "1010111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122845,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220412,18);
WHEN "1010111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(122935,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125994,18);
WHEN "1010111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123024,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249984,18);
WHEN "1010111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123114,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68194,18);
WHEN "1010111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123203,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105012,18);
WHEN "1010111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123292,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98395,18);
WHEN "1010111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48441,18);
WHEN "1011000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123469,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217394,18);
WHEN "1011000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123558,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81065,18);
WHEN "1011000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123646,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163841,18);
WHEN "1011000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123734,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(203676,18);
WHEN "1011000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123822,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200670,18);
WHEN "1011000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(154921,18);
WHEN "1011000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(123998,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(66526,18);
WHEN "1011000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197727,18);
WHEN "1011001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124173,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24335,18);
WHEN "1011001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124260,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70734,18);
WHEN "1011001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74878,18);
WHEN "1011001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124434,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(36865,18);
WHEN "1011001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124520,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(218933,18);
WHEN "1011001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124607,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(96893,18);
WHEN "1011001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124693,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195129,18);
WHEN "1011001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124779,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251593,18);
WHEN "1011010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124866,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4237,18);
WHEN "1011010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(124951,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239588,18);
WHEN "1011010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125037,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1011010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125123,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61644,18);
WHEN "1011010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(172827,18);
WHEN "1011010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125293,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242811,18);
WHEN "1011010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125379,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9546,18);
WHEN "1011010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125463,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259559,18);
WHEN "1011011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206512,18);
WHEN "1011011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125633,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112644,18);
WHEN "1011011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125717,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240192,18);
WHEN "1011011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(64962,18);
WHEN "1011011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125886,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(111335,18);
WHEN "1011011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(125970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(117261,18);
WHEN "1011011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126054,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82832,18);
WHEN "1011011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126138,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8142,18);
WHEN "1011100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(155428,18);
WHEN "1011100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126305,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(492,18);
WHEN "1011100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126388,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67717,18);
WHEN "1011100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126471,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95050,18);
WHEN "1011100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82582,18);
WHEN "1011100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126637,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30405,18);
WHEN "1011100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126719,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200755,18);
WHEN "1011100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126802,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(69435,18);
WHEN "1011101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160824,18);
WHEN "1011101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(126966,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212868,18);
WHEN "1011101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127048,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225659,18);
WHEN "1011101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(199286,18);
WHEN "1011101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127212,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133839,18);
WHEN "1011101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127294,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29409,18);
WHEN "1011101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127375,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(148230,18);
WHEN "1011101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(228246,18);
WHEN "1011110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127538,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7403,18);
WHEN "1011110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127619,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10079,18);
WHEN "1011110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127699,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(236362,18);
WHEN "1011110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162053,18);
WHEN "1011110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49384,18);
WHEN "1011110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(127941,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(160588,18);
WHEN "1011110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128021,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233609,18);
WHEN "1011110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(6390,18);
WHEN "1011111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128182,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3308,18);
WHEN "1011111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128261,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224450,18);
WHEN "1011111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(145614,18);
WHEN "1011111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128421,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29034,18);
WHEN "1011111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128500,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136938,18);
WHEN "1011111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128579,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(207270,18);
WHEN "1011111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128658,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(240116,18);
WHEN "1011111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128737,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235563,18);
WHEN "1100000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128816,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193696,18);
WHEN "1100000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(114602,18);
WHEN "1100000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(128973,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260510,18);
WHEN "1100000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129052,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107217,18);
WHEN "1100000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129130,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179097,18);
WHEN "1100000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214091,18);
WHEN "1100000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(212284,18);
WHEN "1100000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173760,18);
WHEN "1100001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129442,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98604,18);
WHEN "1100001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129519,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(249044,18);
WHEN "1100001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(100876,18);
WHEN "1100001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129674,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178473,18);
WHEN "1100001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129751,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(219772,18);
WHEN "1100001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129828,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(224859,18);
WHEN "1100001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129905,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(193817,18);
WHEN "1100001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(129982,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126728,18);
WHEN "1100010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130059,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23675,18);
WHEN "1100010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130135,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(146885,18);
WHEN "1100010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234296,18);
WHEN "1100010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130288,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23847,18);
WHEN "1100010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39908,18);
WHEN "1100010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(20417,18);
WHEN "1100010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(227599,18);
WHEN "1100010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130591,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(137248,18);
WHEN "1100011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11588,18);
WHEN "1100011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130742,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(112847,18);
WHEN "1100011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130817,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178959,18);
WHEN "1100011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130892,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210006,18);
WHEN "1100011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(130967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206068,18);
WHEN "1100011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131042,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167226,18);
WHEN "1100011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131117,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(93560,18);
WHEN "1100011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131191,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(247293,18);
WHEN "1100100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131266,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(104218,18);
WHEN "1100100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131340,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(188702,18);
WHEN "1100100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131414,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(238680,18);
WHEN "1100100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131488,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(254231,18);
WHEN "1100100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131562,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235435,18);
WHEN "1100100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182370,18);
WHEN "1100100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131710,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(95115,18);
WHEN "1100100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235893,18);
WHEN "1100101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131857,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(80492,18);
WHEN "1100101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(131930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153280,18);
WHEN "1100101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132003,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192190,18);
WHEN "1100101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132076,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197300,18);
WHEN "1100101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132149,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(168687,18);
WHEN "1100101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132222,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106429,18);
WHEN "1100101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132295,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(10602,18);
WHEN "1100101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132367,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(143428,18);
WHEN "1100110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132439,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(242839,18);
WHEN "1100110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132512,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46768,18);
WHEN "1100110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132584,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79578,18);
WHEN "1100110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132656,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(79203,18);
WHEN "1100110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(45718,18);
WHEN "1100110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132799,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(241342,18);
WHEN "1100110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132871,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(141864,18);
WHEN "1100110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(132943,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9502,18);
WHEN "1100111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133014,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(106476,18);
WHEN "1100111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133085,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170717,18);
WHEN "1100111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133156,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202300,18);
WHEN "1100111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133227,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201300,18);
WHEN "1100111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167790,18);
WHEN "1100111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133369,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(101845,18);
WHEN "1100111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3539,18);
WHEN "1100111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133510,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(135090,18);
WHEN "1101000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133580,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(234429,18);
WHEN "1101000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133651,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(39483,18);
WHEN "1101000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133721,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(74615,18);
WHEN "1101000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133791,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77754,18);
WHEN "1101000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133861,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(48973,18);
WHEN "1101000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(133930,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250488,18);
WHEN "1101000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134000,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158085,18);
WHEN "1101000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134070,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33979,18);
WHEN "1101001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134139,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(140388,18);
WHEN "1101001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134208,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215238,18);
WHEN "1101001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134277,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258603,18);
WHEN "1101001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134347,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(8409,18);
WHEN "1101001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134415,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(251160,18);
WHEN "1101001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134484,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200497,18);
WHEN "1101001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134553,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(118633,18);
WHEN "1101001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134622,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5640,18);
WHEN "1101010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123732,18);
WHEN "1101010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134758,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(210837,18);
WHEN "1101010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134827,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(4881,18);
WHEN "1101010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134895,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30222,18);
WHEN "1101010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(134963,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24786,18);
WHEN "1101010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250788,18);
WHEN "1101010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135098,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184008,18);
WHEN "1101010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86662,18);
WHEN "1101011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135233,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(220961,18);
WHEN "1101011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135301,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62688,18);
WHEN "1101011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135368,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(136199,18);
WHEN "1101011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179420,18);
WHEN "1101011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135502,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(192419,18);
WHEN "1101011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135569,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(175264,18);
WHEN "1101011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135636,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128025,18);
WHEN "1101011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135703,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50768,18);
WHEN "1101100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135769,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(205708,18);
WHEN "1101100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(68622,18);
WHEN "1101100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135902,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(163868,18);
WHEN "1101100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(135968,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(229368,18);
WHEN "1101100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136035,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(3045,18);
WHEN "1101100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136101,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(9256,18);
WHEN "1101100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136166,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(248067,18);
WHEN "1101100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136232,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195258,18);
WHEN "1101101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136298,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113037,18);
WHEN "1101101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136364,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1473,18);
WHEN "1101101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136429,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122776,18);
WHEN "1101101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136494,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(214867,18);
WHEN "1101101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136560,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(15669,18);
WHEN "1101101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(49536,18);
WHEN "1101101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(54389,18);
WHEN "1101101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30294,18);
WHEN "1101110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136819,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239461,18);
WHEN "1101110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136884,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(157665,18);
WHEN "1101110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(136949,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(47117,18);
WHEN "1101110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(170026,18);
WHEN "1101110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137078,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(2168,18);
WHEN "1101110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67895,18);
WHEN "1101110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137206,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(105128,18);
WHEN "1101110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137270,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113931,18);
WHEN "1101111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137334,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(94369,18);
WHEN "1101111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137398,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46504,18);
WHEN "1101111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137461,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232546,18);
WHEN "1101111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137525,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(128269,18);
WHEN "1101111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137588,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258024,18);
WHEN "1101111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97588,18);
WHEN "1101111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137715,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171311,18);
WHEN "1101111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137778,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217112,18);
WHEN "1110000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137841,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(235053,18);
WHEN "1110000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137904,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(225198,18);
WHEN "1110000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(137967,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(187609,18);
WHEN "1110000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138030,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122349,18);
WHEN "1110000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138093,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(29478,18);
WHEN "1110000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138155,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(171204,18);
WHEN "1110000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138218,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23299,18);
WHEN "1110000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(110115,18);
WHEN "1110001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138342,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(169567,18);
WHEN "1110001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138404,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(201718,18);
WHEN "1110001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138466,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206629,18);
WHEN "1110001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138528,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(184361,18);
WHEN "1110001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138590,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(134974,18);
WHEN "1110001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58530,18);
WHEN "1110001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138713,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(217232,18);
WHEN "1110001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138775,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(86854,18);
WHEN "1110010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138836,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191743,18);
WHEN "1110010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138898,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7673,18);
WHEN "1110010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(138959,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58989,18);
WHEN "1110010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139020,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(83609,18);
WHEN "1110010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139081,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(81593,18);
WHEN "1110010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139142,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(52999,18);
WHEN "1110010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139202,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(260030,18);
WHEN "1110010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139263,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(178459,18);
WHEN "1110011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139324,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(70488,18);
WHEN "1110011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139384,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198320,18);
WHEN "1110011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139445,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(37726,18);
WHEN "1110011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139505,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(113052,18);
WHEN "1110011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139565,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162212,18);
WHEN "1110011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139625,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(185266,18);
WHEN "1110011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139685,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(182271,18);
WHEN "1110011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139745,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(153286,18);
WHEN "1110100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139805,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98367,18);
WHEN "1110100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139865,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(17573,18);
WHEN "1110100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139924,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(173106,18);
WHEN "1110100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(139984,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(40734,18);
WHEN "1110100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140043,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144803,18);
WHEN "1110100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140102,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(223226,18);
WHEN "1110100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140162,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(13916,18);
WHEN "1110100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140221,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(41217,18);
WHEN "1110101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140280,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(43044,18);
WHEN "1110101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(19451,18);
WHEN "1110101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232640,18);
WHEN "1110101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140456,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(158378,18);
WHEN "1110101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140515,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58866,18);
WHEN "1110101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140573,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(196304,18);
WHEN "1110101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140632,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46459,18);
WHEN "1110101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140690,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133676,18);
WHEN "1110110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140748,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195865,18);
WHEN "1110110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140806,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(233082,18);
WHEN "1110110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140864,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(245382,18);
WHEN "1110110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140922,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(232821,18);
WHEN "1110110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(140980,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(195453,18);
WHEN "1110110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141038,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133334,18);
WHEN "1110110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141096,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(46517,18);
WHEN "1110110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141153,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197201,18);
WHEN "1110111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141211,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61153,18);
WHEN "1110111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141268,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(162716,18);
WHEN "1110111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141325,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(239798,18);
WHEN "1110111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141383,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(30311,18);
WHEN "1110111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141440,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(58595,18);
WHEN "1110111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141497,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(62561,18);
WHEN "1110111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141554,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(42262,18);
WHEN "1110111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141610,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(259896,18);
WHEN "1111000000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141667,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191228,18);
WHEN "1111000001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141724,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(98455,18);
WHEN "1111000010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141780,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(243774,18);
WHEN "1111000011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141837,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(102950,18);
WHEN "1111000100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(200324,18);
WHEN "1111000101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(141950,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11660,18);
WHEN "1111000110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142006,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61299,18);
WHEN "1111000111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142062,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(87149,18);
WHEN "1111001000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142118,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(89262,18);
WHEN "1111001001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142174,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(67691,18);
WHEN "1111001010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142230,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(22487,18);
WHEN "1111001011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142285,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(215847,18);
WHEN "1111001100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142341,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(123533,18);
WHEN "1111001101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142397,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(7742,18);
WHEN "1111001110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142452,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(130668,18);
WHEN "1111001111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142507,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230220,18);
WHEN "1111010000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142563,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44304,18);
WHEN "1111010001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142618,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(97259,18);
WHEN "1111010010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142673,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(126992,18);
WHEN "1111010011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142728,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(133554,18);
WHEN "1111010100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142783,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116996,18);
WHEN "1111010101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142838,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(77368,18);
WHEN "1111010110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142893,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(14720,18);
WHEN "1111010111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(142947,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(191247,18);
WHEN "1111011000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143002,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(82710,18);
WHEN "1111011001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143056,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(213448,18);
WHEN "1111011010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143111,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(59223,18);
WHEN "1111011011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143165,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144372,18);
WHEN "1111011100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143219,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(206801,18);
WHEN "1111011101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143273,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(246559,18);
WHEN "1111011110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143328,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(1553,18);
WHEN "1111011111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143381,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258262,18);
WHEN "1111100000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143435,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(230304,18);
WHEN "1111100001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143489,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(179872,18);
WHEN "1111100010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143543,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(107014,18);
WHEN "1111100011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143597,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(11781,18);
WHEN "1111100100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143650,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(156363,18);
WHEN "1111100101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(16522,18);
WHEN "1111100110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143757,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(116595,18);
WHEN "1111100111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143810,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(194484,18);
WHEN "1111101000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143863,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250238,18);
WHEN "1111101001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143917,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(21762,18);
WHEN "1111101010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(143970,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(33391,18);
WHEN "1111101011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144023,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(23028,18);
WHEN "1111101100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144075,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(252866,18);
WHEN "1111101101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144128,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(198664,18);
WHEN "1111101110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144181,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(122614,18);
WHEN "1111101111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144234,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(24761,18);
WHEN "1111110000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144286,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(167299,18);
WHEN "1111110001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144339,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(25984,18);
WHEN "1111110010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144391,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(125154,18);
WHEN "1111110011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144443,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(202709,18);
WHEN "1111110100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144495,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(258698,18);
WHEN "1111110101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144548,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(31022,18);
WHEN "1111110110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144600,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(44016,18);
WHEN "1111110111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144652,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(35582,18);
WHEN "1111111000" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144704,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(5766,18);
WHEN "1111111001" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144755,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(216758,18);
WHEN "1111111010" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144807,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(144317,18);
WHEN "1111111011" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144859,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(50632,18);
WHEN "1111111100" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144910,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(197892,18);
WHEN "1111111101" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(144962,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(61856,18);
WHEN "1111111110" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145013,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(166857,18);
WHEN "1111111111" =>
data(36 DOWNTO 19) <= conv_std_logic_vector(145064,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(250795,18);
WHEN others =>
data(36 DOWNTO 19) <= conv_std_logic_vector(0,18);
data(18 DOWNTO 1) <= conv_std_logic_vector(0,18);
END CASE;
END PROCESS;
END rtl;
|
-- (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:axi_bram_ctrl:3.0
-- IP Revision: 3
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY axi_bram_ctrl_v3_0;
USE axi_bram_ctrl_v3_0.axi_bram_ctrl;
ENTITY zynq_1_axi_bram_ctrl_0_0 IS
PORT (
s_axi_aclk : IN STD_LOGIC;
s_axi_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awlock : IN STD_LOGIC;
s_axi_awcache : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awprot : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arlock : IN STD_LOGIC;
s_axi_arcache : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_arprot : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
bram_rst_a : OUT STD_LOGIC;
bram_clk_a : OUT STD_LOGIC;
bram_en_a : OUT STD_LOGIC;
bram_we_a : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
bram_addr_a : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
bram_wrdata_a : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
bram_rddata_a : IN STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END zynq_1_axi_bram_ctrl_0_0;
ARCHITECTURE zynq_1_axi_bram_ctrl_0_0_arch OF zynq_1_axi_bram_ctrl_0_0 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF zynq_1_axi_bram_ctrl_0_0_arch: ARCHITECTURE IS "yes";
COMPONENT axi_bram_ctrl IS
GENERIC (
C_MEMORY_DEPTH : INTEGER;
C_FAMILY : STRING;
C_BRAM_INST_MODE : STRING;
C_BRAM_ADDR_WIDTH : INTEGER;
C_S_AXI_ADDR_WIDTH : INTEGER;
C_S_AXI_DATA_WIDTH : INTEGER;
C_S_AXI_ID_WIDTH : INTEGER;
C_S_AXI_PROTOCOL : STRING;
C_S_AXI_SUPPORTS_NARROW_BURST : INTEGER;
C_SINGLE_PORT_BRAM : INTEGER;
C_S_AXI_CTRL_ADDR_WIDTH : INTEGER;
C_S_AXI_CTRL_DATA_WIDTH : INTEGER;
C_ECC : INTEGER;
C_ECC_TYPE : INTEGER;
C_FAULT_INJECT : INTEGER;
C_ECC_ONOFF_RESET_VALUE : INTEGER
);
PORT (
s_axi_aclk : IN STD_LOGIC;
s_axi_aresetn : IN STD_LOGIC;
ecc_interrupt : OUT STD_LOGIC;
ecc_ue : OUT STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awlock : IN STD_LOGIC;
s_axi_awcache : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awprot : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arlock : IN STD_LOGIC;
s_axi_arcache : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_arprot : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_ctrl_awvalid : IN STD_LOGIC;
s_axi_ctrl_awready : OUT STD_LOGIC;
s_axi_ctrl_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_ctrl_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_ctrl_wvalid : IN STD_LOGIC;
s_axi_ctrl_wready : OUT STD_LOGIC;
s_axi_ctrl_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_ctrl_bvalid : OUT STD_LOGIC;
s_axi_ctrl_bready : IN STD_LOGIC;
s_axi_ctrl_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_ctrl_arvalid : IN STD_LOGIC;
s_axi_ctrl_arready : OUT STD_LOGIC;
s_axi_ctrl_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_ctrl_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_ctrl_rvalid : OUT STD_LOGIC;
s_axi_ctrl_rready : IN STD_LOGIC;
bram_rst_a : OUT STD_LOGIC;
bram_clk_a : OUT STD_LOGIC;
bram_en_a : OUT STD_LOGIC;
bram_we_a : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
bram_addr_a : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
bram_wrdata_a : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
bram_rddata_a : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
bram_rst_b : OUT STD_LOGIC;
bram_clk_b : OUT STD_LOGIC;
bram_en_b : OUT STD_LOGIC;
bram_we_b : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
bram_addr_b : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
bram_wrdata_b : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
bram_rddata_b : IN STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END COMPONENT axi_bram_ctrl;
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF s_axi_aclk: SIGNAL IS "xilinx.com:signal:clock:1.0 CLKIF CLK";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_aresetn: SIGNAL IS "xilinx.com:signal:reset:1.0 RSTIF RST";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awaddr: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWADDR";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awlen: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWLEN";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awsize: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWSIZE";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awburst: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWBURST";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awlock: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWLOCK";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awcache: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWCACHE";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awprot: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWPROT";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_awready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI AWREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wdata: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WDATA";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wstrb: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WSTRB";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wlast: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WLAST";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_wready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI WREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bresp: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BRESP";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_bready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI BREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_araddr: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARADDR";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arlen: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARLEN";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arsize: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARSIZE";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arburst: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARBURST";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arlock: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARLOCK";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arcache: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARCACHE";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arprot: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARPROT";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_arready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI ARREADY";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rdata: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RDATA";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rresp: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RRESP";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rlast: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RLAST";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rvalid: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RVALID";
ATTRIBUTE X_INTERFACE_INFO OF s_axi_rready: SIGNAL IS "xilinx.com:interface:aximm:1.0 S_AXI RREADY";
ATTRIBUTE X_INTERFACE_INFO OF bram_rst_a: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA RST";
ATTRIBUTE X_INTERFACE_INFO OF bram_clk_a: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK";
ATTRIBUTE X_INTERFACE_INFO OF bram_en_a: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA EN";
ATTRIBUTE X_INTERFACE_INFO OF bram_we_a: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA WE";
ATTRIBUTE X_INTERFACE_INFO OF bram_addr_a: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR";
ATTRIBUTE X_INTERFACE_INFO OF bram_wrdata_a: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN";
ATTRIBUTE X_INTERFACE_INFO OF bram_rddata_a: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DOUT";
BEGIN
U0 : axi_bram_ctrl
GENERIC MAP (
C_MEMORY_DEPTH => 1024,
C_FAMILY => "zynq",
C_BRAM_INST_MODE => "EXTERNAL",
C_BRAM_ADDR_WIDTH => 10,
C_S_AXI_ADDR_WIDTH => 12,
C_S_AXI_DATA_WIDTH => 32,
C_S_AXI_ID_WIDTH => 12,
C_S_AXI_PROTOCOL => "AXI4",
C_S_AXI_SUPPORTS_NARROW_BURST => 0,
C_SINGLE_PORT_BRAM => 1,
C_S_AXI_CTRL_ADDR_WIDTH => 32,
C_S_AXI_CTRL_DATA_WIDTH => 32,
C_ECC => 0,
C_ECC_TYPE => 0,
C_FAULT_INJECT => 0,
C_ECC_ONOFF_RESET_VALUE => 0
)
PORT MAP (
s_axi_aclk => s_axi_aclk,
s_axi_aresetn => s_axi_aresetn,
s_axi_awid => s_axi_awid,
s_axi_awaddr => s_axi_awaddr,
s_axi_awlen => s_axi_awlen,
s_axi_awsize => s_axi_awsize,
s_axi_awburst => s_axi_awburst,
s_axi_awlock => s_axi_awlock,
s_axi_awcache => s_axi_awcache,
s_axi_awprot => s_axi_awprot,
s_axi_awvalid => s_axi_awvalid,
s_axi_awready => s_axi_awready,
s_axi_wdata => s_axi_wdata,
s_axi_wstrb => s_axi_wstrb,
s_axi_wlast => s_axi_wlast,
s_axi_wvalid => s_axi_wvalid,
s_axi_wready => s_axi_wready,
s_axi_bid => s_axi_bid,
s_axi_bresp => s_axi_bresp,
s_axi_bvalid => s_axi_bvalid,
s_axi_bready => s_axi_bready,
s_axi_arid => s_axi_arid,
s_axi_araddr => s_axi_araddr,
s_axi_arlen => s_axi_arlen,
s_axi_arsize => s_axi_arsize,
s_axi_arburst => s_axi_arburst,
s_axi_arlock => s_axi_arlock,
s_axi_arcache => s_axi_arcache,
s_axi_arprot => s_axi_arprot,
s_axi_arvalid => s_axi_arvalid,
s_axi_arready => s_axi_arready,
s_axi_rid => s_axi_rid,
s_axi_rdata => s_axi_rdata,
s_axi_rresp => s_axi_rresp,
s_axi_rlast => s_axi_rlast,
s_axi_rvalid => s_axi_rvalid,
s_axi_rready => s_axi_rready,
s_axi_ctrl_awvalid => '0',
s_axi_ctrl_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_ctrl_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_ctrl_wvalid => '0',
s_axi_ctrl_bready => '0',
s_axi_ctrl_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_ctrl_arvalid => '0',
s_axi_ctrl_rready => '0',
bram_rst_a => bram_rst_a,
bram_clk_a => bram_clk_a,
bram_en_a => bram_en_a,
bram_we_a => bram_we_a,
bram_addr_a => bram_addr_a,
bram_wrdata_a => bram_wrdata_a,
bram_rddata_a => bram_rddata_a,
bram_rddata_b => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32))
);
END zynq_1_axi_bram_ctrl_0_0_arch;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:xlconcat:2.1
-- IP Revision: 2
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY work;
USE work.xlconcat;
ENTITY RAT_xlconcat_0_0 IS
PORT (
In0 : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
In1 : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
dout : OUT STD_LOGIC_VECTOR(9 DOWNTO 0)
);
END RAT_xlconcat_0_0;
ARCHITECTURE RAT_xlconcat_0_0_arch OF RAT_xlconcat_0_0 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : STRING;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF RAT_xlconcat_0_0_arch: ARCHITECTURE IS "yes";
COMPONENT xlconcat IS
GENERIC (
IN0_WIDTH : INTEGER;
IN1_WIDTH : INTEGER;
IN2_WIDTH : INTEGER;
IN3_WIDTH : INTEGER;
IN4_WIDTH : INTEGER;
IN5_WIDTH : INTEGER;
IN6_WIDTH : INTEGER;
IN7_WIDTH : INTEGER;
IN8_WIDTH : INTEGER;
IN9_WIDTH : INTEGER;
IN10_WIDTH : INTEGER;
IN11_WIDTH : INTEGER;
IN12_WIDTH : INTEGER;
IN13_WIDTH : INTEGER;
IN14_WIDTH : INTEGER;
IN15_WIDTH : INTEGER;
IN16_WIDTH : INTEGER;
IN17_WIDTH : INTEGER;
IN18_WIDTH : INTEGER;
IN19_WIDTH : INTEGER;
IN20_WIDTH : INTEGER;
IN21_WIDTH : INTEGER;
IN22_WIDTH : INTEGER;
IN23_WIDTH : INTEGER;
IN24_WIDTH : INTEGER;
IN25_WIDTH : INTEGER;
IN26_WIDTH : INTEGER;
IN27_WIDTH : INTEGER;
IN28_WIDTH : INTEGER;
IN29_WIDTH : INTEGER;
IN30_WIDTH : INTEGER;
IN31_WIDTH : INTEGER;
dout_width : INTEGER;
NUM_PORTS : INTEGER
);
PORT (
In0 : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
In1 : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
In2 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In3 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In4 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In5 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In6 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In7 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In8 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In9 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In10 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In11 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In12 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In13 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In14 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In15 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In16 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In17 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In18 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In19 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In20 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In21 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In22 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In23 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In24 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In25 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In26 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In27 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In28 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In29 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In30 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
In31 : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
dout : OUT STD_LOGIC_VECTOR(9 DOWNTO 0)
);
END COMPONENT xlconcat;
BEGIN
U0 : xlconcat
GENERIC MAP (
IN0_WIDTH => 8,
IN1_WIDTH => 2,
IN2_WIDTH => 1,
IN3_WIDTH => 1,
IN4_WIDTH => 1,
IN5_WIDTH => 1,
IN6_WIDTH => 1,
IN7_WIDTH => 1,
IN8_WIDTH => 1,
IN9_WIDTH => 1,
IN10_WIDTH => 1,
IN11_WIDTH => 1,
IN12_WIDTH => 1,
IN13_WIDTH => 1,
IN14_WIDTH => 1,
IN15_WIDTH => 1,
IN16_WIDTH => 1,
IN17_WIDTH => 1,
IN18_WIDTH => 1,
IN19_WIDTH => 1,
IN20_WIDTH => 1,
IN21_WIDTH => 1,
IN22_WIDTH => 1,
IN23_WIDTH => 1,
IN24_WIDTH => 1,
IN25_WIDTH => 1,
IN26_WIDTH => 1,
IN27_WIDTH => 1,
IN28_WIDTH => 1,
IN29_WIDTH => 1,
IN30_WIDTH => 1,
IN31_WIDTH => 1,
dout_width => 10,
NUM_PORTS => 2
)
PORT MAP (
In0 => In0,
In1 => In1,
In2 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In3 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In4 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In5 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In6 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In7 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In8 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In9 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In10 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In11 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In12 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In13 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In14 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In15 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In16 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In17 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In18 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In19 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In20 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In21 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In22 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In23 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In24 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In25 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In26 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In27 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In28 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In29 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In30 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
In31 => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
dout => dout
);
END RAT_xlconcat_0_0_arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc1807.vhd,v 1.2 2001-10-26 16:29:43 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s01b00x00p07n01i01807ent IS
END c07s01b00x00p07n01i01807ent;
ARCHITECTURE c07s01b00x00p07n01i01807arch OF c07s01b00x00p07n01i01807ent IS
signal POS : integer;
signal P1 : integer := 2;
signal P2 : integer := 2;
BEGIN
TESTING: PROCESS
BEGIN
POS <= P1 ** P2 after 20 ns;
wait for 35 ns;
assert NOT(POS = 4)
report "***PASSED TEST: c07s01b00x00p07n01i01807"
severity NOTE;
assert (POS = 4)
report "***FAILED TEST: c07s01b00x00p07n01i01807 - Primary**primary test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s01b00x00p07n01i01807arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc1807.vhd,v 1.2 2001-10-26 16:29:43 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s01b00x00p07n01i01807ent IS
END c07s01b00x00p07n01i01807ent;
ARCHITECTURE c07s01b00x00p07n01i01807arch OF c07s01b00x00p07n01i01807ent IS
signal POS : integer;
signal P1 : integer := 2;
signal P2 : integer := 2;
BEGIN
TESTING: PROCESS
BEGIN
POS <= P1 ** P2 after 20 ns;
wait for 35 ns;
assert NOT(POS = 4)
report "***PASSED TEST: c07s01b00x00p07n01i01807"
severity NOTE;
assert (POS = 4)
report "***FAILED TEST: c07s01b00x00p07n01i01807 - Primary**primary test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s01b00x00p07n01i01807arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc1807.vhd,v 1.2 2001-10-26 16:29:43 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s01b00x00p07n01i01807ent IS
END c07s01b00x00p07n01i01807ent;
ARCHITECTURE c07s01b00x00p07n01i01807arch OF c07s01b00x00p07n01i01807ent IS
signal POS : integer;
signal P1 : integer := 2;
signal P2 : integer := 2;
BEGIN
TESTING: PROCESS
BEGIN
POS <= P1 ** P2 after 20 ns;
wait for 35 ns;
assert NOT(POS = 4)
report "***PASSED TEST: c07s01b00x00p07n01i01807"
severity NOTE;
assert (POS = 4)
report "***FAILED TEST: c07s01b00x00p07n01i01807 - Primary**primary test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s01b00x00p07n01i01807arch;
|
--------------------------------------------------------------------------------
-- (c) Copyright 1995 - 2010 Xilinx, Inc. All rights reserved. --
-- --
-- This file contains confidential and proprietary information --
-- of Xilinx, Inc. and is protected under U.S. and --
-- international copyright and other intellectual property --
-- laws. --
-- --
-- DISCLAIMER --
-- This disclaimer is not a license and does not grant any --
-- rights to the materials distributed herewith. Except as --
-- otherwise provided in a valid license issued to you by --
-- Xilinx, and to the maximum extent permitted by applicable --
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND --
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES --
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING --
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- --
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and --
-- (2) Xilinx shall not be liable (whether in contract or tort, --
-- including negligence, or under any other theory of --
-- liability) for any loss or damage of any kind or nature --
-- related to, arising under or in connection with these --
-- materials, including for any direct, or any indirect, --
-- special, incidental, or consequential loss or damage --
-- (including loss of data, profits, goodwill, or any type of --
-- loss or damage suffered as a result of any action brought --
-- by a third party) even if such damage or loss was --
-- reasonably foreseeable or Xilinx had been advised of the --
-- possibility of the same. --
-- --
-- CRITICAL APPLICATIONS --
-- Xilinx products are not designed or intended to be fail- --
-- safe, or for use in any application requiring fail-safe --
-- performance, such as life-support or safety devices or --
-- systems, Class III medical devices, nuclear facilities, --
-- applications related to the deployment of airbags, or any --
-- other applications that could lead to death, personal --
-- injury, or severe property or environmental damage --
-- (individually and collectively, "Critical --
-- Applications"). Customer assumes the sole risk and --
-- liability of any use of Xilinx products in Critical --
-- Applications, subject only to applicable laws and --
-- regulations governing limitations on product liability. --
-- --
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS --
-- PART OF THIS FILE AT ALL TIMES. --
--------------------------------------------------------------------------------
-- Generated from component ID: xilinx.com:ip:fifo_generator:6.2
-- You must compile the wrapper file fifo_32x512.vhd when simulating
-- the core, fifo_32x512. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
Library XilinxCoreLib;
-- synthesis translate_on
ENTITY fifo_32x512 IS
port (
rst: in std_logic;
wr_clk: in std_logic;
rd_clk: in std_logic;
din: in std_logic_vector(31 downto 0);
wr_en: in std_logic;
rd_en: in std_logic;
prog_full_thresh_assert: in std_logic_vector(9 downto 0);
prog_full_thresh_negate: in std_logic_vector(9 downto 0);
dout: out std_logic_vector(31 downto 0);
full: out std_logic;
empty: out std_logic;
valid: out std_logic;
prog_full: out std_logic);
END fifo_32x512;
ARCHITECTURE fifo_32x512_a OF fifo_32x512 IS
-- synthesis translate_off
component wrapped_fifo_32x512
port (
rst: in std_logic;
wr_clk: in std_logic;
rd_clk: in std_logic;
din: in std_logic_vector(31 downto 0);
wr_en: in std_logic;
rd_en: in std_logic;
prog_full_thresh_assert: in std_logic_vector(9 downto 0);
prog_full_thresh_negate: in std_logic_vector(9 downto 0);
dout: out std_logic_vector(31 downto 0);
full: out std_logic;
empty: out std_logic;
valid: out std_logic;
prog_full: out std_logic);
end component;
-- Configuration specification
for all : wrapped_fifo_32x512 use entity XilinxCoreLib.fifo_generator_v6_2(behavioral)
generic map(
c_has_int_clk => 0,
c_wr_response_latency => 1,
c_rd_freq => 1,
c_has_srst => 0,
c_enable_rst_sync => 1,
c_has_rd_data_count => 0,
c_din_width => 32,
c_has_wr_data_count => 0,
c_full_flags_rst_val => 1,
c_implementation_type => 2,
c_family => "spartan6",
c_use_embedded_reg => 0,
c_has_wr_rst => 0,
c_wr_freq => 1,
c_use_dout_rst => 1,
c_underflow_low => 0,
c_has_meminit_file => 0,
c_has_overflow => 0,
c_preload_latency => 1,
c_dout_width => 32,
c_msgon_val => 1,
c_rd_depth => 1024,
c_default_value => "BlankString",
c_mif_file_name => "BlankString",
c_error_injection_type => 0,
c_has_underflow => 0,
c_has_rd_rst => 0,
c_has_almost_full => 0,
c_has_rst => 1,
c_data_count_width => 10,
c_has_wr_ack => 0,
c_use_ecc => 0,
c_wr_ack_low => 0,
c_common_clock => 0,
c_rd_pntr_width => 10,
c_use_fwft_data_count => 0,
c_has_almost_empty => 0,
c_rd_data_count_width => 10,
c_enable_rlocs => 0,
c_wr_pntr_width => 10,
c_overflow_low => 0,
c_prog_empty_type => 0,
c_optimization_mode => 0,
c_wr_data_count_width => 10,
c_preload_regs => 0,
c_dout_rst_val => "0",
c_has_data_count => 0,
c_prog_full_thresh_negate_val => 1020,
c_wr_depth => 1024,
c_prog_empty_thresh_negate_val => 3,
c_prog_empty_thresh_assert_val => 2,
c_has_valid => 1,
c_init_wr_pntr_val => 0,
c_prog_full_thresh_assert_val => 1021,
c_use_fifo16_flags => 0,
c_has_backup => 0,
c_valid_low => 0,
c_prim_fifo_type => "1kx36",
c_count_type => 0,
c_prog_full_type => 4,
c_memory_type => 1);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_fifo_32x512
port map (
rst => rst,
wr_clk => wr_clk,
rd_clk => rd_clk,
din => din,
wr_en => wr_en,
rd_en => rd_en,
prog_full_thresh_assert => prog_full_thresh_assert,
prog_full_thresh_negate => prog_full_thresh_negate,
dout => dout,
full => full,
empty => empty,
valid => valid,
prog_full => prog_full);
-- synthesis translate_on
END fifo_32x512_a;
|
--------------------------------------------------------------------------------
-- (c) Copyright 1995 - 2010 Xilinx, Inc. All rights reserved. --
-- --
-- This file contains confidential and proprietary information --
-- of Xilinx, Inc. and is protected under U.S. and --
-- international copyright and other intellectual property --
-- laws. --
-- --
-- DISCLAIMER --
-- This disclaimer is not a license and does not grant any --
-- rights to the materials distributed herewith. Except as --
-- otherwise provided in a valid license issued to you by --
-- Xilinx, and to the maximum extent permitted by applicable --
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND --
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES --
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING --
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- --
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and --
-- (2) Xilinx shall not be liable (whether in contract or tort, --
-- including negligence, or under any other theory of --
-- liability) for any loss or damage of any kind or nature --
-- related to, arising under or in connection with these --
-- materials, including for any direct, or any indirect, --
-- special, incidental, or consequential loss or damage --
-- (including loss of data, profits, goodwill, or any type of --
-- loss or damage suffered as a result of any action brought --
-- by a third party) even if such damage or loss was --
-- reasonably foreseeable or Xilinx had been advised of the --
-- possibility of the same. --
-- --
-- CRITICAL APPLICATIONS --
-- Xilinx products are not designed or intended to be fail- --
-- safe, or for use in any application requiring fail-safe --
-- performance, such as life-support or safety devices or --
-- systems, Class III medical devices, nuclear facilities, --
-- applications related to the deployment of airbags, or any --
-- other applications that could lead to death, personal --
-- injury, or severe property or environmental damage --
-- (individually and collectively, "Critical --
-- Applications"). Customer assumes the sole risk and --
-- liability of any use of Xilinx products in Critical --
-- Applications, subject only to applicable laws and --
-- regulations governing limitations on product liability. --
-- --
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS --
-- PART OF THIS FILE AT ALL TIMES. --
--------------------------------------------------------------------------------
-- Generated from component ID: xilinx.com:ip:fifo_generator:6.2
-- You must compile the wrapper file fifo_32x512.vhd when simulating
-- the core, fifo_32x512. When compiling the wrapper file, be sure to
-- reference the XilinxCoreLib VHDL simulation library. For detailed
-- instructions, please refer to the "CORE Generator Help".
-- The synthesis directives "translate_off/translate_on" specified
-- below are supported by Xilinx, Mentor Graphics and Synplicity
-- synthesis tools. Ensure they are correct for your synthesis tool(s).
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- synthesis translate_off
Library XilinxCoreLib;
-- synthesis translate_on
ENTITY fifo_32x512 IS
port (
rst: in std_logic;
wr_clk: in std_logic;
rd_clk: in std_logic;
din: in std_logic_vector(31 downto 0);
wr_en: in std_logic;
rd_en: in std_logic;
prog_full_thresh_assert: in std_logic_vector(9 downto 0);
prog_full_thresh_negate: in std_logic_vector(9 downto 0);
dout: out std_logic_vector(31 downto 0);
full: out std_logic;
empty: out std_logic;
valid: out std_logic;
prog_full: out std_logic);
END fifo_32x512;
ARCHITECTURE fifo_32x512_a OF fifo_32x512 IS
-- synthesis translate_off
component wrapped_fifo_32x512
port (
rst: in std_logic;
wr_clk: in std_logic;
rd_clk: in std_logic;
din: in std_logic_vector(31 downto 0);
wr_en: in std_logic;
rd_en: in std_logic;
prog_full_thresh_assert: in std_logic_vector(9 downto 0);
prog_full_thresh_negate: in std_logic_vector(9 downto 0);
dout: out std_logic_vector(31 downto 0);
full: out std_logic;
empty: out std_logic;
valid: out std_logic;
prog_full: out std_logic);
end component;
-- Configuration specification
for all : wrapped_fifo_32x512 use entity XilinxCoreLib.fifo_generator_v6_2(behavioral)
generic map(
c_has_int_clk => 0,
c_wr_response_latency => 1,
c_rd_freq => 1,
c_has_srst => 0,
c_enable_rst_sync => 1,
c_has_rd_data_count => 0,
c_din_width => 32,
c_has_wr_data_count => 0,
c_full_flags_rst_val => 1,
c_implementation_type => 2,
c_family => "spartan6",
c_use_embedded_reg => 0,
c_has_wr_rst => 0,
c_wr_freq => 1,
c_use_dout_rst => 1,
c_underflow_low => 0,
c_has_meminit_file => 0,
c_has_overflow => 0,
c_preload_latency => 1,
c_dout_width => 32,
c_msgon_val => 1,
c_rd_depth => 1024,
c_default_value => "BlankString",
c_mif_file_name => "BlankString",
c_error_injection_type => 0,
c_has_underflow => 0,
c_has_rd_rst => 0,
c_has_almost_full => 0,
c_has_rst => 1,
c_data_count_width => 10,
c_has_wr_ack => 0,
c_use_ecc => 0,
c_wr_ack_low => 0,
c_common_clock => 0,
c_rd_pntr_width => 10,
c_use_fwft_data_count => 0,
c_has_almost_empty => 0,
c_rd_data_count_width => 10,
c_enable_rlocs => 0,
c_wr_pntr_width => 10,
c_overflow_low => 0,
c_prog_empty_type => 0,
c_optimization_mode => 0,
c_wr_data_count_width => 10,
c_preload_regs => 0,
c_dout_rst_val => "0",
c_has_data_count => 0,
c_prog_full_thresh_negate_val => 1020,
c_wr_depth => 1024,
c_prog_empty_thresh_negate_val => 3,
c_prog_empty_thresh_assert_val => 2,
c_has_valid => 1,
c_init_wr_pntr_val => 0,
c_prog_full_thresh_assert_val => 1021,
c_use_fifo16_flags => 0,
c_has_backup => 0,
c_valid_low => 0,
c_prim_fifo_type => "1kx36",
c_count_type => 0,
c_prog_full_type => 4,
c_memory_type => 1);
-- synthesis translate_on
BEGIN
-- synthesis translate_off
U0 : wrapped_fifo_32x512
port map (
rst => rst,
wr_clk => wr_clk,
rd_clk => rd_clk,
din => din,
wr_en => wr_en,
rd_en => rd_en,
prog_full_thresh_assert => prog_full_thresh_assert,
prog_full_thresh_negate => prog_full_thresh_negate,
dout => dout,
full => full,
empty => empty,
valid => valid,
prog_full => prog_full);
-- synthesis translate_on
END fifo_32x512_a;
|
--IITB RISC processor---
--Mux Module(2to1)---
-- author: Anakha
library ieee;
use ieee.std_logic_1164.all;
entity mux2to1 is
generic (
nbits : integer);
port (
input0 : in std_logic_vector(nbits-1 downto 0);
input1 : in std_logic_vector(nbits-1 downto 0);
output : out std_logic_vector(nbits-1 downto 0);
sel : in std_logic);
end mux2to1;
architecture behave of mux2to1 is
begin -- mux2to1
process(input0,input1,sel)
variable sel_var: std_logic;
begin
sel_var:= sel;
case sel_var is
when '0' =>
output <= input0;
when '1' =>
output <= input1;
when others =>
output <= "Z";
end case;
end process;
end behave;
|
--------------------------------------------------------------------------------
--
-- BLK MEM GEN v7_3 Core - Stimulus Generator For Single Port ROM
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2006_3010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
--
-- Filename: bmg_stim_gen.vhd
--
-- Description:
-- Stimulus Generation For SROM
--
--------------------------------------------------------------------------------
-- Author: IP Solutions Division
--
-- History: Sep 12, 2011 - First Release
--------------------------------------------------------------------------------
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
LIBRARY work;
USE work.ALL;
USE work.BMG_TB_PKG.ALL;
ENTITY REGISTER_LOGIC_SROM IS
PORT(
Q : OUT STD_LOGIC;
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
D : IN STD_LOGIC
);
END REGISTER_LOGIC_SROM;
ARCHITECTURE REGISTER_ARCH OF REGISTER_LOGIC_SROM IS
SIGNAL Q_O : STD_LOGIC :='0';
BEGIN
Q <= Q_O;
FF_BEH: PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(RST /= '0' ) THEN
Q_O <= '0';
ELSE
Q_O <= D;
END IF;
END IF;
END PROCESS;
END REGISTER_ARCH;
LIBRARY STD;
USE STD.TEXTIO.ALL;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
--USE IEEE.NUMERIC_STD.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
LIBRARY work;
USE work.ALL;
USE work.BMG_TB_PKG.ALL;
ENTITY BMG_STIM_GEN IS
GENERIC ( C_ROM_SYNTH : INTEGER := 0
);
PORT (
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
ADDRA: OUT STD_LOGIC_VECTOR(3 DOWNTO 0) := (OTHERS => '0');
DATA_IN : IN STD_LOGIC_VECTOR (31 DOWNTO 0); --OUTPUT VECTOR
STATUS : OUT STD_LOGIC:= '0'
);
END BMG_STIM_GEN;
ARCHITECTURE BEHAVIORAL OF BMG_STIM_GEN IS
FUNCTION hex_to_std_logic_vector(
hex_str : STRING;
return_width : INTEGER)
RETURN STD_LOGIC_VECTOR IS
VARIABLE tmp : STD_LOGIC_VECTOR((hex_str'LENGTH*4)+return_width-1
DOWNTO 0);
BEGIN
tmp := (OTHERS => '0');
FOR i IN 1 TO hex_str'LENGTH LOOP
CASE hex_str((hex_str'LENGTH+1)-i) IS
WHEN '0' => tmp(i*4-1 DOWNTO (i-1)*4) := "0000";
WHEN '1' => tmp(i*4-1 DOWNTO (i-1)*4) := "0001";
WHEN '2' => tmp(i*4-1 DOWNTO (i-1)*4) := "0010";
WHEN '3' => tmp(i*4-1 DOWNTO (i-1)*4) := "0011";
WHEN '4' => tmp(i*4-1 DOWNTO (i-1)*4) := "0100";
WHEN '5' => tmp(i*4-1 DOWNTO (i-1)*4) := "0101";
WHEN '6' => tmp(i*4-1 DOWNTO (i-1)*4) := "0110";
WHEN '7' => tmp(i*4-1 DOWNTO (i-1)*4) := "0111";
WHEN '8' => tmp(i*4-1 DOWNTO (i-1)*4) := "1000";
WHEN '9' => tmp(i*4-1 DOWNTO (i-1)*4) := "1001";
WHEN 'a' | 'A' => tmp(i*4-1 DOWNTO (i-1)*4) := "1010";
WHEN 'b' | 'B' => tmp(i*4-1 DOWNTO (i-1)*4) := "1011";
WHEN 'c' | 'C' => tmp(i*4-1 DOWNTO (i-1)*4) := "1100";
WHEN 'd' | 'D' => tmp(i*4-1 DOWNTO (i-1)*4) := "1101";
WHEN 'e' | 'E' => tmp(i*4-1 DOWNTO (i-1)*4) := "1110";
WHEN 'f' | 'F' => tmp(i*4-1 DOWNTO (i-1)*4) := "1111";
WHEN OTHERS => tmp(i*4-1 DOWNTO (i-1)*4) := "1111";
END CASE;
END LOOP;
RETURN tmp(return_width-1 DOWNTO 0);
END hex_to_std_logic_vector;
CONSTANT ZERO : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL READ_ADDR_INT : STD_LOGIC_VECTOR(3 DOWNTO 0) := (OTHERS => '0');
SIGNAL READ_ADDR : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL CHECK_READ_ADDR : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL EXPECTED_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL DO_READ : STD_LOGIC := '0';
SIGNAL CHECK_DATA : STD_LOGIC := '0';
SIGNAL CHECK_DATA_R : STD_LOGIC := '0';
SIGNAL CHECK_DATA_2R : STD_LOGIC := '0';
SIGNAL DO_READ_REG: STD_LOGIC_VECTOR(4 DOWNTO 0) :=(OTHERS => '0');
CONSTANT DEFAULT_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0):= hex_to_std_logic_vector("0",32);
BEGIN
SYNTH_COE: IF(C_ROM_SYNTH =0 ) GENERATE
type mem_type is array (15 downto 0) of std_logic_vector(31 downto 0);
FUNCTION bit_to_sl(input: BIT) RETURN STD_LOGIC IS
VARIABLE temp_return : STD_LOGIC;
BEGIN
IF (input = '0') THEN
temp_return := '0';
ELSE
temp_return := '1';
END IF;
RETURN temp_return;
END bit_to_sl;
function char_to_std_logic (
char : in character)
return std_logic is
variable data : std_logic;
begin
if char = '0' then
data := '0';
elsif char = '1' then
data := '1';
elsif char = 'X' then
data := 'X';
else
assert false
report "character which is not '0', '1' or 'X'."
severity warning;
data := 'U';
end if;
return data;
end char_to_std_logic;
impure FUNCTION init_memory( C_USE_DEFAULT_DATA : INTEGER;
C_LOAD_INIT_FILE : INTEGER ;
C_INIT_FILE_NAME : STRING ;
DEFAULT_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0);
width : INTEGER;
depth : INTEGER)
RETURN mem_type IS
VARIABLE init_return : mem_type := (OTHERS => (OTHERS => '0'));
FILE init_file : TEXT;
VARIABLE mem_vector : BIT_VECTOR(width-1 DOWNTO 0);
VARIABLE bitline : LINE;
variable bitsgood : boolean := true;
variable bitchar : character;
VARIABLE i : INTEGER;
VARIABLE j : INTEGER;
BEGIN
--Display output message indicating that the behavioral model is being
--initialized
ASSERT (NOT (C_USE_DEFAULT_DATA=1 OR C_LOAD_INIT_FILE=1)) REPORT " Block Memory Generator CORE Generator module loading initial data..." SEVERITY NOTE;
-- Setup the default data
-- Default data is with respect to write_port_A and may be wider
-- or narrower than init_return width. The following loops map
-- default data into the memory
IF (C_USE_DEFAULT_DATA=1) THEN
FOR i IN 0 TO depth-1 LOOP
init_return(i) := DEFAULT_DATA;
END LOOP;
END IF;
-- Read in the .mif file
-- The init data is formatted with respect to write port A dimensions.
-- The init_return vector is formatted with respect to minimum width and
-- maximum depth; the following loops map the .mif file into the memory
IF (C_LOAD_INIT_FILE=1) THEN
file_open(init_file, C_INIT_FILE_NAME, read_mode);
i := 0;
WHILE (i < depth AND NOT endfile(init_file)) LOOP
mem_vector := (OTHERS => '0');
readline(init_file, bitline);
-- read(file_buffer, mem_vector(file_buffer'LENGTH-1 DOWNTO 0));
FOR j IN 0 TO width-1 LOOP
read(bitline,bitchar,bitsgood);
init_return(i)(width-1-j) := char_to_std_logic(bitchar);
END LOOP;
i := i + 1;
END LOOP;
file_close(init_file);
END IF;
RETURN init_return;
END FUNCTION;
--***************************************************************
-- convert bit to STD_LOGIC
--***************************************************************
constant c_init : mem_type := init_memory(0,
1,
"sounds_mem.mif",
DEFAULT_DATA,
32,
16);
constant rom : mem_type := c_init;
BEGIN
EXPECTED_DATA <= rom(conv_integer(unsigned(check_read_addr)));
CHECKER_RD_ADDR_GEN_INST:ENTITY work.ADDR_GEN
GENERIC MAP( C_MAX_DEPTH =>16 )
PORT MAP(
CLK => CLK,
RST => RST,
EN => CHECK_DATA_2R,
LOAD => '0',
LOAD_VALUE => ZERO,
ADDR_OUT => CHECK_READ_ADDR
);
PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(CHECK_DATA_2R ='1') THEN
IF(EXPECTED_DATA = DATA_IN) THEN
STATUS<='0';
ELSE
STATUS <= '1';
END IF;
END IF;
END IF;
END PROCESS;
END GENERATE;
-- Simulatable ROM
--Synthesizable ROM
SYNTH_CHECKER: IF(C_ROM_SYNTH = 1) GENERATE
PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(CHECK_DATA_2R='1') THEN
IF(DATA_IN=DEFAULT_DATA) THEN
STATUS <= '0';
ELSE
STATUS <= '1';
END IF;
END IF;
END IF;
END PROCESS;
END GENERATE;
READ_ADDR_INT(3 DOWNTO 0) <= READ_ADDR(3 DOWNTO 0);
ADDRA <= READ_ADDR_INT ;
CHECK_DATA <= DO_READ;
RD_ADDR_GEN_INST:ENTITY work.ADDR_GEN
GENERIC MAP( C_MAX_DEPTH => 16 )
PORT MAP(
CLK => CLK,
RST => RST,
EN => DO_READ,
LOAD => '0',
LOAD_VALUE => ZERO,
ADDR_OUT => READ_ADDR
);
RD_PROCESS: PROCESS (CLK)
BEGIN
IF (RISING_EDGE(CLK)) THEN
IF(RST='1') THEN
DO_READ <= '0';
ELSE
DO_READ <= '1';
END IF;
END IF;
END PROCESS;
BEGIN_SHIFT_REG: FOR I IN 0 TO 4 GENERATE
BEGIN
DFF_RIGHT: IF I=0 GENERATE
BEGIN
SHIFT_INST_0: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => DO_READ_REG(0),
CLK =>CLK,
RST=>RST,
D =>DO_READ
);
END GENERATE DFF_RIGHT;
DFF_OTHERS: IF ((I>0) AND (I<=4)) GENERATE
BEGIN
SHIFT_INST: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => DO_READ_REG(I),
CLK =>CLK,
RST=>RST,
D =>DO_READ_REG(I-1)
);
END GENERATE DFF_OTHERS;
END GENERATE BEGIN_SHIFT_REG;
CHECK_DATA_REG_1: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => CHECK_DATA_2R,
CLK =>CLK,
RST=>RST,
D =>CHECK_DATA_R
);
CHECK_DATA_REG: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => CHECK_DATA_R,
CLK =>CLK,
RST=>RST,
D =>CHECK_DATA
);
END ARCHITECTURE;
|
--------------------------------------------------------------------------------
--
-- BLK MEM GEN v7_3 Core - Stimulus Generator For Single Port ROM
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2006_3010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
--
-- Filename: bmg_stim_gen.vhd
--
-- Description:
-- Stimulus Generation For SROM
--
--------------------------------------------------------------------------------
-- Author: IP Solutions Division
--
-- History: Sep 12, 2011 - First Release
--------------------------------------------------------------------------------
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
LIBRARY work;
USE work.ALL;
USE work.BMG_TB_PKG.ALL;
ENTITY REGISTER_LOGIC_SROM IS
PORT(
Q : OUT STD_LOGIC;
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
D : IN STD_LOGIC
);
END REGISTER_LOGIC_SROM;
ARCHITECTURE REGISTER_ARCH OF REGISTER_LOGIC_SROM IS
SIGNAL Q_O : STD_LOGIC :='0';
BEGIN
Q <= Q_O;
FF_BEH: PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(RST /= '0' ) THEN
Q_O <= '0';
ELSE
Q_O <= D;
END IF;
END IF;
END PROCESS;
END REGISTER_ARCH;
LIBRARY STD;
USE STD.TEXTIO.ALL;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
--USE IEEE.NUMERIC_STD.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_MISC.ALL;
LIBRARY work;
USE work.ALL;
USE work.BMG_TB_PKG.ALL;
ENTITY BMG_STIM_GEN IS
GENERIC ( C_ROM_SYNTH : INTEGER := 0
);
PORT (
CLK : IN STD_LOGIC;
RST : IN STD_LOGIC;
ADDRA: OUT STD_LOGIC_VECTOR(3 DOWNTO 0) := (OTHERS => '0');
DATA_IN : IN STD_LOGIC_VECTOR (31 DOWNTO 0); --OUTPUT VECTOR
STATUS : OUT STD_LOGIC:= '0'
);
END BMG_STIM_GEN;
ARCHITECTURE BEHAVIORAL OF BMG_STIM_GEN IS
FUNCTION hex_to_std_logic_vector(
hex_str : STRING;
return_width : INTEGER)
RETURN STD_LOGIC_VECTOR IS
VARIABLE tmp : STD_LOGIC_VECTOR((hex_str'LENGTH*4)+return_width-1
DOWNTO 0);
BEGIN
tmp := (OTHERS => '0');
FOR i IN 1 TO hex_str'LENGTH LOOP
CASE hex_str((hex_str'LENGTH+1)-i) IS
WHEN '0' => tmp(i*4-1 DOWNTO (i-1)*4) := "0000";
WHEN '1' => tmp(i*4-1 DOWNTO (i-1)*4) := "0001";
WHEN '2' => tmp(i*4-1 DOWNTO (i-1)*4) := "0010";
WHEN '3' => tmp(i*4-1 DOWNTO (i-1)*4) := "0011";
WHEN '4' => tmp(i*4-1 DOWNTO (i-1)*4) := "0100";
WHEN '5' => tmp(i*4-1 DOWNTO (i-1)*4) := "0101";
WHEN '6' => tmp(i*4-1 DOWNTO (i-1)*4) := "0110";
WHEN '7' => tmp(i*4-1 DOWNTO (i-1)*4) := "0111";
WHEN '8' => tmp(i*4-1 DOWNTO (i-1)*4) := "1000";
WHEN '9' => tmp(i*4-1 DOWNTO (i-1)*4) := "1001";
WHEN 'a' | 'A' => tmp(i*4-1 DOWNTO (i-1)*4) := "1010";
WHEN 'b' | 'B' => tmp(i*4-1 DOWNTO (i-1)*4) := "1011";
WHEN 'c' | 'C' => tmp(i*4-1 DOWNTO (i-1)*4) := "1100";
WHEN 'd' | 'D' => tmp(i*4-1 DOWNTO (i-1)*4) := "1101";
WHEN 'e' | 'E' => tmp(i*4-1 DOWNTO (i-1)*4) := "1110";
WHEN 'f' | 'F' => tmp(i*4-1 DOWNTO (i-1)*4) := "1111";
WHEN OTHERS => tmp(i*4-1 DOWNTO (i-1)*4) := "1111";
END CASE;
END LOOP;
RETURN tmp(return_width-1 DOWNTO 0);
END hex_to_std_logic_vector;
CONSTANT ZERO : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL READ_ADDR_INT : STD_LOGIC_VECTOR(3 DOWNTO 0) := (OTHERS => '0');
SIGNAL READ_ADDR : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL CHECK_READ_ADDR : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL EXPECTED_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
SIGNAL DO_READ : STD_LOGIC := '0';
SIGNAL CHECK_DATA : STD_LOGIC := '0';
SIGNAL CHECK_DATA_R : STD_LOGIC := '0';
SIGNAL CHECK_DATA_2R : STD_LOGIC := '0';
SIGNAL DO_READ_REG: STD_LOGIC_VECTOR(4 DOWNTO 0) :=(OTHERS => '0');
CONSTANT DEFAULT_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0):= hex_to_std_logic_vector("0",32);
BEGIN
SYNTH_COE: IF(C_ROM_SYNTH =0 ) GENERATE
type mem_type is array (15 downto 0) of std_logic_vector(31 downto 0);
FUNCTION bit_to_sl(input: BIT) RETURN STD_LOGIC IS
VARIABLE temp_return : STD_LOGIC;
BEGIN
IF (input = '0') THEN
temp_return := '0';
ELSE
temp_return := '1';
END IF;
RETURN temp_return;
END bit_to_sl;
function char_to_std_logic (
char : in character)
return std_logic is
variable data : std_logic;
begin
if char = '0' then
data := '0';
elsif char = '1' then
data := '1';
elsif char = 'X' then
data := 'X';
else
assert false
report "character which is not '0', '1' or 'X'."
severity warning;
data := 'U';
end if;
return data;
end char_to_std_logic;
impure FUNCTION init_memory( C_USE_DEFAULT_DATA : INTEGER;
C_LOAD_INIT_FILE : INTEGER ;
C_INIT_FILE_NAME : STRING ;
DEFAULT_DATA : STD_LOGIC_VECTOR(31 DOWNTO 0);
width : INTEGER;
depth : INTEGER)
RETURN mem_type IS
VARIABLE init_return : mem_type := (OTHERS => (OTHERS => '0'));
FILE init_file : TEXT;
VARIABLE mem_vector : BIT_VECTOR(width-1 DOWNTO 0);
VARIABLE bitline : LINE;
variable bitsgood : boolean := true;
variable bitchar : character;
VARIABLE i : INTEGER;
VARIABLE j : INTEGER;
BEGIN
--Display output message indicating that the behavioral model is being
--initialized
ASSERT (NOT (C_USE_DEFAULT_DATA=1 OR C_LOAD_INIT_FILE=1)) REPORT " Block Memory Generator CORE Generator module loading initial data..." SEVERITY NOTE;
-- Setup the default data
-- Default data is with respect to write_port_A and may be wider
-- or narrower than init_return width. The following loops map
-- default data into the memory
IF (C_USE_DEFAULT_DATA=1) THEN
FOR i IN 0 TO depth-1 LOOP
init_return(i) := DEFAULT_DATA;
END LOOP;
END IF;
-- Read in the .mif file
-- The init data is formatted with respect to write port A dimensions.
-- The init_return vector is formatted with respect to minimum width and
-- maximum depth; the following loops map the .mif file into the memory
IF (C_LOAD_INIT_FILE=1) THEN
file_open(init_file, C_INIT_FILE_NAME, read_mode);
i := 0;
WHILE (i < depth AND NOT endfile(init_file)) LOOP
mem_vector := (OTHERS => '0');
readline(init_file, bitline);
-- read(file_buffer, mem_vector(file_buffer'LENGTH-1 DOWNTO 0));
FOR j IN 0 TO width-1 LOOP
read(bitline,bitchar,bitsgood);
init_return(i)(width-1-j) := char_to_std_logic(bitchar);
END LOOP;
i := i + 1;
END LOOP;
file_close(init_file);
END IF;
RETURN init_return;
END FUNCTION;
--***************************************************************
-- convert bit to STD_LOGIC
--***************************************************************
constant c_init : mem_type := init_memory(0,
1,
"sounds_mem.mif",
DEFAULT_DATA,
32,
16);
constant rom : mem_type := c_init;
BEGIN
EXPECTED_DATA <= rom(conv_integer(unsigned(check_read_addr)));
CHECKER_RD_ADDR_GEN_INST:ENTITY work.ADDR_GEN
GENERIC MAP( C_MAX_DEPTH =>16 )
PORT MAP(
CLK => CLK,
RST => RST,
EN => CHECK_DATA_2R,
LOAD => '0',
LOAD_VALUE => ZERO,
ADDR_OUT => CHECK_READ_ADDR
);
PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(CHECK_DATA_2R ='1') THEN
IF(EXPECTED_DATA = DATA_IN) THEN
STATUS<='0';
ELSE
STATUS <= '1';
END IF;
END IF;
END IF;
END PROCESS;
END GENERATE;
-- Simulatable ROM
--Synthesizable ROM
SYNTH_CHECKER: IF(C_ROM_SYNTH = 1) GENERATE
PROCESS(CLK)
BEGIN
IF(RISING_EDGE(CLK)) THEN
IF(CHECK_DATA_2R='1') THEN
IF(DATA_IN=DEFAULT_DATA) THEN
STATUS <= '0';
ELSE
STATUS <= '1';
END IF;
END IF;
END IF;
END PROCESS;
END GENERATE;
READ_ADDR_INT(3 DOWNTO 0) <= READ_ADDR(3 DOWNTO 0);
ADDRA <= READ_ADDR_INT ;
CHECK_DATA <= DO_READ;
RD_ADDR_GEN_INST:ENTITY work.ADDR_GEN
GENERIC MAP( C_MAX_DEPTH => 16 )
PORT MAP(
CLK => CLK,
RST => RST,
EN => DO_READ,
LOAD => '0',
LOAD_VALUE => ZERO,
ADDR_OUT => READ_ADDR
);
RD_PROCESS: PROCESS (CLK)
BEGIN
IF (RISING_EDGE(CLK)) THEN
IF(RST='1') THEN
DO_READ <= '0';
ELSE
DO_READ <= '1';
END IF;
END IF;
END PROCESS;
BEGIN_SHIFT_REG: FOR I IN 0 TO 4 GENERATE
BEGIN
DFF_RIGHT: IF I=0 GENERATE
BEGIN
SHIFT_INST_0: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => DO_READ_REG(0),
CLK =>CLK,
RST=>RST,
D =>DO_READ
);
END GENERATE DFF_RIGHT;
DFF_OTHERS: IF ((I>0) AND (I<=4)) GENERATE
BEGIN
SHIFT_INST: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => DO_READ_REG(I),
CLK =>CLK,
RST=>RST,
D =>DO_READ_REG(I-1)
);
END GENERATE DFF_OTHERS;
END GENERATE BEGIN_SHIFT_REG;
CHECK_DATA_REG_1: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => CHECK_DATA_2R,
CLK =>CLK,
RST=>RST,
D =>CHECK_DATA_R
);
CHECK_DATA_REG: ENTITY work.REGISTER_LOGIC_SROM
PORT MAP(
Q => CHECK_DATA_R,
CLK =>CLK,
RST=>RST,
D =>CHECK_DATA
);
END ARCHITECTURE;
|
-- (c) Copyright 2012 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
------------------------------------------------------------
-------------------------------------------------------------------------------
-- Filename: axi_dma_s2mm_sm.vhd
-- Description: This entity contains the S2MM DMA Controller State Machine
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
library unisim;
use unisim.vcomponents.all;
library axi_dma_v7_1_10;
use axi_dma_v7_1_10.axi_dma_pkg.all;
library lib_pkg_v1_0_2;
use lib_pkg_v1_0_2.lib_pkg.clog2;
-------------------------------------------------------------------------------
entity axi_dma_s2mm_sm is
generic (
C_M_AXI_S2MM_ADDR_WIDTH : integer range 32 to 64 := 32;
-- Master AXI Memory Map Address Width for S2MM Write Port
C_SG_INCLUDE_STSCNTRL_STRM : integer range 0 to 1 := 1;
-- Include or Exclude AXI Status and AXI Control Streams
-- 0 = Exclude Status and Control Streams
-- 1 = Include Status and Control Streams
C_SG_USE_STSAPP_LENGTH : integer range 0 to 1 := 1;
-- Enable or Disable use of Status Stream Rx Length. Only valid
-- if C_SG_INCLUDE_STSCNTRL_STRM = 1
-- 0 = Don't use Rx Length
-- 1 = Use Rx Length
C_SG_LENGTH_WIDTH : integer range 8 to 23 := 14;
-- Width of Buffer Length, Transferred Bytes, and BTT fields
C_SG_INCLUDE_DESC_QUEUE : integer range 0 to 1 := 0;
-- Include or Exclude Scatter Gather Descriptor Queuing
-- 0 = Exclude SG Descriptor Queuing
-- 1 = Include SG Descriptor Queuing
C_ENABLE_MULTI_CHANNEL : integer range 0 to 1 := 0;
C_MICRO_DMA : integer range 0 to 1 := 0;
C_PRMY_CMDFIFO_DEPTH : integer range 1 to 16 := 1
-- Depth of DataMover command FIFO
);
port (
m_axi_sg_aclk : in std_logic ; --
m_axi_sg_aresetn : in std_logic ; --
--
s2mm_stop : in std_logic ; --
--
-- S2MM Control and Status --
s2mm_run_stop : in std_logic ; --
s2mm_keyhole : in std_logic ; --
s2mm_ftch_idle : in std_logic ; --
s2mm_desc_flush : in std_logic ; --
s2mm_cmnd_idle : out std_logic ; --
s2mm_sts_idle : out std_logic ; --
s2mm_eof_set : out std_logic ; --
s2mm_eof_micro : in std_logic ; --
s2mm_sof_micro : in std_logic ; --
--
-- S2MM Descriptor Fetch Request --
desc_fetch_req : out std_logic ; --
desc_fetch_done : in std_logic ; --
desc_update_done : in std_logic ; --
updt_pending : in std_logic ;
desc_available : in std_logic ; --
--
-- S2MM Status Stream RX Length --
s2mm_rxlength_valid : in std_logic ; --
s2mm_rxlength_clr : out std_logic ; --
s2mm_rxlength : in std_logic_vector --
(C_SG_LENGTH_WIDTH - 1 downto 0) ; --
--
-- DataMover Command --
s2mm_cmnd_wr : out std_logic ; --
s2mm_cmnd_data : out std_logic_vector --
((C_M_AXI_S2MM_ADDR_WIDTH-32+2*32+CMD_BASE_WIDTH+46)-1 downto 0); --
s2mm_cmnd_pending : in std_logic ; --
--
-- Descriptor Fields --
s2mm_desc_info : in std_logic_vector --
(31 downto 0); --
s2mm_desc_baddress : in std_logic_vector --
(C_M_AXI_S2MM_ADDR_WIDTH-1 downto 0); --
s2mm_desc_blength : in std_logic_vector --
(BUFFER_LENGTH_WIDTH-1 downto 0); --
s2mm_desc_blength_v : in std_logic_vector --
(BUFFER_LENGTH_WIDTH-1 downto 0); --
s2mm_desc_blength_s : in std_logic_vector --
(BUFFER_LENGTH_WIDTH-1 downto 0) --
);
end axi_dma_s2mm_sm;
-------------------------------------------------------------------------------
-- Architecture
-------------------------------------------------------------------------------
architecture implementation of axi_dma_s2mm_sm is
attribute DowngradeIPIdentifiedWarnings: string;
attribute DowngradeIPIdentifiedWarnings of implementation : architecture is "yes";
-------------------------------------------------------------------------------
-- Functions
-------------------------------------------------------------------------------
-- No Functions Declared
-------------------------------------------------------------------------------
-- Constants Declarations
-------------------------------------------------------------------------------
-- DataMover Commmand TAG
constant S2MM_CMD_TAG : std_logic_vector(2 downto 0) := (others => '0');
-- DataMover Command Destination Stream Offset
constant S2MM_CMD_DSA : std_logic_vector(5 downto 0) := (others => '0');
-- DataMover Cmnd Reserved Bits
constant S2MM_CMD_RSVD : std_logic_vector(
DATAMOVER_CMD_RSVMSB_BOFST + C_M_AXI_S2MM_ADDR_WIDTH downto
DATAMOVER_CMD_RSVLSB_BOFST + C_M_AXI_S2MM_ADDR_WIDTH)
:= (others => '0');
-- Queued commands counter width
constant COUNTER_WIDTH : integer := clog2(C_PRMY_CMDFIFO_DEPTH+1);
-- Queued commands zero count
constant ZERO_COUNT : std_logic_vector(COUNTER_WIDTH - 1 downto 0)
:= (others => '0');
-- Zero buffer length error - compare value
constant ZERO_LENGTH : std_logic_vector(C_SG_LENGTH_WIDTH-1 downto 0)
:= (others => '0');
constant ZERO_BUFFER : std_logic_vector(BUFFER_LENGTH_WIDTH-1 downto 0)
:= (others => '0');
-------------------------------------------------------------------------------
-- Signal / Type Declarations
-------------------------------------------------------------------------------
-- State Machine Signals
signal desc_fetch_req_cmb : std_logic := '0';
signal write_cmnd_cmb : std_logic := '0';
signal s2mm_rxlength_clr_cmb : std_logic := '0';
signal rxlength : std_logic_vector(C_SG_LENGTH_WIDTH-1 downto 0) := (others => '0');
signal s2mm_rxlength_set : std_logic := '0';
signal blength_grtr_rxlength : std_logic := '0';
signal rxlength_fetched : std_logic := '0';
signal cmnds_queued : std_logic_vector(COUNTER_WIDTH - 1 downto 0) := (others => '0');
signal cmnds_queued_shift : std_logic_vector(C_PRMY_CMDFIFO_DEPTH - 1 downto 0) := (others => '0');
signal count_incr : std_logic := '0';
signal count_decr : std_logic := '0';
signal desc_fetch_done_d1 : std_logic := '0';
signal zero_length_error : std_logic := '0';
signal s2mm_eof_set_i : std_logic := '0';
signal queue_more : std_logic := '0';
signal burst_type : std_logic;
signal eof_micro : std_logic;
-------------------------------------------------------------------------------
-- Begin architecture logic
-------------------------------------------------------------------------------
begin
EN_MICRO_DMA : if C_MICRO_DMA = 1 generate
begin
eof_micro <= s2mm_eof_micro;
end generate EN_MICRO_DMA;
NO_MICRO_DMA : if C_MICRO_DMA = 0 generate
begin
eof_micro <= '0';
end generate NO_MICRO_DMA;
s2mm_eof_set <= s2mm_eof_set_i;
burst_type <= '1' and (not s2mm_keyhole);
-- A 0 s2mm_keyhole means incremental burst
-- a 1 s2mm_keyhole means fixed burst
-------------------------------------------------------------------------------
-- Not using rx length from status stream - (indeterminate length mode)
-------------------------------------------------------------------------------
GEN_SM_FOR_NO_LENGTH : if (C_SG_USE_STSAPP_LENGTH = 0 or C_SG_INCLUDE_STSCNTRL_STRM = 0 or C_ENABLE_MULTI_CHANNEL = 1) generate
type SG_S2MM_STATE_TYPE is (
IDLE,
FETCH_DESCRIPTOR,
-- EXECUTE_XFER,
WAIT_STATUS
);
signal s2mm_cs : SG_S2MM_STATE_TYPE;
signal s2mm_ns : SG_S2MM_STATE_TYPE;
begin
-- For no status stream or not using length in status app field then eof set is
-- generated from datamover status (see axi_dma_s2mm_cmdsts_if.vhd)
s2mm_eof_set_i <= '0';
-------------------------------------------------------------------------------
-- S2MM Transfer State Machine
-------------------------------------------------------------------------------
S2MM_MACHINE : process(s2mm_cs,
s2mm_run_stop,
desc_available,
desc_fetch_done,
desc_update_done,
s2mm_cmnd_pending,
s2mm_stop,
s2mm_desc_flush,
updt_pending
-- queue_more
)
begin
-- Default signal assignment
desc_fetch_req_cmb <= '0';
write_cmnd_cmb <= '0';
s2mm_cmnd_idle <= '0';
s2mm_ns <= s2mm_cs;
case s2mm_cs is
-------------------------------------------------------------------
when IDLE =>
-- fetch descriptor if desc available, not stopped and running
-- if (updt_pending = '1') then
-- s2mm_ns <= WAIT_STATUS;
if(s2mm_run_stop = '1' and desc_available = '1'
-- and s2mm_stop = '0' and queue_more = '1' and updt_pending = '0')then
and s2mm_stop = '0' and updt_pending = '0')then
if (C_SG_INCLUDE_DESC_QUEUE = 1) then
s2mm_ns <= FETCH_DESCRIPTOR;
desc_fetch_req_cmb <= '1';
else
s2mm_ns <= WAIT_STATUS;
write_cmnd_cmb <= '1';
end if;
else
s2mm_cmnd_idle <= '1';
s2mm_ns <= IDLE;
end if;
-------------------------------------------------------------------
when FETCH_DESCRIPTOR =>
-- exit if error or descriptor flushed
if(s2mm_desc_flush = '1' or s2mm_stop = '1')then
s2mm_ns <= IDLE;
-- wait until fetch complete then execute
-- elsif(desc_fetch_done = '1')then
-- desc_fetch_req_cmb <= '0';
-- s2mm_ns <= EXECUTE_XFER;
elsif (s2mm_cmnd_pending = '0')then
desc_fetch_req_cmb <= '0';
if (updt_pending = '0') then
if(C_SG_INCLUDE_DESC_QUEUE = 1)then
s2mm_ns <= IDLE;
write_cmnd_cmb <= '1';
else
-- coverage off
s2mm_ns <= WAIT_STATUS;
-- coverage on
end if;
end if;
else
s2mm_ns <= FETCH_DESCRIPTOR;
end if;
-------------------------------------------------------------------
-- when EXECUTE_XFER =>
-- -- if error exit
-- if(s2mm_stop = '1')then
-- s2mm_ns <= IDLE;
-- -- Write another command if there is not one already pending
-- elsif(s2mm_cmnd_pending = '0')then
-- if (updt_pending = '0') then
-- write_cmnd_cmb <= '1';
-- end if;
-- if(C_SG_INCLUDE_DESC_QUEUE = 1)then
-- s2mm_ns <= IDLE;
-- else
-- s2mm_ns <= WAIT_STATUS;
-- end if;
-- else
-- s2mm_ns <= EXECUTE_XFER;
-- end if;
-------------------------------------------------------------------
when WAIT_STATUS =>
-- for no Q wait until desc updated
if(desc_update_done = '1' or s2mm_stop = '1')then
s2mm_ns <= IDLE;
else
s2mm_ns <= WAIT_STATUS;
end if;
-------------------------------------------------------------------
-- coverage off
when others =>
s2mm_ns <= IDLE;
-- coverage on
end case;
end process S2MM_MACHINE;
-------------------------------------------------------------------------------
-- Register State Machine Statues
-------------------------------------------------------------------------------
REGISTER_STATE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_cs <= IDLE;
else
s2mm_cs <= s2mm_ns;
end if;
end if;
end process REGISTER_STATE;
-------------------------------------------------------------------------------
-- Register State Machine Signalse
-------------------------------------------------------------------------------
-- SM_SIG_REGISTER : process(m_axi_sg_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- if(m_axi_sg_aresetn = '0')then
-- desc_fetch_req <= '0' ;
-- else
-- if (C_SG_INCLUDE_DESC_QUEUE = 0) then
-- desc_fetch_req <= '1';
-- else
-- desc_fetch_req <= desc_fetch_req_cmb ;
-- end if;
-- end if;
-- end if;
-- end process SM_SIG_REGISTER;
desc_fetch_req <= '1' when (C_SG_INCLUDE_DESC_QUEUE = 0) else
desc_fetch_req_cmb ;
-------------------------------------------------------------------------------
-- Build DataMover command
-------------------------------------------------------------------------------
-- If Bytes To Transfer (BTT) width less than 23, need to add pad
GEN_CMD_BTT_LESS_23 : if C_SG_LENGTH_WIDTH < 23 generate
constant PAD_VALUE : std_logic_vector(22 - C_SG_LENGTH_WIDTH downto 0)
:= (others => '0');
begin
-- When command by sm, drive command to s2mm_cmdsts_if
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_cmnd_wr <= '0';
-- s2mm_cmnd_data <= (others => '0');
-- Fetch SM issued a command write
elsif(write_cmnd_cmb = '1')then
s2mm_cmnd_wr <= '1';
-- s2mm_cmnd_data <= s2mm_desc_info
-- & s2mm_desc_blength_v
-- & s2mm_desc_blength_s
-- & S2MM_CMD_RSVD
-- & "0000" -- Cat IOC to CMD TAG
-- & s2mm_desc_baddress
-- & '1' -- Always reset DRE
-- & '0' -- For Indeterminate BTT mode do not set EOF
-- & S2MM_CMD_DSA
-- & burst_type -- Key Hole '1' -- s2mm_desc_type -- IR# 545697
-- & PAD_VALUE
-- & s2mm_desc_blength(C_SG_LENGTH_WIDTH-1 downto 0);
else
s2mm_cmnd_wr <= '0';
end if;
end if;
end process GEN_DATAMOVER_CMND;
s2mm_cmnd_data <= s2mm_desc_info
& s2mm_desc_blength_v
& s2mm_desc_blength_s
& S2MM_CMD_RSVD
& "00" & eof_micro & eof_micro --00" -- Cat IOC to CMD TAG
& s2mm_desc_baddress
& '1' -- Always reset DRE
& eof_micro --'0' -- For Indeterminate BTT mode do not set EOF
& S2MM_CMD_DSA
& burst_type -- Key Hole '1' -- s2mm_desc_type -- IR# 545697
& PAD_VALUE
& s2mm_desc_blength(C_SG_LENGTH_WIDTH-1 downto 0);
end generate GEN_CMD_BTT_LESS_23;
-- If Bytes To Transfer (BTT) width equal 23, no required pad
GEN_CMD_BTT_EQL_23 : if C_SG_LENGTH_WIDTH = 23 generate
begin
-- When command by sm, drive command to s2mm_cmdsts_if
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_cmnd_wr <= '0';
-- s2mm_cmnd_data <= (others => '0');
-- Fetch SM issued a command write
elsif(write_cmnd_cmb = '1')then
s2mm_cmnd_wr <= '1';
-- s2mm_cmnd_data <= s2mm_desc_info
-- & s2mm_desc_blength_v
-- & s2mm_desc_blength_s
-- & S2MM_CMD_RSVD
-- & "0000" -- Cat IOC to CMD TAG
-- & s2mm_desc_baddress
-- & '1' -- Always reset DRE
-- & '0' -- For indeterminate BTT mode do not set EOF
-- & S2MM_CMD_DSA
-- & burst_type -- Key Hole '1' -- s2mm_desc_type -- IR# 545697
-- & s2mm_desc_blength;
else
s2mm_cmnd_wr <= '0';
end if;
end if;
end process GEN_DATAMOVER_CMND;
s2mm_cmnd_data <= s2mm_desc_info
& s2mm_desc_blength_v
& s2mm_desc_blength_s
& S2MM_CMD_RSVD
& "00" & eof_micro & eof_micro -- "0000" -- Cat IOC to CMD TAG
& s2mm_desc_baddress
& '1' -- Always reset DRE
& eof_micro -- For indeterminate BTT mode do not set EOF
& S2MM_CMD_DSA
& burst_type -- Key Hole '1' -- s2mm_desc_type -- IR# 545697
& s2mm_desc_blength;
end generate GEN_CMD_BTT_EQL_23;
-- Drive unused output to zero
s2mm_rxlength_clr <= '0';
end generate GEN_SM_FOR_NO_LENGTH;
-------------------------------------------------------------------------------
-- Generate state machine and support logic for Using RX Length from Status
-- Stream
-------------------------------------------------------------------------------
-- this would not hold good for MCDMA
GEN_SM_FOR_LENGTH : if (C_SG_USE_STSAPP_LENGTH = 1 and C_SG_INCLUDE_STSCNTRL_STRM = 1 and C_ENABLE_MULTI_CHANNEL = 0) generate
type SG_S2MM_STATE_TYPE is (
IDLE,
FETCH_DESCRIPTOR,
GET_RXLENGTH,
CMPR_LENGTH,
EXECUTE_XFER,
WAIT_STATUS
);
signal s2mm_cs : SG_S2MM_STATE_TYPE;
signal s2mm_ns : SG_S2MM_STATE_TYPE;
begin
-------------------------------------------------------------------------------
-- S2MM Transfer State Machine
-------------------------------------------------------------------------------
S2MM_MACHINE : process(s2mm_cs,
s2mm_run_stop,
desc_available,
desc_update_done,
-- desc_fetch_done,
updt_pending,
s2mm_rxlength_valid,
rxlength_fetched,
s2mm_cmnd_pending,
zero_length_error,
s2mm_stop,
s2mm_desc_flush
-- queue_more
)
begin
-- Default signal assignment
desc_fetch_req_cmb <= '0';
s2mm_rxlength_clr_cmb <= '0';
write_cmnd_cmb <= '0';
s2mm_cmnd_idle <= '0';
s2mm_rxlength_set <= '0';
--rxlength_fetched_clr <= '0';
s2mm_ns <= s2mm_cs;
case s2mm_cs is
-------------------------------------------------------------------
when IDLE =>
if(s2mm_run_stop = '1' and desc_available = '1'
-- and s2mm_stop = '0' and queue_more = '1' and updt_pending = '0')then
and s2mm_stop = '0' and updt_pending = '0')then
if (C_SG_INCLUDE_DESC_QUEUE = 0) then
if(rxlength_fetched = '0')then
s2mm_ns <= GET_RXLENGTH;
else
s2mm_ns <= CMPR_LENGTH;
end if;
else
s2mm_ns <= FETCH_DESCRIPTOR;
desc_fetch_req_cmb <= '1';
end if;
else
s2mm_cmnd_idle <= '1';
s2mm_ns <= IDLE; --FETCH_DESCRIPTOR;
end if;
-------------------------------------------------------------------
when FETCH_DESCRIPTOR =>
desc_fetch_req_cmb <= '0';
-- exit if error or descriptor flushed
if(s2mm_desc_flush = '1')then
s2mm_ns <= IDLE;
-- Descriptor fetch complete
else --if(desc_fetch_done = '1')then
-- desc_fetch_req_cmb <= '0';
if(rxlength_fetched = '0')then
s2mm_ns <= GET_RXLENGTH;
else
s2mm_ns <= CMPR_LENGTH;
end if;
-- else
-- desc_fetch_req_cmb <= '1';
end if;
-------------------------------------------------------------------
WHEN GET_RXLENGTH =>
if(s2mm_stop = '1')then
s2mm_ns <= IDLE;
-- Buffer length zero, do not compare lengths, execute
-- command to force datamover to issue interror
elsif(zero_length_error = '1')then
s2mm_ns <= EXECUTE_XFER;
elsif(s2mm_rxlength_valid = '1')then
s2mm_rxlength_set <= '1';
s2mm_rxlength_clr_cmb <= '1';
s2mm_ns <= CMPR_LENGTH;
else
s2mm_ns <= GET_RXLENGTH;
end if;
-------------------------------------------------------------------
WHEN CMPR_LENGTH =>
s2mm_ns <= EXECUTE_XFER;
-------------------------------------------------------------------
when EXECUTE_XFER =>
if(s2mm_stop = '1')then
s2mm_ns <= IDLE;
-- write new command if one is not already pending
elsif(s2mm_cmnd_pending = '0')then
write_cmnd_cmb <= '1';
-- If descriptor queuing enabled then
-- do NOT need to wait for status
if(C_SG_INCLUDE_DESC_QUEUE = 1)then
s2mm_ns <= IDLE;
-- No queuing therefore must wait for
-- status before issuing next command
else
s2mm_ns <= WAIT_STATUS;
end if;
else
s2mm_ns <= EXECUTE_XFER;
end if;
-------------------------------------------------------------------
-- coverage off
when WAIT_STATUS =>
if(desc_update_done = '1' or s2mm_stop = '1')then
s2mm_ns <= IDLE;
else
s2mm_ns <= WAIT_STATUS;
end if;
-- coverage on
-------------------------------------------------------------------
-- coverage off
when others =>
s2mm_ns <= IDLE;
-- coverage on
end case;
end process S2MM_MACHINE;
-------------------------------------------------------------------------------
-- Register state machine states
-------------------------------------------------------------------------------
REGISTER_STATE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_cs <= IDLE;
else
s2mm_cs <= s2mm_ns;
end if;
end if;
end process REGISTER_STATE;
-------------------------------------------------------------------------------
-- Register state machine signals
-------------------------------------------------------------------------------
SM_SIG_REGISTER : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
desc_fetch_req <= '0' ;
s2mm_rxlength_clr <= '0' ;
else
if (C_SG_INCLUDE_DESC_QUEUE = 0) then
desc_fetch_req <= '1';
else
desc_fetch_req <= desc_fetch_req_cmb ;
end if;
s2mm_rxlength_clr <= s2mm_rxlength_clr_cmb;
end if;
end if;
end process SM_SIG_REGISTER;
-------------------------------------------------------------------------------
-- Check for a ZERO value in descriptor buffer length. If there is
-- then flag an error and skip waiting for valid rxlength. cmnd will
-- get written to datamover with BTT=0 and datamover will flag dmaint error
-- which will be logged in desc, reset required to clear error
-------------------------------------------------------------------------------
REG_ALIGN_DONE : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
desc_fetch_done_d1 <= '0';
else
desc_fetch_done_d1 <= desc_fetch_done;
end if;
end if;
end process REG_ALIGN_DONE;
-------------------------------------------------------------------------------
-- Zero length error detection - for determinate mode, detect early to prevent
-- rxlength calcuation from first taking place. This will force a 0 BTT
-- command to be issued to the datamover causing an internal error.
-------------------------------------------------------------------------------
REG_ZERO_LNGTH_ERR : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
zero_length_error <= '0';
elsif(desc_fetch_done_d1 = '1'
and s2mm_desc_blength(C_SG_LENGTH_WIDTH-1 downto 0) = ZERO_LENGTH)then
zero_length_error <= '1';
end if;
end if;
end process REG_ZERO_LNGTH_ERR;
-------------------------------------------------------------------------------
-- Capture/Hold receive length from status stream. Also decrement length
-- based on if received length is greater than descriptor buffer size. (i.e. is
-- the case where multiple descriptors/buffers are used to describe one packet)
-------------------------------------------------------------------------------
REG_RXLENGTH : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
rxlength <= (others => '0');
-- If command register rxlength from status stream fifo
elsif(s2mm_rxlength_set = '1')then
rxlength <= s2mm_rxlength;
-- On command write if current desc buffer size not greater
-- than current rxlength then decrement rxlength in preperations
-- for subsequent commands
elsif(write_cmnd_cmb = '1' and blength_grtr_rxlength = '0')then
rxlength <= std_logic_vector(unsigned(rxlength(C_SG_LENGTH_WIDTH-1 downto 0))
- unsigned(s2mm_desc_blength(C_SG_LENGTH_WIDTH-1 downto 0)));
end if;
end if;
end process REG_RXLENGTH;
-------------------------------------------------------------------------------
-- Calculate if Descriptor Buffer Length is 'Greater Than' or 'Equal To'
-- Received Length value
-------------------------------------------------------------------------------
REG_BLENGTH_GRTR_RXLNGTH : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
blength_grtr_rxlength <= '0';
elsif(s2mm_desc_blength(C_SG_LENGTH_WIDTH-1 downto 0) >= rxlength)then
blength_grtr_rxlength <= '1';
else
blength_grtr_rxlength <= '0';
end if;
end if;
end process REG_BLENGTH_GRTR_RXLNGTH;
-------------------------------------------------------------------------------
-- On command assert rxlength fetched flag indicating length grabbed from
-- status stream fifo
-------------------------------------------------------------------------------
RXLENGTH_FTCHED_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or s2mm_eof_set_i = '1')then
rxlength_fetched <= '0';
elsif(s2mm_rxlength_set = '1')then
rxlength_fetched <= '1';
end if;
end if;
end process RXLENGTH_FTCHED_PROCESS;
-------------------------------------------------------------------------------
-- Build DataMover command
-------------------------------------------------------------------------------
-- If Bytes To Transfer (BTT) width less than 23, need to add pad
GEN_CMD_BTT_LESS_23 : if C_SG_LENGTH_WIDTH < 23 generate
constant PAD_VALUE : std_logic_vector(22 - C_SG_LENGTH_WIDTH downto 0)
:= (others => '0');
begin
-- When command by sm, drive command to s2mm_cmdsts_if
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_cmnd_wr <= '0';
s2mm_cmnd_data <= (others => '0');
s2mm_eof_set_i <= '0';
-- Current Desc Buffer will NOT hold entire rxlength of data therefore
-- set EOF = based on Desc.EOF and pass buffer length for BTT
elsif(write_cmnd_cmb = '1' and blength_grtr_rxlength = '0')then
s2mm_cmnd_wr <= '1';
s2mm_cmnd_data <= s2mm_desc_info
& ZERO_BUFFER
& ZERO_BUFFER
& S2MM_CMD_RSVD
-- Command Tag
& '0'
& '0'
& '0' -- Cat. EOF=0 to CMD Tag
& '0' -- Cat. IOC to CMD TAG
-- Command
& s2mm_desc_baddress
& '1' -- Always reset DRE
& '0' -- Not End of Frame
& S2MM_CMD_DSA
& burst_type -- Key Hole '1' -- s2mm_desc_type -- IR# 545697
& PAD_VALUE
& s2mm_desc_blength(C_SG_LENGTH_WIDTH-1 downto 0);
s2mm_eof_set_i <= '0';
-- Current Desc Buffer will hold entire rxlength of data therefore
-- set EOF = 1 and pass rxlength for BTT
--
-- Note: change to mode where EOF generates IOC interrupt as
-- opposed to a IOC bit in the descriptor negated need for an
-- EOF and IOC tag. Given time, these two bits could be combined
-- into 1. Associated logic in SG engine would also need to be
-- modified as well as in s2mm_sg_if.
elsif(write_cmnd_cmb = '1' and blength_grtr_rxlength = '1')then
s2mm_cmnd_wr <= '1';
s2mm_cmnd_data <= s2mm_desc_info
& ZERO_BUFFER
& ZERO_BUFFER
& S2MM_CMD_RSVD
-- Command Tag
& '0'
& '0'
& '1' -- Cat. EOF=1 to CMD Tag
& '1' -- Cat. IOC to CMD TAG
-- Command
& s2mm_desc_baddress
& '1' -- Always reset DRE
& '1' -- Set EOF=1
& S2MM_CMD_DSA
& burst_type -- Key Hole '1' -- s2mm_desc_type -- IR# 545697
& PAD_VALUE
& rxlength;
s2mm_eof_set_i <= '1';
else
-- s2mm_cmnd_data <= (others => '0');
s2mm_cmnd_wr <= '0';
s2mm_eof_set_i <= '0';
end if;
end if;
end process GEN_DATAMOVER_CMND;
end generate GEN_CMD_BTT_LESS_23;
-- If Bytes To Transfer (BTT) width equal 23, no required pad
GEN_CMD_BTT_EQL_23 : if C_SG_LENGTH_WIDTH = 23 generate
begin
-- When command by sm, drive command to s2mm_cmdsts_if
GEN_DATAMOVER_CMND : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
s2mm_cmnd_wr <= '0';
s2mm_cmnd_data <= (others => '0');
s2mm_eof_set_i <= '0';
-- Current Desc Buffer will NOT hold entire rxlength of data therefore
-- set EOF = based on Desc.EOF and pass buffer length for BTT
elsif(write_cmnd_cmb = '1' and blength_grtr_rxlength = '0')then
s2mm_cmnd_wr <= '1';
s2mm_cmnd_data <= s2mm_desc_info
& ZERO_BUFFER
& ZERO_BUFFER
& S2MM_CMD_RSVD
--& S2MM_CMD_TAG & s2mm_desc_ioc -- Cat IOC to CMD TAG
-- Command Tag
& '0'
& '0'
& '0' -- Cat. EOF='0' to CMD Tag
& '0' -- Cat. IOC='0' to CMD TAG
-- Command
& s2mm_desc_baddress
& '1' -- Always reset DRE
& '0' -- Not End of Frame
& S2MM_CMD_DSA
& burst_type -- Key Hole '1' -- s2mm_desc_type -- IR# 545697
& s2mm_desc_blength;
s2mm_eof_set_i <= '0';
-- Current Desc Buffer will hold entire rxlength of data therefore
-- set EOF = 1 and pass rxlength for BTT
--
-- Note: change to mode where EOF generates IOC interrupt as
-- opposed to a IOC bit in the descriptor negated need for an
-- EOF and IOC tag. Given time, these two bits could be combined
-- into 1. Associated logic in SG engine would also need to be
-- modified as well as in s2mm_sg_if.
elsif(write_cmnd_cmb = '1' and blength_grtr_rxlength = '1')then
s2mm_cmnd_wr <= '1';
s2mm_cmnd_data <= s2mm_desc_info
& ZERO_BUFFER
& ZERO_BUFFER
& S2MM_CMD_RSVD
--& S2MM_CMD_TAG & s2mm_desc_ioc -- Cat IOC to CMD TAG
-- Command Tag
& '0'
& '0'
& '1' -- Cat. EOF='1' to CMD Tag
& '1' -- Cat. IOC='1' to CMD TAG
-- Command
& s2mm_desc_baddress
& '1' -- Always reset DRE
& '1' -- End of Frame
& S2MM_CMD_DSA
& burst_type -- Key Hole '1' -- s2mm_desc_type -- IR# 545697
& rxlength;
s2mm_eof_set_i <= '1';
else
-- s2mm_cmnd_data <= (others => '0');
s2mm_cmnd_wr <= '0';
s2mm_eof_set_i <= '0';
end if;
end if;
end process GEN_DATAMOVER_CMND;
end generate GEN_CMD_BTT_EQL_23;
end generate GEN_SM_FOR_LENGTH;
-------------------------------------------------------------------------------
-- Counter for keepting track of pending commands/status in primary datamover
-- Use this to determine if primary datamover for s2mm is Idle.
-------------------------------------------------------------------------------
-- Increment queue count for each command written if not occuring at
-- same time a status from DM being updated to SG engine
count_incr <= '1' when write_cmnd_cmb = '1' and desc_update_done = '0'
else '0';
-- Decrement queue count for each status update to SG engine if not occuring
-- at same time as command being written to DM
count_decr <= '1' when write_cmnd_cmb = '0' and desc_update_done = '1'
else '0';
-- keep track of number queue commands
--CMD2STS_COUNTER : process(m_axi_sg_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- if(m_axi_sg_aresetn = '0' or s2mm_stop = '1')then
-- cmnds_queued <= (others => '0');
-- elsif(count_incr = '1')then
-- cmnds_queued <= std_logic_vector(unsigned(cmnds_queued(COUNTER_WIDTH - 1 downto 0)) + 1);
-- elsif(count_decr = '1')then
-- cmnds_queued <= std_logic_vector(unsigned(cmnds_queued(COUNTER_WIDTH - 1 downto 0)) - 1);
-- end if;
-- end if;
-- end process CMD2STS_COUNTER;
QUEUE_COUNT : if C_SG_INCLUDE_DESC_QUEUE = 1 generate
begin
CMD2STS_COUNTER1 : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or s2mm_stop = '1')then
cmnds_queued_shift <= (others => '0');
elsif(count_incr = '1')then
cmnds_queued_shift <= cmnds_queued_shift (2 downto 0) & '1';
elsif(count_decr = '1')then
cmnds_queued_shift <= '0' & cmnds_queued_shift (3 downto 1);
end if;
end if;
end process CMD2STS_COUNTER1;
end generate QUEUE_COUNT;
NOQUEUE_COUNT : if C_SG_INCLUDE_DESC_QUEUE = 0 generate
begin
CMD2STS_COUNTER1 : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0' or s2mm_stop = '1')then
cmnds_queued_shift (0) <= '0';
elsif(count_incr = '1')then
cmnds_queued_shift (0) <= '1';
elsif(count_decr = '1')then
cmnds_queued_shift (0) <= '0';
end if;
end if;
end process CMD2STS_COUNTER1;
end generate NOQUEUE_COUNT;
-- indicate idle when no more queued commands
--s2mm_sts_idle <= '1' when cmnds_queued_shift = "0000"
-- else '0';
s2mm_sts_idle <= not cmnds_queued_shift(0);
-------------------------------------------------------------------------------
-- Queue only the amount of commands that can be queued on descriptor update
-- else lock up can occur. Note datamover command fifo depth is set to number
-- of descriptors to queue.
-------------------------------------------------------------------------------
--QUEUE_MORE_PROCESS : process(m_axi_sg_aclk)
-- begin
-- if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
-- if(m_axi_sg_aresetn = '0')then
-- queue_more <= '0';
-- elsif(cmnds_queued < std_logic_vector(to_unsigned(C_PRMY_CMDFIFO_DEPTH,COUNTER_WIDTH)))then
-- queue_more <= '1';
-- else
-- queue_more <= '0';
-- end if;
-- end if;
-- end process QUEUE_MORE_PROCESS;
QUEUE_MORE_PROCESS : process(m_axi_sg_aclk)
begin
if(m_axi_sg_aclk'EVENT and m_axi_sg_aclk = '1')then
if(m_axi_sg_aresetn = '0')then
queue_more <= '0';
-- elsif(cmnds_queued < std_logic_vector(to_unsigned(C_PRMY_CMDFIFO_DEPTH,COUNTER_WIDTH)))then
-- queue_more <= '1';
else
queue_more <= not (cmnds_queued_shift (C_PRMY_CMDFIFO_DEPTH-1)); --'0';
end if;
end if;
end process QUEUE_MORE_PROCESS;
end implementation;
|
library ieee;
use ieee.std_logic_1164.all;
use std.env.stop;
entity test is
generic (
SIM : boolean := false
);
port (
val : in std_ulogic
);
end entity test;
architecture behaviour of test is
begin
process_0: process(all)
begin
if SIM and val = '1' then
stop;
end if;
end process;
end architecture behaviour;
|
-- -------------------------------------------------------------
--
-- File Name: hdl_prj/hdlsrc/hdl_ofdm_tx/TWDLROM_3_2.vhd
-- Created: 2018-02-27 13:25:18
--
-- Generated by MATLAB 9.3 and HDL Coder 3.11
--
-- -------------------------------------------------------------
-- -------------------------------------------------------------
--
-- Module: TWDLROM_3_2
-- Source Path: hdl_ofdm_tx/ifft/TWDLROM_3_2
-- Hierarchy Level: 2
--
-- -------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
USE work.hdl_ofdm_tx_pkg.ALL;
ENTITY TWDLROM_3_2 IS
PORT( clk : IN std_logic;
reset : IN std_logic;
enb_1_16_0 : IN std_logic;
dout_2_vld : IN std_logic;
softReset : IN std_logic;
twdl_3_2_re : OUT std_logic_vector(15 DOWNTO 0); -- sfix16_En14
twdl_3_2_im : OUT std_logic_vector(15 DOWNTO 0); -- sfix16_En14
twdl_3_2_vld : OUT std_logic
);
END TWDLROM_3_2;
ARCHITECTURE rtl OF TWDLROM_3_2 IS
-- Constants
CONSTANT Twiddle_re_table_data : vector_of_signed16(0 TO 1) :=
(to_signed(16#4000#, 16), to_signed(16#3B21#, 16)); -- sfix16 [2]
CONSTANT Twiddle_im_table_data : vector_of_signed16(0 TO 1) :=
(to_signed(16#0000#, 16), to_signed(-16#187E#, 16)); -- sfix16 [2]
-- Signals
SIGNAL Radix22TwdlMapping_cnt : unsigned(1 DOWNTO 0); -- ufix2
SIGNAL Radix22TwdlMapping_phase : unsigned(1 DOWNTO 0); -- ufix2
SIGNAL Radix22TwdlMapping_octantReg1 : unsigned(2 DOWNTO 0); -- ufix3
SIGNAL Radix22TwdlMapping_twdlAddr_raw : unsigned(3 DOWNTO 0); -- ufix4
SIGNAL Radix22TwdlMapping_twdlAddrMap : std_logic; -- ufix1
SIGNAL Radix22TwdlMapping_twdl45Reg : std_logic;
SIGNAL Radix22TwdlMapping_dvldReg1 : std_logic;
SIGNAL Radix22TwdlMapping_dvldReg2 : std_logic;
SIGNAL Radix22TwdlMapping_cnt_next : unsigned(1 DOWNTO 0); -- ufix2
SIGNAL Radix22TwdlMapping_phase_next : unsigned(1 DOWNTO 0); -- ufix2
SIGNAL Radix22TwdlMapping_octantReg1_next : unsigned(2 DOWNTO 0); -- ufix3
SIGNAL Radix22TwdlMapping_twdlAddr_raw_next : unsigned(3 DOWNTO 0); -- ufix4
SIGNAL Radix22TwdlMapping_twdlAddrMap_next : std_logic; -- ufix1
SIGNAL Radix22TwdlMapping_twdl45Reg_next : std_logic;
SIGNAL Radix22TwdlMapping_dvldReg1_next : std_logic;
SIGNAL Radix22TwdlMapping_dvldReg2_next : std_logic;
SIGNAL twdlAddr : std_logic; -- ufix1
SIGNAL twdlAddrVld : std_logic;
SIGNAL twdlOctant : unsigned(2 DOWNTO 0); -- ufix3
SIGNAL twdl45 : std_logic;
SIGNAL Twiddle_re_cast : signed(31 DOWNTO 0); -- int32
SIGNAL twiddleS_re : signed(15 DOWNTO 0); -- sfix16_En14
SIGNAL twiddleReg_re : signed(15 DOWNTO 0); -- sfix16_En14
SIGNAL Twiddle_im_cast : signed(31 DOWNTO 0); -- int32
SIGNAL twiddleS_im : signed(15 DOWNTO 0); -- sfix16_En14
SIGNAL twiddleReg_im : signed(15 DOWNTO 0); -- sfix16_En14
SIGNAL twdlOctantReg : unsigned(2 DOWNTO 0); -- ufix3
SIGNAL twdl45Reg : std_logic;
SIGNAL twdl_3_2_re_tmp : signed(15 DOWNTO 0); -- sfix16_En14
SIGNAL twdl_3_2_im_tmp : signed(15 DOWNTO 0); -- sfix16_En14
BEGIN
-- Radix22TwdlMapping
Radix22TwdlMapping_process : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
Radix22TwdlMapping_octantReg1 <= to_unsigned(16#0#, 3);
Radix22TwdlMapping_twdlAddr_raw <= to_unsigned(16#0#, 4);
Radix22TwdlMapping_twdlAddrMap <= '0';
Radix22TwdlMapping_twdl45Reg <= '0';
Radix22TwdlMapping_dvldReg1 <= '0';
Radix22TwdlMapping_dvldReg2 <= '0';
Radix22TwdlMapping_cnt <= to_unsigned(16#0#, 2);
Radix22TwdlMapping_phase <= to_unsigned(16#1#, 2);
ELSIF clk'EVENT AND clk = '1' THEN
IF enb_1_16_0 = '1' THEN
Radix22TwdlMapping_cnt <= Radix22TwdlMapping_cnt_next;
Radix22TwdlMapping_phase <= Radix22TwdlMapping_phase_next;
Radix22TwdlMapping_octantReg1 <= Radix22TwdlMapping_octantReg1_next;
Radix22TwdlMapping_twdlAddr_raw <= Radix22TwdlMapping_twdlAddr_raw_next;
Radix22TwdlMapping_twdlAddrMap <= Radix22TwdlMapping_twdlAddrMap_next;
Radix22TwdlMapping_twdl45Reg <= Radix22TwdlMapping_twdl45Reg_next;
Radix22TwdlMapping_dvldReg1 <= Radix22TwdlMapping_dvldReg1_next;
Radix22TwdlMapping_dvldReg2 <= Radix22TwdlMapping_dvldReg2_next;
END IF;
END IF;
END PROCESS Radix22TwdlMapping_process;
Radix22TwdlMapping_output : PROCESS (Radix22TwdlMapping_cnt, Radix22TwdlMapping_phase,
Radix22TwdlMapping_octantReg1, Radix22TwdlMapping_twdlAddr_raw,
Radix22TwdlMapping_twdlAddrMap, Radix22TwdlMapping_twdl45Reg,
Radix22TwdlMapping_dvldReg1, Radix22TwdlMapping_dvldReg2, dout_2_vld)
VARIABLE octant : unsigned(2 DOWNTO 0);
VARIABLE addr_cast : unsigned(3 DOWNTO 0);
VARIABLE c : unsigned(1 DOWNTO 0);
VARIABLE sub_cast : signed(9 DOWNTO 0);
VARIABLE sub_temp : signed(9 DOWNTO 0);
VARIABLE sub_cast_0 : signed(5 DOWNTO 0);
VARIABLE sub_temp_0 : signed(5 DOWNTO 0);
VARIABLE sub_cast_1 : signed(5 DOWNTO 0);
VARIABLE sub_temp_1 : signed(5 DOWNTO 0);
VARIABLE sub_cast_2 : signed(9 DOWNTO 0);
VARIABLE sub_temp_2 : signed(9 DOWNTO 0);
VARIABLE sub_cast_3 : signed(9 DOWNTO 0);
VARIABLE sub_temp_3 : signed(9 DOWNTO 0);
BEGIN
Radix22TwdlMapping_cnt_next <= Radix22TwdlMapping_cnt;
Radix22TwdlMapping_phase_next <= Radix22TwdlMapping_phase;
Radix22TwdlMapping_twdlAddr_raw_next <= Radix22TwdlMapping_twdlAddr_raw;
Radix22TwdlMapping_twdlAddrMap_next <= Radix22TwdlMapping_twdlAddrMap;
Radix22TwdlMapping_twdl45Reg_next <= Radix22TwdlMapping_twdl45Reg;
Radix22TwdlMapping_dvldReg2_next <= Radix22TwdlMapping_dvldReg1;
Radix22TwdlMapping_dvldReg1_next <= dout_2_vld;
CASE Radix22TwdlMapping_twdlAddr_raw IS
WHEN "0010" =>
octant := to_unsigned(16#0#, 3);
Radix22TwdlMapping_twdl45Reg_next <= '1';
WHEN "0100" =>
octant := to_unsigned(16#1#, 3);
Radix22TwdlMapping_twdl45Reg_next <= '0';
WHEN "0110" =>
octant := to_unsigned(16#2#, 3);
Radix22TwdlMapping_twdl45Reg_next <= '1';
WHEN "1000" =>
octant := to_unsigned(16#3#, 3);
Radix22TwdlMapping_twdl45Reg_next <= '0';
WHEN "1010" =>
octant := to_unsigned(16#4#, 3);
Radix22TwdlMapping_twdl45Reg_next <= '1';
WHEN OTHERS =>
octant := Radix22TwdlMapping_twdlAddr_raw(3 DOWNTO 1);
Radix22TwdlMapping_twdl45Reg_next <= '0';
END CASE;
Radix22TwdlMapping_octantReg1_next <= octant;
CASE octant IS
WHEN "000" =>
Radix22TwdlMapping_twdlAddrMap_next <= Radix22TwdlMapping_twdlAddr_raw(0);
WHEN "001" =>
sub_cast_0 := signed(resize(Radix22TwdlMapping_twdlAddr_raw, 6));
sub_temp_0 := to_signed(16#04#, 6) - sub_cast_0;
Radix22TwdlMapping_twdlAddrMap_next <= sub_temp_0(0);
WHEN "010" =>
sub_cast_1 := signed(resize(Radix22TwdlMapping_twdlAddr_raw, 6));
sub_temp_1 := sub_cast_1 - to_signed(16#04#, 6);
Radix22TwdlMapping_twdlAddrMap_next <= sub_temp_1(0);
WHEN "011" =>
sub_cast_2 := signed(resize(Radix22TwdlMapping_twdlAddr_raw & '0', 10));
sub_temp_2 := to_signed(16#010#, 10) - sub_cast_2;
Radix22TwdlMapping_twdlAddrMap_next <= sub_temp_2(1);
WHEN "100" =>
sub_cast_3 := signed(resize(Radix22TwdlMapping_twdlAddr_raw & '0', 10));
sub_temp_3 := sub_cast_3 - to_signed(16#010#, 10);
Radix22TwdlMapping_twdlAddrMap_next <= sub_temp_3(1);
WHEN OTHERS =>
sub_cast := signed(resize(Radix22TwdlMapping_twdlAddr_raw & '0', 10));
sub_temp := to_signed(16#018#, 10) - sub_cast;
Radix22TwdlMapping_twdlAddrMap_next <= sub_temp(1);
END CASE;
c := unsigned'(Radix22TwdlMapping_cnt(0) & Radix22TwdlMapping_cnt(1));
IF Radix22TwdlMapping_phase = to_unsigned(16#0#, 2) THEN
Radix22TwdlMapping_twdlAddr_raw_next <= to_unsigned(16#0#, 4);
ELSIF Radix22TwdlMapping_phase = to_unsigned(16#1#, 2) THEN
Radix22TwdlMapping_twdlAddr_raw_next <= resize(c, 4);
ELSIF Radix22TwdlMapping_phase = to_unsigned(16#2#, 2) THEN
Radix22TwdlMapping_twdlAddr_raw_next <= resize(c, 4) sll 1;
ELSE
addr_cast := resize(c, 4);
Radix22TwdlMapping_twdlAddr_raw_next <= (addr_cast sll 1) + addr_cast;
END IF;
IF dout_2_vld = '1' THEN
Radix22TwdlMapping_cnt_next <= Radix22TwdlMapping_cnt + to_unsigned(16#000000004#, 2);
END IF;
twdlAddr <= Radix22TwdlMapping_twdlAddrMap;
twdlAddrVld <= Radix22TwdlMapping_dvldReg2;
twdlOctant <= Radix22TwdlMapping_octantReg1;
twdl45 <= Radix22TwdlMapping_twdl45Reg;
END PROCESS Radix22TwdlMapping_output;
-- Twiddle ROM1
Twiddle_re_cast <= '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & twdlAddr;
twiddleS_re <= Twiddle_re_table_data(to_integer(Twiddle_re_cast));
TWIDDLEROM_RE_process : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
twiddleReg_re <= to_signed(16#0000#, 16);
ELSIF clk'EVENT AND clk = '1' THEN
IF enb_1_16_0 = '1' THEN
twiddleReg_re <= twiddleS_re;
END IF;
END IF;
END PROCESS TWIDDLEROM_RE_process;
-- Twiddle ROM2
Twiddle_im_cast <= '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & twdlAddr;
twiddleS_im <= Twiddle_im_table_data(to_integer(Twiddle_im_cast));
TWIDDLEROM_IM_process : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
twiddleReg_im <= to_signed(16#0000#, 16);
ELSIF clk'EVENT AND clk = '1' THEN
IF enb_1_16_0 = '1' THEN
twiddleReg_im <= twiddleS_im;
END IF;
END IF;
END PROCESS TWIDDLEROM_IM_process;
intdelay_process : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
twdlOctantReg <= to_unsigned(16#0#, 3);
ELSIF clk'EVENT AND clk = '1' THEN
IF enb_1_16_0 = '1' THEN
twdlOctantReg <= twdlOctant;
END IF;
END IF;
END PROCESS intdelay_process;
intdelay_1_process : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
twdl45Reg <= '0';
ELSIF clk'EVENT AND clk = '1' THEN
IF enb_1_16_0 = '1' THEN
twdl45Reg <= twdl45;
END IF;
END IF;
END PROCESS intdelay_1_process;
-- Radix22TwdlOctCorr
Radix22TwdlOctCorr_output : PROCESS (twiddleReg_re, twiddleReg_im, twdlOctantReg, twdl45Reg)
VARIABLE twdlIn_re : signed(15 DOWNTO 0);
VARIABLE twdlIn_im : signed(15 DOWNTO 0);
VARIABLE cast : signed(16 DOWNTO 0);
VARIABLE cast_0 : signed(16 DOWNTO 0);
VARIABLE cast_1 : signed(16 DOWNTO 0);
VARIABLE cast_2 : signed(16 DOWNTO 0);
VARIABLE cast_3 : signed(16 DOWNTO 0);
VARIABLE cast_4 : signed(16 DOWNTO 0);
VARIABLE cast_5 : signed(16 DOWNTO 0);
VARIABLE cast_6 : signed(16 DOWNTO 0);
VARIABLE cast_7 : signed(16 DOWNTO 0);
VARIABLE cast_8 : signed(16 DOWNTO 0);
VARIABLE cast_9 : signed(16 DOWNTO 0);
VARIABLE cast_10 : signed(16 DOWNTO 0);
BEGIN
twdlIn_re := twiddleReg_re;
twdlIn_im := twiddleReg_im;
IF twdl45Reg = '1' THEN
CASE twdlOctantReg IS
WHEN "000" =>
twdlIn_re := to_signed(16#2D41#, 16);
twdlIn_im := to_signed(-16#2D41#, 16);
WHEN "010" =>
twdlIn_re := to_signed(-16#2D41#, 16);
twdlIn_im := to_signed(-16#2D41#, 16);
WHEN "100" =>
twdlIn_re := to_signed(-16#2D41#, 16);
twdlIn_im := to_signed(16#2D41#, 16);
WHEN OTHERS =>
twdlIn_re := to_signed(16#2D41#, 16);
twdlIn_im := to_signed(-16#2D41#, 16);
END CASE;
ELSE
CASE twdlOctantReg IS
WHEN "000" =>
NULL;
WHEN "001" =>
cast := resize(twiddleReg_im, 17);
cast_0 := - (cast);
twdlIn_re := cast_0(15 DOWNTO 0);
cast_5 := resize(twiddleReg_re, 17);
cast_6 := - (cast_5);
twdlIn_im := cast_6(15 DOWNTO 0);
WHEN "010" =>
twdlIn_re := twiddleReg_im;
cast_7 := resize(twiddleReg_re, 17);
cast_8 := - (cast_7);
twdlIn_im := cast_8(15 DOWNTO 0);
WHEN "011" =>
cast_1 := resize(twiddleReg_re, 17);
cast_2 := - (cast_1);
twdlIn_re := cast_2(15 DOWNTO 0);
twdlIn_im := twiddleReg_im;
WHEN "100" =>
cast_3 := resize(twiddleReg_re, 17);
cast_4 := - (cast_3);
twdlIn_re := cast_4(15 DOWNTO 0);
cast_9 := resize(twiddleReg_im, 17);
cast_10 := - (cast_9);
twdlIn_im := cast_10(15 DOWNTO 0);
WHEN OTHERS =>
twdlIn_re := twiddleReg_im;
twdlIn_im := twiddleReg_re;
END CASE;
END IF;
twdl_3_2_re_tmp <= twdlIn_re;
twdl_3_2_im_tmp <= twdlIn_im;
END PROCESS Radix22TwdlOctCorr_output;
twdl_3_2_re <= std_logic_vector(twdl_3_2_re_tmp);
twdl_3_2_im <= std_logic_vector(twdl_3_2_im_tmp);
intdelay_2_process : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
twdl_3_2_vld <= '0';
ELSIF clk'EVENT AND clk = '1' THEN
IF enb_1_16_0 = '1' THEN
twdl_3_2_vld <= twdlAddrVld;
END IF;
END IF;
END PROCESS intdelay_2_process;
END rtl;
|
-------------------------------------------------------------------------------
-- File Name : DC_ROM.vhd
--
-- Project : JPEG_ENC
--
-- Module : DC_ROM
--
-- Content : DC_ROM Luminance
--
-- Description :
--
-- Spec. :
--
-- Author : Michal Krepa
--
-------------------------------------------------------------------------------
-- History :
-- 20090228: (MK): Initial Creation.
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
----------------------------------- LIBRARY/PACKAGE ---------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- generic packages/libraries:
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-------------------------------------------------------------------------------
-- user packages/libraries:
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
----------------------------------- ENTITY ------------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
entity DC_ROM is
port
(
CLK : in std_logic;
RST : in std_logic;
VLI_size : in std_logic_vector(3 downto 0);
VLC_DC_size : out std_logic_vector(3 downto 0);
VLC_DC : out unsigned(8 downto 0)
);
end entity DC_ROM;
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
----------------------------------- ARCHITECTURE ------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
architecture RTL of DC_ROM is
-------------------------------------------------------------------------------
-- Architecture: begin
-------------------------------------------------------------------------------
begin
-------------------------------------------------------------------
-- DC-ROM
-------------------------------------------------------------------
p_dc_rom : process(CLK)
begin
if CLK'event and CLK = '1' then
case VLI_size is
when X"0" =>
VLC_DC_size <= X"2";
VLC_DC <= resize("00", VLC_DC'length);
when X"1" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("010", VLC_DC'length);
when X"2" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("011", VLC_DC'length);
when X"3" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("100", VLC_DC'length);
when X"4" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("101", VLC_DC'length);
when X"5" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("110", VLC_DC'length);
when X"6" =>
VLC_DC_size <= X"4";
VLC_DC <= resize("1110", VLC_DC'length);
when X"7" =>
VLC_DC_size <= X"5";
VLC_DC <= resize("11110", VLC_DC'length);
when X"8" =>
VLC_DC_size <= X"6";
VLC_DC <= resize("111110", VLC_DC'length);
when X"9" =>
VLC_DC_size <= X"7";
VLC_DC <= resize("1111110", VLC_DC'length);
when X"A" =>
VLC_DC_size <= X"8";
VLC_DC <= resize("11111110", VLC_DC'length);
when X"B" =>
VLC_DC_size <= X"9";
VLC_DC <= resize("111111110", VLC_DC'length);
when others =>
VLC_DC_size <= X"0";
VLC_DC <= (others => '0');
end case;
end if;
end process;
end architecture RTL;
-------------------------------------------------------------------------------
-- Architecture: end
------------------------------------------------------------------------------- |
-------------------------------------------------------------------------------
-- File Name : DC_ROM.vhd
--
-- Project : JPEG_ENC
--
-- Module : DC_ROM
--
-- Content : DC_ROM Luminance
--
-- Description :
--
-- Spec. :
--
-- Author : Michal Krepa
--
-------------------------------------------------------------------------------
-- History :
-- 20090228: (MK): Initial Creation.
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
----------------------------------- LIBRARY/PACKAGE ---------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- generic packages/libraries:
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-------------------------------------------------------------------------------
-- user packages/libraries:
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
----------------------------------- ENTITY ------------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
entity DC_ROM is
port
(
CLK : in std_logic;
RST : in std_logic;
VLI_size : in std_logic_vector(3 downto 0);
VLC_DC_size : out std_logic_vector(3 downto 0);
VLC_DC : out unsigned(8 downto 0)
);
end entity DC_ROM;
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
----------------------------------- ARCHITECTURE ------------------------------
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
architecture RTL of DC_ROM is
-------------------------------------------------------------------------------
-- Architecture: begin
-------------------------------------------------------------------------------
begin
-------------------------------------------------------------------
-- DC-ROM
-------------------------------------------------------------------
p_dc_rom : process(CLK)
begin
if CLK'event and CLK = '1' then
case VLI_size is
when X"0" =>
VLC_DC_size <= X"2";
VLC_DC <= resize("00", VLC_DC'length);
when X"1" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("010", VLC_DC'length);
when X"2" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("011", VLC_DC'length);
when X"3" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("100", VLC_DC'length);
when X"4" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("101", VLC_DC'length);
when X"5" =>
VLC_DC_size <= X"3";
VLC_DC <= resize("110", VLC_DC'length);
when X"6" =>
VLC_DC_size <= X"4";
VLC_DC <= resize("1110", VLC_DC'length);
when X"7" =>
VLC_DC_size <= X"5";
VLC_DC <= resize("11110", VLC_DC'length);
when X"8" =>
VLC_DC_size <= X"6";
VLC_DC <= resize("111110", VLC_DC'length);
when X"9" =>
VLC_DC_size <= X"7";
VLC_DC <= resize("1111110", VLC_DC'length);
when X"A" =>
VLC_DC_size <= X"8";
VLC_DC <= resize("11111110", VLC_DC'length);
when X"B" =>
VLC_DC_size <= X"9";
VLC_DC <= resize("111111110", VLC_DC'length);
when others =>
VLC_DC_size <= X"0";
VLC_DC <= (others => '0');
end case;
end if;
end process;
end architecture RTL;
-------------------------------------------------------------------------------
-- Architecture: end
------------------------------------------------------------------------------- |
-- ==============================================================
-- File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2016.1
-- Copyright (C) 1986-2016 Xilinx, Inc. All Rights Reserved.
--
-- ==============================================================
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.numeric_std.all;
use ieee.std_logic_textio.all;
use std.textio.all;
entity AESL_axi_s_inStream is
generic (
constant TV_IN_inStream_TDATA : STRING (1 to 62) := "../tv/cdatafile/c.doHistStretch.autotvin_inStream_V_data_V.dat";
constant INGRESS_STATUS_inStream_TDATA : STRING (1 to 61) := "../tv/stream_size/stream_ingress_status_inStream_V_data_V.dat";
constant TV_IN_inStream_TKEEP : STRING (1 to 62) := "../tv/cdatafile/c.doHistStretch.autotvin_inStream_V_keep_V.dat";
constant INGRESS_STATUS_inStream_TKEEP : STRING (1 to 61) := "../tv/stream_size/stream_ingress_status_inStream_V_keep_V.dat";
constant TV_IN_inStream_TSTRB : STRING (1 to 62) := "../tv/cdatafile/c.doHistStretch.autotvin_inStream_V_strb_V.dat";
constant INGRESS_STATUS_inStream_TSTRB : STRING (1 to 61) := "../tv/stream_size/stream_ingress_status_inStream_V_strb_V.dat";
constant TV_IN_inStream_TUSER : STRING (1 to 62) := "../tv/cdatafile/c.doHistStretch.autotvin_inStream_V_user_V.dat";
constant INGRESS_STATUS_inStream_TUSER : STRING (1 to 61) := "../tv/stream_size/stream_ingress_status_inStream_V_user_V.dat";
constant TV_IN_inStream_TLAST : STRING (1 to 62) := "../tv/cdatafile/c.doHistStretch.autotvin_inStream_V_last_V.dat";
constant INGRESS_STATUS_inStream_TLAST : STRING (1 to 61) := "../tv/stream_size/stream_ingress_status_inStream_V_last_V.dat";
constant TV_IN_inStream_TID : STRING (1 to 60) := "../tv/cdatafile/c.doHistStretch.autotvin_inStream_V_id_V.dat";
constant INGRESS_STATUS_inStream_TID : STRING (1 to 59) := "../tv/stream_size/stream_ingress_status_inStream_V_id_V.dat";
constant TV_IN_inStream_TDEST : STRING (1 to 62) := "../tv/cdatafile/c.doHistStretch.autotvin_inStream_V_dest_V.dat";
constant INGRESS_STATUS_inStream_TDEST : STRING (1 to 61) := "../tv/stream_size/stream_ingress_status_inStream_V_dest_V.dat";
constant INTERFACE_TYPE : STRING (1 to 5) := "axi_s";
constant AUTOTB_TRANSACTION_NUM : INTEGER := 1
);
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
TRAN_inStream_TDATA : OUT STD_LOGIC_VECTOR (8 - 1 downto 0);
inStream_TDATA_trans_num : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
TRAN_inStream_TKEEP : OUT STD_LOGIC_VECTOR (1 - 1 downto 0);
inStream_TKEEP_trans_num : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
TRAN_inStream_TSTRB : OUT STD_LOGIC_VECTOR (1 - 1 downto 0);
inStream_TSTRB_trans_num : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
TRAN_inStream_TUSER : OUT STD_LOGIC_VECTOR (2 - 1 downto 0);
inStream_TUSER_trans_num : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
TRAN_inStream_TLAST : OUT STD_LOGIC_VECTOR (1 - 1 downto 0);
inStream_TLAST_trans_num : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
TRAN_inStream_TID : OUT STD_LOGIC_VECTOR (5 - 1 downto 0);
inStream_TID_trans_num : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
TRAN_inStream_TDEST : OUT STD_LOGIC_VECTOR (6 - 1 downto 0);
inStream_TDEST_trans_num : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
TRAN_inStream_TVALID : OUT STD_LOGIC;
TRAN_inStream_TREADY : IN STD_LOGIC;
ready : IN STD_LOGIC;
done : IN STD_LOGIC
);
end AESL_axi_s_inStream;
architecture behav of AESL_axi_s_inStream is
------------------------Local signal-------------------
signal reg_inStream_TVALID : STD_LOGIC;
signal inStream_TDATA_mInPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TDATA_mOutPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TDATA_mFlag_hint : STD_LOGIC := '0'; -- 0:empty hint, 1: full hint
signal inStream_TDATA_empty_n : STD_LOGIC;
signal inStream_TDATA_full_n : STD_LOGIC;
type inStream_TDATA_arr2D is array(0 to 262144) of STD_LOGIC_VECTOR(8 - 1 downto 0);
signal inStream_TDATA_mem : inStream_TDATA_arr2D := (others => (others => '0'));
signal inStream_TDATA_ingress_status : INTEGER;
signal inStream_TDATA_ingress_status_bit : STD_LOGIC;
signal inStream_TDATA_in_i : INTEGER;
signal inStream_TDATA_in_end : STD_LOGIC;
signal inStream_TDATA_in_end_reg : STD_LOGIC;
signal inStream_TDATA_in_size : INTEGER;
signal inStream_TDATA_trans_num_sig : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TDATA_trans_num_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TKEEP_mInPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TKEEP_mOutPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TKEEP_mFlag_hint : STD_LOGIC := '0'; -- 0:empty hint, 1: full hint
signal inStream_TKEEP_empty_n : STD_LOGIC;
signal inStream_TKEEP_full_n : STD_LOGIC;
type inStream_TKEEP_arr2D is array(0 to 262144) of STD_LOGIC_VECTOR(1 - 1 downto 0);
signal inStream_TKEEP_mem : inStream_TKEEP_arr2D := (others => (others => '0'));
signal inStream_TKEEP_ingress_status : INTEGER;
signal inStream_TKEEP_ingress_status_bit : STD_LOGIC;
signal inStream_TKEEP_in_i : INTEGER;
signal inStream_TKEEP_in_end : STD_LOGIC;
signal inStream_TKEEP_in_end_reg : STD_LOGIC;
signal inStream_TKEEP_in_size : INTEGER;
signal inStream_TKEEP_trans_num_sig : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TKEEP_trans_num_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TSTRB_mInPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TSTRB_mOutPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TSTRB_mFlag_hint : STD_LOGIC := '0'; -- 0:empty hint, 1: full hint
signal inStream_TSTRB_empty_n : STD_LOGIC;
signal inStream_TSTRB_full_n : STD_LOGIC;
type inStream_TSTRB_arr2D is array(0 to 262144) of STD_LOGIC_VECTOR(1 - 1 downto 0);
signal inStream_TSTRB_mem : inStream_TSTRB_arr2D := (others => (others => '0'));
signal inStream_TSTRB_ingress_status : INTEGER;
signal inStream_TSTRB_ingress_status_bit : STD_LOGIC;
signal inStream_TSTRB_in_i : INTEGER;
signal inStream_TSTRB_in_end : STD_LOGIC;
signal inStream_TSTRB_in_end_reg : STD_LOGIC;
signal inStream_TSTRB_in_size : INTEGER;
signal inStream_TSTRB_trans_num_sig : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TSTRB_trans_num_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TUSER_mInPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TUSER_mOutPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TUSER_mFlag_hint : STD_LOGIC := '0'; -- 0:empty hint, 1: full hint
signal inStream_TUSER_empty_n : STD_LOGIC;
signal inStream_TUSER_full_n : STD_LOGIC;
type inStream_TUSER_arr2D is array(0 to 262144) of STD_LOGIC_VECTOR(2 - 1 downto 0);
signal inStream_TUSER_mem : inStream_TUSER_arr2D := (others => (others => '0'));
signal inStream_TUSER_ingress_status : INTEGER;
signal inStream_TUSER_ingress_status_bit : STD_LOGIC;
signal inStream_TUSER_in_i : INTEGER;
signal inStream_TUSER_in_end : STD_LOGIC;
signal inStream_TUSER_in_end_reg : STD_LOGIC;
signal inStream_TUSER_in_size : INTEGER;
signal inStream_TUSER_trans_num_sig : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TUSER_trans_num_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TLAST_mInPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TLAST_mOutPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TLAST_mFlag_hint : STD_LOGIC := '0'; -- 0:empty hint, 1: full hint
signal inStream_TLAST_empty_n : STD_LOGIC;
signal inStream_TLAST_full_n : STD_LOGIC;
type inStream_TLAST_arr2D is array(0 to 262144) of STD_LOGIC_VECTOR(1 - 1 downto 0);
signal inStream_TLAST_mem : inStream_TLAST_arr2D := (others => (others => '0'));
signal inStream_TLAST_ingress_status : INTEGER;
signal inStream_TLAST_ingress_status_bit : STD_LOGIC;
signal inStream_TLAST_in_i : INTEGER;
signal inStream_TLAST_in_end : STD_LOGIC;
signal inStream_TLAST_in_end_reg : STD_LOGIC;
signal inStream_TLAST_in_size : INTEGER;
signal inStream_TLAST_trans_num_sig : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TLAST_trans_num_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TID_mInPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TID_mOutPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TID_mFlag_hint : STD_LOGIC := '0'; -- 0:empty hint, 1: full hint
signal inStream_TID_empty_n : STD_LOGIC;
signal inStream_TID_full_n : STD_LOGIC;
type inStream_TID_arr2D is array(0 to 262144) of STD_LOGIC_VECTOR(5 - 1 downto 0);
signal inStream_TID_mem : inStream_TID_arr2D := (others => (others => '0'));
signal inStream_TID_ingress_status : INTEGER;
signal inStream_TID_ingress_status_bit : STD_LOGIC;
signal inStream_TID_in_i : INTEGER;
signal inStream_TID_in_end : STD_LOGIC;
signal inStream_TID_in_end_reg : STD_LOGIC;
signal inStream_TID_in_size : INTEGER;
signal inStream_TID_trans_num_sig : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TID_trans_num_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TDEST_mInPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TDEST_mOutPtr : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
signal inStream_TDEST_mFlag_hint : STD_LOGIC := '0'; -- 0:empty hint, 1: full hint
signal inStream_TDEST_empty_n : STD_LOGIC;
signal inStream_TDEST_full_n : STD_LOGIC;
type inStream_TDEST_arr2D is array(0 to 262144) of STD_LOGIC_VECTOR(6 - 1 downto 0);
signal inStream_TDEST_mem : inStream_TDEST_arr2D := (others => (others => '0'));
signal inStream_TDEST_ingress_status : INTEGER;
signal inStream_TDEST_ingress_status_bit : STD_LOGIC;
signal inStream_TDEST_in_i : INTEGER;
signal inStream_TDEST_in_end : STD_LOGIC;
signal inStream_TDEST_in_end_reg : STD_LOGIC;
signal inStream_TDEST_in_size : INTEGER;
signal inStream_TDEST_trans_num_sig : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal inStream_TDEST_trans_num_reg : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal reset_reg : STD_LOGIC;
function esl_icmp_eq(v1, v2 : STD_LOGIC_VECTOR) return STD_LOGIC_VECTOR is
variable res : STD_LOGIC_VECTOR(0 downto 0);
begin
if v1 = v2 then
res := "1";
else
res := "0";
end if;
return res;
end function;
procedure esl_read_token (file textfile: TEXT; textline: inout LINE; token: out STRING; token_len: out INTEGER) is
variable whitespace : CHARACTER;
variable i : INTEGER;
variable ok: BOOLEAN;
variable buff: STRING(1 to token'length);
begin
ok := false;
i := 1;
loop_main: while not endfile(textfile) loop
if textline = null or textline'length = 0 then
readline(textfile, textline);
end if;
loop_remove_whitespace: while textline'length > 0 loop
if textline(textline'left) = ' ' or
textline(textline'left) = HT or
textline(textline'left) = CR or
textline(textline'left) = LF then
read(textline, whitespace);
else
exit loop_remove_whitespace;
end if;
end loop;
loop_aesl_read_token: while textline'length > 0 and i <= buff'length loop
if textline(textline'left) = ' ' or
textline(textline'left) = HT or
textline(textline'left) = CR or
textline(textline'left) = LF then
exit loop_aesl_read_token;
else
read(textline, buff(i));
i := i + 1;
end if;
ok := true;
end loop;
if ok = true then
exit loop_main;
end if;
end loop;
buff(i) := ' ';
token := buff;
token_len:= i-1;
end procedure esl_read_token;
procedure esl_read_token (file textfile: TEXT;
textline: inout LINE;
token: out STRING) is
variable i : INTEGER;
begin
esl_read_token (textfile, textline, token, i);
end procedure esl_read_token;
function esl_add(v1, v2 : STD_LOGIC_VECTOR) return STD_LOGIC_VECTOR is
variable res : unsigned(v1'length-1 downto 0);
begin
res := unsigned(v1) + unsigned(v2);
return std_logic_vector(res);
end function;
function esl_icmp_ult(v1, v2 : STD_LOGIC_VECTOR) return STD_LOGIC_VECTOR is
variable res : STD_LOGIC_VECTOR(0 downto 0);
begin
if unsigned(v1) < unsigned(v2) then
res := "1";
else
res := "0";
end if;
return res;
end function;
function esl_str2lv_hex (RHS : STRING; data_width : INTEGER) return STD_LOGIC_VECTOR is
variable ret : STD_LOGIC_VECTOR(data_width - 1 downto 0);
variable idx : integer := 3;
begin
ret := (others => '0');
if (RHS(1) /= '0' and (RHS(2) /= 'x' or RHS(2) /= 'X')) then
report "Error! The format of hex number is not initialed by 0x";
end if;
while true loop
if (data_width > 4) then
case RHS(idx) is
when '0' => ret := ret(data_width - 5 downto 0) & "0000";
when '1' => ret := ret(data_width - 5 downto 0) & "0001";
when '2' => ret := ret(data_width - 5 downto 0) & "0010";
when '3' => ret := ret(data_width - 5 downto 0) & "0011";
when '4' => ret := ret(data_width - 5 downto 0) & "0100";
when '5' => ret := ret(data_width - 5 downto 0) & "0101";
when '6' => ret := ret(data_width - 5 downto 0) & "0110";
when '7' => ret := ret(data_width - 5 downto 0) & "0111";
when '8' => ret := ret(data_width - 5 downto 0) & "1000";
when '9' => ret := ret(data_width - 5 downto 0) & "1001";
when 'a' | 'A' => ret := ret(data_width - 5 downto 0) & "1010";
when 'b' | 'B' => ret := ret(data_width - 5 downto 0) & "1011";
when 'c' | 'C' => ret := ret(data_width - 5 downto 0) & "1100";
when 'd' | 'D' => ret := ret(data_width - 5 downto 0) & "1101";
when 'e' | 'E' => ret := ret(data_width - 5 downto 0) & "1110";
when 'f' | 'F' => ret := ret(data_width - 5 downto 0) & "1111";
when 'x' | 'X' => ret := ret(data_width - 5 downto 0) & "XXXX";
when ' ' => return ret;
when others => report "Wrong hex char " & RHS(idx); return ret;
end case;
elsif (data_width = 4) then
case RHS(idx) is
when '0' => ret := "0000";
when '1' => ret := "0001";
when '2' => ret := "0010";
when '3' => ret := "0011";
when '4' => ret := "0100";
when '5' => ret := "0101";
when '6' => ret := "0110";
when '7' => ret := "0111";
when '8' => ret := "1000";
when '9' => ret := "1001";
when 'a' | 'A' => ret := "1010";
when 'b' | 'B' => ret := "1011";
when 'c' | 'C' => ret := "1100";
when 'd' | 'D' => ret := "1101";
when 'e' | 'E' => ret := "1110";
when 'f' | 'F' => ret := "1111";
when 'x' | 'X' => ret := "XXXX";
when ' ' => return ret;
when others => report "Wrong hex char " & RHS(idx); return ret;
end case;
elsif (data_width = 3) then
case RHS(idx) is
when '0' => ret := "000";
when '1' => ret := "001";
when '2' => ret := "010";
when '3' => ret := "011";
when '4' => ret := "100";
when '5' => ret := "101";
when '6' => ret := "110";
when '7' => ret := "111";
when 'x' | 'X' => ret := "XXX";
when ' ' => return ret;
when others => report "Wrong hex char " & RHS(idx); return ret;
end case;
elsif (data_width = 2) then
case RHS(idx) is
when '0' => ret := "00";
when '1' => ret := "01";
when '2' => ret := "10";
when '3' => ret := "11";
when 'x' | 'X' => ret := "XX";
when ' ' => return ret;
when others => report "Wrong hex char " & RHS(idx); return ret;
end case;
elsif (data_width = 1) then
case RHS(idx) is
when '0' => ret := "0";
when '1' => ret := "1";
when 'x' | 'X' => ret := "X";
when ' ' => return ret;
when others => report "Wrong hex char " & RHS(idx); return ret;
end case;
else
report string'("Wrong data_width.");
return ret;
end if;
idx := idx + 1;
end loop;
return ret;
end function;
function esl_conv_string_hex (lv : STD_LOGIC_VECTOR) return STRING is
constant str_len : integer := (lv'length + 3)/4;
variable ret : STRING (1 to str_len);
variable i, tmp: INTEGER;
variable normal_lv : STD_LOGIC_VECTOR(lv'length - 1 downto 0);
variable tmp_lv : STD_LOGIC_VECTOR(3 downto 0);
begin
normal_lv := lv;
for i in 1 to str_len loop
if (i = 1) then
if ((lv'length mod 4) = 3) then
tmp_lv(2 downto 0) := normal_lv(lv'length - 1 downto lv'length - 3);
case tmp_lv(2 downto 0) is
when "000" => ret(i) := '0';
when "001" => ret(i) := '1';
when "010" => ret(i) := '2';
when "011" => ret(i) := '3';
when "100" => ret(i) := '4';
when "101" => ret(i) := '5';
when "110" => ret(i) := '6';
when "111" => ret(i) := '7';
when others => ret(i) := 'X';
end case;
elsif ((lv'length mod 4) = 2) then
tmp_lv(1 downto 0) := normal_lv(lv'length - 1 downto lv'length - 2);
case tmp_lv(1 downto 0) is
when "00" => ret(i) := '0';
when "01" => ret(i) := '1';
when "10" => ret(i) := '2';
when "11" => ret(i) := '3';
when others => ret(i) := 'X';
end case;
elsif ((lv'length mod 4) = 1) then
tmp_lv(0 downto 0) := normal_lv(lv'length - 1 downto lv'length - 1);
case tmp_lv(0 downto 0) is
when "0" => ret(i) := '0';
when "1" => ret(i) := '1';
when others=> ret(i) := 'X';
end case;
elsif ((lv'length mod 4) = 0) then
tmp_lv(3 downto 0) := normal_lv(lv'length - 1 downto lv'length - 4);
case tmp_lv(3 downto 0) is
when "0000" => ret(i) := '0';
when "0001" => ret(i) := '1';
when "0010" => ret(i) := '2';
when "0011" => ret(i) := '3';
when "0100" => ret(i) := '4';
when "0101" => ret(i) := '5';
when "0110" => ret(i) := '6';
when "0111" => ret(i) := '7';
when "1000" => ret(i) := '8';
when "1001" => ret(i) := '9';
when "1010" => ret(i) := 'a';
when "1011" => ret(i) := 'b';
when "1100" => ret(i) := 'c';
when "1101" => ret(i) := 'd';
when "1110" => ret(i) := 'e';
when "1111" => ret(i) := 'f';
when others => ret(i) := 'X';
end case;
end if;
else
tmp_lv(3 downto 0) := normal_lv((str_len - i) * 4 + 3 downto (str_len - i) * 4);
case tmp_lv(3 downto 0) is
when "0000" => ret(i) := '0';
when "0001" => ret(i) := '1';
when "0010" => ret(i) := '2';
when "0011" => ret(i) := '3';
when "0100" => ret(i) := '4';
when "0101" => ret(i) := '5';
when "0110" => ret(i) := '6';
when "0111" => ret(i) := '7';
when "1000" => ret(i) := '8';
when "1001" => ret(i) := '9';
when "1010" => ret(i) := 'a';
when "1011" => ret(i) := 'b';
when "1100" => ret(i) := 'c';
when "1101" => ret(i) := 'd';
when "1110" => ret(i) := 'e';
when "1111" => ret(i) := 'f';
when others => ret(i) := 'X';
end case;
end if;
end loop;
return ret;
end function;
function esl_str_dec2int (RHS : STRING) return INTEGER is
variable ret : integer;
variable idx : integer := 1;
begin
ret := 0;
while true loop
case RHS(idx) is
when '0' => ret := ret * 10 + 0;
when '1' => ret := ret * 10 + 1;
when '2' => ret := ret * 10 + 2;
when '3' => ret := ret * 10 + 3;
when '4' => ret := ret * 10 + 4;
when '5' => ret := ret * 10 + 5;
when '6' => ret := ret * 10 + 6;
when '7' => ret := ret * 10 + 7;
when '8' => ret := ret * 10 + 8;
when '9' => ret := ret * 10 + 9;
when ' ' => return ret;
when others => report "Wrong dec char " & RHS(idx); return ret;
end case;
idx := idx + 1;
end loop;
return ret;
end esl_str_dec2int;
begin
TRAN_inStream_TVALID_proc : process( inStream_TDATA_empty_n, inStream_TKEEP_empty_n, inStream_TSTRB_empty_n, inStream_TUSER_empty_n, inStream_TLAST_empty_n, inStream_TID_empty_n, inStream_TDEST_empty_n, reset, inStream_TDATA_ingress_status_bit , inStream_TKEEP_ingress_status_bit , inStream_TSTRB_ingress_status_bit , inStream_TUSER_ingress_status_bit , inStream_TLAST_ingress_status_bit , inStream_TID_ingress_status_bit , inStream_TDEST_ingress_status_bit)
begin
if reset = '0' then
TRAN_inStream_TVALID <= '0';
reg_inStream_TVALID <= '0';
else
TRAN_inStream_TVALID <= (inStream_TDATA_ingress_status_bit and inStream_TKEEP_ingress_status_bit and inStream_TSTRB_ingress_status_bit and inStream_TUSER_ingress_status_bit and inStream_TLAST_ingress_status_bit and inStream_TID_ingress_status_bit and inStream_TDEST_ingress_status_bit) or ('1' and inStream_TDATA_empty_n and inStream_TKEEP_empty_n and inStream_TSTRB_empty_n and inStream_TUSER_empty_n and inStream_TLAST_empty_n and inStream_TID_empty_n and inStream_TDEST_empty_n and '1');
reg_inStream_TVALID <= (inStream_TDATA_ingress_status_bit and inStream_TKEEP_ingress_status_bit and inStream_TSTRB_ingress_status_bit and inStream_TUSER_ingress_status_bit and inStream_TLAST_ingress_status_bit and inStream_TID_ingress_status_bit and inStream_TDEST_ingress_status_bit) or ('1' and inStream_TDATA_empty_n and inStream_TKEEP_empty_n and inStream_TSTRB_empty_n and inStream_TUSER_empty_n and inStream_TLAST_empty_n and inStream_TID_empty_n and inStream_TDEST_empty_n and '1');
end if;
end process;
------------------------Read-only axi_s-------------------
-- Write operation for read_only axi_s port
inStream_TDATA_ingress_status_bit <= '1' when inStream_TDATA_ingress_status > 0 else '0';
inStream_TKEEP_ingress_status_bit <= '1' when inStream_TKEEP_ingress_status > 0 else '0';
inStream_TSTRB_ingress_status_bit <= '1' when inStream_TSTRB_ingress_status > 0 else '0';
inStream_TUSER_ingress_status_bit <= '1' when inStream_TUSER_ingress_status > 0 else '0';
inStream_TLAST_ingress_status_bit <= '1' when inStream_TLAST_ingress_status > 0 else '0';
inStream_TID_ingress_status_bit <= '1' when inStream_TID_ingress_status > 0 else '0';
inStream_TDEST_ingress_status_bit <= '1' when inStream_TDEST_ingress_status > 0 else '0';
proc_gen_reset_reg: process(clk)
begin
if(clk'event and clk = '1') then
reset_reg <= reset;
end if;
end process;
------------------------------- inStream_TDATA --------------------------------
inStream_TDATA_empty_n_proc : process(inStream_TDATA_mInPtr, inStream_TDATA_mOutPtr, inStream_TDATA_mFlag_hint)
begin
if (esl_icmp_eq(inStream_TDATA_mInPtr, inStream_TDATA_mOutPtr) = "1" and (inStream_TDATA_mFlag_hint = '0')) then
inStream_TDATA_empty_n <= '0';
else
inStream_TDATA_empty_n <= '1';
end if;
end process;
proc_gen_inStream_TDATA_in_size: process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable i : INTEGER;
variable token_line : LINE;
variable token : STRING(1 to 200);
begin
file_open(fstatus, fp,"../tv/stream_size/stream_size_in_inStream_V_data_V.dat" , READ_MODE);
if(fstatus /= OPEN_OK) then
assert false report "Open file " & "../tv/stream_size/stream_size_in_inStream_V_data_V.dat" & " failed!!!" severity note;
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
if(token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
wait until reset = '1';
wait until clk'event and clk = '1';
while(token(1 to 14) /= "[[[/runtime]]]") loop
i := 0;
if(token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
esl_read_token(fp, token_line, token);
inStream_TDATA_in_size <= esl_str_dec2int(token);
wait until clk'event and clk = '0';
while (inStream_TDATA_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token); --[[/transaction]]
esl_read_token(fp, token_line, token);
end loop;
if(token(1 to 14) /= "[[[/runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
wait until clk'event and clk = '1';
file_close (fp);
wait;
end process;
inStream_TDATA_in_end <= '1' when ((inStream_TDATA_in_size = 0) and (reset_reg = '1')) or ((inStream_TDATA_in_i = (inStream_TDATA_in_size - 1)) and (TRAN_inStream_TREADY = '1')) else '0';
inStream_TDATA_trans_num_sig <= inStream_TDATA_trans_num_reg + 1 when ((inStream_TDATA_in_end = '1') and (inStream_TDATA_trans_num_reg /= AUTOTB_TRANSACTION_NUM + 1)) else inStream_TDATA_trans_num_reg;
inStream_TDATA_trans_num <= inStream_TDATA_trans_num_sig;
proc_gen_inStream_TDATA_in_i : process(reset, clk)
begin
if(reset = '0') then
inStream_TDATA_in_i <= 0;
elsif(clk'event and clk = '1') then
if(TRAN_inStream_TREADY = '1' and inStream_TDATA_in_i < inStream_TDATA_in_size - 1) then
inStream_TDATA_in_i <= inStream_TDATA_in_i + 1;
elsif(inStream_TDATA_in_end = '1') then
inStream_TDATA_in_i <= 0;
end if;
end if;
end process;
proc_gen_inStream_TDATA_trans_num_reg : process(reset, clk)
begin
if(reset = '0') then
inStream_TDATA_trans_num_reg <= X"00000001";
elsif(clk'event and clk = '1') then
inStream_TDATA_trans_num_reg <= inStream_TDATA_trans_num_sig;
end if;
end process;
proc_gen_inStream_TDATA_in_end_reg: process(reset, clk)
begin
if(reset = '0') then
inStream_TDATA_in_end_reg <= '0';
elsif(clk'event and clk = '1') then
inStream_TDATA_in_end_reg <= inStream_TDATA_in_end;
end if;
end process;
inStream_TDATA_read_file_proc : process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable token_line : LINE;
variable token : STRING(1 to 128);
variable token_len : INTEGER;
variable token_int : INTEGER;
file fp_ingress_status : TEXT;
variable fstatus_ingress_status : FILE_OPEN_STATUS;
variable token_line_ingress_status : LINE;
variable token_ingress_status : STRING(1 to 128);
variable ingress_status_var : INTEGER;
variable transaction_idx : INTEGER;
variable inStream_TDATA_mInPtr_var : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
variable inStream_TDATA_mem_var : inStream_TDATA_arr2D := (others => (others => '0'));
begin
inStream_TDATA_mFlag_hint <= '0';
transaction_idx := 0;
wait until reset = '1';
wait until clk'event and clk = '1';
file_open(fstatus, fp, TV_IN_inStream_TDATA, READ_MODE);
if (fstatus /= OPEN_OK) then
assert false report "Open file " & TV_IN_inStream_TDATA & " failed!!!" severity failure;
end if;
esl_read_token(fp, token_line, token);
if (token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
file_open(fstatus_ingress_status, fp_ingress_status, INGRESS_STATUS_inStream_TDATA, READ_MODE);
if (fstatus_ingress_status /= OPEN_OK) then
assert false report "Open file " & INGRESS_STATUS_inStream_TDATA & " failed!!!" severity failure;
end if;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
while (token(1 to 14) /= "[[[/runtime]]]") loop
if (token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
-- Start to read data for every transaction round
esl_read_token(fp, token_line, token);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status); -- Skip transaction number
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
inStream_TDATA_mInPtr_var := (others => '0');
while (token(1 to 16) /= "[[/transaction]]") loop
if (CONV_INTEGER(inStream_TDATA_mInPtr_var) > 262144 - 1) then
assert false report "Fifo overflow!" severity failure;
end if;
inStream_TDATA_mem_var(CONV_INTEGER(inStream_TDATA_mInPtr_var)) := esl_str2lv_hex(token, 8);
inStream_TDATA_mInPtr_var := esl_add(inStream_TDATA_mInPtr_var, "1");
esl_read_token(fp, token_line, token);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
end loop;
inStream_TDATA_mInPtr <= inStream_TDATA_mInPtr_var;
inStream_TDATA_mem <= inStream_TDATA_mem_var;
inStream_TDATA_mFlag_hint <= '0';
wait until clk'event and clk = '0';
while (inStream_TDATA_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token);
inStream_TDATA_ingress_status <= ingress_status_var;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
transaction_idx := transaction_idx + 1;
end loop;
file_close(fp);
wait until clk'event and clk = '0';
while (inStream_TDATA_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
inStream_TDATA_mFlag_hint <= '1';
wait;
end process;
TRAN_inStream_TDATA <= inStream_TDATA_mem(CONV_INTEGER(inStream_TDATA_mOutPtr));
inStream_TDATA_mOutPtr_proc : process(clk)
begin
if (clk'event and clk = '0') then
if (ready = '1') then
inStream_TDATA_mOutPtr <= (others => '0');
end if;
elsif (clk'event and clk = '1') then
if (reg_inStream_TVALID = '1' and TRAN_inStream_TREADY = '1') then
if (esl_icmp_ult(inStream_TDATA_mOutPtr,inStream_TDATA_mInPtr) = "1") then
inStream_TDATA_mOutPtr <= esl_add(inStream_TDATA_mOutPtr, "1");
end if;
end if;
end if;
end process;
------------------------------- inStream_TKEEP --------------------------------
inStream_TKEEP_empty_n_proc : process(inStream_TKEEP_mInPtr, inStream_TKEEP_mOutPtr, inStream_TKEEP_mFlag_hint)
begin
if (esl_icmp_eq(inStream_TKEEP_mInPtr, inStream_TKEEP_mOutPtr) = "1" and (inStream_TKEEP_mFlag_hint = '0')) then
inStream_TKEEP_empty_n <= '0';
else
inStream_TKEEP_empty_n <= '1';
end if;
end process;
proc_gen_inStream_TKEEP_in_size: process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable i : INTEGER;
variable token_line : LINE;
variable token : STRING(1 to 200);
begin
file_open(fstatus, fp,"../tv/stream_size/stream_size_in_inStream_V_keep_V.dat" , READ_MODE);
if(fstatus /= OPEN_OK) then
assert false report "Open file " & "../tv/stream_size/stream_size_in_inStream_V_keep_V.dat" & " failed!!!" severity note;
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
if(token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
wait until reset = '1';
wait until clk'event and clk = '1';
while(token(1 to 14) /= "[[[/runtime]]]") loop
i := 0;
if(token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
esl_read_token(fp, token_line, token);
inStream_TKEEP_in_size <= esl_str_dec2int(token);
wait until clk'event and clk = '0';
while (inStream_TKEEP_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token); --[[/transaction]]
esl_read_token(fp, token_line, token);
end loop;
if(token(1 to 14) /= "[[[/runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
wait until clk'event and clk = '1';
file_close (fp);
wait;
end process;
inStream_TKEEP_in_end <= '1' when ((inStream_TKEEP_in_size = 0) and (reset_reg = '1')) or ((inStream_TKEEP_in_i = (inStream_TKEEP_in_size - 1)) and (TRAN_inStream_TREADY = '1')) else '0';
inStream_TKEEP_trans_num_sig <= inStream_TKEEP_trans_num_reg + 1 when ((inStream_TKEEP_in_end = '1') and (inStream_TKEEP_trans_num_reg /= AUTOTB_TRANSACTION_NUM + 1)) else inStream_TKEEP_trans_num_reg;
inStream_TKEEP_trans_num <= inStream_TKEEP_trans_num_sig;
proc_gen_inStream_TKEEP_in_i : process(reset, clk)
begin
if(reset = '0') then
inStream_TKEEP_in_i <= 0;
elsif(clk'event and clk = '1') then
if(TRAN_inStream_TREADY = '1' and inStream_TKEEP_in_i < inStream_TKEEP_in_size - 1) then
inStream_TKEEP_in_i <= inStream_TKEEP_in_i + 1;
elsif(inStream_TKEEP_in_end = '1') then
inStream_TKEEP_in_i <= 0;
end if;
end if;
end process;
proc_gen_inStream_TKEEP_trans_num_reg : process(reset, clk)
begin
if(reset = '0') then
inStream_TKEEP_trans_num_reg <= X"00000001";
elsif(clk'event and clk = '1') then
inStream_TKEEP_trans_num_reg <= inStream_TKEEP_trans_num_sig;
end if;
end process;
proc_gen_inStream_TKEEP_in_end_reg: process(reset, clk)
begin
if(reset = '0') then
inStream_TKEEP_in_end_reg <= '0';
elsif(clk'event and clk = '1') then
inStream_TKEEP_in_end_reg <= inStream_TKEEP_in_end;
end if;
end process;
inStream_TKEEP_read_file_proc : process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable token_line : LINE;
variable token : STRING(1 to 128);
variable token_len : INTEGER;
variable token_int : INTEGER;
file fp_ingress_status : TEXT;
variable fstatus_ingress_status : FILE_OPEN_STATUS;
variable token_line_ingress_status : LINE;
variable token_ingress_status : STRING(1 to 128);
variable ingress_status_var : INTEGER;
variable transaction_idx : INTEGER;
variable inStream_TKEEP_mInPtr_var : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
variable inStream_TKEEP_mem_var : inStream_TKEEP_arr2D := (others => (others => '0'));
begin
inStream_TKEEP_mFlag_hint <= '0';
transaction_idx := 0;
wait until reset = '1';
wait until clk'event and clk = '1';
file_open(fstatus, fp, TV_IN_inStream_TKEEP, READ_MODE);
if (fstatus /= OPEN_OK) then
assert false report "Open file " & TV_IN_inStream_TKEEP & " failed!!!" severity failure;
end if;
esl_read_token(fp, token_line, token);
if (token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
file_open(fstatus_ingress_status, fp_ingress_status, INGRESS_STATUS_inStream_TKEEP, READ_MODE);
if (fstatus_ingress_status /= OPEN_OK) then
assert false report "Open file " & INGRESS_STATUS_inStream_TKEEP & " failed!!!" severity failure;
end if;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
while (token(1 to 14) /= "[[[/runtime]]]") loop
if (token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
-- Start to read data for every transaction round
esl_read_token(fp, token_line, token);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status); -- Skip transaction number
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
inStream_TKEEP_mInPtr_var := (others => '0');
while (token(1 to 16) /= "[[/transaction]]") loop
if (CONV_INTEGER(inStream_TKEEP_mInPtr_var) > 262144 - 1) then
assert false report "Fifo overflow!" severity failure;
end if;
inStream_TKEEP_mem_var(CONV_INTEGER(inStream_TKEEP_mInPtr_var)) := esl_str2lv_hex(token, 1);
inStream_TKEEP_mInPtr_var := esl_add(inStream_TKEEP_mInPtr_var, "1");
esl_read_token(fp, token_line, token);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
end loop;
inStream_TKEEP_mInPtr <= inStream_TKEEP_mInPtr_var;
inStream_TKEEP_mem <= inStream_TKEEP_mem_var;
inStream_TKEEP_mFlag_hint <= '0';
wait until clk'event and clk = '0';
while (inStream_TKEEP_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token);
inStream_TKEEP_ingress_status <= ingress_status_var;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
transaction_idx := transaction_idx + 1;
end loop;
file_close(fp);
wait until clk'event and clk = '0';
while (inStream_TKEEP_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
inStream_TKEEP_mFlag_hint <= '1';
wait;
end process;
TRAN_inStream_TKEEP <= inStream_TKEEP_mem(CONV_INTEGER(inStream_TKEEP_mOutPtr));
inStream_TKEEP_mOutPtr_proc : process(clk)
begin
if (clk'event and clk = '0') then
if (ready = '1') then
inStream_TKEEP_mOutPtr <= (others => '0');
end if;
elsif (clk'event and clk = '1') then
if (reg_inStream_TVALID = '1' and TRAN_inStream_TREADY = '1') then
if (esl_icmp_ult(inStream_TKEEP_mOutPtr,inStream_TKEEP_mInPtr) = "1") then
inStream_TKEEP_mOutPtr <= esl_add(inStream_TKEEP_mOutPtr, "1");
end if;
end if;
end if;
end process;
------------------------------- inStream_TSTRB --------------------------------
inStream_TSTRB_empty_n_proc : process(inStream_TSTRB_mInPtr, inStream_TSTRB_mOutPtr, inStream_TSTRB_mFlag_hint)
begin
if (esl_icmp_eq(inStream_TSTRB_mInPtr, inStream_TSTRB_mOutPtr) = "1" and (inStream_TSTRB_mFlag_hint = '0')) then
inStream_TSTRB_empty_n <= '0';
else
inStream_TSTRB_empty_n <= '1';
end if;
end process;
proc_gen_inStream_TSTRB_in_size: process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable i : INTEGER;
variable token_line : LINE;
variable token : STRING(1 to 200);
begin
file_open(fstatus, fp,"../tv/stream_size/stream_size_in_inStream_V_strb_V.dat" , READ_MODE);
if(fstatus /= OPEN_OK) then
assert false report "Open file " & "../tv/stream_size/stream_size_in_inStream_V_strb_V.dat" & " failed!!!" severity note;
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
if(token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
wait until reset = '1';
wait until clk'event and clk = '1';
while(token(1 to 14) /= "[[[/runtime]]]") loop
i := 0;
if(token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
esl_read_token(fp, token_line, token);
inStream_TSTRB_in_size <= esl_str_dec2int(token);
wait until clk'event and clk = '0';
while (inStream_TSTRB_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token); --[[/transaction]]
esl_read_token(fp, token_line, token);
end loop;
if(token(1 to 14) /= "[[[/runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
wait until clk'event and clk = '1';
file_close (fp);
wait;
end process;
inStream_TSTRB_in_end <= '1' when ((inStream_TSTRB_in_size = 0) and (reset_reg = '1')) or ((inStream_TSTRB_in_i = (inStream_TSTRB_in_size - 1)) and (TRAN_inStream_TREADY = '1')) else '0';
inStream_TSTRB_trans_num_sig <= inStream_TSTRB_trans_num_reg + 1 when ((inStream_TSTRB_in_end = '1') and (inStream_TSTRB_trans_num_reg /= AUTOTB_TRANSACTION_NUM + 1)) else inStream_TSTRB_trans_num_reg;
inStream_TSTRB_trans_num <= inStream_TSTRB_trans_num_sig;
proc_gen_inStream_TSTRB_in_i : process(reset, clk)
begin
if(reset = '0') then
inStream_TSTRB_in_i <= 0;
elsif(clk'event and clk = '1') then
if(TRAN_inStream_TREADY = '1' and inStream_TSTRB_in_i < inStream_TSTRB_in_size - 1) then
inStream_TSTRB_in_i <= inStream_TSTRB_in_i + 1;
elsif(inStream_TSTRB_in_end = '1') then
inStream_TSTRB_in_i <= 0;
end if;
end if;
end process;
proc_gen_inStream_TSTRB_trans_num_reg : process(reset, clk)
begin
if(reset = '0') then
inStream_TSTRB_trans_num_reg <= X"00000001";
elsif(clk'event and clk = '1') then
inStream_TSTRB_trans_num_reg <= inStream_TSTRB_trans_num_sig;
end if;
end process;
proc_gen_inStream_TSTRB_in_end_reg: process(reset, clk)
begin
if(reset = '0') then
inStream_TSTRB_in_end_reg <= '0';
elsif(clk'event and clk = '1') then
inStream_TSTRB_in_end_reg <= inStream_TSTRB_in_end;
end if;
end process;
inStream_TSTRB_read_file_proc : process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable token_line : LINE;
variable token : STRING(1 to 128);
variable token_len : INTEGER;
variable token_int : INTEGER;
file fp_ingress_status : TEXT;
variable fstatus_ingress_status : FILE_OPEN_STATUS;
variable token_line_ingress_status : LINE;
variable token_ingress_status : STRING(1 to 128);
variable ingress_status_var : INTEGER;
variable transaction_idx : INTEGER;
variable inStream_TSTRB_mInPtr_var : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
variable inStream_TSTRB_mem_var : inStream_TSTRB_arr2D := (others => (others => '0'));
begin
inStream_TSTRB_mFlag_hint <= '0';
transaction_idx := 0;
wait until reset = '1';
wait until clk'event and clk = '1';
file_open(fstatus, fp, TV_IN_inStream_TSTRB, READ_MODE);
if (fstatus /= OPEN_OK) then
assert false report "Open file " & TV_IN_inStream_TSTRB & " failed!!!" severity failure;
end if;
esl_read_token(fp, token_line, token);
if (token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
file_open(fstatus_ingress_status, fp_ingress_status, INGRESS_STATUS_inStream_TSTRB, READ_MODE);
if (fstatus_ingress_status /= OPEN_OK) then
assert false report "Open file " & INGRESS_STATUS_inStream_TSTRB & " failed!!!" severity failure;
end if;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
while (token(1 to 14) /= "[[[/runtime]]]") loop
if (token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
-- Start to read data for every transaction round
esl_read_token(fp, token_line, token);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status); -- Skip transaction number
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
inStream_TSTRB_mInPtr_var := (others => '0');
while (token(1 to 16) /= "[[/transaction]]") loop
if (CONV_INTEGER(inStream_TSTRB_mInPtr_var) > 262144 - 1) then
assert false report "Fifo overflow!" severity failure;
end if;
inStream_TSTRB_mem_var(CONV_INTEGER(inStream_TSTRB_mInPtr_var)) := esl_str2lv_hex(token, 1);
inStream_TSTRB_mInPtr_var := esl_add(inStream_TSTRB_mInPtr_var, "1");
esl_read_token(fp, token_line, token);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
end loop;
inStream_TSTRB_mInPtr <= inStream_TSTRB_mInPtr_var;
inStream_TSTRB_mem <= inStream_TSTRB_mem_var;
inStream_TSTRB_mFlag_hint <= '0';
wait until clk'event and clk = '0';
while (inStream_TSTRB_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token);
inStream_TSTRB_ingress_status <= ingress_status_var;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
transaction_idx := transaction_idx + 1;
end loop;
file_close(fp);
wait until clk'event and clk = '0';
while (inStream_TSTRB_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
inStream_TSTRB_mFlag_hint <= '1';
wait;
end process;
TRAN_inStream_TSTRB <= inStream_TSTRB_mem(CONV_INTEGER(inStream_TSTRB_mOutPtr));
inStream_TSTRB_mOutPtr_proc : process(clk)
begin
if (clk'event and clk = '0') then
if (ready = '1') then
inStream_TSTRB_mOutPtr <= (others => '0');
end if;
elsif (clk'event and clk = '1') then
if (reg_inStream_TVALID = '1' and TRAN_inStream_TREADY = '1') then
if (esl_icmp_ult(inStream_TSTRB_mOutPtr,inStream_TSTRB_mInPtr) = "1") then
inStream_TSTRB_mOutPtr <= esl_add(inStream_TSTRB_mOutPtr, "1");
end if;
end if;
end if;
end process;
------------------------------- inStream_TUSER --------------------------------
inStream_TUSER_empty_n_proc : process(inStream_TUSER_mInPtr, inStream_TUSER_mOutPtr, inStream_TUSER_mFlag_hint)
begin
if (esl_icmp_eq(inStream_TUSER_mInPtr, inStream_TUSER_mOutPtr) = "1" and (inStream_TUSER_mFlag_hint = '0')) then
inStream_TUSER_empty_n <= '0';
else
inStream_TUSER_empty_n <= '1';
end if;
end process;
proc_gen_inStream_TUSER_in_size: process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable i : INTEGER;
variable token_line : LINE;
variable token : STRING(1 to 200);
begin
file_open(fstatus, fp,"../tv/stream_size/stream_size_in_inStream_V_user_V.dat" , READ_MODE);
if(fstatus /= OPEN_OK) then
assert false report "Open file " & "../tv/stream_size/stream_size_in_inStream_V_user_V.dat" & " failed!!!" severity note;
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
if(token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
wait until reset = '1';
wait until clk'event and clk = '1';
while(token(1 to 14) /= "[[[/runtime]]]") loop
i := 0;
if(token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
esl_read_token(fp, token_line, token);
inStream_TUSER_in_size <= esl_str_dec2int(token);
wait until clk'event and clk = '0';
while (inStream_TUSER_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token); --[[/transaction]]
esl_read_token(fp, token_line, token);
end loop;
if(token(1 to 14) /= "[[[/runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
wait until clk'event and clk = '1';
file_close (fp);
wait;
end process;
inStream_TUSER_in_end <= '1' when ((inStream_TUSER_in_size = 0) and (reset_reg = '1')) or ((inStream_TUSER_in_i = (inStream_TUSER_in_size - 1)) and (TRAN_inStream_TREADY = '1')) else '0';
inStream_TUSER_trans_num_sig <= inStream_TUSER_trans_num_reg + 1 when ((inStream_TUSER_in_end = '1') and (inStream_TUSER_trans_num_reg /= AUTOTB_TRANSACTION_NUM + 1)) else inStream_TUSER_trans_num_reg;
inStream_TUSER_trans_num <= inStream_TUSER_trans_num_sig;
proc_gen_inStream_TUSER_in_i : process(reset, clk)
begin
if(reset = '0') then
inStream_TUSER_in_i <= 0;
elsif(clk'event and clk = '1') then
if(TRAN_inStream_TREADY = '1' and inStream_TUSER_in_i < inStream_TUSER_in_size - 1) then
inStream_TUSER_in_i <= inStream_TUSER_in_i + 1;
elsif(inStream_TUSER_in_end = '1') then
inStream_TUSER_in_i <= 0;
end if;
end if;
end process;
proc_gen_inStream_TUSER_trans_num_reg : process(reset, clk)
begin
if(reset = '0') then
inStream_TUSER_trans_num_reg <= X"00000001";
elsif(clk'event and clk = '1') then
inStream_TUSER_trans_num_reg <= inStream_TUSER_trans_num_sig;
end if;
end process;
proc_gen_inStream_TUSER_in_end_reg: process(reset, clk)
begin
if(reset = '0') then
inStream_TUSER_in_end_reg <= '0';
elsif(clk'event and clk = '1') then
inStream_TUSER_in_end_reg <= inStream_TUSER_in_end;
end if;
end process;
inStream_TUSER_read_file_proc : process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable token_line : LINE;
variable token : STRING(1 to 128);
variable token_len : INTEGER;
variable token_int : INTEGER;
file fp_ingress_status : TEXT;
variable fstatus_ingress_status : FILE_OPEN_STATUS;
variable token_line_ingress_status : LINE;
variable token_ingress_status : STRING(1 to 128);
variable ingress_status_var : INTEGER;
variable transaction_idx : INTEGER;
variable inStream_TUSER_mInPtr_var : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
variable inStream_TUSER_mem_var : inStream_TUSER_arr2D := (others => (others => '0'));
begin
inStream_TUSER_mFlag_hint <= '0';
transaction_idx := 0;
wait until reset = '1';
wait until clk'event and clk = '1';
file_open(fstatus, fp, TV_IN_inStream_TUSER, READ_MODE);
if (fstatus /= OPEN_OK) then
assert false report "Open file " & TV_IN_inStream_TUSER & " failed!!!" severity failure;
end if;
esl_read_token(fp, token_line, token);
if (token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
file_open(fstatus_ingress_status, fp_ingress_status, INGRESS_STATUS_inStream_TUSER, READ_MODE);
if (fstatus_ingress_status /= OPEN_OK) then
assert false report "Open file " & INGRESS_STATUS_inStream_TUSER & " failed!!!" severity failure;
end if;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
while (token(1 to 14) /= "[[[/runtime]]]") loop
if (token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
-- Start to read data for every transaction round
esl_read_token(fp, token_line, token);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status); -- Skip transaction number
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
inStream_TUSER_mInPtr_var := (others => '0');
while (token(1 to 16) /= "[[/transaction]]") loop
if (CONV_INTEGER(inStream_TUSER_mInPtr_var) > 262144 - 1) then
assert false report "Fifo overflow!" severity failure;
end if;
inStream_TUSER_mem_var(CONV_INTEGER(inStream_TUSER_mInPtr_var)) := esl_str2lv_hex(token, 2);
inStream_TUSER_mInPtr_var := esl_add(inStream_TUSER_mInPtr_var, "1");
esl_read_token(fp, token_line, token);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
end loop;
inStream_TUSER_mInPtr <= inStream_TUSER_mInPtr_var;
inStream_TUSER_mem <= inStream_TUSER_mem_var;
inStream_TUSER_mFlag_hint <= '0';
wait until clk'event and clk = '0';
while (inStream_TUSER_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token);
inStream_TUSER_ingress_status <= ingress_status_var;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
transaction_idx := transaction_idx + 1;
end loop;
file_close(fp);
wait until clk'event and clk = '0';
while (inStream_TUSER_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
inStream_TUSER_mFlag_hint <= '1';
wait;
end process;
TRAN_inStream_TUSER <= inStream_TUSER_mem(CONV_INTEGER(inStream_TUSER_mOutPtr));
inStream_TUSER_mOutPtr_proc : process(clk)
begin
if (clk'event and clk = '0') then
if (ready = '1') then
inStream_TUSER_mOutPtr <= (others => '0');
end if;
elsif (clk'event and clk = '1') then
if (reg_inStream_TVALID = '1' and TRAN_inStream_TREADY = '1') then
if (esl_icmp_ult(inStream_TUSER_mOutPtr,inStream_TUSER_mInPtr) = "1") then
inStream_TUSER_mOutPtr <= esl_add(inStream_TUSER_mOutPtr, "1");
end if;
end if;
end if;
end process;
------------------------------- inStream_TLAST --------------------------------
inStream_TLAST_empty_n_proc : process(inStream_TLAST_mInPtr, inStream_TLAST_mOutPtr, inStream_TLAST_mFlag_hint)
begin
if (esl_icmp_eq(inStream_TLAST_mInPtr, inStream_TLAST_mOutPtr) = "1" and (inStream_TLAST_mFlag_hint = '0')) then
inStream_TLAST_empty_n <= '0';
else
inStream_TLAST_empty_n <= '1';
end if;
end process;
proc_gen_inStream_TLAST_in_size: process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable i : INTEGER;
variable token_line : LINE;
variable token : STRING(1 to 200);
begin
file_open(fstatus, fp,"../tv/stream_size/stream_size_in_inStream_V_last_V.dat" , READ_MODE);
if(fstatus /= OPEN_OK) then
assert false report "Open file " & "../tv/stream_size/stream_size_in_inStream_V_last_V.dat" & " failed!!!" severity note;
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
if(token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
wait until reset = '1';
wait until clk'event and clk = '1';
while(token(1 to 14) /= "[[[/runtime]]]") loop
i := 0;
if(token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
esl_read_token(fp, token_line, token);
inStream_TLAST_in_size <= esl_str_dec2int(token);
wait until clk'event and clk = '0';
while (inStream_TLAST_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token); --[[/transaction]]
esl_read_token(fp, token_line, token);
end loop;
if(token(1 to 14) /= "[[[/runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
wait until clk'event and clk = '1';
file_close (fp);
wait;
end process;
inStream_TLAST_in_end <= '1' when ((inStream_TLAST_in_size = 0) and (reset_reg = '1')) or ((inStream_TLAST_in_i = (inStream_TLAST_in_size - 1)) and (TRAN_inStream_TREADY = '1')) else '0';
inStream_TLAST_trans_num_sig <= inStream_TLAST_trans_num_reg + 1 when ((inStream_TLAST_in_end = '1') and (inStream_TLAST_trans_num_reg /= AUTOTB_TRANSACTION_NUM + 1)) else inStream_TLAST_trans_num_reg;
inStream_TLAST_trans_num <= inStream_TLAST_trans_num_sig;
proc_gen_inStream_TLAST_in_i : process(reset, clk)
begin
if(reset = '0') then
inStream_TLAST_in_i <= 0;
elsif(clk'event and clk = '1') then
if(TRAN_inStream_TREADY = '1' and inStream_TLAST_in_i < inStream_TLAST_in_size - 1) then
inStream_TLAST_in_i <= inStream_TLAST_in_i + 1;
elsif(inStream_TLAST_in_end = '1') then
inStream_TLAST_in_i <= 0;
end if;
end if;
end process;
proc_gen_inStream_TLAST_trans_num_reg : process(reset, clk)
begin
if(reset = '0') then
inStream_TLAST_trans_num_reg <= X"00000001";
elsif(clk'event and clk = '1') then
inStream_TLAST_trans_num_reg <= inStream_TLAST_trans_num_sig;
end if;
end process;
proc_gen_inStream_TLAST_in_end_reg: process(reset, clk)
begin
if(reset = '0') then
inStream_TLAST_in_end_reg <= '0';
elsif(clk'event and clk = '1') then
inStream_TLAST_in_end_reg <= inStream_TLAST_in_end;
end if;
end process;
inStream_TLAST_read_file_proc : process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable token_line : LINE;
variable token : STRING(1 to 128);
variable token_len : INTEGER;
variable token_int : INTEGER;
file fp_ingress_status : TEXT;
variable fstatus_ingress_status : FILE_OPEN_STATUS;
variable token_line_ingress_status : LINE;
variable token_ingress_status : STRING(1 to 128);
variable ingress_status_var : INTEGER;
variable transaction_idx : INTEGER;
variable inStream_TLAST_mInPtr_var : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
variable inStream_TLAST_mem_var : inStream_TLAST_arr2D := (others => (others => '0'));
begin
inStream_TLAST_mFlag_hint <= '0';
transaction_idx := 0;
wait until reset = '1';
wait until clk'event and clk = '1';
file_open(fstatus, fp, TV_IN_inStream_TLAST, READ_MODE);
if (fstatus /= OPEN_OK) then
assert false report "Open file " & TV_IN_inStream_TLAST & " failed!!!" severity failure;
end if;
esl_read_token(fp, token_line, token);
if (token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
file_open(fstatus_ingress_status, fp_ingress_status, INGRESS_STATUS_inStream_TLAST, READ_MODE);
if (fstatus_ingress_status /= OPEN_OK) then
assert false report "Open file " & INGRESS_STATUS_inStream_TLAST & " failed!!!" severity failure;
end if;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
while (token(1 to 14) /= "[[[/runtime]]]") loop
if (token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
-- Start to read data for every transaction round
esl_read_token(fp, token_line, token);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status); -- Skip transaction number
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
inStream_TLAST_mInPtr_var := (others => '0');
while (token(1 to 16) /= "[[/transaction]]") loop
if (CONV_INTEGER(inStream_TLAST_mInPtr_var) > 262144 - 1) then
assert false report "Fifo overflow!" severity failure;
end if;
inStream_TLAST_mem_var(CONV_INTEGER(inStream_TLAST_mInPtr_var)) := esl_str2lv_hex(token, 1);
inStream_TLAST_mInPtr_var := esl_add(inStream_TLAST_mInPtr_var, "1");
esl_read_token(fp, token_line, token);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
end loop;
inStream_TLAST_mInPtr <= inStream_TLAST_mInPtr_var;
inStream_TLAST_mem <= inStream_TLAST_mem_var;
inStream_TLAST_mFlag_hint <= '0';
wait until clk'event and clk = '0';
while (inStream_TLAST_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token);
inStream_TLAST_ingress_status <= ingress_status_var;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
transaction_idx := transaction_idx + 1;
end loop;
file_close(fp);
wait until clk'event and clk = '0';
while (inStream_TLAST_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
inStream_TLAST_mFlag_hint <= '1';
wait;
end process;
TRAN_inStream_TLAST <= inStream_TLAST_mem(CONV_INTEGER(inStream_TLAST_mOutPtr));
inStream_TLAST_mOutPtr_proc : process(clk)
begin
if (clk'event and clk = '0') then
if (ready = '1') then
inStream_TLAST_mOutPtr <= (others => '0');
end if;
elsif (clk'event and clk = '1') then
if (reg_inStream_TVALID = '1' and TRAN_inStream_TREADY = '1') then
if (esl_icmp_ult(inStream_TLAST_mOutPtr,inStream_TLAST_mInPtr) = "1") then
inStream_TLAST_mOutPtr <= esl_add(inStream_TLAST_mOutPtr, "1");
end if;
end if;
end if;
end process;
------------------------------- inStream_TID --------------------------------
inStream_TID_empty_n_proc : process(inStream_TID_mInPtr, inStream_TID_mOutPtr, inStream_TID_mFlag_hint)
begin
if (esl_icmp_eq(inStream_TID_mInPtr, inStream_TID_mOutPtr) = "1" and (inStream_TID_mFlag_hint = '0')) then
inStream_TID_empty_n <= '0';
else
inStream_TID_empty_n <= '1';
end if;
end process;
proc_gen_inStream_TID_in_size: process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable i : INTEGER;
variable token_line : LINE;
variable token : STRING(1 to 200);
begin
file_open(fstatus, fp,"../tv/stream_size/stream_size_in_inStream_V_id_V.dat" , READ_MODE);
if(fstatus /= OPEN_OK) then
assert false report "Open file " & "../tv/stream_size/stream_size_in_inStream_V_id_V.dat" & " failed!!!" severity note;
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
if(token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
wait until reset = '1';
wait until clk'event and clk = '1';
while(token(1 to 14) /= "[[[/runtime]]]") loop
i := 0;
if(token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
esl_read_token(fp, token_line, token);
inStream_TID_in_size <= esl_str_dec2int(token);
wait until clk'event and clk = '0';
while (inStream_TID_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token); --[[/transaction]]
esl_read_token(fp, token_line, token);
end loop;
if(token(1 to 14) /= "[[[/runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
wait until clk'event and clk = '1';
file_close (fp);
wait;
end process;
inStream_TID_in_end <= '1' when ((inStream_TID_in_size = 0) and (reset_reg = '1')) or ((inStream_TID_in_i = (inStream_TID_in_size - 1)) and (TRAN_inStream_TREADY = '1')) else '0';
inStream_TID_trans_num_sig <= inStream_TID_trans_num_reg + 1 when ((inStream_TID_in_end = '1') and (inStream_TID_trans_num_reg /= AUTOTB_TRANSACTION_NUM + 1)) else inStream_TID_trans_num_reg;
inStream_TID_trans_num <= inStream_TID_trans_num_sig;
proc_gen_inStream_TID_in_i : process(reset, clk)
begin
if(reset = '0') then
inStream_TID_in_i <= 0;
elsif(clk'event and clk = '1') then
if(TRAN_inStream_TREADY = '1' and inStream_TID_in_i < inStream_TID_in_size - 1) then
inStream_TID_in_i <= inStream_TID_in_i + 1;
elsif(inStream_TID_in_end = '1') then
inStream_TID_in_i <= 0;
end if;
end if;
end process;
proc_gen_inStream_TID_trans_num_reg : process(reset, clk)
begin
if(reset = '0') then
inStream_TID_trans_num_reg <= X"00000001";
elsif(clk'event and clk = '1') then
inStream_TID_trans_num_reg <= inStream_TID_trans_num_sig;
end if;
end process;
proc_gen_inStream_TID_in_end_reg: process(reset, clk)
begin
if(reset = '0') then
inStream_TID_in_end_reg <= '0';
elsif(clk'event and clk = '1') then
inStream_TID_in_end_reg <= inStream_TID_in_end;
end if;
end process;
inStream_TID_read_file_proc : process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable token_line : LINE;
variable token : STRING(1 to 128);
variable token_len : INTEGER;
variable token_int : INTEGER;
file fp_ingress_status : TEXT;
variable fstatus_ingress_status : FILE_OPEN_STATUS;
variable token_line_ingress_status : LINE;
variable token_ingress_status : STRING(1 to 128);
variable ingress_status_var : INTEGER;
variable transaction_idx : INTEGER;
variable inStream_TID_mInPtr_var : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
variable inStream_TID_mem_var : inStream_TID_arr2D := (others => (others => '0'));
begin
inStream_TID_mFlag_hint <= '0';
transaction_idx := 0;
wait until reset = '1';
wait until clk'event and clk = '1';
file_open(fstatus, fp, TV_IN_inStream_TID, READ_MODE);
if (fstatus /= OPEN_OK) then
assert false report "Open file " & TV_IN_inStream_TID & " failed!!!" severity failure;
end if;
esl_read_token(fp, token_line, token);
if (token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
file_open(fstatus_ingress_status, fp_ingress_status, INGRESS_STATUS_inStream_TID, READ_MODE);
if (fstatus_ingress_status /= OPEN_OK) then
assert false report "Open file " & INGRESS_STATUS_inStream_TID & " failed!!!" severity failure;
end if;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
while (token(1 to 14) /= "[[[/runtime]]]") loop
if (token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
-- Start to read data for every transaction round
esl_read_token(fp, token_line, token);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status); -- Skip transaction number
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
inStream_TID_mInPtr_var := (others => '0');
while (token(1 to 16) /= "[[/transaction]]") loop
if (CONV_INTEGER(inStream_TID_mInPtr_var) > 262144 - 1) then
assert false report "Fifo overflow!" severity failure;
end if;
inStream_TID_mem_var(CONV_INTEGER(inStream_TID_mInPtr_var)) := esl_str2lv_hex(token, 5);
inStream_TID_mInPtr_var := esl_add(inStream_TID_mInPtr_var, "1");
esl_read_token(fp, token_line, token);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
end loop;
inStream_TID_mInPtr <= inStream_TID_mInPtr_var;
inStream_TID_mem <= inStream_TID_mem_var;
inStream_TID_mFlag_hint <= '0';
wait until clk'event and clk = '0';
while (inStream_TID_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token);
inStream_TID_ingress_status <= ingress_status_var;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
transaction_idx := transaction_idx + 1;
end loop;
file_close(fp);
wait until clk'event and clk = '0';
while (inStream_TID_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
inStream_TID_mFlag_hint <= '1';
wait;
end process;
TRAN_inStream_TID <= inStream_TID_mem(CONV_INTEGER(inStream_TID_mOutPtr));
inStream_TID_mOutPtr_proc : process(clk)
begin
if (clk'event and clk = '0') then
if (ready = '1') then
inStream_TID_mOutPtr <= (others => '0');
end if;
elsif (clk'event and clk = '1') then
if (reg_inStream_TVALID = '1' and TRAN_inStream_TREADY = '1') then
if (esl_icmp_ult(inStream_TID_mOutPtr,inStream_TID_mInPtr) = "1") then
inStream_TID_mOutPtr <= esl_add(inStream_TID_mOutPtr, "1");
end if;
end if;
end if;
end process;
------------------------------- inStream_TDEST --------------------------------
inStream_TDEST_empty_n_proc : process(inStream_TDEST_mInPtr, inStream_TDEST_mOutPtr, inStream_TDEST_mFlag_hint)
begin
if (esl_icmp_eq(inStream_TDEST_mInPtr, inStream_TDEST_mOutPtr) = "1" and (inStream_TDEST_mFlag_hint = '0')) then
inStream_TDEST_empty_n <= '0';
else
inStream_TDEST_empty_n <= '1';
end if;
end process;
proc_gen_inStream_TDEST_in_size: process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable i : INTEGER;
variable token_line : LINE;
variable token : STRING(1 to 200);
begin
file_open(fstatus, fp,"../tv/stream_size/stream_size_in_inStream_V_dest_V.dat" , READ_MODE);
if(fstatus /= OPEN_OK) then
assert false report "Open file " & "../tv/stream_size/stream_size_in_inStream_V_dest_V.dat" & " failed!!!" severity note;
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
if(token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
wait until reset = '1';
wait until clk'event and clk = '1';
while(token(1 to 14) /= "[[[/runtime]]]") loop
i := 0;
if(token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
esl_read_token(fp, token_line, token);
inStream_TDEST_in_size <= esl_str_dec2int(token);
wait until clk'event and clk = '0';
while (inStream_TDEST_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token); --[[/transaction]]
esl_read_token(fp, token_line, token);
end loop;
if(token(1 to 14) /= "[[[/runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
wait until clk'event and clk = '1';
file_close (fp);
wait;
end process;
inStream_TDEST_in_end <= '1' when ((inStream_TDEST_in_size = 0) and (reset_reg = '1')) or ((inStream_TDEST_in_i = (inStream_TDEST_in_size - 1)) and (TRAN_inStream_TREADY = '1')) else '0';
inStream_TDEST_trans_num_sig <= inStream_TDEST_trans_num_reg + 1 when ((inStream_TDEST_in_end = '1') and (inStream_TDEST_trans_num_reg /= AUTOTB_TRANSACTION_NUM + 1)) else inStream_TDEST_trans_num_reg;
inStream_TDEST_trans_num <= inStream_TDEST_trans_num_sig;
proc_gen_inStream_TDEST_in_i : process(reset, clk)
begin
if(reset = '0') then
inStream_TDEST_in_i <= 0;
elsif(clk'event and clk = '1') then
if(TRAN_inStream_TREADY = '1' and inStream_TDEST_in_i < inStream_TDEST_in_size - 1) then
inStream_TDEST_in_i <= inStream_TDEST_in_i + 1;
elsif(inStream_TDEST_in_end = '1') then
inStream_TDEST_in_i <= 0;
end if;
end if;
end process;
proc_gen_inStream_TDEST_trans_num_reg : process(reset, clk)
begin
if(reset = '0') then
inStream_TDEST_trans_num_reg <= X"00000001";
elsif(clk'event and clk = '1') then
inStream_TDEST_trans_num_reg <= inStream_TDEST_trans_num_sig;
end if;
end process;
proc_gen_inStream_TDEST_in_end_reg: process(reset, clk)
begin
if(reset = '0') then
inStream_TDEST_in_end_reg <= '0';
elsif(clk'event and clk = '1') then
inStream_TDEST_in_end_reg <= inStream_TDEST_in_end;
end if;
end process;
inStream_TDEST_read_file_proc : process
file fp : TEXT;
variable fstatus : FILE_OPEN_STATUS;
variable token_line : LINE;
variable token : STRING(1 to 128);
variable token_len : INTEGER;
variable token_int : INTEGER;
file fp_ingress_status : TEXT;
variable fstatus_ingress_status : FILE_OPEN_STATUS;
variable token_line_ingress_status : LINE;
variable token_ingress_status : STRING(1 to 128);
variable ingress_status_var : INTEGER;
variable transaction_idx : INTEGER;
variable inStream_TDEST_mInPtr_var : STD_LOGIC_VECTOR (19 downto 0) := (others => '0');
variable inStream_TDEST_mem_var : inStream_TDEST_arr2D := (others => (others => '0'));
begin
inStream_TDEST_mFlag_hint <= '0';
transaction_idx := 0;
wait until reset = '1';
wait until clk'event and clk = '1';
file_open(fstatus, fp, TV_IN_inStream_TDEST, READ_MODE);
if (fstatus /= OPEN_OK) then
assert false report "Open file " & TV_IN_inStream_TDEST & " failed!!!" severity failure;
end if;
esl_read_token(fp, token_line, token);
if (token(1 to 13) /= "[[[runtime]]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token);
file_open(fstatus_ingress_status, fp_ingress_status, INGRESS_STATUS_inStream_TDEST, READ_MODE);
if (fstatus_ingress_status /= OPEN_OK) then
assert false report "Open file " & INGRESS_STATUS_inStream_TDEST & " failed!!!" severity failure;
end if;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
while (token(1 to 14) /= "[[[/runtime]]]") loop
if (token(1 to 15) /= "[[transaction]]") then
assert false report "ERROR: Simulation using HLS TB failed." severity failure;
end if;
esl_read_token(fp, token_line, token); -- Skip transaction number
-- Start to read data for every transaction round
esl_read_token(fp, token_line, token);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status); -- Skip transaction number
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
inStream_TDEST_mInPtr_var := (others => '0');
while (token(1 to 16) /= "[[/transaction]]") loop
if (CONV_INTEGER(inStream_TDEST_mInPtr_var) > 262144 - 1) then
assert false report "Fifo overflow!" severity failure;
end if;
inStream_TDEST_mem_var(CONV_INTEGER(inStream_TDEST_mInPtr_var)) := esl_str2lv_hex(token, 6);
inStream_TDEST_mInPtr_var := esl_add(inStream_TDEST_mInPtr_var, "1");
esl_read_token(fp, token_line, token);
ingress_status_var := esl_str_dec2int(token_ingress_status);
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
end loop;
inStream_TDEST_mInPtr <= inStream_TDEST_mInPtr_var;
inStream_TDEST_mem <= inStream_TDEST_mem_var;
inStream_TDEST_mFlag_hint <= '0';
wait until clk'event and clk = '0';
while (inStream_TDEST_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
esl_read_token(fp, token_line, token);
inStream_TDEST_ingress_status <= ingress_status_var;
esl_read_token(fp_ingress_status, token_line_ingress_status, token_ingress_status);
transaction_idx := transaction_idx + 1;
end loop;
file_close(fp);
wait until clk'event and clk = '0';
while (inStream_TDEST_in_end_reg /= '1') loop
wait until clk'event and clk = '0';
end loop;
inStream_TDEST_mFlag_hint <= '1';
wait;
end process;
TRAN_inStream_TDEST <= inStream_TDEST_mem(CONV_INTEGER(inStream_TDEST_mOutPtr));
inStream_TDEST_mOutPtr_proc : process(clk)
begin
if (clk'event and clk = '0') then
if (ready = '1') then
inStream_TDEST_mOutPtr <= (others => '0');
end if;
elsif (clk'event and clk = '1') then
if (reg_inStream_TVALID = '1' and TRAN_inStream_TREADY = '1') then
if (esl_icmp_ult(inStream_TDEST_mOutPtr,inStream_TDEST_mInPtr) = "1") then
inStream_TDEST_mOutPtr <= esl_add(inStream_TDEST_mOutPtr, "1");
end if;
end if;
end if;
end process;
end behav;
|
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 19:18:42 04/23/2015
-- Design Name:
-- Module Name: convolutional_encoder - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
--use IEEE.STD_logic_arith.ALL;
use IEEE.std_logic_unsigned.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity convolutional_encoder is
Generic ( TAM_REG : integer := 7;
SAT_ESPERA : integer := 2);
Port ( clk : in STD_LOGIC;
reset : in STD_LOGIC;
button : in STD_LOGIC;
bit_in : in STD_LOGIC;
ok_bit_in : in STD_LOGIC;
fin_rx : in STD_LOGIC;
sat : in STD_LOGIC;
first_bit_out : out STD_LOGIC;
second_bit_out : out STD_LOGIC;
ok_bit_out : out STD_LOGIC;
fin_tx : out STD_LOGIC);
end convolutional_encoder;
architecture Behavioral of convolutional_encoder is
type estado is ( reposo,
normal,
relleno);
signal estado_actual, estado_nuevo : estado;
--signal estado_nuevo : estado;
signal reg, p_reg : STD_LOGIC_VECTOR (TAM_REG -1 downto 0);
signal cont_relleno, p_cont_relleno : integer range 0 to TAM_REG -1; --contador para ceross de relleno
signal p_ok_bit_out, p_fin_tx : STD_LOGIC;
begin
comb : process(estado_actual, reg, ok_bit_in, bit_in, cont_relleno, fin_rx, button, sat)
begin
p_reg <= reg;
p_cont_relleno <= cont_relleno;
p_ok_bit_out <= '0';
p_fin_tx <= '0';
estado_nuevo <= estado_actual;
first_bit_out <= reg(6) xor reg(5) xor reg(3) xor reg(1) xor reg(0);
second_bit_out <= reg(6) xor reg(3) xor reg(2) xor reg(0);
case estado_actual is
when reposo =>
if ( button = '1' ) then
estado_nuevo <= normal;
p_reg <= (others => '0');
end if;
when normal =>
if ( ok_bit_in = '1' ) then
p_reg(5 downto 0) <= reg(6 downto 1);
p_reg(6) <= bit_in;
p_ok_bit_out <= '1';
end if;
if ( fin_rx = '1' ) then
estado_nuevo <= relleno;
p_cont_relleno <= TAM_REG -1;
end if;
when relleno =>
if ( cont_relleno = 0 and sat = '1') then
estado_nuevo <= reposo;
p_fin_tx <= '1';
elsif ( sat = '1' ) then
p_cont_relleno <= cont_relleno -1;
p_reg(5 downto 0) <= reg(6 downto 1);
p_reg(6) <= '0';
p_ok_bit_out <= '1';
end if;
end case;
end process;
sinc : process (clk, reset)
begin
if ( reset = '1' ) then
reg <= (others => '0');
ok_bit_out <= '0';
estado_actual <= reposo;
cont_relleno <= TAM_REG -1;
elsif ( rising_edge(clk) ) then
cont_relleno <= p_cont_relleno;
reg <= p_reg;
fin_tx <= p_fin_tx;
ok_bit_out <= p_ok_bit_out;
estado_actual <= estado_nuevo;
end if;
end process;
end Behavioral;
|
architecture RTL of ENT is
begin
-- Align left = no align paren = no
n_foo <= resize(unsigned(I_FOO) +
unsigned(I_BAR), q_foo'length);
n_foo <=
resize(unsigned(I_FOO) +
unsigned(I_BAR), q_foo'length);
n_bar <= a or b and c
xor z and x or
w and z;
n_bar <=
a or b and c
xor z and x or
w and z;
-- Align left = no align paren = yes
n_foo <= resize(unsigned(I_FOO) +
unsigned(I_BAR), q_foo'length);
n_foo <=
resize(unsigned(I_FOO) +
unsigned(I_BAR), q_foo'length);
n_bar <= a or b and c
xor z and x or
w and z;
n_bar <=
a or b and c
xor z and x or
w and z;
-- Align left = yes and align paren = no
n_foo <= resize(unsigned(I_FOO) +
unsigned(I_BAR), q_foo'length);
n_foo <=
resize(unsigned(I_FOO) +
unsigned(I_BAR), q_foo'length);
n_bar <= a or b and c
xor z and x or
w and z;
n_bar <=
a or b and c
xor z and x or
w and z;
-- Align left = yes and align paren = yes
n_foo <= resize(unsigned(I_FOO) +
unsigned(I_BAR), q_foo'length);
n_foo <=
resize(unsigned(I_FOO) +
unsigned(I_BAR), q_foo'length);
n_bar <= a or b and c
xor z and x or
w and z;
n_bar <=
a or b and c
xor z and x or
w and z;
end architecture RTL;
|
---------------------------------------------------
-- School: University of Massachusetts Dartmouth
-- Department: Computer and Electrical Engineering
-- Engineer: Daniel Noyes
--
-- Create Date: SPRING 2015
-- Module Name: ALU_Shift_Unit
-- Project Name: OurALU
-- Target Devices: Spartan-3E
-- Tool versions: Xilinx ISE 14.7
-- Description: Shift Unit
-- Operations - Shift Left, Shift Right
---------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ALU_Shift_Unit is
Port ( A : in STD_LOGIC_VECTOR (7 downto 0);
COUNT : in STD_LOGIC_VECTOR (2 downto 0);
OP : in STD_LOGIC;
RESULT : out STD_LOGIC_VECTOR (7 downto 0));
end ALU_Shift_Unit;
architecture Combinational of ALU_Shift_Unit is
signal shift_left, shift_right : std_logic_vector (7 downto 0) := (OTHERS => '0');
begin
shift_left <= to_stdlogicvector(to_bitvector(A) sll conv_integer(COUNT));
shift_right <= to_stdlogicvector(to_bitvector(A) srl conv_integer(COUNT));
RESULT <= shift_left when OP='0' else shift_right;
end Combinational;
|
---------------------------------------------------
-- School: University of Massachusetts Dartmouth
-- Department: Computer and Electrical Engineering
-- Engineer: Daniel Noyes
--
-- Create Date: SPRING 2015
-- Module Name: ALU_Shift_Unit
-- Project Name: OurALU
-- Target Devices: Spartan-3E
-- Tool versions: Xilinx ISE 14.7
-- Description: Shift Unit
-- Operations - Shift Left, Shift Right
---------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ALU_Shift_Unit is
Port ( A : in STD_LOGIC_VECTOR (7 downto 0);
COUNT : in STD_LOGIC_VECTOR (2 downto 0);
OP : in STD_LOGIC;
RESULT : out STD_LOGIC_VECTOR (7 downto 0));
end ALU_Shift_Unit;
architecture Combinational of ALU_Shift_Unit is
signal shift_left, shift_right : std_logic_vector (7 downto 0) := (OTHERS => '0');
begin
shift_left <= to_stdlogicvector(to_bitvector(A) sll conv_integer(COUNT));
shift_right <= to_stdlogicvector(to_bitvector(A) srl conv_integer(COUNT));
RESULT <= shift_left when OP='0' else shift_right;
end Combinational;
|
---------------------------------------------------
-- School: University of Massachusetts Dartmouth
-- Department: Computer and Electrical Engineering
-- Engineer: Daniel Noyes
--
-- Create Date: SPRING 2015
-- Module Name: ALU_Shift_Unit
-- Project Name: OurALU
-- Target Devices: Spartan-3E
-- Tool versions: Xilinx ISE 14.7
-- Description: Shift Unit
-- Operations - Shift Left, Shift Right
---------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ALU_Shift_Unit is
Port ( A : in STD_LOGIC_VECTOR (7 downto 0);
COUNT : in STD_LOGIC_VECTOR (2 downto 0);
OP : in STD_LOGIC;
RESULT : out STD_LOGIC_VECTOR (7 downto 0));
end ALU_Shift_Unit;
architecture Combinational of ALU_Shift_Unit is
signal shift_left, shift_right : std_logic_vector (7 downto 0) := (OTHERS => '0');
begin
shift_left <= to_stdlogicvector(to_bitvector(A) sll conv_integer(COUNT));
shift_right <= to_stdlogicvector(to_bitvector(A) srl conv_integer(COUNT));
RESULT <= shift_left when OP='0' else shift_right;
end Combinational;
|
architecture RTl of FIFO is
component fifo IS
end component fifo;
-- Failures below
component fifo IS
end component fifo;
component fifo IS
end component fifo;
begin
end architecture RTL;
|
----------------------------------------------------------------------------------
-- Company: @Home
-- Engineer: Zoltan Pekic ([email protected])
--
-- Create Date: 21:07:52 02/22/2016
-- Design Name:
-- Module Name: converter24to12 - Behavioral
-- Project Name: Alarm Clock
-- Target Devices: Mercury FPGA + Baseboard (http://www.micro-nova.com/mercury/)
-- Tool versions: Xilinx ISE 14.7 (nt64)-- Company:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity converter24to12 is
Port ( select_12hr : in STD_LOGIC;
hour24 : in STD_LOGIC_VECTOR (7 downto 0);
hour_ispm : out STD_LOGIC;
hour_12or24 : out STD_LOGIC_VECTOR (7 downto 0));
end converter24to12;
architecture Behavioral of converter24to12 is
begin
convert: process(select_12hr, hour24)
begin
if (select_12hr = '1') then
-- convert to 12hr mode (note both input and outputs are BCD!)
case hour24 is
when "00000000" => -- 00 is 12am
hour_12or24 <= "00010010";
hour_ispm <= '0';
when "00000001" => -- 01 is 01am
hour_12or24 <= "00000001";
hour_ispm <= '0';
when "00000010" => -- 02 is 02am
hour_12or24 <= "00000010";
hour_ispm <= '0';
when "00000011" => -- 03 is 03am
hour_12or24 <= "00000011";
hour_ispm <= '0';
when "00000100" => -- 04 is 04am
hour_12or24 <= "00000100";
hour_ispm <= '0';
when "00000101" => -- 05 is 05am
hour_12or24 <= "00000101";
hour_ispm <= '0';
when "00000110" => -- 06 is 06am
hour_12or24 <= "00000110";
hour_ispm <= '0';
when "00000111" => -- 07 is 07am
hour_12or24 <= "00000111";
hour_ispm <= '0';
when "00001000" => -- 08 is 08am
hour_12or24 <= "00001000";
hour_ispm <= '0';
when "00001001" => -- 09 is 09am
hour_12or24 <= "00001001";
hour_ispm <= '0';
when "00010000" => -- 10 is 10am
hour_12or24 <= "00010000";
hour_ispm <= '0';
when "00010001" => -- 11 is 11am
hour_12or24 <= "00010001";
hour_ispm <= '0';
when "00010010" => -- 12 is 12pm
hour_12or24 <= "00010010";
hour_ispm <= '1';
when "00010011" => -- 13 is 01pm
hour_12or24 <= "00000001";
hour_ispm <= '1';
when "00010100" => -- 14 is 02pm
hour_12or24 <= "00000010";
hour_ispm <= '1';
when "00010101" => -- 15 is 03pm
hour_12or24 <= "00000011";
hour_ispm <= '1';
when "00010110" => -- 16 is 04pm
hour_12or24 <= "00000100";
hour_ispm <= '1';
when "00010111" => -- 17 is 05pm
hour_12or24 <= "00000101";
hour_ispm <= '1';
when "00011000" => -- 18 is 06pm
hour_12or24 <= "00000110";
hour_ispm <= '1';
when "00011001" => -- 19 is 07pm
hour_12or24 <= "00000111";
hour_ispm <= '1';
when "00100000" => -- 20 is 08pm
hour_12or24 <= "00001000";
hour_ispm <= '1';
when "00100001" => -- 21 is 09pm
hour_12or24 <= "00001001";
hour_ispm <= '1';
when "00100010" => -- 22 is 10pm
hour_12or24 <= "00010000";
hour_ispm <= '1';
when "00100011" => -- 23 is 11pm
hour_12or24 <= "00010001";
hour_ispm <= '1';
when others =>
null;
end case;
else
-- we are in 24hr mode, no change
hour_12or24 <= hour24;
hour_ispm <= '0';
end if;
end process;
end Behavioral;
|
package body upf is
function supply_on (
constant supply_name : string;
constant voltage : real)
return boolean is
begin
return true;
end supply_on;
function supply_partial_on (
constant supply_name : string;
constant voltage : real)
return boolean is
begin
return true;
end supply_partial_on;
function supply_off (
constant supply_name : string)
return boolean is
begin
return true;
end supply_off;
end upf;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:blk_mem_gen:8.2
-- IP Revision: 4
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY blk_mem_gen_v8_2;
USE blk_mem_gen_v8_2.blk_mem_gen_v8_2;
ENTITY SDPRAM_9A16x9B16 IS
PORT (
clka : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
enb : IN STD_LOGIC;
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0)
);
END SDPRAM_9A16x9B16;
ARCHITECTURE SDPRAM_9A16x9B16_arch OF SDPRAM_9A16x9B16 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "yes";
COMPONENT blk_mem_gen_v8_2 IS
GENERIC (
C_FAMILY : STRING;
C_XDEVICEFAMILY : STRING;
C_ELABORATION_DIR : STRING;
C_INTERFACE_TYPE : INTEGER;
C_AXI_TYPE : INTEGER;
C_AXI_SLAVE_TYPE : INTEGER;
C_USE_BRAM_BLOCK : INTEGER;
C_ENABLE_32BIT_ADDRESS : INTEGER;
C_CTRL_ECC_ALGO : STRING;
C_HAS_AXI_ID : INTEGER;
C_AXI_ID_WIDTH : INTEGER;
C_MEM_TYPE : INTEGER;
C_BYTE_SIZE : INTEGER;
C_ALGORITHM : INTEGER;
C_PRIM_TYPE : INTEGER;
C_LOAD_INIT_FILE : INTEGER;
C_INIT_FILE_NAME : STRING;
C_INIT_FILE : STRING;
C_USE_DEFAULT_DATA : INTEGER;
C_DEFAULT_DATA : STRING;
C_HAS_RSTA : INTEGER;
C_RST_PRIORITY_A : STRING;
C_RSTRAM_A : INTEGER;
C_INITA_VAL : STRING;
C_HAS_ENA : INTEGER;
C_HAS_REGCEA : INTEGER;
C_USE_BYTE_WEA : INTEGER;
C_WEA_WIDTH : INTEGER;
C_WRITE_MODE_A : STRING;
C_WRITE_WIDTH_A : INTEGER;
C_READ_WIDTH_A : INTEGER;
C_WRITE_DEPTH_A : INTEGER;
C_READ_DEPTH_A : INTEGER;
C_ADDRA_WIDTH : INTEGER;
C_HAS_RSTB : INTEGER;
C_RST_PRIORITY_B : STRING;
C_RSTRAM_B : INTEGER;
C_INITB_VAL : STRING;
C_HAS_ENB : INTEGER;
C_HAS_REGCEB : INTEGER;
C_USE_BYTE_WEB : INTEGER;
C_WEB_WIDTH : INTEGER;
C_WRITE_MODE_B : STRING;
C_WRITE_WIDTH_B : INTEGER;
C_READ_WIDTH_B : INTEGER;
C_WRITE_DEPTH_B : INTEGER;
C_READ_DEPTH_B : INTEGER;
C_ADDRB_WIDTH : INTEGER;
C_HAS_MEM_OUTPUT_REGS_A : INTEGER;
C_HAS_MEM_OUTPUT_REGS_B : INTEGER;
C_HAS_MUX_OUTPUT_REGS_A : INTEGER;
C_HAS_MUX_OUTPUT_REGS_B : INTEGER;
C_MUX_PIPELINE_STAGES : INTEGER;
C_HAS_SOFTECC_INPUT_REGS_A : INTEGER;
C_HAS_SOFTECC_OUTPUT_REGS_B : INTEGER;
C_USE_SOFTECC : INTEGER;
C_USE_ECC : INTEGER;
C_EN_ECC_PIPE : INTEGER;
C_HAS_INJECTERR : INTEGER;
C_SIM_COLLISION_CHECK : STRING;
C_COMMON_CLK : INTEGER;
C_DISABLE_WARN_BHV_COLL : INTEGER;
C_EN_SLEEP_PIN : INTEGER;
C_DISABLE_WARN_BHV_RANGE : INTEGER;
C_COUNT_36K_BRAM : STRING;
C_COUNT_18K_BRAM : STRING;
C_EST_POWER_SUMMARY : STRING
);
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
regcea : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
regceb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
injectsbiterr : IN STD_LOGIC;
injectdbiterr : IN STD_LOGIC;
eccpipece : IN STD_LOGIC;
sbiterr : OUT STD_LOGIC;
dbiterr : OUT STD_LOGIC;
rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
sleep : IN STD_LOGIC;
s_aclk : IN STD_LOGIC;
s_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_injectsbiterr : IN STD_LOGIC;
s_axi_injectdbiterr : IN STD_LOGIC;
s_axi_sbiterr : OUT STD_LOGIC;
s_axi_dbiterr : OUT STD_LOGIC;
s_axi_rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END COMPONENT blk_mem_gen_v8_2;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "blk_mem_gen_v8_2,Vivado 2014.4.1";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF SDPRAM_9A16x9B16_arch : ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{x_ipProduct=Vivado 2014.4.1,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=blk_mem_gen,x_ipVersion=8.2,x_ipCoreRevision=4,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_FAMILY=zynq,C_XDEVICEFAMILY=zynq,C_ELABORATION_DIR=./,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_AXI_SLAVE_TYPE=0,C_USE_BRAM_BLOCK=0,C_ENABLE_32BIT_ADDRESS=0,C_CTRL_ECC_ALGO=NONE,C_HAS_AXI_ID=0,C_AXI_ID_WIDTH=4,C_MEM_TYPE=1,C_BYTE_SIZE=9,C_ALGORITHM=1,C_PRIM_TYPE=1,C_LOAD_INIT_FILE=0,C_INIT_FILE_NAME=no_coe_file_loaded,C_INIT_FILE=SDPRAM_9A16x9B16.mem,C_USE_DEFAULT_DATA=0,C_DEFAULT_DATA=0,C_HAS_RSTA=0,C_RST_PRIORITY_A=CE,C_RSTRAM_A=0,C_INITA_VAL=0,C_HAS_ENA=1,C_HAS_REGCEA=0,C_USE_BYTE_WEA=0,C_WEA_WIDTH=1,C_WRITE_MODE_A=NO_CHANGE,C_WRITE_WIDTH_A=9,C_READ_WIDTH_A=9,C_WRITE_DEPTH_A=16,C_READ_DEPTH_A=16,C_ADDRA_WIDTH=4,C_HAS_RSTB=0,C_RST_PRIORITY_B=CE,C_RSTRAM_B=0,C_INITB_VAL=0,C_HAS_ENB=1,C_HAS_REGCEB=0,C_USE_BYTE_WEB=0,C_WEB_WIDTH=1,C_WRITE_MODE_B=READ_FIRST,C_WRITE_WIDTH_B=9,C_READ_WIDTH_B=9,C_WRITE_DEPTH_B=16,C_READ_DEPTH_B=16,C_ADDRB_WIDTH=4,C_HAS_MEM_OUTPUT_REGS_A=0,C_HAS_MEM_OUTPUT_REGS_B=0,C_HAS_MUX_OUTPUT_REGS_A=0,C_HAS_MUX_OUTPUT_REGS_B=0,C_MUX_PIPELINE_STAGES=0,C_HAS_SOFTECC_INPUT_REGS_A=0,C_HAS_SOFTECC_OUTPUT_REGS_B=0,C_USE_SOFTECC=0,C_USE_ECC=0,C_EN_ECC_PIPE=0,C_HAS_INJECTERR=0,C_SIM_COLLISION_CHECK=ALL,C_COMMON_CLK=1,C_DISABLE_WARN_BHV_COLL=0,C_EN_SLEEP_PIN=0,C_DISABLE_WARN_BHV_RANGE=0,C_COUNT_36K_BRAM=0,C_COUNT_18K_BRAM=1,C_EST_POWER_SUMMARY=Estimated Power for IP _ 2.7261500000000001 mW}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clka: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK";
ATTRIBUTE X_INTERFACE_INFO OF ena: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA EN";
ATTRIBUTE X_INTERFACE_INFO OF wea: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA WE";
ATTRIBUTE X_INTERFACE_INFO OF addra: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR";
ATTRIBUTE X_INTERFACE_INFO OF dina: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN";
ATTRIBUTE X_INTERFACE_INFO OF clkb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK";
ATTRIBUTE X_INTERFACE_INFO OF enb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB EN";
ATTRIBUTE X_INTERFACE_INFO OF addrb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR";
ATTRIBUTE X_INTERFACE_INFO OF doutb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT";
BEGIN
U0 : blk_mem_gen_v8_2
GENERIC MAP (
C_FAMILY => "zynq",
C_XDEVICEFAMILY => "zynq",
C_ELABORATION_DIR => "./",
C_INTERFACE_TYPE => 0,
C_AXI_TYPE => 1,
C_AXI_SLAVE_TYPE => 0,
C_USE_BRAM_BLOCK => 0,
C_ENABLE_32BIT_ADDRESS => 0,
C_CTRL_ECC_ALGO => "NONE",
C_HAS_AXI_ID => 0,
C_AXI_ID_WIDTH => 4,
C_MEM_TYPE => 1,
C_BYTE_SIZE => 9,
C_ALGORITHM => 1,
C_PRIM_TYPE => 1,
C_LOAD_INIT_FILE => 0,
C_INIT_FILE_NAME => "no_coe_file_loaded",
C_INIT_FILE => "SDPRAM_9A16x9B16.mem",
C_USE_DEFAULT_DATA => 0,
C_DEFAULT_DATA => "0",
C_HAS_RSTA => 0,
C_RST_PRIORITY_A => "CE",
C_RSTRAM_A => 0,
C_INITA_VAL => "0",
C_HAS_ENA => 1,
C_HAS_REGCEA => 0,
C_USE_BYTE_WEA => 0,
C_WEA_WIDTH => 1,
C_WRITE_MODE_A => "NO_CHANGE",
C_WRITE_WIDTH_A => 9,
C_READ_WIDTH_A => 9,
C_WRITE_DEPTH_A => 16,
C_READ_DEPTH_A => 16,
C_ADDRA_WIDTH => 4,
C_HAS_RSTB => 0,
C_RST_PRIORITY_B => "CE",
C_RSTRAM_B => 0,
C_INITB_VAL => "0",
C_HAS_ENB => 1,
C_HAS_REGCEB => 0,
C_USE_BYTE_WEB => 0,
C_WEB_WIDTH => 1,
C_WRITE_MODE_B => "READ_FIRST",
C_WRITE_WIDTH_B => 9,
C_READ_WIDTH_B => 9,
C_WRITE_DEPTH_B => 16,
C_READ_DEPTH_B => 16,
C_ADDRB_WIDTH => 4,
C_HAS_MEM_OUTPUT_REGS_A => 0,
C_HAS_MEM_OUTPUT_REGS_B => 0,
C_HAS_MUX_OUTPUT_REGS_A => 0,
C_HAS_MUX_OUTPUT_REGS_B => 0,
C_MUX_PIPELINE_STAGES => 0,
C_HAS_SOFTECC_INPUT_REGS_A => 0,
C_HAS_SOFTECC_OUTPUT_REGS_B => 0,
C_USE_SOFTECC => 0,
C_USE_ECC => 0,
C_EN_ECC_PIPE => 0,
C_HAS_INJECTERR => 0,
C_SIM_COLLISION_CHECK => "ALL",
C_COMMON_CLK => 1,
C_DISABLE_WARN_BHV_COLL => 0,
C_EN_SLEEP_PIN => 0,
C_DISABLE_WARN_BHV_RANGE => 0,
C_COUNT_36K_BRAM => "0",
C_COUNT_18K_BRAM => "1",
C_EST_POWER_SUMMARY => "Estimated Power for IP : 2.7261500000000001 mW"
)
PORT MAP (
clka => clka,
rsta => '0',
ena => ena,
regcea => '0',
wea => wea,
addra => addra,
dina => dina,
clkb => clkb,
rstb => '0',
enb => enb,
regceb => '0',
web => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
addrb => addrb,
dinb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
doutb => doutb,
injectsbiterr => '0',
injectdbiterr => '0',
eccpipece => '0',
sleep => '0',
s_aclk => '0',
s_aresetn => '0',
s_axi_awid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_awlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_awsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_awburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_awvalid => '0',
s_axi_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
s_axi_wstrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
s_axi_wlast => '0',
s_axi_wvalid => '0',
s_axi_bready => '0',
s_axi_arid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_arlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_arsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_arburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_arvalid => '0',
s_axi_rready => '0',
s_axi_injectsbiterr => '0',
s_axi_injectdbiterr => '0'
);
END SDPRAM_9A16x9B16_arch;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:blk_mem_gen:8.2
-- IP Revision: 4
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY blk_mem_gen_v8_2;
USE blk_mem_gen_v8_2.blk_mem_gen_v8_2;
ENTITY SDPRAM_9A16x9B16 IS
PORT (
clka : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
enb : IN STD_LOGIC;
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0)
);
END SDPRAM_9A16x9B16;
ARCHITECTURE SDPRAM_9A16x9B16_arch OF SDPRAM_9A16x9B16 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "yes";
COMPONENT blk_mem_gen_v8_2 IS
GENERIC (
C_FAMILY : STRING;
C_XDEVICEFAMILY : STRING;
C_ELABORATION_DIR : STRING;
C_INTERFACE_TYPE : INTEGER;
C_AXI_TYPE : INTEGER;
C_AXI_SLAVE_TYPE : INTEGER;
C_USE_BRAM_BLOCK : INTEGER;
C_ENABLE_32BIT_ADDRESS : INTEGER;
C_CTRL_ECC_ALGO : STRING;
C_HAS_AXI_ID : INTEGER;
C_AXI_ID_WIDTH : INTEGER;
C_MEM_TYPE : INTEGER;
C_BYTE_SIZE : INTEGER;
C_ALGORITHM : INTEGER;
C_PRIM_TYPE : INTEGER;
C_LOAD_INIT_FILE : INTEGER;
C_INIT_FILE_NAME : STRING;
C_INIT_FILE : STRING;
C_USE_DEFAULT_DATA : INTEGER;
C_DEFAULT_DATA : STRING;
C_HAS_RSTA : INTEGER;
C_RST_PRIORITY_A : STRING;
C_RSTRAM_A : INTEGER;
C_INITA_VAL : STRING;
C_HAS_ENA : INTEGER;
C_HAS_REGCEA : INTEGER;
C_USE_BYTE_WEA : INTEGER;
C_WEA_WIDTH : INTEGER;
C_WRITE_MODE_A : STRING;
C_WRITE_WIDTH_A : INTEGER;
C_READ_WIDTH_A : INTEGER;
C_WRITE_DEPTH_A : INTEGER;
C_READ_DEPTH_A : INTEGER;
C_ADDRA_WIDTH : INTEGER;
C_HAS_RSTB : INTEGER;
C_RST_PRIORITY_B : STRING;
C_RSTRAM_B : INTEGER;
C_INITB_VAL : STRING;
C_HAS_ENB : INTEGER;
C_HAS_REGCEB : INTEGER;
C_USE_BYTE_WEB : INTEGER;
C_WEB_WIDTH : INTEGER;
C_WRITE_MODE_B : STRING;
C_WRITE_WIDTH_B : INTEGER;
C_READ_WIDTH_B : INTEGER;
C_WRITE_DEPTH_B : INTEGER;
C_READ_DEPTH_B : INTEGER;
C_ADDRB_WIDTH : INTEGER;
C_HAS_MEM_OUTPUT_REGS_A : INTEGER;
C_HAS_MEM_OUTPUT_REGS_B : INTEGER;
C_HAS_MUX_OUTPUT_REGS_A : INTEGER;
C_HAS_MUX_OUTPUT_REGS_B : INTEGER;
C_MUX_PIPELINE_STAGES : INTEGER;
C_HAS_SOFTECC_INPUT_REGS_A : INTEGER;
C_HAS_SOFTECC_OUTPUT_REGS_B : INTEGER;
C_USE_SOFTECC : INTEGER;
C_USE_ECC : INTEGER;
C_EN_ECC_PIPE : INTEGER;
C_HAS_INJECTERR : INTEGER;
C_SIM_COLLISION_CHECK : STRING;
C_COMMON_CLK : INTEGER;
C_DISABLE_WARN_BHV_COLL : INTEGER;
C_EN_SLEEP_PIN : INTEGER;
C_DISABLE_WARN_BHV_RANGE : INTEGER;
C_COUNT_36K_BRAM : STRING;
C_COUNT_18K_BRAM : STRING;
C_EST_POWER_SUMMARY : STRING
);
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
regcea : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
regceb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
injectsbiterr : IN STD_LOGIC;
injectdbiterr : IN STD_LOGIC;
eccpipece : IN STD_LOGIC;
sbiterr : OUT STD_LOGIC;
dbiterr : OUT STD_LOGIC;
rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
sleep : IN STD_LOGIC;
s_aclk : IN STD_LOGIC;
s_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_injectsbiterr : IN STD_LOGIC;
s_axi_injectdbiterr : IN STD_LOGIC;
s_axi_sbiterr : OUT STD_LOGIC;
s_axi_dbiterr : OUT STD_LOGIC;
s_axi_rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END COMPONENT blk_mem_gen_v8_2;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "blk_mem_gen_v8_2,Vivado 2014.4.1";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF SDPRAM_9A16x9B16_arch : ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{x_ipProduct=Vivado 2014.4.1,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=blk_mem_gen,x_ipVersion=8.2,x_ipCoreRevision=4,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_FAMILY=zynq,C_XDEVICEFAMILY=zynq,C_ELABORATION_DIR=./,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_AXI_SLAVE_TYPE=0,C_USE_BRAM_BLOCK=0,C_ENABLE_32BIT_ADDRESS=0,C_CTRL_ECC_ALGO=NONE,C_HAS_AXI_ID=0,C_AXI_ID_WIDTH=4,C_MEM_TYPE=1,C_BYTE_SIZE=9,C_ALGORITHM=1,C_PRIM_TYPE=1,C_LOAD_INIT_FILE=0,C_INIT_FILE_NAME=no_coe_file_loaded,C_INIT_FILE=SDPRAM_9A16x9B16.mem,C_USE_DEFAULT_DATA=0,C_DEFAULT_DATA=0,C_HAS_RSTA=0,C_RST_PRIORITY_A=CE,C_RSTRAM_A=0,C_INITA_VAL=0,C_HAS_ENA=1,C_HAS_REGCEA=0,C_USE_BYTE_WEA=0,C_WEA_WIDTH=1,C_WRITE_MODE_A=NO_CHANGE,C_WRITE_WIDTH_A=9,C_READ_WIDTH_A=9,C_WRITE_DEPTH_A=16,C_READ_DEPTH_A=16,C_ADDRA_WIDTH=4,C_HAS_RSTB=0,C_RST_PRIORITY_B=CE,C_RSTRAM_B=0,C_INITB_VAL=0,C_HAS_ENB=1,C_HAS_REGCEB=0,C_USE_BYTE_WEB=0,C_WEB_WIDTH=1,C_WRITE_MODE_B=READ_FIRST,C_WRITE_WIDTH_B=9,C_READ_WIDTH_B=9,C_WRITE_DEPTH_B=16,C_READ_DEPTH_B=16,C_ADDRB_WIDTH=4,C_HAS_MEM_OUTPUT_REGS_A=0,C_HAS_MEM_OUTPUT_REGS_B=0,C_HAS_MUX_OUTPUT_REGS_A=0,C_HAS_MUX_OUTPUT_REGS_B=0,C_MUX_PIPELINE_STAGES=0,C_HAS_SOFTECC_INPUT_REGS_A=0,C_HAS_SOFTECC_OUTPUT_REGS_B=0,C_USE_SOFTECC=0,C_USE_ECC=0,C_EN_ECC_PIPE=0,C_HAS_INJECTERR=0,C_SIM_COLLISION_CHECK=ALL,C_COMMON_CLK=1,C_DISABLE_WARN_BHV_COLL=0,C_EN_SLEEP_PIN=0,C_DISABLE_WARN_BHV_RANGE=0,C_COUNT_36K_BRAM=0,C_COUNT_18K_BRAM=1,C_EST_POWER_SUMMARY=Estimated Power for IP _ 2.7261500000000001 mW}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clka: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK";
ATTRIBUTE X_INTERFACE_INFO OF ena: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA EN";
ATTRIBUTE X_INTERFACE_INFO OF wea: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA WE";
ATTRIBUTE X_INTERFACE_INFO OF addra: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR";
ATTRIBUTE X_INTERFACE_INFO OF dina: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN";
ATTRIBUTE X_INTERFACE_INFO OF clkb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK";
ATTRIBUTE X_INTERFACE_INFO OF enb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB EN";
ATTRIBUTE X_INTERFACE_INFO OF addrb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR";
ATTRIBUTE X_INTERFACE_INFO OF doutb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT";
BEGIN
U0 : blk_mem_gen_v8_2
GENERIC MAP (
C_FAMILY => "zynq",
C_XDEVICEFAMILY => "zynq",
C_ELABORATION_DIR => "./",
C_INTERFACE_TYPE => 0,
C_AXI_TYPE => 1,
C_AXI_SLAVE_TYPE => 0,
C_USE_BRAM_BLOCK => 0,
C_ENABLE_32BIT_ADDRESS => 0,
C_CTRL_ECC_ALGO => "NONE",
C_HAS_AXI_ID => 0,
C_AXI_ID_WIDTH => 4,
C_MEM_TYPE => 1,
C_BYTE_SIZE => 9,
C_ALGORITHM => 1,
C_PRIM_TYPE => 1,
C_LOAD_INIT_FILE => 0,
C_INIT_FILE_NAME => "no_coe_file_loaded",
C_INIT_FILE => "SDPRAM_9A16x9B16.mem",
C_USE_DEFAULT_DATA => 0,
C_DEFAULT_DATA => "0",
C_HAS_RSTA => 0,
C_RST_PRIORITY_A => "CE",
C_RSTRAM_A => 0,
C_INITA_VAL => "0",
C_HAS_ENA => 1,
C_HAS_REGCEA => 0,
C_USE_BYTE_WEA => 0,
C_WEA_WIDTH => 1,
C_WRITE_MODE_A => "NO_CHANGE",
C_WRITE_WIDTH_A => 9,
C_READ_WIDTH_A => 9,
C_WRITE_DEPTH_A => 16,
C_READ_DEPTH_A => 16,
C_ADDRA_WIDTH => 4,
C_HAS_RSTB => 0,
C_RST_PRIORITY_B => "CE",
C_RSTRAM_B => 0,
C_INITB_VAL => "0",
C_HAS_ENB => 1,
C_HAS_REGCEB => 0,
C_USE_BYTE_WEB => 0,
C_WEB_WIDTH => 1,
C_WRITE_MODE_B => "READ_FIRST",
C_WRITE_WIDTH_B => 9,
C_READ_WIDTH_B => 9,
C_WRITE_DEPTH_B => 16,
C_READ_DEPTH_B => 16,
C_ADDRB_WIDTH => 4,
C_HAS_MEM_OUTPUT_REGS_A => 0,
C_HAS_MEM_OUTPUT_REGS_B => 0,
C_HAS_MUX_OUTPUT_REGS_A => 0,
C_HAS_MUX_OUTPUT_REGS_B => 0,
C_MUX_PIPELINE_STAGES => 0,
C_HAS_SOFTECC_INPUT_REGS_A => 0,
C_HAS_SOFTECC_OUTPUT_REGS_B => 0,
C_USE_SOFTECC => 0,
C_USE_ECC => 0,
C_EN_ECC_PIPE => 0,
C_HAS_INJECTERR => 0,
C_SIM_COLLISION_CHECK => "ALL",
C_COMMON_CLK => 1,
C_DISABLE_WARN_BHV_COLL => 0,
C_EN_SLEEP_PIN => 0,
C_DISABLE_WARN_BHV_RANGE => 0,
C_COUNT_36K_BRAM => "0",
C_COUNT_18K_BRAM => "1",
C_EST_POWER_SUMMARY => "Estimated Power for IP : 2.7261500000000001 mW"
)
PORT MAP (
clka => clka,
rsta => '0',
ena => ena,
regcea => '0',
wea => wea,
addra => addra,
dina => dina,
clkb => clkb,
rstb => '0',
enb => enb,
regceb => '0',
web => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
addrb => addrb,
dinb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
doutb => doutb,
injectsbiterr => '0',
injectdbiterr => '0',
eccpipece => '0',
sleep => '0',
s_aclk => '0',
s_aresetn => '0',
s_axi_awid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_awlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_awsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_awburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_awvalid => '0',
s_axi_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
s_axi_wstrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
s_axi_wlast => '0',
s_axi_wvalid => '0',
s_axi_bready => '0',
s_axi_arid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_arlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_arsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_arburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_arvalid => '0',
s_axi_rready => '0',
s_axi_injectsbiterr => '0',
s_axi_injectdbiterr => '0'
);
END SDPRAM_9A16x9B16_arch;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:blk_mem_gen:8.2
-- IP Revision: 4
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY blk_mem_gen_v8_2;
USE blk_mem_gen_v8_2.blk_mem_gen_v8_2;
ENTITY SDPRAM_9A16x9B16 IS
PORT (
clka : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
enb : IN STD_LOGIC;
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0)
);
END SDPRAM_9A16x9B16;
ARCHITECTURE SDPRAM_9A16x9B16_arch OF SDPRAM_9A16x9B16 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "yes";
COMPONENT blk_mem_gen_v8_2 IS
GENERIC (
C_FAMILY : STRING;
C_XDEVICEFAMILY : STRING;
C_ELABORATION_DIR : STRING;
C_INTERFACE_TYPE : INTEGER;
C_AXI_TYPE : INTEGER;
C_AXI_SLAVE_TYPE : INTEGER;
C_USE_BRAM_BLOCK : INTEGER;
C_ENABLE_32BIT_ADDRESS : INTEGER;
C_CTRL_ECC_ALGO : STRING;
C_HAS_AXI_ID : INTEGER;
C_AXI_ID_WIDTH : INTEGER;
C_MEM_TYPE : INTEGER;
C_BYTE_SIZE : INTEGER;
C_ALGORITHM : INTEGER;
C_PRIM_TYPE : INTEGER;
C_LOAD_INIT_FILE : INTEGER;
C_INIT_FILE_NAME : STRING;
C_INIT_FILE : STRING;
C_USE_DEFAULT_DATA : INTEGER;
C_DEFAULT_DATA : STRING;
C_HAS_RSTA : INTEGER;
C_RST_PRIORITY_A : STRING;
C_RSTRAM_A : INTEGER;
C_INITA_VAL : STRING;
C_HAS_ENA : INTEGER;
C_HAS_REGCEA : INTEGER;
C_USE_BYTE_WEA : INTEGER;
C_WEA_WIDTH : INTEGER;
C_WRITE_MODE_A : STRING;
C_WRITE_WIDTH_A : INTEGER;
C_READ_WIDTH_A : INTEGER;
C_WRITE_DEPTH_A : INTEGER;
C_READ_DEPTH_A : INTEGER;
C_ADDRA_WIDTH : INTEGER;
C_HAS_RSTB : INTEGER;
C_RST_PRIORITY_B : STRING;
C_RSTRAM_B : INTEGER;
C_INITB_VAL : STRING;
C_HAS_ENB : INTEGER;
C_HAS_REGCEB : INTEGER;
C_USE_BYTE_WEB : INTEGER;
C_WEB_WIDTH : INTEGER;
C_WRITE_MODE_B : STRING;
C_WRITE_WIDTH_B : INTEGER;
C_READ_WIDTH_B : INTEGER;
C_WRITE_DEPTH_B : INTEGER;
C_READ_DEPTH_B : INTEGER;
C_ADDRB_WIDTH : INTEGER;
C_HAS_MEM_OUTPUT_REGS_A : INTEGER;
C_HAS_MEM_OUTPUT_REGS_B : INTEGER;
C_HAS_MUX_OUTPUT_REGS_A : INTEGER;
C_HAS_MUX_OUTPUT_REGS_B : INTEGER;
C_MUX_PIPELINE_STAGES : INTEGER;
C_HAS_SOFTECC_INPUT_REGS_A : INTEGER;
C_HAS_SOFTECC_OUTPUT_REGS_B : INTEGER;
C_USE_SOFTECC : INTEGER;
C_USE_ECC : INTEGER;
C_EN_ECC_PIPE : INTEGER;
C_HAS_INJECTERR : INTEGER;
C_SIM_COLLISION_CHECK : STRING;
C_COMMON_CLK : INTEGER;
C_DISABLE_WARN_BHV_COLL : INTEGER;
C_EN_SLEEP_PIN : INTEGER;
C_DISABLE_WARN_BHV_RANGE : INTEGER;
C_COUNT_36K_BRAM : STRING;
C_COUNT_18K_BRAM : STRING;
C_EST_POWER_SUMMARY : STRING
);
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
regcea : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
regceb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
injectsbiterr : IN STD_LOGIC;
injectdbiterr : IN STD_LOGIC;
eccpipece : IN STD_LOGIC;
sbiterr : OUT STD_LOGIC;
dbiterr : OUT STD_LOGIC;
rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
sleep : IN STD_LOGIC;
s_aclk : IN STD_LOGIC;
s_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_injectsbiterr : IN STD_LOGIC;
s_axi_injectdbiterr : IN STD_LOGIC;
s_axi_sbiterr : OUT STD_LOGIC;
s_axi_dbiterr : OUT STD_LOGIC;
s_axi_rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END COMPONENT blk_mem_gen_v8_2;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "blk_mem_gen_v8_2,Vivado 2014.4.1";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF SDPRAM_9A16x9B16_arch : ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{x_ipProduct=Vivado 2014.4.1,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=blk_mem_gen,x_ipVersion=8.2,x_ipCoreRevision=4,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_FAMILY=zynq,C_XDEVICEFAMILY=zynq,C_ELABORATION_DIR=./,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_AXI_SLAVE_TYPE=0,C_USE_BRAM_BLOCK=0,C_ENABLE_32BIT_ADDRESS=0,C_CTRL_ECC_ALGO=NONE,C_HAS_AXI_ID=0,C_AXI_ID_WIDTH=4,C_MEM_TYPE=1,C_BYTE_SIZE=9,C_ALGORITHM=1,C_PRIM_TYPE=1,C_LOAD_INIT_FILE=0,C_INIT_FILE_NAME=no_coe_file_loaded,C_INIT_FILE=SDPRAM_9A16x9B16.mem,C_USE_DEFAULT_DATA=0,C_DEFAULT_DATA=0,C_HAS_RSTA=0,C_RST_PRIORITY_A=CE,C_RSTRAM_A=0,C_INITA_VAL=0,C_HAS_ENA=1,C_HAS_REGCEA=0,C_USE_BYTE_WEA=0,C_WEA_WIDTH=1,C_WRITE_MODE_A=NO_CHANGE,C_WRITE_WIDTH_A=9,C_READ_WIDTH_A=9,C_WRITE_DEPTH_A=16,C_READ_DEPTH_A=16,C_ADDRA_WIDTH=4,C_HAS_RSTB=0,C_RST_PRIORITY_B=CE,C_RSTRAM_B=0,C_INITB_VAL=0,C_HAS_ENB=1,C_HAS_REGCEB=0,C_USE_BYTE_WEB=0,C_WEB_WIDTH=1,C_WRITE_MODE_B=READ_FIRST,C_WRITE_WIDTH_B=9,C_READ_WIDTH_B=9,C_WRITE_DEPTH_B=16,C_READ_DEPTH_B=16,C_ADDRB_WIDTH=4,C_HAS_MEM_OUTPUT_REGS_A=0,C_HAS_MEM_OUTPUT_REGS_B=0,C_HAS_MUX_OUTPUT_REGS_A=0,C_HAS_MUX_OUTPUT_REGS_B=0,C_MUX_PIPELINE_STAGES=0,C_HAS_SOFTECC_INPUT_REGS_A=0,C_HAS_SOFTECC_OUTPUT_REGS_B=0,C_USE_SOFTECC=0,C_USE_ECC=0,C_EN_ECC_PIPE=0,C_HAS_INJECTERR=0,C_SIM_COLLISION_CHECK=ALL,C_COMMON_CLK=1,C_DISABLE_WARN_BHV_COLL=0,C_EN_SLEEP_PIN=0,C_DISABLE_WARN_BHV_RANGE=0,C_COUNT_36K_BRAM=0,C_COUNT_18K_BRAM=1,C_EST_POWER_SUMMARY=Estimated Power for IP _ 2.7261500000000001 mW}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clka: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK";
ATTRIBUTE X_INTERFACE_INFO OF ena: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA EN";
ATTRIBUTE X_INTERFACE_INFO OF wea: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA WE";
ATTRIBUTE X_INTERFACE_INFO OF addra: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR";
ATTRIBUTE X_INTERFACE_INFO OF dina: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN";
ATTRIBUTE X_INTERFACE_INFO OF clkb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK";
ATTRIBUTE X_INTERFACE_INFO OF enb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB EN";
ATTRIBUTE X_INTERFACE_INFO OF addrb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR";
ATTRIBUTE X_INTERFACE_INFO OF doutb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT";
BEGIN
U0 : blk_mem_gen_v8_2
GENERIC MAP (
C_FAMILY => "zynq",
C_XDEVICEFAMILY => "zynq",
C_ELABORATION_DIR => "./",
C_INTERFACE_TYPE => 0,
C_AXI_TYPE => 1,
C_AXI_SLAVE_TYPE => 0,
C_USE_BRAM_BLOCK => 0,
C_ENABLE_32BIT_ADDRESS => 0,
C_CTRL_ECC_ALGO => "NONE",
C_HAS_AXI_ID => 0,
C_AXI_ID_WIDTH => 4,
C_MEM_TYPE => 1,
C_BYTE_SIZE => 9,
C_ALGORITHM => 1,
C_PRIM_TYPE => 1,
C_LOAD_INIT_FILE => 0,
C_INIT_FILE_NAME => "no_coe_file_loaded",
C_INIT_FILE => "SDPRAM_9A16x9B16.mem",
C_USE_DEFAULT_DATA => 0,
C_DEFAULT_DATA => "0",
C_HAS_RSTA => 0,
C_RST_PRIORITY_A => "CE",
C_RSTRAM_A => 0,
C_INITA_VAL => "0",
C_HAS_ENA => 1,
C_HAS_REGCEA => 0,
C_USE_BYTE_WEA => 0,
C_WEA_WIDTH => 1,
C_WRITE_MODE_A => "NO_CHANGE",
C_WRITE_WIDTH_A => 9,
C_READ_WIDTH_A => 9,
C_WRITE_DEPTH_A => 16,
C_READ_DEPTH_A => 16,
C_ADDRA_WIDTH => 4,
C_HAS_RSTB => 0,
C_RST_PRIORITY_B => "CE",
C_RSTRAM_B => 0,
C_INITB_VAL => "0",
C_HAS_ENB => 1,
C_HAS_REGCEB => 0,
C_USE_BYTE_WEB => 0,
C_WEB_WIDTH => 1,
C_WRITE_MODE_B => "READ_FIRST",
C_WRITE_WIDTH_B => 9,
C_READ_WIDTH_B => 9,
C_WRITE_DEPTH_B => 16,
C_READ_DEPTH_B => 16,
C_ADDRB_WIDTH => 4,
C_HAS_MEM_OUTPUT_REGS_A => 0,
C_HAS_MEM_OUTPUT_REGS_B => 0,
C_HAS_MUX_OUTPUT_REGS_A => 0,
C_HAS_MUX_OUTPUT_REGS_B => 0,
C_MUX_PIPELINE_STAGES => 0,
C_HAS_SOFTECC_INPUT_REGS_A => 0,
C_HAS_SOFTECC_OUTPUT_REGS_B => 0,
C_USE_SOFTECC => 0,
C_USE_ECC => 0,
C_EN_ECC_PIPE => 0,
C_HAS_INJECTERR => 0,
C_SIM_COLLISION_CHECK => "ALL",
C_COMMON_CLK => 1,
C_DISABLE_WARN_BHV_COLL => 0,
C_EN_SLEEP_PIN => 0,
C_DISABLE_WARN_BHV_RANGE => 0,
C_COUNT_36K_BRAM => "0",
C_COUNT_18K_BRAM => "1",
C_EST_POWER_SUMMARY => "Estimated Power for IP : 2.7261500000000001 mW"
)
PORT MAP (
clka => clka,
rsta => '0',
ena => ena,
regcea => '0',
wea => wea,
addra => addra,
dina => dina,
clkb => clkb,
rstb => '0',
enb => enb,
regceb => '0',
web => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
addrb => addrb,
dinb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
doutb => doutb,
injectsbiterr => '0',
injectdbiterr => '0',
eccpipece => '0',
sleep => '0',
s_aclk => '0',
s_aresetn => '0',
s_axi_awid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_awlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_awsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_awburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_awvalid => '0',
s_axi_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
s_axi_wstrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
s_axi_wlast => '0',
s_axi_wvalid => '0',
s_axi_bready => '0',
s_axi_arid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_arlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_arsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_arburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_arvalid => '0',
s_axi_rready => '0',
s_axi_injectsbiterr => '0',
s_axi_injectdbiterr => '0'
);
END SDPRAM_9A16x9B16_arch;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:blk_mem_gen:8.2
-- IP Revision: 4
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY blk_mem_gen_v8_2;
USE blk_mem_gen_v8_2.blk_mem_gen_v8_2;
ENTITY SDPRAM_9A16x9B16 IS
PORT (
clka : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
enb : IN STD_LOGIC;
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0)
);
END SDPRAM_9A16x9B16;
ARCHITECTURE SDPRAM_9A16x9B16_arch OF SDPRAM_9A16x9B16 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "yes";
COMPONENT blk_mem_gen_v8_2 IS
GENERIC (
C_FAMILY : STRING;
C_XDEVICEFAMILY : STRING;
C_ELABORATION_DIR : STRING;
C_INTERFACE_TYPE : INTEGER;
C_AXI_TYPE : INTEGER;
C_AXI_SLAVE_TYPE : INTEGER;
C_USE_BRAM_BLOCK : INTEGER;
C_ENABLE_32BIT_ADDRESS : INTEGER;
C_CTRL_ECC_ALGO : STRING;
C_HAS_AXI_ID : INTEGER;
C_AXI_ID_WIDTH : INTEGER;
C_MEM_TYPE : INTEGER;
C_BYTE_SIZE : INTEGER;
C_ALGORITHM : INTEGER;
C_PRIM_TYPE : INTEGER;
C_LOAD_INIT_FILE : INTEGER;
C_INIT_FILE_NAME : STRING;
C_INIT_FILE : STRING;
C_USE_DEFAULT_DATA : INTEGER;
C_DEFAULT_DATA : STRING;
C_HAS_RSTA : INTEGER;
C_RST_PRIORITY_A : STRING;
C_RSTRAM_A : INTEGER;
C_INITA_VAL : STRING;
C_HAS_ENA : INTEGER;
C_HAS_REGCEA : INTEGER;
C_USE_BYTE_WEA : INTEGER;
C_WEA_WIDTH : INTEGER;
C_WRITE_MODE_A : STRING;
C_WRITE_WIDTH_A : INTEGER;
C_READ_WIDTH_A : INTEGER;
C_WRITE_DEPTH_A : INTEGER;
C_READ_DEPTH_A : INTEGER;
C_ADDRA_WIDTH : INTEGER;
C_HAS_RSTB : INTEGER;
C_RST_PRIORITY_B : STRING;
C_RSTRAM_B : INTEGER;
C_INITB_VAL : STRING;
C_HAS_ENB : INTEGER;
C_HAS_REGCEB : INTEGER;
C_USE_BYTE_WEB : INTEGER;
C_WEB_WIDTH : INTEGER;
C_WRITE_MODE_B : STRING;
C_WRITE_WIDTH_B : INTEGER;
C_READ_WIDTH_B : INTEGER;
C_WRITE_DEPTH_B : INTEGER;
C_READ_DEPTH_B : INTEGER;
C_ADDRB_WIDTH : INTEGER;
C_HAS_MEM_OUTPUT_REGS_A : INTEGER;
C_HAS_MEM_OUTPUT_REGS_B : INTEGER;
C_HAS_MUX_OUTPUT_REGS_A : INTEGER;
C_HAS_MUX_OUTPUT_REGS_B : INTEGER;
C_MUX_PIPELINE_STAGES : INTEGER;
C_HAS_SOFTECC_INPUT_REGS_A : INTEGER;
C_HAS_SOFTECC_OUTPUT_REGS_B : INTEGER;
C_USE_SOFTECC : INTEGER;
C_USE_ECC : INTEGER;
C_EN_ECC_PIPE : INTEGER;
C_HAS_INJECTERR : INTEGER;
C_SIM_COLLISION_CHECK : STRING;
C_COMMON_CLK : INTEGER;
C_DISABLE_WARN_BHV_COLL : INTEGER;
C_EN_SLEEP_PIN : INTEGER;
C_DISABLE_WARN_BHV_RANGE : INTEGER;
C_COUNT_36K_BRAM : STRING;
C_COUNT_18K_BRAM : STRING;
C_EST_POWER_SUMMARY : STRING
);
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
regcea : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
regceb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
injectsbiterr : IN STD_LOGIC;
injectdbiterr : IN STD_LOGIC;
eccpipece : IN STD_LOGIC;
sbiterr : OUT STD_LOGIC;
dbiterr : OUT STD_LOGIC;
rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
sleep : IN STD_LOGIC;
s_aclk : IN STD_LOGIC;
s_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_injectsbiterr : IN STD_LOGIC;
s_axi_injectdbiterr : IN STD_LOGIC;
s_axi_sbiterr : OUT STD_LOGIC;
s_axi_dbiterr : OUT STD_LOGIC;
s_axi_rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END COMPONENT blk_mem_gen_v8_2;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "blk_mem_gen_v8_2,Vivado 2014.4.1";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF SDPRAM_9A16x9B16_arch : ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{x_ipProduct=Vivado 2014.4.1,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=blk_mem_gen,x_ipVersion=8.2,x_ipCoreRevision=4,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_FAMILY=zynq,C_XDEVICEFAMILY=zynq,C_ELABORATION_DIR=./,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_AXI_SLAVE_TYPE=0,C_USE_BRAM_BLOCK=0,C_ENABLE_32BIT_ADDRESS=0,C_CTRL_ECC_ALGO=NONE,C_HAS_AXI_ID=0,C_AXI_ID_WIDTH=4,C_MEM_TYPE=1,C_BYTE_SIZE=9,C_ALGORITHM=1,C_PRIM_TYPE=1,C_LOAD_INIT_FILE=0,C_INIT_FILE_NAME=no_coe_file_loaded,C_INIT_FILE=SDPRAM_9A16x9B16.mem,C_USE_DEFAULT_DATA=0,C_DEFAULT_DATA=0,C_HAS_RSTA=0,C_RST_PRIORITY_A=CE,C_RSTRAM_A=0,C_INITA_VAL=0,C_HAS_ENA=1,C_HAS_REGCEA=0,C_USE_BYTE_WEA=0,C_WEA_WIDTH=1,C_WRITE_MODE_A=NO_CHANGE,C_WRITE_WIDTH_A=9,C_READ_WIDTH_A=9,C_WRITE_DEPTH_A=16,C_READ_DEPTH_A=16,C_ADDRA_WIDTH=4,C_HAS_RSTB=0,C_RST_PRIORITY_B=CE,C_RSTRAM_B=0,C_INITB_VAL=0,C_HAS_ENB=1,C_HAS_REGCEB=0,C_USE_BYTE_WEB=0,C_WEB_WIDTH=1,C_WRITE_MODE_B=READ_FIRST,C_WRITE_WIDTH_B=9,C_READ_WIDTH_B=9,C_WRITE_DEPTH_B=16,C_READ_DEPTH_B=16,C_ADDRB_WIDTH=4,C_HAS_MEM_OUTPUT_REGS_A=0,C_HAS_MEM_OUTPUT_REGS_B=0,C_HAS_MUX_OUTPUT_REGS_A=0,C_HAS_MUX_OUTPUT_REGS_B=0,C_MUX_PIPELINE_STAGES=0,C_HAS_SOFTECC_INPUT_REGS_A=0,C_HAS_SOFTECC_OUTPUT_REGS_B=0,C_USE_SOFTECC=0,C_USE_ECC=0,C_EN_ECC_PIPE=0,C_HAS_INJECTERR=0,C_SIM_COLLISION_CHECK=ALL,C_COMMON_CLK=1,C_DISABLE_WARN_BHV_COLL=0,C_EN_SLEEP_PIN=0,C_DISABLE_WARN_BHV_RANGE=0,C_COUNT_36K_BRAM=0,C_COUNT_18K_BRAM=1,C_EST_POWER_SUMMARY=Estimated Power for IP _ 2.7261500000000001 mW}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clka: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK";
ATTRIBUTE X_INTERFACE_INFO OF ena: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA EN";
ATTRIBUTE X_INTERFACE_INFO OF wea: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA WE";
ATTRIBUTE X_INTERFACE_INFO OF addra: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR";
ATTRIBUTE X_INTERFACE_INFO OF dina: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN";
ATTRIBUTE X_INTERFACE_INFO OF clkb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK";
ATTRIBUTE X_INTERFACE_INFO OF enb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB EN";
ATTRIBUTE X_INTERFACE_INFO OF addrb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR";
ATTRIBUTE X_INTERFACE_INFO OF doutb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT";
BEGIN
U0 : blk_mem_gen_v8_2
GENERIC MAP (
C_FAMILY => "zynq",
C_XDEVICEFAMILY => "zynq",
C_ELABORATION_DIR => "./",
C_INTERFACE_TYPE => 0,
C_AXI_TYPE => 1,
C_AXI_SLAVE_TYPE => 0,
C_USE_BRAM_BLOCK => 0,
C_ENABLE_32BIT_ADDRESS => 0,
C_CTRL_ECC_ALGO => "NONE",
C_HAS_AXI_ID => 0,
C_AXI_ID_WIDTH => 4,
C_MEM_TYPE => 1,
C_BYTE_SIZE => 9,
C_ALGORITHM => 1,
C_PRIM_TYPE => 1,
C_LOAD_INIT_FILE => 0,
C_INIT_FILE_NAME => "no_coe_file_loaded",
C_INIT_FILE => "SDPRAM_9A16x9B16.mem",
C_USE_DEFAULT_DATA => 0,
C_DEFAULT_DATA => "0",
C_HAS_RSTA => 0,
C_RST_PRIORITY_A => "CE",
C_RSTRAM_A => 0,
C_INITA_VAL => "0",
C_HAS_ENA => 1,
C_HAS_REGCEA => 0,
C_USE_BYTE_WEA => 0,
C_WEA_WIDTH => 1,
C_WRITE_MODE_A => "NO_CHANGE",
C_WRITE_WIDTH_A => 9,
C_READ_WIDTH_A => 9,
C_WRITE_DEPTH_A => 16,
C_READ_DEPTH_A => 16,
C_ADDRA_WIDTH => 4,
C_HAS_RSTB => 0,
C_RST_PRIORITY_B => "CE",
C_RSTRAM_B => 0,
C_INITB_VAL => "0",
C_HAS_ENB => 1,
C_HAS_REGCEB => 0,
C_USE_BYTE_WEB => 0,
C_WEB_WIDTH => 1,
C_WRITE_MODE_B => "READ_FIRST",
C_WRITE_WIDTH_B => 9,
C_READ_WIDTH_B => 9,
C_WRITE_DEPTH_B => 16,
C_READ_DEPTH_B => 16,
C_ADDRB_WIDTH => 4,
C_HAS_MEM_OUTPUT_REGS_A => 0,
C_HAS_MEM_OUTPUT_REGS_B => 0,
C_HAS_MUX_OUTPUT_REGS_A => 0,
C_HAS_MUX_OUTPUT_REGS_B => 0,
C_MUX_PIPELINE_STAGES => 0,
C_HAS_SOFTECC_INPUT_REGS_A => 0,
C_HAS_SOFTECC_OUTPUT_REGS_B => 0,
C_USE_SOFTECC => 0,
C_USE_ECC => 0,
C_EN_ECC_PIPE => 0,
C_HAS_INJECTERR => 0,
C_SIM_COLLISION_CHECK => "ALL",
C_COMMON_CLK => 1,
C_DISABLE_WARN_BHV_COLL => 0,
C_EN_SLEEP_PIN => 0,
C_DISABLE_WARN_BHV_RANGE => 0,
C_COUNT_36K_BRAM => "0",
C_COUNT_18K_BRAM => "1",
C_EST_POWER_SUMMARY => "Estimated Power for IP : 2.7261500000000001 mW"
)
PORT MAP (
clka => clka,
rsta => '0',
ena => ena,
regcea => '0',
wea => wea,
addra => addra,
dina => dina,
clkb => clkb,
rstb => '0',
enb => enb,
regceb => '0',
web => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
addrb => addrb,
dinb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
doutb => doutb,
injectsbiterr => '0',
injectdbiterr => '0',
eccpipece => '0',
sleep => '0',
s_aclk => '0',
s_aresetn => '0',
s_axi_awid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_awlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_awsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_awburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_awvalid => '0',
s_axi_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
s_axi_wstrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
s_axi_wlast => '0',
s_axi_wvalid => '0',
s_axi_bready => '0',
s_axi_arid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_arlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_arsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_arburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_arvalid => '0',
s_axi_rready => '0',
s_axi_injectsbiterr => '0',
s_axi_injectdbiterr => '0'
);
END SDPRAM_9A16x9B16_arch;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:blk_mem_gen:8.2
-- IP Revision: 4
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY blk_mem_gen_v8_2;
USE blk_mem_gen_v8_2.blk_mem_gen_v8_2;
ENTITY SDPRAM_9A16x9B16 IS
PORT (
clka : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
enb : IN STD_LOGIC;
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0)
);
END SDPRAM_9A16x9B16;
ARCHITECTURE SDPRAM_9A16x9B16_arch OF SDPRAM_9A16x9B16 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "yes";
COMPONENT blk_mem_gen_v8_2 IS
GENERIC (
C_FAMILY : STRING;
C_XDEVICEFAMILY : STRING;
C_ELABORATION_DIR : STRING;
C_INTERFACE_TYPE : INTEGER;
C_AXI_TYPE : INTEGER;
C_AXI_SLAVE_TYPE : INTEGER;
C_USE_BRAM_BLOCK : INTEGER;
C_ENABLE_32BIT_ADDRESS : INTEGER;
C_CTRL_ECC_ALGO : STRING;
C_HAS_AXI_ID : INTEGER;
C_AXI_ID_WIDTH : INTEGER;
C_MEM_TYPE : INTEGER;
C_BYTE_SIZE : INTEGER;
C_ALGORITHM : INTEGER;
C_PRIM_TYPE : INTEGER;
C_LOAD_INIT_FILE : INTEGER;
C_INIT_FILE_NAME : STRING;
C_INIT_FILE : STRING;
C_USE_DEFAULT_DATA : INTEGER;
C_DEFAULT_DATA : STRING;
C_HAS_RSTA : INTEGER;
C_RST_PRIORITY_A : STRING;
C_RSTRAM_A : INTEGER;
C_INITA_VAL : STRING;
C_HAS_ENA : INTEGER;
C_HAS_REGCEA : INTEGER;
C_USE_BYTE_WEA : INTEGER;
C_WEA_WIDTH : INTEGER;
C_WRITE_MODE_A : STRING;
C_WRITE_WIDTH_A : INTEGER;
C_READ_WIDTH_A : INTEGER;
C_WRITE_DEPTH_A : INTEGER;
C_READ_DEPTH_A : INTEGER;
C_ADDRA_WIDTH : INTEGER;
C_HAS_RSTB : INTEGER;
C_RST_PRIORITY_B : STRING;
C_RSTRAM_B : INTEGER;
C_INITB_VAL : STRING;
C_HAS_ENB : INTEGER;
C_HAS_REGCEB : INTEGER;
C_USE_BYTE_WEB : INTEGER;
C_WEB_WIDTH : INTEGER;
C_WRITE_MODE_B : STRING;
C_WRITE_WIDTH_B : INTEGER;
C_READ_WIDTH_B : INTEGER;
C_WRITE_DEPTH_B : INTEGER;
C_READ_DEPTH_B : INTEGER;
C_ADDRB_WIDTH : INTEGER;
C_HAS_MEM_OUTPUT_REGS_A : INTEGER;
C_HAS_MEM_OUTPUT_REGS_B : INTEGER;
C_HAS_MUX_OUTPUT_REGS_A : INTEGER;
C_HAS_MUX_OUTPUT_REGS_B : INTEGER;
C_MUX_PIPELINE_STAGES : INTEGER;
C_HAS_SOFTECC_INPUT_REGS_A : INTEGER;
C_HAS_SOFTECC_OUTPUT_REGS_B : INTEGER;
C_USE_SOFTECC : INTEGER;
C_USE_ECC : INTEGER;
C_EN_ECC_PIPE : INTEGER;
C_HAS_INJECTERR : INTEGER;
C_SIM_COLLISION_CHECK : STRING;
C_COMMON_CLK : INTEGER;
C_DISABLE_WARN_BHV_COLL : INTEGER;
C_EN_SLEEP_PIN : INTEGER;
C_DISABLE_WARN_BHV_RANGE : INTEGER;
C_COUNT_36K_BRAM : STRING;
C_COUNT_18K_BRAM : STRING;
C_EST_POWER_SUMMARY : STRING
);
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
regcea : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
regceb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
injectsbiterr : IN STD_LOGIC;
injectdbiterr : IN STD_LOGIC;
eccpipece : IN STD_LOGIC;
sbiterr : OUT STD_LOGIC;
dbiterr : OUT STD_LOGIC;
rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
sleep : IN STD_LOGIC;
s_aclk : IN STD_LOGIC;
s_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_injectsbiterr : IN STD_LOGIC;
s_axi_injectdbiterr : IN STD_LOGIC;
s_axi_sbiterr : OUT STD_LOGIC;
s_axi_dbiterr : OUT STD_LOGIC;
s_axi_rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END COMPONENT blk_mem_gen_v8_2;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "blk_mem_gen_v8_2,Vivado 2014.4.1";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF SDPRAM_9A16x9B16_arch : ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{x_ipProduct=Vivado 2014.4.1,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=blk_mem_gen,x_ipVersion=8.2,x_ipCoreRevision=4,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_FAMILY=zynq,C_XDEVICEFAMILY=zynq,C_ELABORATION_DIR=./,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_AXI_SLAVE_TYPE=0,C_USE_BRAM_BLOCK=0,C_ENABLE_32BIT_ADDRESS=0,C_CTRL_ECC_ALGO=NONE,C_HAS_AXI_ID=0,C_AXI_ID_WIDTH=4,C_MEM_TYPE=1,C_BYTE_SIZE=9,C_ALGORITHM=1,C_PRIM_TYPE=1,C_LOAD_INIT_FILE=0,C_INIT_FILE_NAME=no_coe_file_loaded,C_INIT_FILE=SDPRAM_9A16x9B16.mem,C_USE_DEFAULT_DATA=0,C_DEFAULT_DATA=0,C_HAS_RSTA=0,C_RST_PRIORITY_A=CE,C_RSTRAM_A=0,C_INITA_VAL=0,C_HAS_ENA=1,C_HAS_REGCEA=0,C_USE_BYTE_WEA=0,C_WEA_WIDTH=1,C_WRITE_MODE_A=NO_CHANGE,C_WRITE_WIDTH_A=9,C_READ_WIDTH_A=9,C_WRITE_DEPTH_A=16,C_READ_DEPTH_A=16,C_ADDRA_WIDTH=4,C_HAS_RSTB=0,C_RST_PRIORITY_B=CE,C_RSTRAM_B=0,C_INITB_VAL=0,C_HAS_ENB=1,C_HAS_REGCEB=0,C_USE_BYTE_WEB=0,C_WEB_WIDTH=1,C_WRITE_MODE_B=READ_FIRST,C_WRITE_WIDTH_B=9,C_READ_WIDTH_B=9,C_WRITE_DEPTH_B=16,C_READ_DEPTH_B=16,C_ADDRB_WIDTH=4,C_HAS_MEM_OUTPUT_REGS_A=0,C_HAS_MEM_OUTPUT_REGS_B=0,C_HAS_MUX_OUTPUT_REGS_A=0,C_HAS_MUX_OUTPUT_REGS_B=0,C_MUX_PIPELINE_STAGES=0,C_HAS_SOFTECC_INPUT_REGS_A=0,C_HAS_SOFTECC_OUTPUT_REGS_B=0,C_USE_SOFTECC=0,C_USE_ECC=0,C_EN_ECC_PIPE=0,C_HAS_INJECTERR=0,C_SIM_COLLISION_CHECK=ALL,C_COMMON_CLK=1,C_DISABLE_WARN_BHV_COLL=0,C_EN_SLEEP_PIN=0,C_DISABLE_WARN_BHV_RANGE=0,C_COUNT_36K_BRAM=0,C_COUNT_18K_BRAM=1,C_EST_POWER_SUMMARY=Estimated Power for IP _ 2.7261500000000001 mW}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clka: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK";
ATTRIBUTE X_INTERFACE_INFO OF ena: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA EN";
ATTRIBUTE X_INTERFACE_INFO OF wea: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA WE";
ATTRIBUTE X_INTERFACE_INFO OF addra: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR";
ATTRIBUTE X_INTERFACE_INFO OF dina: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN";
ATTRIBUTE X_INTERFACE_INFO OF clkb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK";
ATTRIBUTE X_INTERFACE_INFO OF enb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB EN";
ATTRIBUTE X_INTERFACE_INFO OF addrb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR";
ATTRIBUTE X_INTERFACE_INFO OF doutb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT";
BEGIN
U0 : blk_mem_gen_v8_2
GENERIC MAP (
C_FAMILY => "zynq",
C_XDEVICEFAMILY => "zynq",
C_ELABORATION_DIR => "./",
C_INTERFACE_TYPE => 0,
C_AXI_TYPE => 1,
C_AXI_SLAVE_TYPE => 0,
C_USE_BRAM_BLOCK => 0,
C_ENABLE_32BIT_ADDRESS => 0,
C_CTRL_ECC_ALGO => "NONE",
C_HAS_AXI_ID => 0,
C_AXI_ID_WIDTH => 4,
C_MEM_TYPE => 1,
C_BYTE_SIZE => 9,
C_ALGORITHM => 1,
C_PRIM_TYPE => 1,
C_LOAD_INIT_FILE => 0,
C_INIT_FILE_NAME => "no_coe_file_loaded",
C_INIT_FILE => "SDPRAM_9A16x9B16.mem",
C_USE_DEFAULT_DATA => 0,
C_DEFAULT_DATA => "0",
C_HAS_RSTA => 0,
C_RST_PRIORITY_A => "CE",
C_RSTRAM_A => 0,
C_INITA_VAL => "0",
C_HAS_ENA => 1,
C_HAS_REGCEA => 0,
C_USE_BYTE_WEA => 0,
C_WEA_WIDTH => 1,
C_WRITE_MODE_A => "NO_CHANGE",
C_WRITE_WIDTH_A => 9,
C_READ_WIDTH_A => 9,
C_WRITE_DEPTH_A => 16,
C_READ_DEPTH_A => 16,
C_ADDRA_WIDTH => 4,
C_HAS_RSTB => 0,
C_RST_PRIORITY_B => "CE",
C_RSTRAM_B => 0,
C_INITB_VAL => "0",
C_HAS_ENB => 1,
C_HAS_REGCEB => 0,
C_USE_BYTE_WEB => 0,
C_WEB_WIDTH => 1,
C_WRITE_MODE_B => "READ_FIRST",
C_WRITE_WIDTH_B => 9,
C_READ_WIDTH_B => 9,
C_WRITE_DEPTH_B => 16,
C_READ_DEPTH_B => 16,
C_ADDRB_WIDTH => 4,
C_HAS_MEM_OUTPUT_REGS_A => 0,
C_HAS_MEM_OUTPUT_REGS_B => 0,
C_HAS_MUX_OUTPUT_REGS_A => 0,
C_HAS_MUX_OUTPUT_REGS_B => 0,
C_MUX_PIPELINE_STAGES => 0,
C_HAS_SOFTECC_INPUT_REGS_A => 0,
C_HAS_SOFTECC_OUTPUT_REGS_B => 0,
C_USE_SOFTECC => 0,
C_USE_ECC => 0,
C_EN_ECC_PIPE => 0,
C_HAS_INJECTERR => 0,
C_SIM_COLLISION_CHECK => "ALL",
C_COMMON_CLK => 1,
C_DISABLE_WARN_BHV_COLL => 0,
C_EN_SLEEP_PIN => 0,
C_DISABLE_WARN_BHV_RANGE => 0,
C_COUNT_36K_BRAM => "0",
C_COUNT_18K_BRAM => "1",
C_EST_POWER_SUMMARY => "Estimated Power for IP : 2.7261500000000001 mW"
)
PORT MAP (
clka => clka,
rsta => '0',
ena => ena,
regcea => '0',
wea => wea,
addra => addra,
dina => dina,
clkb => clkb,
rstb => '0',
enb => enb,
regceb => '0',
web => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
addrb => addrb,
dinb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
doutb => doutb,
injectsbiterr => '0',
injectdbiterr => '0',
eccpipece => '0',
sleep => '0',
s_aclk => '0',
s_aresetn => '0',
s_axi_awid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_awlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_awsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_awburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_awvalid => '0',
s_axi_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
s_axi_wstrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
s_axi_wlast => '0',
s_axi_wvalid => '0',
s_axi_bready => '0',
s_axi_arid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_arlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_arsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_arburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_arvalid => '0',
s_axi_rready => '0',
s_axi_injectsbiterr => '0',
s_axi_injectdbiterr => '0'
);
END SDPRAM_9A16x9B16_arch;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:ip:blk_mem_gen:8.2
-- IP Revision: 4
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY blk_mem_gen_v8_2;
USE blk_mem_gen_v8_2.blk_mem_gen_v8_2;
ENTITY SDPRAM_9A16x9B16 IS
PORT (
clka : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
enb : IN STD_LOGIC;
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0)
);
END SDPRAM_9A16x9B16;
ARCHITECTURE SDPRAM_9A16x9B16_arch OF SDPRAM_9A16x9B16 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "yes";
COMPONENT blk_mem_gen_v8_2 IS
GENERIC (
C_FAMILY : STRING;
C_XDEVICEFAMILY : STRING;
C_ELABORATION_DIR : STRING;
C_INTERFACE_TYPE : INTEGER;
C_AXI_TYPE : INTEGER;
C_AXI_SLAVE_TYPE : INTEGER;
C_USE_BRAM_BLOCK : INTEGER;
C_ENABLE_32BIT_ADDRESS : INTEGER;
C_CTRL_ECC_ALGO : STRING;
C_HAS_AXI_ID : INTEGER;
C_AXI_ID_WIDTH : INTEGER;
C_MEM_TYPE : INTEGER;
C_BYTE_SIZE : INTEGER;
C_ALGORITHM : INTEGER;
C_PRIM_TYPE : INTEGER;
C_LOAD_INIT_FILE : INTEGER;
C_INIT_FILE_NAME : STRING;
C_INIT_FILE : STRING;
C_USE_DEFAULT_DATA : INTEGER;
C_DEFAULT_DATA : STRING;
C_HAS_RSTA : INTEGER;
C_RST_PRIORITY_A : STRING;
C_RSTRAM_A : INTEGER;
C_INITA_VAL : STRING;
C_HAS_ENA : INTEGER;
C_HAS_REGCEA : INTEGER;
C_USE_BYTE_WEA : INTEGER;
C_WEA_WIDTH : INTEGER;
C_WRITE_MODE_A : STRING;
C_WRITE_WIDTH_A : INTEGER;
C_READ_WIDTH_A : INTEGER;
C_WRITE_DEPTH_A : INTEGER;
C_READ_DEPTH_A : INTEGER;
C_ADDRA_WIDTH : INTEGER;
C_HAS_RSTB : INTEGER;
C_RST_PRIORITY_B : STRING;
C_RSTRAM_B : INTEGER;
C_INITB_VAL : STRING;
C_HAS_ENB : INTEGER;
C_HAS_REGCEB : INTEGER;
C_USE_BYTE_WEB : INTEGER;
C_WEB_WIDTH : INTEGER;
C_WRITE_MODE_B : STRING;
C_WRITE_WIDTH_B : INTEGER;
C_READ_WIDTH_B : INTEGER;
C_WRITE_DEPTH_B : INTEGER;
C_READ_DEPTH_B : INTEGER;
C_ADDRB_WIDTH : INTEGER;
C_HAS_MEM_OUTPUT_REGS_A : INTEGER;
C_HAS_MEM_OUTPUT_REGS_B : INTEGER;
C_HAS_MUX_OUTPUT_REGS_A : INTEGER;
C_HAS_MUX_OUTPUT_REGS_B : INTEGER;
C_MUX_PIPELINE_STAGES : INTEGER;
C_HAS_SOFTECC_INPUT_REGS_A : INTEGER;
C_HAS_SOFTECC_OUTPUT_REGS_B : INTEGER;
C_USE_SOFTECC : INTEGER;
C_USE_ECC : INTEGER;
C_EN_ECC_PIPE : INTEGER;
C_HAS_INJECTERR : INTEGER;
C_SIM_COLLISION_CHECK : STRING;
C_COMMON_CLK : INTEGER;
C_DISABLE_WARN_BHV_COLL : INTEGER;
C_EN_SLEEP_PIN : INTEGER;
C_DISABLE_WARN_BHV_RANGE : INTEGER;
C_COUNT_36K_BRAM : STRING;
C_COUNT_18K_BRAM : STRING;
C_EST_POWER_SUMMARY : STRING
);
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
regcea : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
regceb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
injectsbiterr : IN STD_LOGIC;
injectdbiterr : IN STD_LOGIC;
eccpipece : IN STD_LOGIC;
sbiterr : OUT STD_LOGIC;
dbiterr : OUT STD_LOGIC;
rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
sleep : IN STD_LOGIC;
s_aclk : IN STD_LOGIC;
s_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_injectsbiterr : IN STD_LOGIC;
s_axi_injectdbiterr : IN STD_LOGIC;
s_axi_sbiterr : OUT STD_LOGIC;
s_axi_dbiterr : OUT STD_LOGIC;
s_axi_rdaddrecc : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END COMPONENT blk_mem_gen_v8_2;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "blk_mem_gen_v8_2,Vivado 2014.4.1";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF SDPRAM_9A16x9B16_arch : ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF SDPRAM_9A16x9B16_arch: ARCHITECTURE IS "SDPRAM_9A16x9B16,blk_mem_gen_v8_2,{x_ipProduct=Vivado 2014.4.1,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=blk_mem_gen,x_ipVersion=8.2,x_ipCoreRevision=4,x_ipLanguage=VERILOG,x_ipSimLanguage=MIXED,C_FAMILY=zynq,C_XDEVICEFAMILY=zynq,C_ELABORATION_DIR=./,C_INTERFACE_TYPE=0,C_AXI_TYPE=1,C_AXI_SLAVE_TYPE=0,C_USE_BRAM_BLOCK=0,C_ENABLE_32BIT_ADDRESS=0,C_CTRL_ECC_ALGO=NONE,C_HAS_AXI_ID=0,C_AXI_ID_WIDTH=4,C_MEM_TYPE=1,C_BYTE_SIZE=9,C_ALGORITHM=1,C_PRIM_TYPE=1,C_LOAD_INIT_FILE=0,C_INIT_FILE_NAME=no_coe_file_loaded,C_INIT_FILE=SDPRAM_9A16x9B16.mem,C_USE_DEFAULT_DATA=0,C_DEFAULT_DATA=0,C_HAS_RSTA=0,C_RST_PRIORITY_A=CE,C_RSTRAM_A=0,C_INITA_VAL=0,C_HAS_ENA=1,C_HAS_REGCEA=0,C_USE_BYTE_WEA=0,C_WEA_WIDTH=1,C_WRITE_MODE_A=NO_CHANGE,C_WRITE_WIDTH_A=9,C_READ_WIDTH_A=9,C_WRITE_DEPTH_A=16,C_READ_DEPTH_A=16,C_ADDRA_WIDTH=4,C_HAS_RSTB=0,C_RST_PRIORITY_B=CE,C_RSTRAM_B=0,C_INITB_VAL=0,C_HAS_ENB=1,C_HAS_REGCEB=0,C_USE_BYTE_WEB=0,C_WEB_WIDTH=1,C_WRITE_MODE_B=READ_FIRST,C_WRITE_WIDTH_B=9,C_READ_WIDTH_B=9,C_WRITE_DEPTH_B=16,C_READ_DEPTH_B=16,C_ADDRB_WIDTH=4,C_HAS_MEM_OUTPUT_REGS_A=0,C_HAS_MEM_OUTPUT_REGS_B=0,C_HAS_MUX_OUTPUT_REGS_A=0,C_HAS_MUX_OUTPUT_REGS_B=0,C_MUX_PIPELINE_STAGES=0,C_HAS_SOFTECC_INPUT_REGS_A=0,C_HAS_SOFTECC_OUTPUT_REGS_B=0,C_USE_SOFTECC=0,C_USE_ECC=0,C_EN_ECC_PIPE=0,C_HAS_INJECTERR=0,C_SIM_COLLISION_CHECK=ALL,C_COMMON_CLK=1,C_DISABLE_WARN_BHV_COLL=0,C_EN_SLEEP_PIN=0,C_DISABLE_WARN_BHV_RANGE=0,C_COUNT_36K_BRAM=0,C_COUNT_18K_BRAM=1,C_EST_POWER_SUMMARY=Estimated Power for IP _ 2.7261500000000001 mW}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clka: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA CLK";
ATTRIBUTE X_INTERFACE_INFO OF ena: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA EN";
ATTRIBUTE X_INTERFACE_INFO OF wea: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA WE";
ATTRIBUTE X_INTERFACE_INFO OF addra: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA ADDR";
ATTRIBUTE X_INTERFACE_INFO OF dina: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTA DIN";
ATTRIBUTE X_INTERFACE_INFO OF clkb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB CLK";
ATTRIBUTE X_INTERFACE_INFO OF enb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB EN";
ATTRIBUTE X_INTERFACE_INFO OF addrb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB ADDR";
ATTRIBUTE X_INTERFACE_INFO OF doutb: SIGNAL IS "xilinx.com:interface:bram:1.0 BRAM_PORTB DOUT";
BEGIN
U0 : blk_mem_gen_v8_2
GENERIC MAP (
C_FAMILY => "zynq",
C_XDEVICEFAMILY => "zynq",
C_ELABORATION_DIR => "./",
C_INTERFACE_TYPE => 0,
C_AXI_TYPE => 1,
C_AXI_SLAVE_TYPE => 0,
C_USE_BRAM_BLOCK => 0,
C_ENABLE_32BIT_ADDRESS => 0,
C_CTRL_ECC_ALGO => "NONE",
C_HAS_AXI_ID => 0,
C_AXI_ID_WIDTH => 4,
C_MEM_TYPE => 1,
C_BYTE_SIZE => 9,
C_ALGORITHM => 1,
C_PRIM_TYPE => 1,
C_LOAD_INIT_FILE => 0,
C_INIT_FILE_NAME => "no_coe_file_loaded",
C_INIT_FILE => "SDPRAM_9A16x9B16.mem",
C_USE_DEFAULT_DATA => 0,
C_DEFAULT_DATA => "0",
C_HAS_RSTA => 0,
C_RST_PRIORITY_A => "CE",
C_RSTRAM_A => 0,
C_INITA_VAL => "0",
C_HAS_ENA => 1,
C_HAS_REGCEA => 0,
C_USE_BYTE_WEA => 0,
C_WEA_WIDTH => 1,
C_WRITE_MODE_A => "NO_CHANGE",
C_WRITE_WIDTH_A => 9,
C_READ_WIDTH_A => 9,
C_WRITE_DEPTH_A => 16,
C_READ_DEPTH_A => 16,
C_ADDRA_WIDTH => 4,
C_HAS_RSTB => 0,
C_RST_PRIORITY_B => "CE",
C_RSTRAM_B => 0,
C_INITB_VAL => "0",
C_HAS_ENB => 1,
C_HAS_REGCEB => 0,
C_USE_BYTE_WEB => 0,
C_WEB_WIDTH => 1,
C_WRITE_MODE_B => "READ_FIRST",
C_WRITE_WIDTH_B => 9,
C_READ_WIDTH_B => 9,
C_WRITE_DEPTH_B => 16,
C_READ_DEPTH_B => 16,
C_ADDRB_WIDTH => 4,
C_HAS_MEM_OUTPUT_REGS_A => 0,
C_HAS_MEM_OUTPUT_REGS_B => 0,
C_HAS_MUX_OUTPUT_REGS_A => 0,
C_HAS_MUX_OUTPUT_REGS_B => 0,
C_MUX_PIPELINE_STAGES => 0,
C_HAS_SOFTECC_INPUT_REGS_A => 0,
C_HAS_SOFTECC_OUTPUT_REGS_B => 0,
C_USE_SOFTECC => 0,
C_USE_ECC => 0,
C_EN_ECC_PIPE => 0,
C_HAS_INJECTERR => 0,
C_SIM_COLLISION_CHECK => "ALL",
C_COMMON_CLK => 1,
C_DISABLE_WARN_BHV_COLL => 0,
C_EN_SLEEP_PIN => 0,
C_DISABLE_WARN_BHV_RANGE => 0,
C_COUNT_36K_BRAM => "0",
C_COUNT_18K_BRAM => "1",
C_EST_POWER_SUMMARY => "Estimated Power for IP : 2.7261500000000001 mW"
)
PORT MAP (
clka => clka,
rsta => '0',
ena => ena,
regcea => '0',
wea => wea,
addra => addra,
dina => dina,
clkb => clkb,
rstb => '0',
enb => enb,
regceb => '0',
web => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
addrb => addrb,
dinb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
doutb => doutb,
injectsbiterr => '0',
injectdbiterr => '0',
eccpipece => '0',
sleep => '0',
s_aclk => '0',
s_aresetn => '0',
s_axi_awid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_awlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_awsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_awburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_awvalid => '0',
s_axi_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 9)),
s_axi_wstrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
s_axi_wlast => '0',
s_axi_wvalid => '0',
s_axi_bready => '0',
s_axi_arid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_arlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_arsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_arburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_arvalid => '0',
s_axi_rready => '0',
s_axi_injectsbiterr => '0',
s_axi_injectdbiterr => '0'
);
END SDPRAM_9A16x9B16_arch;
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
library ieee; use ieee.std_logic_1164.all;
entity stimulus_generator is
end entity stimulus_generator;
architecture test of stimulus_generator is
begin
-- code from book
stimulus_generator : process is
type directory_file is file of string;
file directory : directory_file open read_mode is "stimulus-directory";
variable file_name : string(1 to 50);
variable file_name_length : natural;
variable open_status : file_open_status;
subtype stimulus_vector is std_logic_vector(0 to 9);
type stimulus_file is file of stimulus_vector;
file stimuli : stimulus_file;
variable current_stimulus : stimulus_vector;
-- . . .
begin
file_loop : while not endfile(directory) loop
read( directory, file_name, file_name_length );
if file_name_length > file_name'length then
report "file name too long: " & file_name & "... - file skipped"
severity warning;
next file_loop;
end if;
file_open ( open_status, stimuli,
file_name(1 to file_name_length), read_mode );
if open_status /= open_ok then
report file_open_status'image(open_status) & " while opening file "
& file_name(1 to file_name_length) & " - file skipped"
severity warning;
next file_loop;
end if;
stimulus_loop : while not endfile(stimuli) loop
read(stimuli, current_stimulus);
-- . . . -- apply the stimulus
end loop stimulus_loop;
file_close(stimuli);
end loop file_loop;
wait;
end process stimulus_generator;
-- end code from book
end architecture test;
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
library ieee; use ieee.std_logic_1164.all;
entity stimulus_generator is
end entity stimulus_generator;
architecture test of stimulus_generator is
begin
-- code from book
stimulus_generator : process is
type directory_file is file of string;
file directory : directory_file open read_mode is "stimulus-directory";
variable file_name : string(1 to 50);
variable file_name_length : natural;
variable open_status : file_open_status;
subtype stimulus_vector is std_logic_vector(0 to 9);
type stimulus_file is file of stimulus_vector;
file stimuli : stimulus_file;
variable current_stimulus : stimulus_vector;
-- . . .
begin
file_loop : while not endfile(directory) loop
read( directory, file_name, file_name_length );
if file_name_length > file_name'length then
report "file name too long: " & file_name & "... - file skipped"
severity warning;
next file_loop;
end if;
file_open ( open_status, stimuli,
file_name(1 to file_name_length), read_mode );
if open_status /= open_ok then
report file_open_status'image(open_status) & " while opening file "
& file_name(1 to file_name_length) & " - file skipped"
severity warning;
next file_loop;
end if;
stimulus_loop : while not endfile(stimuli) loop
read(stimuli, current_stimulus);
-- . . . -- apply the stimulus
end loop stimulus_loop;
file_close(stimuli);
end loop file_loop;
wait;
end process stimulus_generator;
-- end code from book
end architecture test;
|
-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
library ieee; use ieee.std_logic_1164.all;
entity stimulus_generator is
end entity stimulus_generator;
architecture test of stimulus_generator is
begin
-- code from book
stimulus_generator : process is
type directory_file is file of string;
file directory : directory_file open read_mode is "stimulus-directory";
variable file_name : string(1 to 50);
variable file_name_length : natural;
variable open_status : file_open_status;
subtype stimulus_vector is std_logic_vector(0 to 9);
type stimulus_file is file of stimulus_vector;
file stimuli : stimulus_file;
variable current_stimulus : stimulus_vector;
-- . . .
begin
file_loop : while not endfile(directory) loop
read( directory, file_name, file_name_length );
if file_name_length > file_name'length then
report "file name too long: " & file_name & "... - file skipped"
severity warning;
next file_loop;
end if;
file_open ( open_status, stimuli,
file_name(1 to file_name_length), read_mode );
if open_status /= open_ok then
report file_open_status'image(open_status) & " while opening file "
& file_name(1 to file_name_length) & " - file skipped"
severity warning;
next file_loop;
end if;
stimulus_loop : while not endfile(stimuli) loop
read(stimuli, current_stimulus);
-- . . . -- apply the stimulus
end loop stimulus_loop;
file_close(stimuli);
end loop file_loop;
wait;
end process stimulus_generator;
-- end code from book
end architecture test;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:user:buffer_register:1.0
-- IP Revision: 2
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
ENTITY system_buffer_register_1_0 IS
PORT (
clk : IN STD_LOGIC;
val_in : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
val_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END system_buffer_register_1_0;
ARCHITECTURE system_buffer_register_1_0_arch OF system_buffer_register_1_0 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : STRING;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF system_buffer_register_1_0_arch: ARCHITECTURE IS "yes";
COMPONENT buffer_register IS
GENERIC (
WIDTH : INTEGER
);
PORT (
clk : IN STD_LOGIC;
val_in : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
val_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END COMPONENT buffer_register;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF system_buffer_register_1_0_arch: ARCHITECTURE IS "buffer_register,Vivado 2016.4";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF system_buffer_register_1_0_arch : ARCHITECTURE IS "system_buffer_register_1_0,buffer_register,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF system_buffer_register_1_0_arch: ARCHITECTURE IS "system_buffer_register_1_0,buffer_register,{x_ipProduct=Vivado 2016.4,x_ipVendor=xilinx.com,x_ipLibrary=user,x_ipName=buffer_register,x_ipVersion=1.0,x_ipCoreRevision=2,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED,WIDTH=32}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clk: SIGNAL IS "xilinx.com:signal:clock:1.0 clk CLK";
BEGIN
U0 : buffer_register
GENERIC MAP (
WIDTH => 32
)
PORT MAP (
clk => clk,
val_in => val_in,
val_out => val_out
);
END system_buffer_register_1_0_arch;
|
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