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-------------------------------------------------------------------------------
--! @file mmSlaveConv-rtl-ea.vhd
--
--! @brief Memory mapped slave interface converter
--
--! @details The slave interface converter is fixed to a 16 bit memory mapped
--! slave, connected to a 32 bit master. The conversion also considers
--! little/big endian (gEndian).
--! Note: Tested with openmacTop entity only!
-------------------------------------------------------------------------------
--
-- (c) B&R Industrial Automation GmbH, 2014
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact [email protected]
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
--! Common library
library libcommon;
--! Use common library global package
use libcommon.global.all;
entity mmSlaveConv is
generic (
--! Endianness of interconnect
gEndian : string := "little";
--! Memory mapped master address width
gMasterAddrWidth : natural := 10
);
port (
--! Reset
iRst : in std_logic;
--! Clock
iClk : in std_logic;
-- Memory mapped master input
--! Master select
iMaster_select : in std_logic;
--! Master write
iMaster_write : in std_logic;
--! Master read
iMaster_read : in std_logic;
--! Master byteenable
iMaster_byteenable : in std_logic_vector(3 downto 0);
--! Master writedata
iMaster_writedata : in std_logic_vector(31 downto 0);
--! Master readdata
oMaster_readdata : out std_logic_vector(31 downto 0);
--! Master address (byte address)
iMaster_address : in std_logic_vector(gMasterAddrWidth-1 downto 0);
--! Master write acknowledge
oMaster_WriteAck : out std_logic;
--! Master read acknowledge
oMaster_ReadAck : out std_logic;
-- Memory mapped slave output
--! Slave select
oSlave_select : out std_logic;
--! Slave write
oSlave_write : out std_logic;
--! Slave read
oSlave_read : out std_logic;
--! Slave address (word address)
oSlave_address : out std_logic_vector(gMasterAddrWidth-1 downto 0);
--! Slave byteenable
oSlave_byteenable : out std_logic_vector(1 downto 0);
--! Slave readdata
iSlave_readdata : in std_logic_vector(15 downto 0);
--! Slave writedata
oSlave_writedata : out std_logic_vector(15 downto 0);
--! Slave acknowledge
iSlave_ack : in std_logic
);
end mmSlaveConv;
architecture rtl of mmSlaveConv is
--! Access fsm_reg type
type tAccessFsm is (
sIdle,
sDoAccess
);
--! Access type
type tAccess is (
sNone,
sDword,
sWord
);
--! Access fsm_reg current state
signal fsm_reg : tAccessFsm;
--! Access fsm_reg next state
signal fsm_next : tAccessFsm;
--! Current master access type
signal masterAccess : tAccess;
--! Counter width
constant cCounterWidth : natural := 2;
--! Counter register
signal counter_reg : std_logic_vector(cCounterWidth-1 downto 0);
--! Next counter register
signal counter_next : std_logic_vector(cCounterWidth-1 downto 0);
--! Counter register load value
signal counter_loadValue : std_logic_vector(cCounterWidth-1 downto 0);
--! Load counter register with counter_loadValue
signal counter_load : std_logic;
--! Decrement counter value by one
signal counter_decrement : std_logic;
--! counter_reg is zero
signal counter_isZero : std_logic;
--! counter_reg is one
signal counter_isOne : std_logic;
--! counter_reg is two
signal counter_isTwo : std_logic;
--! Master acknowledge
signal masterAck : std_logic;
--! Register to store slave readdata word
signal wordStore_reg : std_logic_vector(iSlave_readdata'range);
--! Next value of slave readdata word register
signal wordStore_next : std_logic_vector(wordStore_reg'range);
begin
---------------------------------------------------------------------------
-- Assign outputs
---------------------------------------------------------------------------
oSlave_select <= iMaster_select;
oSlave_write <= iMaster_write and iMaster_select;
oSlave_read <= iMaster_read and iMaster_select;
oMaster_WriteAck <= masterAck and iMaster_write and iMaster_select;
oMaster_ReadAck <= masterAck and iMaster_read and iMaster_select;
--! This process assigns the master readdata port controlled by the current
--! conversion state.
assignMasterPath : process (
iSlave_readdata, wordStore_reg,
masterAccess
)
begin
if masterAccess = sDword then
oMaster_readdata <= iSlave_readdata & wordStore_reg;
else
oMaster_readdata <= iSlave_readdata & iSlave_readdata;
end if;
end process assignMasterPath;
--! This process assigns the slave address, byteenable and writedata controlled
--! by the current conversion state.
assignSlavePath : process (
iMaster_address, iMaster_byteenable, iMaster_writedata,
counter_reg, counter_isOne,
masterAccess
)
begin
-----------------------------------------------------------------------
-- Slave address
-----------------------------------------------------------------------
--default assignment
oSlave_address <= iMaster_address;
if masterAccess = sDword then
case to_integer(unsigned(counter_reg)) is
when 0 | 2 =>
-- First word of dword access
if gEndian = "little" then
oSlave_address(1) <= cInactivated;
else
oSlave_address(1) <= cActivated;
end if;
when 1 =>
-- Second word of dword access
if gEndian = "little" then
oSlave_address(1) <= cActivated;
else
oSlave_address(1) <= cInactivated;
end if;
when others =>
null; --allowed due to default assignment
end case;
end if;
-----------------------------------------------------------------------
-- Slave byteenable
-----------------------------------------------------------------------
if masterAccess = sDword then
oSlave_byteenable <= (others => cActivated);
else
oSlave_byteenable <= iMaster_byteenable(3 downto 2) or iMaster_byteenable(1 downto 0);
end if;
-----------------------------------------------------------------------
-- Slave writedata
-----------------------------------------------------------------------
if (masterAccess = sDword and counter_isOne = cActivated) or iMaster_address(1) = cActivated then
oSlave_writedata <= iMaster_writedata(31 downto 16);
else
oSlave_writedata <= iMaster_writedata(15 downto 0);
end if;
end process assignSlavePath;
--! This process assigns the registers.
regProc : process(iRst, iClk)
begin
if iRst = cActivated then
counter_reg <= (others => cInactivated);
fsm_reg <= sIdle;
wordStore_reg <= (others => cInactivated);
elsif rising_edge(iClk) then
counter_reg <= counter_next;
fsm_reg <= fsm_next;
wordStore_reg <= wordStore_next;
end if;
end process;
--! This process assigns the register next signals.
assignRegNext : process (
iSlave_readdata, iSlave_ack,
wordStore_reg, fsm_reg, counter_reg,
counter_load, counter_loadValue, counter_decrement, counter_isZero,
counter_isTwo, masterAccess
)
begin
-- default assignments
wordStore_next <= wordStore_reg;
fsm_next <= fsm_reg;
counter_next <= counter_reg;
-----------------------------------------------------------------------
-- Counter
-----------------------------------------------------------------------
if counter_load = cActivated then
counter_next <= counter_loadValue;
elsif counter_decrement = cActivated and masterAccess = sDword then
counter_next <= std_logic_vector(unsigned(counter_reg) - 1);
end if;
-----------------------------------------------------------------------
-- Access FSM
-----------------------------------------------------------------------
if counter_isZero = cActivated then
case fsm_reg is
when sIdle =>
if masterAccess = sDword then
fsm_next <= sDoAccess;
end if;
when sDoAccess =>
if masterAccess = sNone then
fsm_next <= sIdle;
end if;
end case;
end if;
-----------------------------------------------------------------------
-- Store slave readdata word
-----------------------------------------------------------------------
if iSlave_ack = cActivated and masterAccess = sDword and counter_isTwo = cActivated then
wordStore_next <= iSlave_readdata;
end if;
end process assignRegNext;
counter_decrement <= iSlave_ack and iMaster_select;
--! This process assigns internal control signals.
assignInternal : process (
iSlave_ack,
iMaster_select, iMaster_byteenable, iMaster_read,
counter_reg, counter_isOne, masterAccess, fsm_reg, fsm_next
)
begin
-----------------------------------------------------------------------
-- Master acknowledge
-----------------------------------------------------------------------
if iSlave_ack = cActivated and masterAccess = sDword and counter_isOne = cActivated then
masterAck <= cActivated;
elsif iSlave_ack = cActivated and masterAccess = sWord then
masterAck <= cActivated;
else
masterAck <= cInactivated;
end if;
-----------------------------------------------------------------------
-- Master access state
-----------------------------------------------------------------------
if iMaster_select = cInactivated then
masterAccess <= sNone;
elsif iMaster_byteenable = "1111" then
masterAccess <= sDword;
else
masterAccess <= sWord;
end if;
-----------------------------------------------------------------------
-- Counter
-----------------------------------------------------------------------
--default
counter_isZero <= cInactivated;
counter_isOne <= cInactivated;
counter_isTwo <= cInactivated;
-- assign counter_is* signals
case to_integer(unsigned(counter_reg)) is
when 0 =>
counter_isZero <= cActivated;
when 1 =>
counter_isOne <= cActivated;
when 2 =>
counter_isTwo <= cActivated;
when others =>
null; --is allowed due to default assignment
end case;
-- assign counter load
if fsm_next = sDoAccess and fsm_reg = sIdle then
counter_load <= cActivated;
else
counter_load <= cInactivated;
end if;
-- assign counter load value
if iMaster_byteenable = "1111" and iMaster_read = cActivated then
counter_loadValue <= "10";
else
counter_loadValue <= "01";
end if;
end process assignInternal;
end rtl;
|
----------------------------------------------------------------------------------
-- Company: Federal University of Santa Catarina
-- Engineer:
--
-- Create Date:
-- Design Name:
-- Module Name:
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use ieee.std_logic_1164.all;
entity operacaoULA is
port(
ULAOp: in std_logic_vector(1 downto 0);
funct: in std_logic_vector(5 downto 0);
Operacao: out std_logic_vector(2 downto 0)
);
end entity;
architecture comportamental of operacaoULA is
begin
Operacao <= "010" when ULAOp="00" else -- sum
"110" when ULAOp="01" else -- sub
"111" when funct(3)='1' else -- slt
"001" when funct(0)='1' else -- or
"000" when funct(2)='1' else -- and
"010" when funct(1)='0' else -- sum
"110"; -- sub
end architecture; |
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.OISC_SUBLEQ_PKG.all;
entity BENCH_OISC_SUBLEQ is
begin
end entity BENCH_OISC_SUBLEQ;
architecture BENCH of BENCH_OISC_SUBLEQ is
signal sPCLK : std_logic := '0';
signal sDCLK : std_logic := '0';
signal sCLK : std_logic := '0';
signal sCLR : std_logic := '1';
constant cPCLK_CYCLE : time := 1000.0 ns / 250.0; -- NOTE: 250[MHz]
constant cDCLK_CYCLE : time := 1000.0 ns / 200.0; -- NOTE: 200[MHz]
constant cCLK_CYCLE : time := 1000.0 ns / 150.0; -- NOTE: 150[MHz]
constant cCLR_TIME : time := 10*cCLK_CYCLE;
constant clog2PADDR : integer range 0 to integer'high := 8;
constant clog2DADDR : integer range 0 to integer'high := 4;
constant cDW : integer range 1 to integer'high := 8;
type tPIF is record
OISC_SUBLEQ_oPINST : std_logic_vector(clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0);
end record tPIF;
signal sP : tPIF;
type tP is record
OISC_SUBLEQ_iPWE : std_logic;
OISC_SUBLEQ_iPADDR : integer range 0 to 2**clog2PADDR-1;
OISC_SUBLEQ_iPINST : std_logic_vector(clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0);
DONE : std_logic;
end record tP;
constant cP : tP := (
OISC_SUBLEQ_iPWE => '0',
OISC_SUBLEQ_iPADDR => 0,
OISC_SUBLEQ_iPINST => (clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0 => '0'),
DONE => '0'
);
signal rP : tP := cP;
type tDIF is record
OISC_SUBLEQ_oDDATA : std_logic_vector(cDW-1 downto 0);
end record tDIF;
signal sD : tDIF;
type tD is record
OISC_SUBLEQ_iDWE : std_logic;
OISC_SUBLEQ_iDADDR : integer range 0 to 2**clog2DADDR-1;
OISC_SUBLEQ_iDDATA : std_logic_vector(cDW-1 downto 0);
DONE : std_logic;
end record tD;
constant cD : tD := (
OISC_SUBLEQ_iDWE => '0',
OISC_SUBLEQ_iDADDR => 0,
OISC_SUBLEQ_iDDATA => (cDW-1 downto 0 => '0'),
DONE => '0'
);
signal rD : tD := cD;
type tIF is record
OISC_SUBLEQ_oACT : std_logic;
OISC_SUBLEQ_oPC : integer range 0 to 2**clog2PADDR-1;
OISC_SUBLEQ_oLEQ : std_logic;
end record tIF;
signal s : tIF;
type t is record
ACT : std_logic;
DONE : std_logic;
end record t;
constant c : t := (
ACT => '0',
DONE => '0'
);
signal r : t := c;
begin
P_sPCLK : process
begin
sPCLK <= '0'; wait for cPCLK_CYCLE/2;
sPCLK <= '1'; wait for cPCLK_CYCLE/2;
end process P_sPCLK;
P_sDCLK : process
begin
sDCLK <= '0'; wait for cDCLK_CYCLE/2;
sDCLK <= '1'; wait for cDCLK_CYCLE/2;
end process P_sDCLK;
P_sCLK : process
begin
sCLK <= '0'; wait for cCLK_CYCLE/2;
sCLK <= '1'; wait for cCLK_CYCLE/2;
end process P_sCLK;
P_sCLR : process
begin
sCLR <= '1'; wait for cCLR_TIME;
sCLR <= '0'; wait;
end process P_sCLR;
B_STIM : block is
pure function fINST (
iA : integer range 0 to 2**clog2DADDR-1;
iB : integer range 0 to 2**clog2DADDR-1;
iC : integer range 0 to 2**clog2PADDR-1
) return std_logic_vector is
variable vA : std_logic_vector(clog2DADDR-1 downto 0);
variable vB : std_logic_vector(clog2DADDR-1 downto 0);
variable vC : std_logic_vector(clog2PADDR-1 downto 0);
begin
vA := std_logic_vector(to_unsigned(iA, clog2DADDR));
vB := std_logic_vector(to_unsigned(iB, clog2DADDR));
vC := std_logic_vector(to_unsigned(iC, clog2PADDR));
return vA & vB & vC;
end function fINST;
constant cD_Z : integer range 0 to 2**clog2DADDR-1 := 0;
constant cD_X : integer range 0 to 2**clog2DADDR-1 := 1;
constant cD_Y : integer range 0 to 2**clog2DADDR-1 := 2;
constant cV_Z : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed( 0, cDW));
constant cV_X : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed(12, cDW));
constant cV_Y : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed(34, cDW));
constant cP_ORG : integer range 0 to 2**clog2PADDR-1 := 0;
constant cP_START : integer range 0 to 2**clog2PADDR-1 := cP_ORG+8;
constant cP_STOP : integer range 0 to 2**clog2PADDR-1 := 2**clog2PADDR-1;
begin
P_STIM_P : process
begin
-- ORG: JMP START = ORG: subleq Z, Z, START
rP.OISC_SUBLEQ_iPADDR <= cP_ORG;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_START);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- START: ADD X, Y = START: subleq X, Z, START+1
-- subleq Z, Y, START+2
-- subleq Z, Z, START+3
rP.OISC_SUBLEQ_iPADDR <= cP_START;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_X, cD_Z, cP_START+1);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP.OISC_SUBLEQ_iPADDR <= cP_START+1;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Y, cP_START+2);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP.OISC_SUBLEQ_iPADDR <= cP_START+2;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_START+3);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- START+3: JUMP STOP = START+3: subleq Z, Z, STOP
rP.OISC_SUBLEQ_iPADDR <= cP_START+3;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_STOP);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- STOP: JUMP STOP = STOP: subleq Z, Z, STOP
rP.OISC_SUBLEQ_iPADDR <= cP_STOP;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_STOP);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP <= cP;
rP.DONE <= '1';
wait;
end process P_STIM_P;
P_STIM_D : process
begin
rD.OISC_SUBLEQ_iDADDR <= cD_Z;
rD.OISC_SUBLEQ_iDDATA <= cV_Z;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD.OISC_SUBLEQ_iDADDR <= cD_X;
rD.OISC_SUBLEQ_iDDATA <= cV_X;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD.OISC_SUBLEQ_iDADDR <= cD_Y;
rD.OISC_SUBLEQ_iDDATA <= cV_Y;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD <= cD;
rD.DONE <= '1';
wait;
end process P_STIM_D;
P_STIM : process
begin
wait until (rP.DONE = '1' and rD.DONE = '1' and sCLR /= '1');
wait until (rising_edge(sCLK));
r.ACT <= '1';
wait until (rising_edge(sCLK));
wait until (s.OISC_SUBLEQ_oPC = cP_STOP);
r.ACT <= '0';
r.DONE <= '1';
wait;
end process P_STIM;
end block B_STIM;
U_OISC_SUBLEQ : OISC_SUBLEQ
generic map (
log2PADDR => clog2PADDR,
log2DADDR => clog2DADDR,
DW => cDW,
ZERO => false,
ASYNC => false
)
port map (
iPCLK => sPCLK,
iPWE => rP.OISC_SUBLEQ_iPWE,
iPADDR => rP.OISC_SUBLEQ_iPADDR,
iPINST => rP.OISC_SUBLEQ_iPINST,
oPINST => sP.OISC_SUBLEQ_oPINST,
iDCLK => sDCLK,
iDWE => rD.OISC_SUBLEQ_iDWE,
iDADDR => rD.OISC_SUBLEQ_iDADDR,
iDDATA => rD.OISC_SUBLEQ_iDDATA,
oDDATA => sD.OISC_SUBLEQ_oDDATA,
iCLR => sCLR,
iCLK => sCLK,
iACT => r.ACT,
oACT => s.OISC_SUBLEQ_oACT,
oPC => s.OISC_SUBLEQ_oPC,
oLEQ => s.OISC_SUBLEQ_oLEQ
);
end architecture BENCH;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.OISC_SUBLEQ_PKG.all;
entity BENCH_OISC_SUBLEQ is
begin
end entity BENCH_OISC_SUBLEQ;
architecture BENCH of BENCH_OISC_SUBLEQ is
signal sPCLK : std_logic := '0';
signal sDCLK : std_logic := '0';
signal sCLK : std_logic := '0';
signal sCLR : std_logic := '1';
constant cPCLK_CYCLE : time := 1000.0 ns / 250.0; -- NOTE: 250[MHz]
constant cDCLK_CYCLE : time := 1000.0 ns / 200.0; -- NOTE: 200[MHz]
constant cCLK_CYCLE : time := 1000.0 ns / 150.0; -- NOTE: 150[MHz]
constant cCLR_TIME : time := 10*cCLK_CYCLE;
constant clog2PADDR : integer range 0 to integer'high := 8;
constant clog2DADDR : integer range 0 to integer'high := 4;
constant cDW : integer range 1 to integer'high := 8;
type tPIF is record
OISC_SUBLEQ_oPINST : std_logic_vector(clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0);
end record tPIF;
signal sP : tPIF;
type tP is record
OISC_SUBLEQ_iPWE : std_logic;
OISC_SUBLEQ_iPADDR : integer range 0 to 2**clog2PADDR-1;
OISC_SUBLEQ_iPINST : std_logic_vector(clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0);
DONE : std_logic;
end record tP;
constant cP : tP := (
OISC_SUBLEQ_iPWE => '0',
OISC_SUBLEQ_iPADDR => 0,
OISC_SUBLEQ_iPINST => (clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0 => '0'),
DONE => '0'
);
signal rP : tP := cP;
type tDIF is record
OISC_SUBLEQ_oDDATA : std_logic_vector(cDW-1 downto 0);
end record tDIF;
signal sD : tDIF;
type tD is record
OISC_SUBLEQ_iDWE : std_logic;
OISC_SUBLEQ_iDADDR : integer range 0 to 2**clog2DADDR-1;
OISC_SUBLEQ_iDDATA : std_logic_vector(cDW-1 downto 0);
DONE : std_logic;
end record tD;
constant cD : tD := (
OISC_SUBLEQ_iDWE => '0',
OISC_SUBLEQ_iDADDR => 0,
OISC_SUBLEQ_iDDATA => (cDW-1 downto 0 => '0'),
DONE => '0'
);
signal rD : tD := cD;
type tIF is record
OISC_SUBLEQ_oACT : std_logic;
OISC_SUBLEQ_oPC : integer range 0 to 2**clog2PADDR-1;
OISC_SUBLEQ_oLEQ : std_logic;
end record tIF;
signal s : tIF;
type t is record
ACT : std_logic;
DONE : std_logic;
end record t;
constant c : t := (
ACT => '0',
DONE => '0'
);
signal r : t := c;
begin
P_sPCLK : process
begin
sPCLK <= '0'; wait for cPCLK_CYCLE/2;
sPCLK <= '1'; wait for cPCLK_CYCLE/2;
end process P_sPCLK;
P_sDCLK : process
begin
sDCLK <= '0'; wait for cDCLK_CYCLE/2;
sDCLK <= '1'; wait for cDCLK_CYCLE/2;
end process P_sDCLK;
P_sCLK : process
begin
sCLK <= '0'; wait for cCLK_CYCLE/2;
sCLK <= '1'; wait for cCLK_CYCLE/2;
end process P_sCLK;
P_sCLR : process
begin
sCLR <= '1'; wait for cCLR_TIME;
sCLR <= '0'; wait;
end process P_sCLR;
B_STIM : block is
pure function fINST (
iA : integer range 0 to 2**clog2DADDR-1;
iB : integer range 0 to 2**clog2DADDR-1;
iC : integer range 0 to 2**clog2PADDR-1
) return std_logic_vector is
variable vA : std_logic_vector(clog2DADDR-1 downto 0);
variable vB : std_logic_vector(clog2DADDR-1 downto 0);
variable vC : std_logic_vector(clog2PADDR-1 downto 0);
begin
vA := std_logic_vector(to_unsigned(iA, clog2DADDR));
vB := std_logic_vector(to_unsigned(iB, clog2DADDR));
vC := std_logic_vector(to_unsigned(iC, clog2PADDR));
return vA & vB & vC;
end function fINST;
constant cD_Z : integer range 0 to 2**clog2DADDR-1 := 0;
constant cD_X : integer range 0 to 2**clog2DADDR-1 := 1;
constant cD_Y : integer range 0 to 2**clog2DADDR-1 := 2;
constant cV_Z : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed( 0, cDW));
constant cV_X : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed(12, cDW));
constant cV_Y : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed(34, cDW));
constant cP_ORG : integer range 0 to 2**clog2PADDR-1 := 0;
constant cP_START : integer range 0 to 2**clog2PADDR-1 := cP_ORG+8;
constant cP_STOP : integer range 0 to 2**clog2PADDR-1 := 2**clog2PADDR-1;
begin
P_STIM_P : process
begin
-- ORG: JMP START = ORG: subleq Z, Z, START
rP.OISC_SUBLEQ_iPADDR <= cP_ORG;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_START);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- START: ADD X, Y = START: subleq X, Z, START+1
-- subleq Z, Y, START+2
-- subleq Z, Z, START+3
rP.OISC_SUBLEQ_iPADDR <= cP_START;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_X, cD_Z, cP_START+1);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP.OISC_SUBLEQ_iPADDR <= cP_START+1;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Y, cP_START+2);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP.OISC_SUBLEQ_iPADDR <= cP_START+2;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_START+3);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- START+3: JUMP STOP = START+3: subleq Z, Z, STOP
rP.OISC_SUBLEQ_iPADDR <= cP_START+3;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_STOP);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- STOP: JUMP STOP = STOP: subleq Z, Z, STOP
rP.OISC_SUBLEQ_iPADDR <= cP_STOP;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_STOP);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP <= cP;
rP.DONE <= '1';
wait;
end process P_STIM_P;
P_STIM_D : process
begin
rD.OISC_SUBLEQ_iDADDR <= cD_Z;
rD.OISC_SUBLEQ_iDDATA <= cV_Z;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD.OISC_SUBLEQ_iDADDR <= cD_X;
rD.OISC_SUBLEQ_iDDATA <= cV_X;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD.OISC_SUBLEQ_iDADDR <= cD_Y;
rD.OISC_SUBLEQ_iDDATA <= cV_Y;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD <= cD;
rD.DONE <= '1';
wait;
end process P_STIM_D;
P_STIM : process
begin
wait until (rP.DONE = '1' and rD.DONE = '1' and sCLR /= '1');
wait until (rising_edge(sCLK));
r.ACT <= '1';
wait until (rising_edge(sCLK));
wait until (s.OISC_SUBLEQ_oPC = cP_STOP);
r.ACT <= '0';
r.DONE <= '1';
wait;
end process P_STIM;
end block B_STIM;
U_OISC_SUBLEQ : OISC_SUBLEQ
generic map (
log2PADDR => clog2PADDR,
log2DADDR => clog2DADDR,
DW => cDW,
ZERO => false,
ASYNC => false
)
port map (
iPCLK => sPCLK,
iPWE => rP.OISC_SUBLEQ_iPWE,
iPADDR => rP.OISC_SUBLEQ_iPADDR,
iPINST => rP.OISC_SUBLEQ_iPINST,
oPINST => sP.OISC_SUBLEQ_oPINST,
iDCLK => sDCLK,
iDWE => rD.OISC_SUBLEQ_iDWE,
iDADDR => rD.OISC_SUBLEQ_iDADDR,
iDDATA => rD.OISC_SUBLEQ_iDDATA,
oDDATA => sD.OISC_SUBLEQ_oDDATA,
iCLR => sCLR,
iCLK => sCLK,
iACT => r.ACT,
oACT => s.OISC_SUBLEQ_oACT,
oPC => s.OISC_SUBLEQ_oPC,
oLEQ => s.OISC_SUBLEQ_oLEQ
);
end architecture BENCH;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.OISC_SUBLEQ_PKG.all;
entity BENCH_OISC_SUBLEQ is
begin
end entity BENCH_OISC_SUBLEQ;
architecture BENCH of BENCH_OISC_SUBLEQ is
signal sPCLK : std_logic := '0';
signal sDCLK : std_logic := '0';
signal sCLK : std_logic := '0';
signal sCLR : std_logic := '1';
constant cPCLK_CYCLE : time := 1000.0 ns / 250.0; -- NOTE: 250[MHz]
constant cDCLK_CYCLE : time := 1000.0 ns / 200.0; -- NOTE: 200[MHz]
constant cCLK_CYCLE : time := 1000.0 ns / 150.0; -- NOTE: 150[MHz]
constant cCLR_TIME : time := 10*cCLK_CYCLE;
constant clog2PADDR : integer range 0 to integer'high := 8;
constant clog2DADDR : integer range 0 to integer'high := 4;
constant cDW : integer range 1 to integer'high := 8;
type tPIF is record
OISC_SUBLEQ_oPINST : std_logic_vector(clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0);
end record tPIF;
signal sP : tPIF;
type tP is record
OISC_SUBLEQ_iPWE : std_logic;
OISC_SUBLEQ_iPADDR : integer range 0 to 2**clog2PADDR-1;
OISC_SUBLEQ_iPINST : std_logic_vector(clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0);
DONE : std_logic;
end record tP;
constant cP : tP := (
OISC_SUBLEQ_iPWE => '0',
OISC_SUBLEQ_iPADDR => 0,
OISC_SUBLEQ_iPINST => (clog2DADDR+clog2DADDR+clog2PADDR-1 downto 0 => '0'),
DONE => '0'
);
signal rP : tP := cP;
type tDIF is record
OISC_SUBLEQ_oDDATA : std_logic_vector(cDW-1 downto 0);
end record tDIF;
signal sD : tDIF;
type tD is record
OISC_SUBLEQ_iDWE : std_logic;
OISC_SUBLEQ_iDADDR : integer range 0 to 2**clog2DADDR-1;
OISC_SUBLEQ_iDDATA : std_logic_vector(cDW-1 downto 0);
DONE : std_logic;
end record tD;
constant cD : tD := (
OISC_SUBLEQ_iDWE => '0',
OISC_SUBLEQ_iDADDR => 0,
OISC_SUBLEQ_iDDATA => (cDW-1 downto 0 => '0'),
DONE => '0'
);
signal rD : tD := cD;
type tIF is record
OISC_SUBLEQ_oACT : std_logic;
OISC_SUBLEQ_oPC : integer range 0 to 2**clog2PADDR-1;
OISC_SUBLEQ_oLEQ : std_logic;
end record tIF;
signal s : tIF;
type t is record
ACT : std_logic;
DONE : std_logic;
end record t;
constant c : t := (
ACT => '0',
DONE => '0'
);
signal r : t := c;
begin
P_sPCLK : process
begin
sPCLK <= '0'; wait for cPCLK_CYCLE/2;
sPCLK <= '1'; wait for cPCLK_CYCLE/2;
end process P_sPCLK;
P_sDCLK : process
begin
sDCLK <= '0'; wait for cDCLK_CYCLE/2;
sDCLK <= '1'; wait for cDCLK_CYCLE/2;
end process P_sDCLK;
P_sCLK : process
begin
sCLK <= '0'; wait for cCLK_CYCLE/2;
sCLK <= '1'; wait for cCLK_CYCLE/2;
end process P_sCLK;
P_sCLR : process
begin
sCLR <= '1'; wait for cCLR_TIME;
sCLR <= '0'; wait;
end process P_sCLR;
B_STIM : block is
pure function fINST (
iA : integer range 0 to 2**clog2DADDR-1;
iB : integer range 0 to 2**clog2DADDR-1;
iC : integer range 0 to 2**clog2PADDR-1
) return std_logic_vector is
variable vA : std_logic_vector(clog2DADDR-1 downto 0);
variable vB : std_logic_vector(clog2DADDR-1 downto 0);
variable vC : std_logic_vector(clog2PADDR-1 downto 0);
begin
vA := std_logic_vector(to_unsigned(iA, clog2DADDR));
vB := std_logic_vector(to_unsigned(iB, clog2DADDR));
vC := std_logic_vector(to_unsigned(iC, clog2PADDR));
return vA & vB & vC;
end function fINST;
constant cD_Z : integer range 0 to 2**clog2DADDR-1 := 0;
constant cD_X : integer range 0 to 2**clog2DADDR-1 := 1;
constant cD_Y : integer range 0 to 2**clog2DADDR-1 := 2;
constant cV_Z : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed( 0, cDW));
constant cV_X : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed(12, cDW));
constant cV_Y : std_logic_vector(cDW-1 downto 0) := std_logic_vector(to_signed(34, cDW));
constant cP_ORG : integer range 0 to 2**clog2PADDR-1 := 0;
constant cP_START : integer range 0 to 2**clog2PADDR-1 := cP_ORG+8;
constant cP_STOP : integer range 0 to 2**clog2PADDR-1 := 2**clog2PADDR-1;
begin
P_STIM_P : process
begin
-- ORG: JMP START = ORG: subleq Z, Z, START
rP.OISC_SUBLEQ_iPADDR <= cP_ORG;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_START);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- START: ADD X, Y = START: subleq X, Z, START+1
-- subleq Z, Y, START+2
-- subleq Z, Z, START+3
rP.OISC_SUBLEQ_iPADDR <= cP_START;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_X, cD_Z, cP_START+1);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP.OISC_SUBLEQ_iPADDR <= cP_START+1;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Y, cP_START+2);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP.OISC_SUBLEQ_iPADDR <= cP_START+2;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_START+3);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- START+3: JUMP STOP = START+3: subleq Z, Z, STOP
rP.OISC_SUBLEQ_iPADDR <= cP_START+3;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_STOP);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
-- STOP: JUMP STOP = STOP: subleq Z, Z, STOP
rP.OISC_SUBLEQ_iPADDR <= cP_STOP;
rP.OISC_SUBLEQ_iPINST <= fINST(cD_Z, cD_Z, cP_STOP);
rP.OISC_SUBLEQ_iPWE <= '1';
wait until (rising_edge(sPCLK));
rP <= cP;
rP.DONE <= '1';
wait;
end process P_STIM_P;
P_STIM_D : process
begin
rD.OISC_SUBLEQ_iDADDR <= cD_Z;
rD.OISC_SUBLEQ_iDDATA <= cV_Z;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD.OISC_SUBLEQ_iDADDR <= cD_X;
rD.OISC_SUBLEQ_iDDATA <= cV_X;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD.OISC_SUBLEQ_iDADDR <= cD_Y;
rD.OISC_SUBLEQ_iDDATA <= cV_Y;
rD.OISC_SUBLEQ_iDWE <= '1';
wait until (rising_edge(sDCLK));
rD <= cD;
rD.DONE <= '1';
wait;
end process P_STIM_D;
P_STIM : process
begin
wait until (rP.DONE = '1' and rD.DONE = '1' and sCLR /= '1');
wait until (rising_edge(sCLK));
r.ACT <= '1';
wait until (rising_edge(sCLK));
wait until (s.OISC_SUBLEQ_oPC = cP_STOP);
r.ACT <= '0';
r.DONE <= '1';
wait;
end process P_STIM;
end block B_STIM;
U_OISC_SUBLEQ : OISC_SUBLEQ
generic map (
log2PADDR => clog2PADDR,
log2DADDR => clog2DADDR,
DW => cDW,
ZERO => false,
ASYNC => false
)
port map (
iPCLK => sPCLK,
iPWE => rP.OISC_SUBLEQ_iPWE,
iPADDR => rP.OISC_SUBLEQ_iPADDR,
iPINST => rP.OISC_SUBLEQ_iPINST,
oPINST => sP.OISC_SUBLEQ_oPINST,
iDCLK => sDCLK,
iDWE => rD.OISC_SUBLEQ_iDWE,
iDADDR => rD.OISC_SUBLEQ_iDADDR,
iDDATA => rD.OISC_SUBLEQ_iDDATA,
oDDATA => sD.OISC_SUBLEQ_oDDATA,
iCLR => sCLR,
iCLK => sCLK,
iACT => r.ACT,
oACT => s.OISC_SUBLEQ_oACT,
oPC => s.OISC_SUBLEQ_oPC,
oLEQ => s.OISC_SUBLEQ_oLEQ
);
end architecture BENCH;
|
-- Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
-- --------------------------------------------------------------------------------
-- Tool Version: Vivado v.2016.4 (win64) Build 1756540 Mon Jan 23 19:11:23 MST 2017
-- Date : Fri Mar 31 18:24:55 2017
-- Host : LAPTOP-IQ9G3D1I running 64-bit major release (build 9200)
-- Command : write_vhdl -force -mode synth_stub
-- C:/Users/andrewandre/Documents/GitHub/axiplasma/hdl/projects/VC707/bd/mig_wrap/ip/mig_wrap_proc_sys_reset_0_0/mig_wrap_proc_sys_reset_0_0_stub.vhdl
-- Design : mig_wrap_proc_sys_reset_0_0
-- Purpose : Stub declaration of top-level module interface
-- Device : xc7vx485tffg1761-2
-- --------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity mig_wrap_proc_sys_reset_0_0 is
Port (
slowest_sync_clk : in STD_LOGIC;
ext_reset_in : in STD_LOGIC;
aux_reset_in : in STD_LOGIC;
mb_debug_sys_rst : in STD_LOGIC;
dcm_locked : in STD_LOGIC;
mb_reset : out STD_LOGIC;
bus_struct_reset : out STD_LOGIC_VECTOR ( 0 to 0 );
peripheral_reset : out STD_LOGIC_VECTOR ( 0 to 0 );
interconnect_aresetn : out STD_LOGIC_VECTOR ( 0 to 0 );
peripheral_aresetn : out STD_LOGIC_VECTOR ( 0 to 0 )
);
end mig_wrap_proc_sys_reset_0_0;
architecture stub of mig_wrap_proc_sys_reset_0_0 is
attribute syn_black_box : boolean;
attribute black_box_pad_pin : string;
attribute syn_black_box of stub : architecture is true;
attribute black_box_pad_pin of stub : architecture is "slowest_sync_clk,ext_reset_in,aux_reset_in,mb_debug_sys_rst,dcm_locked,mb_reset,bus_struct_reset[0:0],peripheral_reset[0:0],interconnect_aresetn[0:0],peripheral_aresetn[0:0]";
attribute x_core_info : string;
attribute x_core_info of stub : architecture is "proc_sys_reset,Vivado 2016.4";
begin
end;
|
-- -------------------------------------------------------------
--
-- Generated Configuration for vgca_rc
--
-- Generated
-- by: wig
-- on: Thu Feb 10 19:03:15 2005
-- cmd: H:/work/eclipse/MIX/mix_0.pl -strip -nodelta ../../bugver.xls
--
-- !!! Do not edit this file! Autogenerated by MIX !!!
-- $Author: wig $
-- $Id: vgca_rc-struct-conf-c.vhd,v 1.2 2005/04/14 06:53:00 wig Exp $
-- $Date: 2005/04/14 06:53:00 $
-- $Log: vgca_rc-struct-conf-c.vhd,v $
-- Revision 1.2 2005/04/14 06:53:00 wig
-- Updates: fixed import errors and adjusted I2C parser
--
--
-- Based on Mix Entity Template built into RCSfile: MixWriter.pm,v
-- Id: MixWriter.pm,v 1.49 2005/01/27 08:20:30 wig Exp
--
-- Generator: mix_0.pl Version: Revision: 1.33 , [email protected]
-- (C) 2003 Micronas GmbH
--
-- --------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
-- No project specific VHDL libraries/conf
--
-- Start of Generated Configuration vgca_rc_struct_conf / vgca_rc
--
configuration vgca_rc_struct_conf of vgca_rc is
for struct
-- Generated Configuration
for i_rc_ctrl : rc_ctrl
use configuration work.rc_ctrl_struct_conf;
end for;
end for;
end vgca_rc_struct_conf;
--
-- End of Generated Configuration vgca_rc_struct_conf
--
--
--!End of Configuration/ies
-- --------------------------------------------------------------
|
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
library std;
use std.textio.all;
library work;
use work.all;
use work.procedures.all;
entity tb_soc is
end tb_soc;
architecture behav of tb_soc is
signal rst : std_logic := '1';
signal clk : std_logic := '0';
signal clk2x : std_logic := '0';
signal rx : std_logic := '1';
signal tx : std_logic := '1';
procedure write(x : std_logic_vector(7 downto 0); signal rx : out std_logic) is
begin
rx <= '0';
wait for 8681 ns;
for i in 0 to 7 loop
rx <= x(i);
wait for 8681 ns;
end loop;
rx <= '1';
wait for 8681 ns;
end procedure;
begin
process
begin
clk <= '1';
clk2x <= '1';
wait for 5 ns;
clk2x <= '0';
wait for 5 ns;
clk <= '0';
clk2x <= '1';
wait for 5 ns;
clk2x <= '0';
wait for 5 ns;
end process;
process
variable l : line;
begin
wait for 61 ns;
rst <= '0';
wait for 100 ns;
write(X"AA", rx);
write(X"00", rx);
write(X"55", rx);
write(X"01", rx);
wait for 100 us;
assert false report "stop" severity failure;
end process;
asoc: entity work.soc
port map(
rst => rst,
clk => clk,
clk2x => clk2x,
rx => rx,
tx => tx
);
end behav;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2013, Aeroflex Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- LEON3 Demonstration design
-- Copyright (C) 2012 Aeroflex Gaisler
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib, techmap;
use grlib.amba.all;
use grlib.devices.all;
use grlib.stdlib.all;
use techmap.gencomp.all;
library gaisler;
use gaisler.memctrl.all;
use gaisler.leon3.all;
use gaisler.uart.all;
use gaisler.misc.all;
use gaisler.jtag.all;
use gaisler.i2c.all;
use gaisler.spi.all;
-- pragma translate_off
use gaisler.sim.all;
-- pragma translate_on
use work.config.all;
entity leon3mp is
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH;
disas : integer := CFG_DISAS;
dbguart : integer := CFG_DUART;
pclow : integer := CFG_PCLOW
);
port (
clock_50 : in std_logic;
led : inout std_logic_vector(7 downto 0);
key : in std_logic_vector(1 downto 0);
sw : in std_logic_vector(3 downto 0);
dram_ba : out std_logic_vector(1 downto 0);
dram_dqm : out std_logic_vector(1 downto 0);
dram_ras_n : out std_ulogic;
dram_cas_n : out std_ulogic;
dram_cke : out std_ulogic;
dram_clk : out std_ulogic;
dram_we_n : out std_ulogic;
dram_cs_n : out std_ulogic;
dram_dq : inout std_logic_vector(15 downto 0);
dram_addr : out std_logic_vector(12 downto 0);
epcs_data0 : in std_ulogic;
epcs_dclk : out std_ulogic;
epcs_ncso : out std_ulogic;
epcs_asdo : out std_ulogic;
i2c_sclk : inout std_logic;
i2c_sdat : inout std_logic;
g_sensor_cs_n : out std_ulogic;
g_sensor_int : in std_ulogic;
adc_cs_n : out std_ulogic;
adc_saddr : out std_ulogic;
adc_sclk : out std_ulogic;
adc_sdat : in std_ulogic;
gpio_2 : inout std_logic_vector(12 downto 0);
gpio_2_in : in std_logic_vector(2 downto 0);
gpio_1_in : in std_logic_vector(1 downto 0);
gpio_1 : inout std_logic_vector(33 downto 0);
gpio_0_in : in std_logic_vector(1 downto 0);
gpio_0 : inout std_logic_vector(33 downto 0)
);
end;
architecture rtl of leon3mp is
signal vcc, gnd : std_logic_vector(4 downto 0);
signal clkm, rstn, rstraw, sdclkl, lclk, rst, clklck : std_ulogic;
signal sdi : sdctrl_in_type;
signal sdo : sdctrl_out_type;
signal spmi : spimctrl_in_type;
signal spmo : spimctrl_out_type;
signal apbi : apb_slv_in_type;
signal apbo : apb_slv_out_vector := (others => apb_none);
signal ahbsi : ahb_slv_in_type;
signal ahbso : ahb_slv_out_vector := (others => ahbs_none);
signal ahbmi : ahb_mst_in_type;
signal ahbmo : ahb_mst_out_vector := (others => ahbm_none);
signal u1i, dui : uart_in_type;
signal u1o, duo : uart_out_type;
signal irqi : irq_in_vector(0 to CFG_NCPU-1);
signal irqo : irq_out_vector(0 to CFG_NCPU-1);
signal dbgi : l3_debug_in_vector(0 to CFG_NCPU-1);
signal dbgo : l3_debug_out_vector(0 to CFG_NCPU-1);
signal dsui : dsu_in_type;
signal dsuo : dsu_out_type;
signal fpi : grfpu_in_vector_type;
signal fpo : grfpu_out_vector_type;
signal stati : ahbstat_in_type;
signal gpti : gptimer_in_type;
signal i2ci : i2c_in_type;
signal i2co : i2c_out_type;
signal spii : spi_in_type;
signal spio : spi_out_type;
signal slvsel : std_logic_vector(CFG_SPICTRL_SLVS-1 downto 0);
signal gpio0i, gpio1i, gpio2i : gpio_in_type;
signal gpio0o, gpio1o, gpio2o : gpio_out_type;
signal dsubren : std_ulogic;
signal tck, tms, tdi, tdo : std_logic;
constant BOARD_FREQ : integer := 50000; -- Board frequency in KHz, used in clkgen
constant CPU_FREQ : integer := BOARD_FREQ * CFG_CLKMUL / CFG_CLKDIV;
constant IOAEN : integer := 1;
constant OEPOL : integer := padoen_polarity(padtech);
begin
----------------------------------------------------------------------
--- Reset and Clock generation -------------------------------------
----------------------------------------------------------------------
vcc <= (others => '1'); gnd <= (others => '0');
clk_pad : clkpad generic map (tech => padtech) port map (clock_50, lclk);
clkgen0 : entity work.clkgen_de0
generic map (clk_mul => CFG_CLKMUL, clk_div => CFG_CLKDIV,
clk_freq => BOARD_FREQ, sdramen => CFG_SDCTRL)
port map (inclk0 => lclk, c0 => clkm, c0_2x => open, e0 => sdclkl,
locked => clklck);
sdclk_pad : outpad generic map (tech => padtech, slew => 1)
port map (dram_clk, sdclkl);
resetn_pad : inpad generic map (tech => padtech) port map (key(0), rst);
rst0 : rstgen -- reset generator (reset is active LOW)
port map (rst, clkm, clklck, rstn, rstraw);
----------------------------------------------------------------------
--- AHB CONTROLLER --------------------------------------------------
----------------------------------------------------------------------
ahb0 : ahbctrl -- AHB arbiter/multiplexer
generic map (defmast => CFG_DEFMST, split => CFG_SPLIT,
rrobin => CFG_RROBIN, ioaddr => CFG_AHBIO, ioen => IOAEN,
nahbm => CFG_NCPU+CFG_AHB_JTAG,
nahbs => 6)
port map (rstn, clkm, ahbmi, ahbmo, ahbsi, ahbso);
----------------------------------------------------------------------
----- LEON3 processor and DSU -----------------------------------------
----------------------------------------------------------------------
cpu : for i in 0 to CFG_NCPU-1 generate
nosh : if CFG_GRFPUSH = 0 generate
u0 : leon3s -- LEON3 processor
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU*(1-CFG_GRFPUSH), CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1,
0, 0, CFG_MMU_PAGE, CFG_BP)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
irqi(i), irqo(i), dbgi(i), dbgo(i));
end generate;
end generate;
sh : if CFG_GRFPUSH = 1 generate
cpu : for i in 0 to CFG_NCPU-1 generate
u0 : leon3sh -- LEON3 processor
generic map (i, fabtech, memtech, CFG_NWIN, CFG_DSU, CFG_FPU, CFG_V8,
0, CFG_MAC, pclow, CFG_NOTAG, CFG_NWP, CFG_ICEN, CFG_IREPL, CFG_ISETS, CFG_ILINE,
CFG_ISETSZ, CFG_ILOCK, CFG_DCEN, CFG_DREPL, CFG_DSETS, CFG_DLINE, CFG_DSETSZ,
CFG_DLOCK, CFG_DSNOOP, CFG_ILRAMEN, CFG_ILRAMSZ, CFG_ILRAMADDR, CFG_DLRAMEN,
CFG_DLRAMSZ, CFG_DLRAMADDR, CFG_MMUEN, CFG_ITLBNUM, CFG_DTLBNUM, CFG_TLB_TYPE, CFG_TLB_REP,
CFG_LDDEL, disas, CFG_ITBSZ, CFG_PWD, CFG_SVT, CFG_RSTADDR, CFG_NCPU-1,
0, 0, CFG_MMU_PAGE, CFG_BP)
port map (clkm, rstn, ahbmi, ahbmo(i), ahbsi, ahbso,
irqi(i), irqo(i), dbgi(i), dbgo(i), fpi(i), fpo(i));
end generate;
grfpush0 : grfpushwx generic map ((CFG_FPU-1), CFG_NCPU, fabtech)
port map (clkm, rstn, fpi, fpo);
end generate;
errorn_pad : outpad generic map (tech => padtech) port map (led(6), dbgo(0).error);
dsugen : if CFG_DSU = 1 generate
dsu0 : dsu3 -- LEON3 Debug Support Unit
generic map (hindex => 2, haddr => 16#900#, hmask => 16#F00#,
ncpu => CFG_NCPU, tbits => 30, tech => memtech, irq => 0,
kbytes => CFG_ATBSZ)
port map (rstn, clkm, ahbmi, ahbsi, ahbso(2), dbgo, dbgi, dsui, dsuo);
dsuen_pad : inpad generic map (tech => padtech) port map (sw(0), dsui.enable);
dsubre_pad : inpad generic map (tech => padtech) port map (key(1), dsubren);
dsui.break <= not dsubren;
dsuact_pad : outpad generic map (tech => padtech) port map (led(7), dsuo.active);
end generate;
nodsu : if CFG_DSU = 0 generate
ahbso(2) <= ahbs_none; dsuo.tstop <= '0'; dsuo.active <= '0';
end generate;
ahbjtaggen0 :if CFG_AHB_JTAG = 1 generate
ahbjtag0 : ahbjtag generic map(tech => fabtech, hindex => CFG_NCPU)
port map(rstn, clkm, tck, tms, tdi, tdo, ahbmi, ahbmo(CFG_NCPU),
open, open, open, open, open, open, open, gnd(0));
end generate;
----------------------------------------------------------------------
--- Memory controllers ----------------------------------------------
----------------------------------------------------------------------
sdctrl0 : if CFG_SDCTRL = 1 generate -- 16-bit SDRAM controller
sdc : entity work.sdctrl16
generic map (hindex => 3, haddr => 16#400#, hmask => 16#FE0#,
ioaddr => 1, fast => 0, pwron => 0, invclk => 0,
sdbits => 16, pageburst => 2)
port map (rstn, clkm, ahbsi, ahbso(3), sdi, sdo);
sa_pad : outpadv generic map (width => 13, tech => padtech)
port map (dram_addr, sdo.address(14 downto 2));
ba0_pad : outpadv generic map (tech => padtech, width => 2)
port map (dram_ba, sdo.address(16 downto 15));
sd_pad : iopadvv generic map (width => 16, tech => padtech, oepol => OEPOL)
port map (dram_dq(15 downto 0), sdo.data(15 downto 0), sdo.vbdrive(15 downto 0), sdi.data(15 downto 0));
sdcke_pad : outpad generic map (tech => padtech)
port map (dram_cke, sdo.sdcke(0));
sdwen_pad : outpad generic map (tech => padtech)
port map (dram_we_n, sdo.sdwen);
sdcsn_pad : outpad generic map (tech => padtech)
port map (dram_cs_n, sdo.sdcsn(0));
sdras_pad : outpad generic map (tech => padtech)
port map (dram_ras_n, sdo.rasn);
sdcas_pad : outpad generic map (tech => padtech)
port map (dram_cas_n, sdo.casn);
sddqm_pad : outpadv generic map (tech => padtech, width => 2)
port map (dram_dqm, sdo.dqm(1 downto 0));
end generate;
spimctrl0: if CFG_SPIMCTRL /= 0 generate -- SPI Memory Controller
spimc : spimctrl
generic map (hindex => 0, hirq => 10, faddr => 16#000#, fmask => 16#f00#,
ioaddr => 16#002#, iomask => 16#fff#,
spliten => CFG_SPLIT, oepol => OEPOL,sdcard => CFG_SPIMCTRL_SDCARD,
readcmd => CFG_SPIMCTRL_READCMD, dummybyte => CFG_SPIMCTRL_DUMMYBYTE,
dualoutput => CFG_SPIMCTRL_DUALOUTPUT, scaler => CFG_SPIMCTRL_SCALER,
altscaler => CFG_SPIMCTRL_ASCALER, pwrupcnt => CFG_SPIMCTRL_PWRUPCNT,
offset => CFG_SPIMCTRL_OFFSET)
port map (rstn, clkm, ahbsi, ahbso(0), spmi, spmo);
end generate;
nospimctrl0 : if CFG_SPIMCTRL = 0 generate spmo <= spimctrl_out_none; end generate;
miso_pad : inpad generic map (tech => padtech)
port map (epcs_data0, spmi.miso);
mosi_pad : outpad generic map (tech => padtech)
port map (epcs_asdo, spmo.mosi);
sck_pad : outpad generic map (tech => padtech)
port map (epcs_dclk, spmo.sck);
slvsel0_pad : outpad generic map (tech => padtech)
port map (epcs_ncso, spmo.csn);
----------------------------------------------------------------------
--- AHB ROM ---------------------------------------------------------
----------------------------------------------------------------------
bpromgen : if CFG_AHBROMEN /= 0 and CFG_SPIMCTRL = 0 generate
brom : entity work.ahbrom
generic map (hindex => 0, haddr => CFG_AHBRODDR, pipe => CFG_AHBROPIP)
port map (rstn, clkm, ahbsi, ahbso(0));
end generate;
noprom : if CFG_AHBROMEN = 0 and CFG_SPIMCTRL = 0 generate
ahbso(0) <= ahbs_none;
end generate;
----------------------------------------------------------------------
--- APB Bridge and various peripherals ------------------------------
----------------------------------------------------------------------
apb0 : apbctrl -- AHB/APB bridge
generic map (hindex => 1, haddr => CFG_APBADDR)
port map (rstn, clkm, ahbsi, ahbso(1), apbi, apbo);
apbo(0) <= apb_none; -- Typically occupied by memory controller
ua1 : if CFG_UART1_ENABLE /= 0 generate
uart1 : apbuart -- UART 1
generic map (pindex => 1, paddr => 1, pirq => 2, console => dbguart, flow => 0,
fifosize => CFG_UART1_FIFO)
port map (rstn, clkm, apbi, apbo(1), u1i, u1o);
u1i.extclk <= '0';
u1i.rxd <= '1';
end generate;
noua0 : if CFG_UART1_ENABLE = 0 generate apbo(1) <= apb_none; end generate;
irqctrl : if CFG_IRQ3_ENABLE /= 0 generate
irqctrl0 : irqmp -- interrupt controller
generic map (pindex => 2, paddr => 2, ncpu => CFG_NCPU)
port map (rstn, clkm, apbi, apbo(2), irqo, irqi);
end generate;
irq3 : if CFG_IRQ3_ENABLE = 0 generate
x : for i in 0 to CFG_NCPU-1 generate
irqi(i).irl <= "0000";
end generate;
apbo(2) <= apb_none;
end generate;
gpt : if CFG_GPT_ENABLE /= 0 generate
timer0 : gptimer -- timer unit
generic map (pindex => 3, paddr => 3, pirq => CFG_GPT_IRQ,
sepirq => CFG_GPT_SEPIRQ, sbits => CFG_GPT_SW,
ntimers => CFG_GPT_NTIM, nbits => CFG_GPT_TW)
port map (rstn, clkm, apbi, apbo(3), gpti, open);
gpti.dhalt <= dsuo.tstop; gpti.extclk <= '0';
end generate;
notim : if CFG_GPT_ENABLE = 0 generate apbo(3) <= apb_none; end generate;
i2cm: if CFG_I2C_ENABLE = 1 generate -- I2C master
i2c0 : i2cmst
generic map (pindex => 4, paddr => 4, pmask => 16#FFF#,
pirq => 3, filter => 3, dynfilt => 1)
port map (rstn, clkm, apbi, apbo(4), i2ci, i2co);
end generate;
noi2cm: if CFG_I2C_ENABLE = 0 generate
i2co.scloen <= '1'; i2co.sdaoen <= '1';
i2co.scl <= '0'; i2co.sda <= '0';
end generate;
i2c_scl_pad : iopad generic map (tech => padtech)
port map (i2c_sclk, i2co.scl, i2co.scloen, i2ci.scl);
i2c_sda_pad : iopad generic map (tech => padtech)
port map (i2c_sdat, i2co.sda, i2co.sdaoen, i2ci.sda);
spic: if CFG_SPICTRL_ENABLE = 1 generate -- SPI controller
spi1 : spictrl
generic map (pindex => 5, paddr => 5, pmask => 16#fff#, pirq => 5,
fdepth => CFG_SPICTRL_FIFO, slvselen => CFG_SPICTRL_SLVREG,
slvselsz => CFG_SPICTRL_SLVS, odmode => 0, netlist => 0,
syncram => CFG_SPICTRL_SYNCRAM, ft => CFG_SPICTRL_FT)
port map (rstn, clkm, apbi, apbo(5), spii, spio, slvsel);
spii.spisel <= '1'; -- Master only
spii.astart <= '0';
miso_pad : inpad generic map (tech => padtech)
port map (adc_sdat, spii.miso);
mosi_pad : outpad generic map (tech => padtech)
port map (adc_saddr, spio.mosi);
sck_pad : outpad generic map (tech => padtech)
port map (adc_sclk, spio.sck);
slvsel_pad : outpad generic map (tech => padtech)
port map (adc_cs_n, slvsel(0));
end generate spic;
nospi: if CFG_SPICTRL_ENABLE = 0 generate
miso_pad : inpad generic map (tech => padtech)
port map (adc_sdat, spii.miso);
mosi_pad : outpad generic map (tech => padtech)
port map (adc_saddr, vcc(0));
sck_pad : outpad generic map (tech => padtech)
port map (adc_sclk, gnd(0));
slvsel_pad : outpad generic map (tech => padtech)
port map (adc_cs_n, vcc(0));
end generate;
gpio0 : if CFG_GRGPIO_ENABLE /= 0 generate -- GRGPIO0 port
grgpio0: grgpio
generic map( pindex => 9, paddr => 9, imask => CFG_GRGPIO_IMASK, nbits => CFG_GRGPIO_WIDTH)
port map( rstn, clkm, apbi, apbo(9), gpio0i, gpio0o);
pio_pads : for i in 0 to CFG_GRGPIO_WIDTH-1 generate
pio_pad : iopad generic map (tech => padtech)
port map (gpio_0(i), gpio0o.dout(i), gpio0o.oen(i), gpio0i.din(i));
end generate;
end generate;
nogpio0: if CFG_GRGPIO_ENABLE = 0 generate apbo(9) <= apb_none; end generate;
gpio1 : if CFG_GRGPIO2_ENABLE /= 0 generate -- GRGPIO1 port
grgpio1: grgpio
generic map( pindex => 10, paddr => 10, imask => CFG_GRGPIO2_IMASK, nbits => CFG_GRGPIO2_WIDTH)
port map( rstn, clkm, apbi, apbo(10), gpio1i, gpio1o);
pio_pads : for i in 0 to CFG_GRGPIO2_WIDTH-1 generate
pio_pad : iopad generic map (tech => padtech)
port map (gpio_1(i), gpio1o.dout(i), gpio1o.oen(i), gpio1i.din(i));
end generate;
end generate;
nogpio1: if CFG_GRGPIO2_ENABLE = 0 generate apbo(10) <= apb_none; end generate;
grgpio2: grgpio -- GRGPIO2 port
generic map( pindex => 11, paddr => 11, imask => 2**30, nbits => 31)
port map( rstn, clkm, apbi, apbo(11), gpio2i, gpio2o);
gpio_2_pads : iopadvv generic map (tech => padtech, width => 13)
port map (gpio_2(12 downto 0), gpio2o.dout(12 downto 0), gpio2o.oen(12 downto 0),
gpio2i.din(12 downto 0));
gpio_2_inpads : inpadv generic map (tech => padtech, width => 3)
port map (gpio_2_in, gpio2i.din(15 downto 13));
gpio_0_pads : iopadvv generic map (tech => padtech, width => 2)
port map (gpio_0(33 downto 32), gpio2o.dout(17 downto 16), gpio2o.oen(17 downto 16),
gpio2i.din(17 downto 16));
gpio_0_inpads : inpadv generic map (tech => padtech, width => 2)
port map (gpio_0_in, gpio2i.din(19 downto 18));
gpio_1_pads : iopadvv generic map (tech => padtech, width => 2)
port map (gpio_1(33 downto 32), gpio2o.dout(21 downto 20), gpio2o.oen(21 downto 20),
gpio2i.din(21 downto 20));
gpio_1_inpads : inpadv generic map (tech => padtech, width => 2)
port map (gpio_1_in, gpio2i.din(23 downto 22));
led_pads : iopadvv generic map (tech => padtech, width => 6)
port map (led(5 downto 0), gpio2o.dout(29 downto 24), gpio2o.oen(29 downto 24),
gpio2i.din(29 downto 24));
g_sensor_int_pad : inpad generic map (tech => padtech)
port map (g_sensor_int, gpio2i.din(30));
-- g_sensor_cs_n_pad : outpad generic map (tech => padtech)
-- port map (g_sensor_cs_n, gpio2o.dout(31));
g_sensor_cs_n <= '1';
-- gpio2i.din(31) <= gpio2o.dout(31);
ahbs : if CFG_AHBSTAT = 1 generate -- AHB status register
ahbstat0 : ahbstat generic map (pindex => 15, paddr => 15, pirq => 1, nftslv => CFG_AHBSTATN)
port map (rstn, clkm, ahbmi, ahbsi, stati, apbi, apbo(15));
end generate;
nop2 : if CFG_AHBSTAT = 0 generate apbo(15) <= apb_none; end generate;
-----------------------------------------------------------------------
--- AHB RAM ----------------------------------------------------------
-----------------------------------------------------------------------
ocram : if CFG_AHBRAMEN = 1 generate
ahbram0 : ahbram generic map (hindex => 7, haddr => CFG_AHBRADDR,
tech => CFG_MEMTECH, kbytes => CFG_AHBRSZ)
port map (rstn, clkm, ahbsi, ahbso(4));
end generate;
nram : if CFG_AHBRAMEN = 0 generate ahbso(4) <= ahbs_none; end generate;
-----------------------------------------------------------------------
--- Test report module ----------------------------------------------
-----------------------------------------------------------------------
-- pragma translate_off
test0 : ahbrep generic map (hindex => 5, haddr => 16#200#)
port map (rstn, clkm, ahbsi, ahbso(5));
-- pragma translate_on
-----------------------------------------------------------------------
--- Boot message ----------------------------------------------------
-----------------------------------------------------------------------
-- pragma translate_off
x : report_design
generic map (
msg1 => "LEON3 Altera DE0-EP4CE22 Demonstration design",
fabtech => tech_table(fabtech), memtech => tech_table(memtech),
mdel => 1
);
-- pragma translate_on
end;
|
-----------------------------------------------------------------------------
-- LEON3 Demonstration design test bench configuration
-- Copyright (C) 2009 Aeroflex Gaisler
------------------------------------------------------------------------------
library techmap;
use techmap.gencomp.all;
package config is
-- Technology and synthesis options
constant CFG_FABTECH : integer := virtex2;
constant CFG_MEMTECH : integer := virtex2;
constant CFG_PADTECH : integer := virtex2;
constant CFG_NOASYNC : integer := 0;
constant CFG_SCAN : integer := 0;
-- Clock generator
constant CFG_CLKTECH : integer := virtex2;
constant CFG_CLKMUL : integer := (4);
constant CFG_CLKDIV : integer := (4);
constant CFG_OCLKDIV : integer := 1;
constant CFG_OCLKBDIV : integer := 0;
constant CFG_OCLKCDIV : integer := 0;
constant CFG_PCIDLL : integer := 0;
constant CFG_PCISYSCLK: integer := 0;
constant CFG_CLK_NOFB : integer := 0;
-- LEON3 processor core
constant CFG_LEON3 : integer := 1;
constant CFG_NCPU : integer := (2);
constant CFG_NWIN : integer := (8);
constant CFG_V8 : integer := 16#32# + 4*0;
constant CFG_MAC : integer := 0;
constant CFG_BP : integer := 0;
constant CFG_SVT : integer := 1;
constant CFG_RSTADDR : integer := 16#00000#;
constant CFG_LDDEL : integer := (1);
constant CFG_NOTAG : integer := 0;
constant CFG_NWP : integer := (4);
constant CFG_PWD : integer := 1*2;
constant CFG_FPU : integer := 0 + 16*0 + 32*0;
constant CFG_GRFPUSH : integer := 0;
constant CFG_ICEN : integer := 1;
constant CFG_ISETS : integer := 4;
constant CFG_ISETSZ : integer := 4;
constant CFG_ILINE : integer := 8;
constant CFG_IREPL : integer := 0;
constant CFG_ILOCK : integer := 0;
constant CFG_ILRAMEN : integer := 0;
constant CFG_ILRAMADDR: integer := 16#8E#;
constant CFG_ILRAMSZ : integer := 1;
constant CFG_DCEN : integer := 1;
constant CFG_DSETS : integer := 4;
constant CFG_DSETSZ : integer := 4;
constant CFG_DLINE : integer := 4;
constant CFG_DREPL : integer := 0;
constant CFG_DLOCK : integer := 0;
constant CFG_DSNOOP : integer := 1*2 + 4*1;
constant CFG_DFIXED : integer := 16#0#;
constant CFG_DLRAMEN : integer := 0;
constant CFG_DLRAMADDR: integer := 16#8F#;
constant CFG_DLRAMSZ : integer := 1;
constant CFG_MMUEN : integer := 1;
constant CFG_ITLBNUM : integer := 8;
constant CFG_DTLBNUM : integer := 8;
constant CFG_TLB_TYPE : integer := 0 + 1*2;
constant CFG_TLB_REP : integer := 0;
constant CFG_MMU_PAGE : integer := 0;
constant CFG_DSU : integer := 1;
constant CFG_ITBSZ : integer := 2;
constant CFG_ATBSZ : integer := 2;
constant CFG_LEON3FT_EN : integer := 0;
constant CFG_IUFT_EN : integer := 0;
constant CFG_FPUFT_EN : integer := 0;
constant CFG_RF_ERRINJ : integer := 0;
constant CFG_CACHE_FT_EN : integer := 0;
constant CFG_CACHE_ERRINJ : integer := 0;
constant CFG_LEON3_NETLIST: integer := 0;
constant CFG_DISAS : integer := 0 + 0;
constant CFG_PCLOW : integer := 2;
-- AMBA settings
constant CFG_DEFMST : integer := (0);
constant CFG_RROBIN : integer := 1;
constant CFG_SPLIT : integer := 0;
constant CFG_FPNPEN : integer := 0;
constant CFG_AHBIO : integer := 16#FFF#;
constant CFG_APBADDR : integer := 16#800#;
constant CFG_AHB_MON : integer := 0;
constant CFG_AHB_MONERR : integer := 0;
constant CFG_AHB_MONWAR : integer := 0;
constant CFG_AHB_DTRACE : integer := 0;
-- DSU UART
constant CFG_AHB_UART : integer := 0;
-- JTAG based DSU interface
constant CFG_AHB_JTAG : integer := 1;
-- Ethernet DSU
constant CFG_DSU_ETH : integer := 1 + 0 + 0;
constant CFG_ETH_BUF : integer := 2;
constant CFG_ETH_IPM : integer := 16#C0A8#;
constant CFG_ETH_IPL : integer := 16#0033#;
constant CFG_ETH_ENM : integer := 16#020000#;
constant CFG_ETH_ENL : integer := 16#000004#;
-- PROM/SRAM controller
constant CFG_SRCTRL : integer := 0;
constant CFG_SRCTRL_PROMWS : integer := 0;
constant CFG_SRCTRL_RAMWS : integer := 0;
constant CFG_SRCTRL_IOWS : integer := 0;
constant CFG_SRCTRL_RMW : integer := 0;
constant CFG_SRCTRL_8BIT : integer := 0;
constant CFG_SRCTRL_SRBANKS : integer := 1;
constant CFG_SRCTRL_BANKSZ : integer := 0;
constant CFG_SRCTRL_ROMASEL : integer := 0;
-- LEON2 memory controller
constant CFG_MCTRL_LEON2 : integer := 1;
constant CFG_MCTRL_RAM8BIT : integer := 0;
constant CFG_MCTRL_RAM16BIT : integer := 0;
constant CFG_MCTRL_5CS : integer := 0;
constant CFG_MCTRL_SDEN : integer := 1;
constant CFG_MCTRL_SEPBUS : integer := 1;
constant CFG_MCTRL_INVCLK : integer := 0;
constant CFG_MCTRL_SD64 : integer := 1;
constant CFG_MCTRL_PAGE : integer := 0 + 0;
-- SDRAM controller
constant CFG_SDCTRL : integer := 0;
constant CFG_SDCTRL_INVCLK : integer := 0;
constant CFG_SDCTRL_SD64 : integer := 0;
constant CFG_SDCTRL_PAGE : integer := 0 + 0;
-- AHB ROM
constant CFG_AHBROMEN : integer := 0;
constant CFG_AHBROPIP : integer := 0;
constant CFG_AHBRODDR : integer := 16#000#;
constant CFG_ROMADDR : integer := 16#000#;
constant CFG_ROMMASK : integer := 16#E00# + 16#000#;
-- AHB RAM
constant CFG_AHBRAMEN : integer := 0;
constant CFG_AHBRSZ : integer := 1;
constant CFG_AHBRADDR : integer := 16#A00#;
constant CFG_AHBRPIPE : integer := 0;
-- Gaisler Ethernet core
constant CFG_GRETH : integer := 1;
constant CFG_GRETH1G : integer := 0;
constant CFG_ETH_FIFO : integer := 32;
-- CAN 2.0 interface
constant CFG_CAN : integer := 0;
constant CFG_CANIO : integer := 16#0#;
constant CFG_CANIRQ : integer := 0;
constant CFG_CANLOOP : integer := 0;
constant CFG_CAN_SYNCRST : integer := 0;
constant CFG_CANFT : integer := 0;
-- Spacewire interface
constant CFG_SPW_EN : integer := 0;
constant CFG_SPW_NUM : integer := 1;
constant CFG_SPW_AHBFIFO : integer := 4;
constant CFG_SPW_RXFIFO : integer := 16;
constant CFG_SPW_RMAP : integer := 0;
constant CFG_SPW_RMAPBUF : integer := 4;
constant CFG_SPW_RMAPCRC : integer := 0;
constant CFG_SPW_NETLIST : integer := 0;
constant CFG_SPW_FT : integer := 0;
constant CFG_SPW_GRSPW : integer := 2;
constant CFG_SPW_RXUNAL : integer := 0;
constant CFG_SPW_DMACHAN : integer := 1;
constant CFG_SPW_PORTS : integer := 1;
constant CFG_SPW_INPUT : integer := 2;
constant CFG_SPW_OUTPUT : integer := 0;
constant CFG_SPW_RTSAME : integer := 0;
-- PCI interface
constant CFG_PCI : integer := 0;
constant CFG_PCIVID : integer := 16#0#;
constant CFG_PCIDID : integer := 16#0#;
constant CFG_PCIDEPTH : integer := 8;
constant CFG_PCI_MTF : integer := 1;
-- PCI arbiter
constant CFG_PCI_ARB : integer := 0;
constant CFG_PCI_ARBAPB : integer := 0;
constant CFG_PCI_ARB_NGNT : integer := 4;
-- PCI trace buffer
constant CFG_PCITBUFEN: integer := 0;
constant CFG_PCITBUF : integer := 256;
-- UART 1
constant CFG_UART1_ENABLE : integer := 1;
constant CFG_UART1_FIFO : integer := 4;
-- UART 2
constant CFG_UART2_ENABLE : integer := 0;
constant CFG_UART2_FIFO : integer := 1;
-- LEON3 interrupt controller
constant CFG_IRQ3_ENABLE : integer := 1;
constant CFG_IRQ3_NSEC : integer := 0;
-- Modular timer
constant CFG_GPT_ENABLE : integer := 1;
constant CFG_GPT_NTIM : integer := (2);
constant CFG_GPT_SW : integer := (8);
constant CFG_GPT_TW : integer := (32);
constant CFG_GPT_IRQ : integer := (8);
constant CFG_GPT_SEPIRQ : integer := 1;
constant CFG_GPT_WDOGEN : integer := 0;
constant CFG_GPT_WDOG : integer := 16#0#;
-- GPIO port
constant CFG_GRGPIO_ENABLE : integer := 1;
constant CFG_GRGPIO_IMASK : integer := 16#0000#;
constant CFG_GRGPIO_WIDTH : integer := (8);
-- GRLIB debugging
constant CFG_DUART : integer := 0;
constant CFG_SDEN : integer := CFG_MCTRL_SDEN + CFG_SDCTRL;
constant CFG_INVCLK : integer := CFG_MCTRL_INVCLK + CFG_SDCTRL_INVCLK;
constant CFG_SEPBUS : integer := CFG_MCTRL_SEPBUS + CFG_SDCTRL;
constant CFG_SD64 : integer := CFG_MCTRL_SD64 + CFG_SDCTRL_SD64;
end;
|
-- Twofish.vhd
-- Copyright (C) 2006 Spyros Ninos
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this library; see the file COPYING. If not, write to:
--
-- Free Software Foundation
-- 59 Temple Place - Suite 330
-- Boston, MA 02111-1307, USA.
-- description : this file includes all the components necessary to perform symmetric encryption
-- with the twofish 128 bit block cipher. Within there are four main parts of the file.
-- the first part is the twofish crypto primitives which are independent of the key
-- input length, the second part is the 128 bit key input components, the third part
-- is the 192 bit key components and finaly the 256 bit key input components
--
-- ====================================================== --
-- ====================================================== --
-- --
-- first part: key input independent component primitives --
-- --
-- ====================================================== --
-- ====================================================== --
--
-- q0
--
library ieee;
Use ieee.std_logic_1164.all;
entity q0 is
port (
in_q0 : in std_logic_vector(7 downto 0);
out_q0 : out std_logic_vector(7 downto 0)
);
end q0;
architecture q0_arch of q0 is
-- declaring internal signals
signal a0,b0,
a1,b1,
a2,b2,
a3,b3,
a4,b4 : std_logic_vector(3 downto 0);
signal b0_ror4,
a0_times_8,
b2_ror4,
a2_times_8 : std_logic_vector(3 downto 0);
-- beginning of the architecture description
begin
-- little endian
b0 <= in_q0(3 downto 0);
a0 <= in_q0(7 downto 4);
a1 <= a0 XOR b0;
-- signal b0 is ror4'ed by 1 bit
b0_ror4(2 downto 0) <= b0(3 downto 1);
b0_ror4(3) <= b0(0);
-- 8*a0 = 2^3*a0= a0 << 3
a0_times_8(2 downto 0) <= (others => '0');
a0_times_8(3) <= a0(0);
b1 <= a0 XOR b0_ror4 XOR a0_times_8;
--
-- t0 table
--
with a1 select
a2 <= "1000" when "0000", -- 8
"0001" when "0001", -- 1
"0111" when "0010", -- 7
"1101" when "0011", -- D
"0110" when "0100", -- 6
"1111" when "0101", -- F
"0011" when "0110", -- 3
"0010" when "0111", -- 2
"0000" when "1000", -- 0
"1011" when "1001", -- B
"0101" when "1010", -- 5
"1001" when "1011", -- 9
"1110" when "1100", -- E
"1100" when "1101", -- C
"1010" when "1110", -- A
"0100" when others; -- 4
--
-- t1 table
--
with b1 select
b2 <= "1110" when "0000", -- E
"1100" when "0001", -- C
"1011" when "0010", -- B
"1000" when "0011", -- 8
"0001" when "0100", -- 1
"0010" when "0101", -- 2
"0011" when "0110", -- 3
"0101" when "0111", -- 5
"1111" when "1000", -- F
"0100" when "1001", -- 4
"1010" when "1010", -- A
"0110" when "1011", -- 6
"0111" when "1100", -- 7
"0000" when "1101", -- 0
"1001" when "1110", -- 9
"1101" when others; -- D
a3 <= a2 XOR b2;
-- signal b2 is ror4'ed by 1 bit
b2_ror4(2 downto 0) <= b2(3 downto 1);
b2_ror4(3) <= b2(0);
-- 8*a2 = 2^3*a2=a2<<3
a2_times_8(2 downto 0) <= (others => '0');
a2_times_8(3) <= a2(0);
b3 <= a2 XOR b2_ror4 XOR a2_times_8;
--
-- t0 table
--
with a3 select
a4 <= "1011" when "0000", -- B
"1010" when "0001", -- A
"0101" when "0010", -- 5
"1110" when "0011", -- E
"0110" when "0100", -- 6
"1101" when "0101", -- D
"1001" when "0110", -- 9
"0000" when "0111", -- 0
"1100" when "1000", -- C
"1000" when "1001", -- 8
"1111" when "1010", -- F
"0011" when "1011", -- 3
"0010" when "1100", -- 2
"0100" when "1101", -- 4
"0111" when "1110", -- 7
"0001" when others; -- 1
--
-- t1 table
--
with b3 select
b4 <= "1101" when "0000", -- D
"0111" when "0001", -- 7
"1111" when "0010", -- F
"0100" when "0011", -- 4
"0001" when "0100", -- 1
"0010" when "0101", -- 2
"0110" when "0110", -- 6
"1110" when "0111", -- E
"1001" when "1000", -- 9
"1011" when "1001", -- B
"0011" when "1010", -- 3
"0000" when "1011", -- 0
"1000" when "1100", -- 8
"0101" when "1101", -- 5
"1100" when "1110", -- C
"1010" when others; -- A
-- the output of q0
out_q0 <= b4 & a4;
end q0_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- q1
--
library ieee;
Use ieee.std_logic_1164.all;
entity q1 is
port (
in_q1 : in std_logic_vector(7 downto 0);
out_q1 : out std_logic_vector(7 downto 0)
);
end q1;
-- architecture description
architecture q1_arch of q1 is
-- declaring the internal signals
signal a0,b0,
a1,b1,
a2,b2,
a3,b3,
a4,b4 : std_logic_vector(3 downto 0);
signal b0_ror4,
a0_times_8,
b2_ror4,
a2_times_8 : std_logic_vector(3 downto 0);
-- begin the architecture description
begin
-- little endian
b0 <= in_q1(3 downto 0);
a0 <= in_q1(7 downto 4);
a1 <= a0 XOR b0;
-- signal b0 is ror4'ed by 1 bit
b0_ror4(2 downto 0) <= b0(3 downto 1);
b0_ror4(3) <= b0(0);
-- 8*a0 = 2^3*a0=a0<<3
a0_times_8(2 downto 0) <= (others => '0');
a0_times_8(3) <= a0(0);
b1 <= a0 XOR b0_ror4 XOR a0_times_8;
--
-- t0 table
--
with a1 select
a2 <= "0010" when "0000", -- 2
"1000" when "0001", -- 8
"1011" when "0010", -- b
"1101" when "0011", -- d
"1111" when "0100", -- f
"0111" when "0101", -- 7
"0110" when "0110", -- 6
"1110" when "0111", -- e
"0011" when "1000", -- 3
"0001" when "1001", -- 1
"1001" when "1010", -- 9
"0100" when "1011", -- 4
"0000" when "1100", -- 0
"1010" when "1101", -- a
"1100" when "1110", -- c
"0101" when others; -- 5
--
-- t1 table
--
with b1 select
b2 <= "0001" when "0000", -- 1
"1110" when "0001", -- e
"0010" when "0010", -- 2
"1011" when "0011", -- b
"0100" when "0100", -- 4
"1100" when "0101", -- c
"0011" when "0110", -- 3
"0111" when "0111", -- 7
"0110" when "1000", -- 6
"1101" when "1001", -- d
"1010" when "1010", -- a
"0101" when "1011", -- 5
"1111" when "1100", -- f
"1001" when "1101", -- 9
"0000" when "1110", -- 0
"1000" when others; -- 8
a3 <= a2 XOR b2;
-- signal b2 is ror4'ed by 1 bit
b2_ror4(2 downto 0) <= b2(3 downto 1);
b2_ror4(3) <= b2(0);
-- 8*a2 = 2^3*a2=a2<<3
a2_times_8(2 downto 0) <= (others => '0');
a2_times_8(3) <= a2(0);
b3 <= a2 XOR b2_ror4 XOR a2_times_8;
--
-- t0 table
--
with a3 select
a4 <= "0100" when "0000", -- 4
"1100" when "0001", -- c
"0111" when "0010", -- 7
"0101" when "0011", -- 5
"0001" when "0100", -- 1
"0110" when "0101", -- 6
"1001" when "0110", -- 9
"1010" when "0111", -- a
"0000" when "1000", -- 0
"1110" when "1001", -- e
"1101" when "1010", -- d
"1000" when "1011", -- 8
"0010" when "1100", -- 2
"1011" when "1101", -- b
"0011" when "1110", -- 3
"1111" when others; -- f
--
-- t1 table
--
with b3 select
b4 <= "1011" when "0000", -- b
"1001" when "0001", -- 9
"0101" when "0010", -- 5
"0001" when "0011", -- 1
"1100" when "0100", -- c
"0011" when "0101", -- 3
"1101" when "0110", -- d
"1110" when "0111", -- e
"0110" when "1000", -- 6
"0100" when "1001", -- 4
"0111" when "1010", -- 7
"1111" when "1011", -- f
"0010" when "1100", -- 2
"0000" when "1101", -- 0
"1000" when "1110", -- 8
"1010" when others; -- a
-- output of q1
out_q1 <= b4 & a4;
end q1_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- ef multiplier
--
library ieee;
use ieee.std_logic_1164.all;
entity mul_ef is
port (
in_ef : in std_logic_vector(7 downto 0);
out_ef : out std_logic_vector(7 downto 0)
);
end mul_ef;
architecture mul_ef_arch of mul_ef is
begin
out_ef(0) <= in_ef(2) XOR in_ef(1) XOR in_ef(0);
out_ef(1) <= in_ef(3) XOR in_ef(2) XOR in_ef(1) XOR in_ef(0);
out_ef(2) <= in_ef(4) XOR in_ef(3) XOR in_ef(2) XOR in_ef(1) XOR in_ef(0);
out_ef(3) <= in_ef(5) XOR in_ef(4) XOR in_ef(3) XOR in_ef(0);
out_ef(4) <= in_ef(6) XOR in_ef(5) XOR in_ef(4) XOR in_ef(1);
out_ef(5) <= in_ef(7) XOR in_ef(6) XOR in_ef(5) XOR in_ef(1) XOR in_ef(0);
out_ef(6) <= in_ef(7) XOR in_ef(6) XOR in_ef(0);
out_ef(7) <= in_ef(7) XOR in_ef(1) XOR in_ef(0);
end mul_ef_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- 5b multiplier
--
library ieee;
use ieee.std_logic_1164.all;
entity mul_5b is
port (
in_5b : in std_logic_vector(7 downto 0);
out_5b : out std_logic_vector(7 downto 0)
);
end mul_5b;
architecture mul_5b_arch of mul_5b is
begin
out_5b(0) <= in_5b(2) XOR in_5b(0);
out_5b(1) <= in_5b(3) XOR in_5b(1) XOR in_5b(0);
out_5b(2) <= in_5b(4) XOR in_5b(2) XOR in_5b(1);
out_5b(3) <= in_5b(5) XOR in_5b(3) XOR in_5b(0);
out_5b(4) <= in_5b(6) XOR in_5b(4) XOR in_5b(1) XOR in_5b(0);
out_5b(5) <= in_5b(7) XOR in_5b(5) XOR in_5b(1);
out_5b(6) <= in_5b(6) XOR in_5b(0);
out_5b(7) <= in_5b(7) XOR in_5b(1);
end mul_5b_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- mds
--
library ieee;
use ieee.std_logic_1164.all;
entity mds is
port (
y0,
y1,
y2,
y3 : in std_logic_vector(7 downto 0);
z0,
z1,
z2,
z3 : out std_logic_vector(7 downto 0)
);
end mds;
-- architecture description of mds component
architecture mds_arch of mds is
-- we declare the multiplier by ef
component mul_ef
port (
in_ef : in std_logic_vector(7 downto 0);
out_ef : out std_logic_vector(7 downto 0)
);
end component;
-- we declare the multiplier by 5b
component mul_5b
port (
in_5b : in std_logic_vector(7 downto 0);
out_5b : out std_logic_vector(7 downto 0)
);
end component;
-- we declare the multiplier's outputs
signal y0_ef, y0_5b,
y1_ef, y1_5b,
y2_ef, y2_5b,
y3_ef, y3_5b : std_logic_vector(7 downto 0);
begin
-- we perform the signal multiplication
y0_times_ef: mul_ef
port map (
in_ef => y0,
out_ef => y0_ef
);
y0_times_5b: mul_5b
port map (
in_5b => y0,
out_5b => y0_5b
);
y1_times_ef: mul_ef
port map (
in_ef => y1,
out_ef => y1_ef
);
y1_times_5b: mul_5b
port map (
in_5b => y1,
out_5b => y1_5b
);
y2_times_ef: mul_ef
port map (
in_ef => y2,
out_ef => y2_ef
);
y2_times_5b: mul_5b
port map (
in_5b => y2,
out_5b => y2_5b
);
y3_times_ef: mul_ef
port map (
in_ef => y3,
out_ef => y3_ef
);
y3_times_5b: mul_5b
port map (
in_5b => y3,
out_5b => y3_5b
);
-- we perform the addition of the partial results in order to receive
-- the table output
-- z0 = y0*01 + y1*ef + y2*5b + y3*5b , opoy + bazoyme XOR
z0 <= y0 XOR y1_ef XOR y2_5b XOR y3_5b;
-- z1 = y0*5b + y1*ef + y2*ef + y3*01
z1 <= y0_5b XOR y1_ef XOR y2_ef XOR y3;
-- z2 = y0*ef + y1*5b + y2*01 +y3*ef
z2 <= y0_ef XOR y1_5b XOR y2 XOR y3_ef;
-- z3 = y0*ef + y1*01 + y2*ef + y3*5b
z3 <= y0_ef XOR y1 XOR y2_ef XOR y3_5b;
end mds_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- 1 bit adder
--
library ieee;
use ieee.std_logic_1164.all;
entity adder is
port (
in1_adder,
in2_adder,
in_carry_adder : in std_logic;
out_adder,
out_carry_adder : out std_logic
);
end adder;
architecture adder_arch of adder is
begin
out_adder <= in_carry_adder XOR in1_adder XOR in2_adder;
out_carry_adder <= (in_carry_adder AND (in1_adder XOR in2_adder)) OR (in1_adder AND in2_adder);
end adder_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- pht
--
library ieee;
use ieee.std_logic_1164.all;
entity pht is
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end pht;
-- architecture description
architecture pht_arch of pht is
-- we declare internal signals
signal intermediate_carry1,
intermediate_carry2,
to_upper_out : std_logic_vector(31 downto 0);
signal zero : std_logic;
component adder
port (
in1_adder,
in2_adder,
in_carry_adder : in std_logic;
out_adder,
out_carry_adder : out std_logic
);
end component;
begin
-- initializing zero signal
zero <= '0';
-- instantiating the upper adder of 32 bits
up_adder: for i in 0 to 31 generate
adder_one: if (i=0) generate
the_adder: adder
port map (
in1_adder => up_in_pht(0),
in2_adder => down_in_pht(0),
in_carry_adder => zero,
out_adder => to_upper_out(0),
out_carry_adder => intermediate_carry1(0)
);
end generate adder_one;
rest_adders: if (i>0) generate
next_adder: adder
port map (
in1_adder => up_in_pht(i),
in2_adder => down_in_pht(i),
in_carry_adder => intermediate_carry1(i-1),
out_adder => to_upper_out(i),
out_carry_adder => intermediate_carry1(i)
);
end generate rest_adders;
end generate up_adder;
intermediate_carry1(31) <= '0';
-- receiving the upper pht output
up_out_pht <= to_upper_out;
-- instantiating the lower adder of 32 bits
down_adder: for i in 0 to 31 generate
adder_one_1: if (i=0) generate
the_adder_1: adder
port map (
in1_adder => down_in_pht(0),
in2_adder => to_upper_out(0),
in_carry_adder => zero,
out_adder => down_out_pht(0),
out_carry_adder => intermediate_carry2(0)
);
end generate adder_one_1;
rest_adders_1: if (i>0) generate
next_adder_1: adder
port map (
in1_adder => down_in_pht(i),
in2_adder => to_upper_out(i),
in_carry_adder => intermediate_carry2(i-1),
out_adder => down_out_pht(i),
out_carry_adder => intermediate_carry2(i)
);
end generate rest_adders_1;
end generate down_adder;
intermediate_carry2(31) <= '0';
end pht_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 01
--
library ieee;
use ieee.std_logic_1164.all;
entity mul01 is
port (
in_mul01 : in std_logic_vector(7 downto 0);
out_mul01 : out std_logic_vector(7 downto 0)
);
end mul01;
architecture mul01_arch of mul01 is
begin
out_mul01 <= in_mul01;
end mul01_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by a4
--
library ieee;
use ieee.std_logic_1164.all;
entity mula4 is
port (
in_mula4 : in std_logic_vector(7 downto 0);
out_mula4 : out std_logic_vector(7 downto 0)
);
end mula4;
architecture mula4_arch of mula4 is
begin
out_mula4(0) <= in_mula4(7) xor in_mula4(1);
out_mula4(1) <= in_mula4(2);
out_mula4(2) <= in_mula4(7) xor in_mula4(3) xor in_mula4(1) xor in_mula4(0);
out_mula4(3) <= in_mula4(7) xor in_mula4(4) xor in_mula4(2);
out_mula4(4) <= in_mula4(5) xor in_mula4(3);
out_mula4(5) <= in_mula4(6) xor in_mula4(4) xor in_mula4(0);
out_mula4(6) <= in_mula4(5);
out_mula4(7) <= in_mula4(6) xor in_mula4(0);
end mula4_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 55
--
library ieee;
use ieee.std_logic_1164.all;
entity mul55 is
port (
in_mul55 : in std_logic_vector(7 downto 0);
out_mul55 : out std_logic_vector(7 downto 0)
);
end mul55;
architecture mul55_arch of mul55 is
begin
out_mul55(0) <= in_mul55(7) xor in_mul55(6) xor in_mul55(2) xor in_mul55(0);
out_mul55(1) <= in_mul55(7) xor in_mul55(3) xor in_mul55(1);
out_mul55(2) <= in_mul55(7) xor in_mul55(6) xor in_mul55(4) xor in_mul55(0);
out_mul55(3) <= in_mul55(6) xor in_mul55(5) xor in_mul55(2) xor in_mul55(1);
out_mul55(4) <= in_mul55(7) xor in_mul55(6) xor in_mul55(3) xor in_mul55(2) xor in_mul55(0);
out_mul55(5) <= in_mul55(7) xor in_mul55(4) xor in_mul55(3) xor in_mul55(1);
out_mul55(6) <= in_mul55(7) xor in_mul55(6) xor in_mul55(5) xor in_mul55(4) xor in_mul55(0);
out_mul55(7) <= in_mul55(7) xor in_mul55(6) xor in_mul55(5) xor in_mul55(1);
end mul55_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 87
--
library ieee;
use ieee.std_logic_1164.all;
entity mul87 is
port (
in_mul87 : in std_logic_vector(7 downto 0);
out_mul87 : out std_logic_vector(7 downto 0)
);
end mul87;
architecture mul87_arch of mul87 is
begin
out_mul87(0) <= in_mul87(7) xor in_mul87(5) xor in_mul87(3) xor in_mul87(1) xor in_mul87(0);
out_mul87(1) <= in_mul87(6) xor in_mul87(4) xor in_mul87(2) xor in_mul87(1) xor in_mul87(0);
out_mul87(2) <= in_mul87(2) xor in_mul87(0);
out_mul87(3) <= in_mul87(7) xor in_mul87(5);
out_mul87(4) <= in_mul87(6);
out_mul87(5) <= in_mul87(7);
out_mul87(6) <= in_mul87(7) xor in_mul87(5) xor in_mul87(3) xor in_mul87(1);
out_mul87(7) <= in_mul87(6) xor in_mul87(4) xor in_mul87(2) xor in_mul87(0);
end mul87_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 5a
--
library ieee;
use ieee.std_logic_1164.all;
entity mul5a is
port (
in_mul5a : in std_logic_vector(7 downto 0);
out_mul5a : out std_logic_vector(7 downto 0)
);
end mul5a;
architecture mul5a_arch of mul5a is
begin
out_mul5a(0) <= in_mul5a(7) xor in_mul5a(5) xor in_mul5a(2);
out_mul5a(1) <= in_mul5a(6) xor in_mul5a(3) xor in_mul5a(0);
out_mul5a(2) <= in_mul5a(5) xor in_mul5a(4) xor in_mul5a(2) xor in_mul5a(1);
out_mul5a(3) <= in_mul5a(7) xor in_mul5a(6) xor in_mul5a(3) xor in_mul5a(0);
out_mul5a(4) <= in_mul5a(7) xor in_mul5a(4) xor in_mul5a(1) xor in_mul5a(0);
out_mul5a(5) <= in_mul5a(5) xor in_mul5a(2) xor in_mul5a(1);
out_mul5a(6) <= in_mul5a(7) xor in_mul5a(6) xor in_mul5a(5) xor in_mul5a(3) xor in_mul5a(0);
out_mul5a(7) <= in_mul5a(7) xor in_mul5a(6) xor in_mul5a(4) xor in_mul5a(1);
end mul5a_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 58
--
library ieee;
use ieee.std_logic_1164.all;
entity mul58 is
port (
in_mul58 : in std_logic_vector(7 downto 0);
out_mul58 : out std_logic_vector(7 downto 0)
);
end mul58;
architecture mul58_arch of mul58 is
begin
out_mul58(0) <= in_mul58(5) xor in_mul58(2);
out_mul58(1) <= in_mul58(6) xor in_mul58(3);
out_mul58(2) <= in_mul58(7) xor in_mul58(5) xor in_mul58(4) xor in_mul58(2);
out_mul58(3) <= in_mul58(6) xor in_mul58(3) xor in_mul58(2) xor in_mul58(0);
out_mul58(4) <= in_mul58(7) xor in_mul58(4) xor in_mul58(3) xor in_mul58(1) xor in_mul58(0);
out_mul58(5) <= in_mul58(5) xor in_mul58(4) xor in_mul58(2) xor in_mul58(1);
out_mul58(6) <= in_mul58(6) xor in_mul58(3) xor in_mul58(0);
out_mul58(7) <= in_mul58(7) xor in_mul58(4) xor in_mul58(1);
end mul58_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by db
--
library ieee;
use ieee.std_logic_1164.all;
entity muldb is
port (
in_muldb : in std_logic_vector(7 downto 0);
out_muldb : out std_logic_vector(7 downto 0)
);
end muldb;
architecture muldb_arch of muldb is
begin
out_muldb(0) <= in_muldb(7) xor in_muldb(6) xor in_muldb(3) xor in_muldb(2) xor in_muldb(1) xor in_muldb(0);
out_muldb(1) <= in_muldb(7) xor in_muldb(4) xor in_muldb(3) xor in_muldb(2) xor in_muldb(1) xor in_muldb(0);
out_muldb(2) <= in_muldb(7) xor in_muldb(6) xor in_muldb(5) xor in_muldb(4);
out_muldb(3) <= in_muldb(5) xor in_muldb(3) xor in_muldb(2) xor in_muldb(1) xor in_muldb(0);
out_muldb(4) <= in_muldb(6) xor in_muldb(4) xor in_muldb(3) xor in_muldb(2) xor in_muldb(1) xor in_muldb(0);
out_muldb(5) <= in_muldb(7) xor in_muldb(5) xor in_muldb(4) xor in_muldb(3) xor in_muldb(2) xor in_muldb(1);
out_muldb(6) <= in_muldb(7) xor in_muldb(5) xor in_muldb(4) xor in_muldb(1) xor in_muldb(0);
out_muldb(7) <= in_muldb(6) xor in_muldb(5) xor in_muldb(2) xor in_muldb(1) xor in_muldb(0);
end muldb_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 9e
--
library ieee;
use ieee.std_logic_1164.all;
entity mul9e is
port (
in_mul9e : in std_logic_vector(7 downto 0);
out_mul9e : out std_logic_vector(7 downto 0)
);
end mul9e;
architecture mul9e_arch of mul9e is
begin
out_mul9e(0) <= in_mul9e(6) xor in_mul9e(4) xor in_mul9e(3) xor in_mul9e(1);
out_mul9e(1) <= in_mul9e(7) xor in_mul9e(5) xor in_mul9e(4) xor in_mul9e(2) xor in_mul9e(0);
out_mul9e(2) <= in_mul9e(5) xor in_mul9e(4) xor in_mul9e(0);
out_mul9e(3) <= in_mul9e(5) xor in_mul9e(4) xor in_mul9e(3) xor in_mul9e(0);
out_mul9e(4) <= in_mul9e(6) xor in_mul9e(5) xor in_mul9e(4) xor in_mul9e(1) xor in_mul9e(0);
out_mul9e(5) <= in_mul9e(7) xor in_mul9e(6) xor in_mul9e(5) xor in_mul9e(2) xor in_mul9e(1);
out_mul9e(6) <= in_mul9e(7) xor in_mul9e(4) xor in_mul9e(2) xor in_mul9e(1);
out_mul9e(7) <= in_mul9e(5) xor in_mul9e(3) xor in_mul9e(2) xor in_mul9e(0);
end mul9e_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 56
--
library ieee;
use ieee.std_logic_1164.all;
entity mul56 is
port (
in_mul56 : in std_logic_vector(7 downto 0);
out_mul56 : out std_logic_vector(7 downto 0)
);
end mul56;
architecture mul56_arch of mul56 is
begin
out_mul56(0) <= in_mul56(6) xor in_mul56(2);
out_mul56(1) <= in_mul56(7) xor in_mul56(3) xor in_mul56(0);
out_mul56(2) <= in_mul56(6) xor in_mul56(4) xor in_mul56(2) xor in_mul56(1) xor in_mul56(0);
out_mul56(3) <= in_mul56(7) xor in_mul56(6) xor in_mul56(5) xor in_mul56(3) xor in_mul56(1);
out_mul56(4) <= in_mul56(7) xor in_mul56(6) xor in_mul56(4) xor in_mul56(2) xor in_mul56(0);
out_mul56(5) <= in_mul56(7) xor in_mul56(5) xor in_mul56(3) xor in_mul56(1);
out_mul56(6) <= in_mul56(4) xor in_mul56(0);
out_mul56(7) <= in_mul56(5) xor in_mul56(1);
end mul56_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 82
--
library ieee;
use ieee.std_logic_1164.all;
entity mul82 is
port (
in_mul82 : in std_logic_vector(7 downto 0);
out_mul82 : out std_logic_vector(7 downto 0)
);
end mul82;
architecture mul82_arch of mul82 is
begin
out_mul82(0) <= in_mul82(7) xor in_mul82(6) xor in_mul82(5) xor in_mul82(3) xor in_mul82(1);
out_mul82(1) <= in_mul82(7) xor in_mul82(6) xor in_mul82(4) xor in_mul82(2) xor in_mul82(0);
out_mul82(2) <= in_mul82(6);
out_mul82(3) <= in_mul82(6) xor in_mul82(5) xor in_mul82(3) xor in_mul82(1);
out_mul82(4) <= in_mul82(7) xor in_mul82(6) xor in_mul82(4) xor in_mul82(2);
out_mul82(5) <= in_mul82(7) xor in_mul82(5) xor in_mul82(3);
out_mul82(6) <= in_mul82(7) xor in_mul82(5) xor in_mul82(4) xor in_mul82(3) xor in_mul82(1);
out_mul82(7) <= in_mul82(6) xor in_mul82(5) xor in_mul82(4) xor in_mul82(2) xor in_mul82(0);
end mul82_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by f3
--
library ieee;
use ieee.std_logic_1164.all;
entity mulf3 is
port (
in_mulf3 : in std_logic_vector(7 downto 0);
out_mulf3 : out std_logic_vector(7 downto 0)
);
end mulf3;
architecture mulf3_arch of mulf3 is
begin
out_mulf3(0) <= in_mulf3(7) xor in_mulf3(6) xor in_mulf3(2) xor in_mulf3(1) xor in_mulf3(0);
out_mulf3(1) <= in_mulf3(7) xor in_mulf3(3) xor in_mulf3(2) xor in_mulf3(1) xor in_mulf3(0);
out_mulf3(2) <= in_mulf3(7) xor in_mulf3(6) xor in_mulf3(4) xor in_mulf3(3);
out_mulf3(3) <= in_mulf3(6) xor in_mulf3(5) xor in_mulf3(4) xor in_mulf3(2) xor in_mulf3(1);
out_mulf3(4) <= in_mulf3(7) xor in_mulf3(6) xor in_mulf3(5) xor in_mulf3(3) xor in_mulf3(2) xor in_mulf3(0);
out_mulf3(5) <= in_mulf3(7) xor in_mulf3(6) xor in_mulf3(4) xor in_mulf3(3) xor in_mulf3(1) xor in_mulf3(0);
out_mulf3(6) <= in_mulf3(6) xor in_mulf3(5) xor in_mulf3(4) xor in_mulf3(0);
out_mulf3(7) <= in_mulf3(7) xor in_mulf3(6) xor in_mulf3(5) xor in_mulf3(1) xor in_mulf3(0);
end mulf3_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 1e
--
library ieee;
use ieee.std_logic_1164.all;
entity mul1e is
port (
in_mul1e : in std_logic_vector(7 downto 0);
out_mul1e : out std_logic_vector(7 downto 0)
);
end mul1e;
architecture mul1e_arch of mul1e is
begin
out_mul1e(0) <= in_mul1e(5) xor in_mul1e(4);
out_mul1e(1) <= in_mul1e(6) xor in_mul1e(5) xor in_mul1e(0);
out_mul1e(2) <= in_mul1e(7) xor in_mul1e(6) xor in_mul1e(5) xor in_mul1e(4) xor in_mul1e(1) xor in_mul1e(0);
out_mul1e(3) <= in_mul1e(7) xor in_mul1e(6) xor in_mul1e(4) xor in_mul1e(2) xor in_mul1e(1) xor in_mul1e(0);
out_mul1e(4) <= in_mul1e(7) xor in_mul1e(5) xor in_mul1e(3) xor in_mul1e(2) xor in_mul1e(1) xor in_mul1e(0);
out_mul1e(5) <= in_mul1e(6) xor in_mul1e(4) xor in_mul1e(3) xor in_mul1e(2) xor in_mul1e(1);
out_mul1e(6) <= in_mul1e(7) xor in_mul1e(3) xor in_mul1e(2);
out_mul1e(7) <= in_mul1e(4) xor in_mul1e(3);
end mul1e_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by c6
--
library ieee;
use ieee.std_logic_1164.all;
entity mulc6 is
port (
in_mulc6 : in std_logic_vector(7 downto 0);
out_mulc6 : out std_logic_vector(7 downto 0)
);
end mulc6;
architecture mulc6_arch of mulc6 is
begin
out_mulc6(0) <= in_mulc6(6) xor in_mulc6(5) xor in_mulc6(4) xor in_mulc6(3) xor in_mulc6(2) xor in_mulc6(1);
out_mulc6(1) <= in_mulc6(7) xor in_mulc6(6) xor in_mulc6(5) xor in_mulc6(4) xor in_mulc6(3) xor in_mulc6(2) xor in_mulc6(0);
out_mulc6(2) <= in_mulc6(7) xor in_mulc6(2) xor in_mulc6(0);
out_mulc6(3) <= in_mulc6(6) xor in_mulc6(5) xor in_mulc6(4) xor in_mulc6(2);
out_mulc6(4) <= in_mulc6(7) xor in_mulc6(6) xor in_mulc6(5) xor in_mulc6(3);
out_mulc6(5) <= in_mulc6(7) xor in_mulc6(6) xor in_mulc6(4);
out_mulc6(6) <= in_mulc6(7) xor in_mulc6(6) xor in_mulc6(4) xor in_mulc6(3) xor in_mulc6(2) xor in_mulc6(1) xor in_mulc6(0);
out_mulc6(7) <= in_mulc6(7) xor in_mulc6(5) xor in_mulc6(4) xor in_mulc6(3) xor in_mulc6(2) xor in_mulc6(1) xor in_mulc6(0);
end mulc6_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 68
--
library ieee;
use ieee.std_logic_1164.all;
entity mul68 is
port (
in_mul68 : in std_logic_vector(7 downto 0);
out_mul68 : out std_logic_vector(7 downto 0)
);
end mul68;
architecture mul68_arch of mul68 is
begin
out_mul68(0) <= in_mul68(7) xor in_mul68(6) xor in_mul68(4) xor in_mul68(3) xor in_mul68(2);
out_mul68(1) <= in_mul68(7) xor in_mul68(5) xor in_mul68(4) xor in_mul68(3);
out_mul68(2) <= in_mul68(7) xor in_mul68(5) xor in_mul68(3) xor in_mul68(2);
out_mul68(3) <= in_mul68(7) xor in_mul68(2) xor in_mul68(0);
out_mul68(4) <= in_mul68(3) xor in_mul68(1);
out_mul68(5) <= in_mul68(4) xor in_mul68(2) xor in_mul68(0);
out_mul68(6) <= in_mul68(7) xor in_mul68(6) xor in_mul68(5) xor in_mul68(4) xor in_mul68(2) xor in_mul68(1) xor in_mul68(0);
out_mul68(7) <= in_mul68(7) xor in_mul68(6) xor in_mul68(5) xor in_mul68(3) xor in_mul68(2) xor in_mul68(1);
end mul68_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by e5
--
library ieee;
use ieee.std_logic_1164.all;
entity mule5 is
port (
in_mule5 : in std_logic_vector(7 downto 0);
out_mule5 : out std_logic_vector(7 downto 0)
);
end mule5;
architecture mule5_arch of mule5 is
begin
out_mule5(0) <= in_mule5(6) xor in_mule5(4) xor in_mule5(2) xor in_mule5(1) xor in_mule5(0);
out_mule5(1) <= in_mule5(7) xor in_mule5(5) xor in_mule5(3) xor in_mule5(2) xor in_mule5(1);
out_mule5(2) <= in_mule5(3) xor in_mule5(1) xor in_mule5(0);
out_mule5(3) <= in_mule5(6);
out_mule5(4) <= in_mule5(7);
out_mule5(5) <= in_mule5(0);
out_mule5(6) <= in_mule5(6) xor in_mule5(4) xor in_mule5(2) xor in_mule5(0);
out_mule5(7) <= in_mule5(7) xor in_mule5(5) xor in_mule5(3) xor in_mule5(1) xor in_mule5(0);
end mule5_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 02
--
library ieee;
use ieee.std_logic_1164.all;
entity mul02 is
port (
in_mul02 : in std_logic_vector(7 downto 0);
out_mul02 : out std_logic_vector(7 downto 0)
);
end mul02;
architecture mul02_arch of mul02 is
begin
out_mul02(0) <= in_mul02(7);
out_mul02(1) <= in_mul02(0);
out_mul02(2) <= in_mul02(7) xor in_mul02(1);
out_mul02(3) <= in_mul02(7) xor in_mul02(2);
out_mul02(4) <= in_mul02(3);
out_mul02(5) <= in_mul02(4);
out_mul02(6) <= in_mul02(7) xor in_mul02(5);
out_mul02(7) <= in_mul02(6);
end mul02_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by a1
--
library ieee;
use ieee.std_logic_1164.all;
entity mula1 is
port (
in_mula1 : in std_logic_vector(7 downto 0);
out_mula1 : out std_logic_vector(7 downto 0)
);
end mula1;
architecture mula1_arch of mula1 is
begin
out_mula1(0) <= in_mula1(7) xor in_mula1(6) xor in_mula1(1) xor in_mula1(0);
out_mula1(1) <= in_mula1(7) xor in_mula1(2) xor in_mula1(1);
out_mula1(2) <= in_mula1(7) xor in_mula1(6) xor in_mula1(3) xor in_mula1(2) xor in_mula1(1);
out_mula1(3) <= in_mula1(6) xor in_mula1(4) xor in_mula1(3) xor in_mula1(2) xor in_mula1(1);
out_mula1(4) <= in_mula1(7) xor in_mula1(5) xor in_mula1(4) xor in_mula1(3) xor in_mula1(2);
out_mula1(5) <= in_mula1(6) xor in_mula1(5) xor in_mula1(4) xor in_mula1(3) xor in_mula1(0);
out_mula1(6) <= in_mula1(5) xor in_mula1(4);
out_mula1(7) <= in_mula1(6) xor in_mula1(5) xor in_mula1(0);
end mula1_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by fc
--
library ieee;
use ieee.std_logic_1164.all;
entity mulfc is
port (
in_mulfc : in std_logic_vector(7 downto 0);
out_mulfc : out std_logic_vector(7 downto 0)
);
end mulfc;
architecture mulfc_arch of mulfc is
begin
out_mulfc(0) <= in_mulfc(7) xor in_mulfc(5) xor in_mulfc(2) xor in_mulfc(1);
out_mulfc(1) <= in_mulfc(6) xor in_mulfc(3) xor in_mulfc(2);
out_mulfc(2) <= in_mulfc(5) xor in_mulfc(4) xor in_mulfc(3) xor in_mulfc(2) xor in_mulfc(1) xor in_mulfc(0);
out_mulfc(3) <= in_mulfc(7) xor in_mulfc(6) xor in_mulfc(4) xor in_mulfc(3) xor in_mulfc(0);
out_mulfc(4) <= in_mulfc(7) xor in_mulfc(5) xor in_mulfc(4) xor in_mulfc(1) xor in_mulfc(0);
out_mulfc(5) <= in_mulfc(6) xor in_mulfc(5) xor in_mulfc(2) xor in_mulfc(1) xor in_mulfc(0);
out_mulfc(6) <= in_mulfc(6) xor in_mulfc(5) xor in_mulfc(3) xor in_mulfc(0);
out_mulfc(7) <= in_mulfc(7) xor in_mulfc(6) xor in_mulfc(4) xor in_mulfc(1) xor in_mulfc(0);
end mulfc_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by c1
--
library ieee;
use ieee.std_logic_1164.all;
entity mulc1 is
port (
in_mulc1 : in std_logic_vector(7 downto 0);
out_mulc1 : out std_logic_vector(7 downto 0)
);
end mulc1;
architecture mulc1_arch of mulc1 is
begin
out_mulc1(0) <= in_mulc1(7) xor in_mulc1(5) xor in_mulc1(4) xor in_mulc1(3) xor in_mulc1(2) xor in_mulc1(1) xor in_mulc1(0);
out_mulc1(1) <= in_mulc1(6) xor in_mulc1(5) xor in_mulc1(4) xor in_mulc1(3) xor in_mulc1(2) xor in_mulc1(1);
out_mulc1(2) <= in_mulc1(6) xor in_mulc1(1);
out_mulc1(3) <= in_mulc1(5) xor in_mulc1(4) xor in_mulc1(3) xor in_mulc1(1);
out_mulc1(4) <= in_mulc1(6) xor in_mulc1(5) xor in_mulc1(4) xor in_mulc1(2);
out_mulc1(5) <= in_mulc1(7) xor in_mulc1(6) xor in_mulc1(5) xor in_mulc1(3);
out_mulc1(6) <= in_mulc1(6) xor in_mulc1(5) xor in_mulc1(3) xor in_mulc1(2) xor in_mulc1(1) xor in_mulc1(0);
out_mulc1(7) <= in_mulc1(7) xor in_mulc1(6) xor in_mulc1(4) xor in_mulc1(3) xor in_mulc1(2) xor in_mulc1(1) xor in_mulc1(0);
end mulc1_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 47
--
library ieee;
use ieee.std_logic_1164.all;
entity mul47 is
port (
in_mul47 : in std_logic_vector(7 downto 0);
out_mul47 : out std_logic_vector(7 downto 0)
);
end mul47;
architecture mul47_arch of mul47 is
begin
out_mul47(0) <= in_mul47(4) xor in_mul47(2) xor in_mul47(0);
out_mul47(1) <= in_mul47(5) xor in_mul47(3) xor in_mul47(1) xor in_mul47(0);
out_mul47(2) <= in_mul47(6) xor in_mul47(1) xor in_mul47(0);
out_mul47(3) <= in_mul47(7) xor in_mul47(4) xor in_mul47(1);
out_mul47(4) <= in_mul47(5) xor in_mul47(2);
out_mul47(5) <= in_mul47(6) xor in_mul47(3);
out_mul47(6) <= in_mul47(7) xor in_mul47(2) xor in_mul47(0);
out_mul47(7) <= in_mul47(3) xor in_mul47(1);
end mul47_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by ae
--
library ieee;
use ieee.std_logic_1164.all;
entity mulae is
port (
in_mulae : in std_logic_vector(7 downto 0);
out_mulae : out std_logic_vector(7 downto 0)
);
end mulae;
architecture mulae_arch of mulae is
begin
out_mulae(0) <= in_mulae(7) xor in_mulae(5) xor in_mulae(1);
out_mulae(1) <= in_mulae(6) xor in_mulae(2) xor in_mulae(0);
out_mulae(2) <= in_mulae(5) xor in_mulae(3) xor in_mulae(0);
out_mulae(3) <= in_mulae(7) xor in_mulae(6) xor in_mulae(5) xor in_mulae(4) xor in_mulae(0);
out_mulae(4) <= in_mulae(7) xor in_mulae(6) xor in_mulae(5) xor in_mulae(1);
out_mulae(5) <= in_mulae(7) xor in_mulae(6) xor in_mulae(2) xor in_mulae(0);
out_mulae(6) <= in_mulae(5) xor in_mulae(3);
out_mulae(7) <= in_mulae(6) xor in_mulae(4) xor in_mulae(0);
end mulae_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 3d
--
library ieee;
use ieee.std_logic_1164.all;
entity mul3d is
port (
in_mul3d : in std_logic_vector(7 downto 0);
out_mul3d : out std_logic_vector(7 downto 0)
);
end mul3d;
architecture mul3d_arch of mul3d is
begin
out_mul3d(0) <= in_mul3d(4) xor in_mul3d(3) xor in_mul3d(0);
out_mul3d(1) <= in_mul3d(5) xor in_mul3d(4) xor in_mul3d(1);
out_mul3d(2) <= in_mul3d(6) xor in_mul3d(5) xor in_mul3d(4) xor in_mul3d(3) xor in_mul3d(2) xor in_mul3d(0);
out_mul3d(3) <= in_mul3d(7) xor in_mul3d(6) xor in_mul3d(5) xor in_mul3d(1) xor in_mul3d(0);
out_mul3d(4) <= in_mul3d(7) xor in_mul3d(6) xor in_mul3d(2) xor in_mul3d(1) xor in_mul3d(0);
out_mul3d(5) <= in_mul3d(7) xor in_mul3d(3) xor in_mul3d(2) xor in_mul3d(1) xor in_mul3d(0);
out_mul3d(6) <= in_mul3d(2) xor in_mul3d(1);
out_mul3d(7) <= in_mul3d(3) xor in_mul3d(2);
end mul3d_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 19
--
library ieee;
use ieee.std_logic_1164.all;
entity mul19 is
port (
in_mul19 : in std_logic_vector(7 downto 0);
out_mul19 : out std_logic_vector(7 downto 0)
);
end mul19;
architecture mul19_arch of mul19 is
begin
out_mul19(0) <= in_mul19(7) xor in_mul19(6) xor in_mul19(5) xor in_mul19(4) xor in_mul19(0);
out_mul19(1) <= in_mul19(7) xor in_mul19(6) xor in_mul19(5) xor in_mul19(1);
out_mul19(2) <= in_mul19(5) xor in_mul19(4) xor in_mul19(2);
out_mul19(3) <= in_mul19(7) xor in_mul19(4) xor in_mul19(3) xor in_mul19(0);
out_mul19(4) <= in_mul19(5) xor in_mul19(4) xor in_mul19(1) xor in_mul19(0);
out_mul19(5) <= in_mul19(6) xor in_mul19(5) xor in_mul19(2) xor in_mul19(1);
out_mul19(6) <= in_mul19(5) xor in_mul19(4) xor in_mul19(3) xor in_mul19(2);
out_mul19(7) <= in_mul19(6) xor in_mul19(5) xor in_mul19(4) xor in_mul19(3);
end mul19_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- multiplier by 03
--
library ieee;
use ieee.std_logic_1164.all;
entity mul03 is
port (
in_mul03 : in std_logic_vector(7 downto 0);
out_mul03 : out std_logic_vector(7 downto 0)
);
end mul03;
architecture mul03_arch of mul03 is
begin
out_mul03(0) <= in_mul03(7) xor in_mul03(0);
out_mul03(1) <= in_mul03(1) xor in_mul03(0);
out_mul03(2) <= in_mul03(7) xor in_mul03(2) xor in_mul03(1);
out_mul03(3) <= in_mul03(7) xor in_mul03(3) xor in_mul03(2);
out_mul03(4) <= in_mul03(4) xor in_mul03(3);
out_mul03(5) <= in_mul03(5) xor in_mul03(4);
out_mul03(6) <= in_mul03(7) xor in_mul03(6) xor in_mul03(5);
out_mul03(7) <= in_mul03(7) xor in_mul03(6);
end mul03_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish data input is the component
-- that transforms the data input to the
-- first round to the wanted form as is
-- described in the twofish prototype
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_data_input is
port (
in_tdi : in std_logic_vector(127 downto 0);
out_tdi : out std_logic_vector(127 downto 0)
);
end twofish_data_input;
architecture twofish_data_input_arch of twofish_data_input is
-- we declare internal signals
signal byte0, byte1, byte2, byte3,
byte4, byte5, byte6,
byte7, byte8, byte9,
byte10, byte11, byte12,
byte13, byte14, byte15 : std_logic_vector(7 downto 0);
signal P0, P1, P2, P3 : std_logic_vector(31 downto 0);
begin
-- we assign the input signal to the respective
-- bytes as is described in the prototype
byte15 <= in_tdi(7 downto 0);
byte14 <= in_tdi(15 downto 8);
byte13 <= in_tdi(23 downto 16);
byte12 <= in_tdi(31 downto 24);
byte11 <= in_tdi(39 downto 32);
byte10 <= in_tdi(47 downto 40);
byte9 <= in_tdi(55 downto 48);
byte8 <= in_tdi(63 downto 56);
byte7 <= in_tdi(71 downto 64);
byte6 <= in_tdi(79 downto 72);
byte5 <= in_tdi(87 downto 80);
byte4 <= in_tdi(95 downto 88);
byte3 <= in_tdi(103 downto 96);
byte2 <= in_tdi(111 downto 104);
byte1 <= in_tdi(119 downto 112);
byte0 <= in_tdi(127 downto 120);
-- we rearrange the bytes and send them to exit
P0 <= byte3 & byte2 & byte1 & byte0;
P1 <= byte7 & byte6 & byte5 & byte4;
P2 <= byte11 & byte10 & byte9 & byte8;
P3 <= byte15 & byte14 & byte13 & byte12;
out_tdi <= P0 & P1 & P2 & P3;
end twofish_data_input_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish data output is the component
-- that transforms the data output from the
-- 16th round to the wanted form as is
-- described in the twofish prototype
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_data_output is
port (
in_tdo : in std_logic_vector(127 downto 0);
out_tdo : out std_logic_vector(127 downto 0)
);
end twofish_data_output;
architecture twofish_data_output_arch of twofish_data_output is
-- we declare internal signals
signal byte0, byte1, byte2, byte3,
byte4, byte5, byte6,
byte7, byte8, byte9,
byte10, byte11, byte12,
byte13, byte14, byte15 : std_logic_vector(7 downto 0);
signal C0, C1, C2, C3 : std_logic_vector(31 downto 0);
begin
-- we assign the input signal to the respective
-- bytes as is described in the prototype
byte15 <= in_tdo(7 downto 0);
byte14 <= in_tdo(15 downto 8);
byte13 <= in_tdo(23 downto 16);
byte12 <= in_tdo(31 downto 24);
byte11 <= in_tdo(39 downto 32);
byte10 <= in_tdo(47 downto 40);
byte9 <= in_tdo(55 downto 48);
byte8 <= in_tdo(63 downto 56);
byte7 <= in_tdo(71 downto 64);
byte6 <= in_tdo(79 downto 72);
byte5 <= in_tdo(87 downto 80);
byte4 <= in_tdo(95 downto 88);
byte3 <= in_tdo(103 downto 96);
byte2 <= in_tdo(111 downto 104);
byte1 <= in_tdo(119 downto 112);
byte0 <= in_tdo(127 downto 120);
-- we rearrange the bytes and send them to exit
C0 <= byte3 & byte2 & byte1 & byte0;
C1 <= byte7 & byte6 & byte5 & byte4;
C2 <= byte11 & byte10 & byte9 & byte8;
C3 <= byte15 & byte14 & byte13 & byte12;
out_tdo <= C0 & C1 & C2 & C3;
end twofish_data_output_arch;
-- =======-======================================= --
-- =============================================== --
-- --
-- second part: 128 key input dependent components --
-- --
-- =============================================== --
-- =============================================== --
--
-- reed solomon for 128bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity reed_solomon128 is
port (
in_rs128 : in std_logic_vector(127 downto 0);
out_Sfirst_rs128,
out_Ssecond_rs128 : out std_logic_vector(31 downto 0)
);
end reed_solomon128;
architecture rs_128_arch of reed_solomon128 is
-- declaring all components necessary for reed solomon
-- 01
component mul01
port (
in_mul01 : in std_logic_vector(7 downto 0);
out_mul01 : out std_logic_vector(7 downto 0)
);
end component;
-- a4
component mula4
port (
in_mula4 : in std_logic_vector(7 downto 0);
out_mula4 : out std_logic_vector(7 downto 0)
);
end component;
-- 55
component mul55
port (
in_mul55 : in std_logic_vector(7 downto 0);
out_mul55 : out std_logic_vector(7 downto 0)
);
end component;
-- 87
component mul87
port (
in_mul87 : in std_logic_vector(7 downto 0);
out_mul87 : out std_logic_vector(7 downto 0)
);
end component;
-- 5a
component mul5a
port (
in_mul5a : in std_logic_vector(7 downto 0);
out_mul5a : out std_logic_vector(7 downto 0)
);
end component;
-- 58
component mul58
port (
in_mul58 : in std_logic_vector(7 downto 0);
out_mul58 : out std_logic_vector(7 downto 0)
);
end component;
-- db
component muldb
port (
in_muldb : in std_logic_vector(7 downto 0);
out_muldb : out std_logic_vector(7 downto 0)
);
end component;
-- 9e
component mul9e
port (
in_mul9e : in std_logic_vector(7 downto 0);
out_mul9e : out std_logic_vector(7 downto 0)
);
end component;
-- 56
component mul56
port (
in_mul56 : in std_logic_vector(7 downto 0);
out_mul56 : out std_logic_vector(7 downto 0)
);
end component;
-- 82
component mul82
port (
in_mul82 : in std_logic_vector(7 downto 0);
out_mul82 : out std_logic_vector(7 downto 0)
);
end component;
-- f3
component mulf3
port (
in_mulf3 : in std_logic_vector(7 downto 0);
out_mulf3 : out std_logic_vector(7 downto 0)
);
end component;
-- 1e
component mul1e
port (
in_mul1e : in std_logic_vector(7 downto 0);
out_mul1e : out std_logic_vector(7 downto 0)
);
end component;
-- c6
component mulc6
port (
in_mulc6 : in std_logic_vector(7 downto 0);
out_mulc6 : out std_logic_vector(7 downto 0)
);
end component;
-- 68
component mul68
port (
in_mul68 : in std_logic_vector(7 downto 0);
out_mul68 : out std_logic_vector(7 downto 0)
);
end component;
-- e5
component mule5
port (
in_mule5 : in std_logic_vector(7 downto 0);
out_mule5 : out std_logic_vector(7 downto 0)
);
end component;
-- 02
component mul02
port (
in_mul02 : in std_logic_vector(7 downto 0);
out_mul02 : out std_logic_vector(7 downto 0)
);
end component;
-- a1
component mula1
port (
in_mula1 : in std_logic_vector(7 downto 0);
out_mula1 : out std_logic_vector(7 downto 0)
);
end component;
-- fc
component mulfc
port (
in_mulfc : in std_logic_vector(7 downto 0);
out_mulfc : out std_logic_vector(7 downto 0)
);
end component;
-- c1
component mulc1
port (
in_mulc1 : in std_logic_vector(7 downto 0);
out_mulc1 : out std_logic_vector(7 downto 0)
);
end component;
-- 47
component mul47
port (
in_mul47 : in std_logic_vector(7 downto 0);
out_mul47 : out std_logic_vector(7 downto 0)
);
end component;
-- ae
component mulae
port (
in_mulae : in std_logic_vector(7 downto 0);
out_mulae : out std_logic_vector(7 downto 0)
);
end component;
-- 3d
component mul3d
port (
in_mul3d : in std_logic_vector(7 downto 0);
out_mul3d : out std_logic_vector(7 downto 0)
);
end component;
-- 19
component mul19
port (
in_mul19 : in std_logic_vector(7 downto 0);
out_mul19 : out std_logic_vector(7 downto 0)
);
end component;
-- 03
component mul03
port (
in_mul03 : in std_logic_vector(7 downto 0);
out_mul03 : out std_logic_vector(7 downto 0)
);
end component;
-- declaring internal signals
signal m0,m1,m2,m3,m4,m5,m6,m7,m8,m9,m10,m11,m12,m13,m14,m15 : std_logic_vector(7 downto 0);
signal s00,s01,s02,s03,s10,s11,s12,s13 : std_logic_vector(7 downto 0);
signal m0_01,m1_a4,m2_55,m3_87,m4_5a,m5_58,m6_db,m7_9e,
m0_a4,m1_56,m2_82,m3_f3,m4_1e,m5_c6,m6_68,m7_e5,
m0_02,m1_a1,m2_fc,m3_c1,m4_47,m5_ae,m6_3d,m7_19,
m0_a4_1,m1_55,m2_87,m3_5a,m4_58,m5_db,m6_9e,m7_03 : std_logic_vector(7 downto 0);
signal m8_01,m9_a4,m10_55,m11_87,m12_5a,m13_58,m14_db,m15_9e,
m8_a4,m9_56,m10_82,m11_f3,m12_1e,m13_c6,m14_68,m15_e5,
m8_02,m9_a1,m10_fc,m11_c1,m12_47,m13_ae,m14_3d,m15_19,
m8_a4_1,m9_55,m10_87,m11_5a,m12_58,m13_db,m14_9e,m15_03 : std_logic_vector(7 downto 0);
-- begin architecture description
begin
-- first, we separate the input to the respective m
-- for s1,j j=0..3
m0 <= in_rs128(7 downto 0);
m1 <= in_rs128(15 downto 8);
m2 <= in_rs128(23 downto 16);
m3 <= in_rs128(31 downto 24);
m4 <= in_rs128(39 downto 32);
m5 <= in_rs128(47 downto 40);
m6 <= in_rs128(55 downto 48);
m7 <= in_rs128(63 downto 56);
-- for s0,j j=0..3
m8 <= in_rs128(71 downto 64);
m9 <= in_rs128(79 downto 72);
m10 <= in_rs128(87 downto 80);
m11 <= in_rs128(95 downto 88);
m12 <= in_rs128(103 downto 96);
m13 <= in_rs128(111 downto 104);
m14 <= in_rs128(119 downto 112);
m15 <= in_rs128(127 downto 120);
-- after separating signals, we drive them to multipliers
-- the first line of m0..7 forms s00
m0_with_01: mul01
port map (
in_mul01 => m0,
out_mul01 => m0_01
);
m1_with_a4: mula4
port map (
in_mula4 => m1,
out_mula4 => m1_a4
);
m2_with_55: mul55
port map (
in_mul55 => m2,
out_mul55 => m2_55
);
m3_with_87: mul87
port map (
in_mul87 => m3,
out_mul87 => m3_87
);
m4_with_5a: mul5a
port map (
in_mul5a => m4,
out_mul5a => m4_5a
);
m5_with_58: mul58
port map (
in_mul58 => m5,
out_mul58 => m5_58
);
m6_with_db: muldb
port map (
in_muldb => m6,
out_muldb => m6_db
);
m7_with_9e: mul9e
port map (
in_mul9e => m7,
out_mul9e => m7_9e
);
-- the second row creates s01
m0_with_a4: mula4
port map (
in_mula4 => m0,
out_mula4 => m0_a4
);
m1_with_56: mul56
port map (
in_mul56 => m1,
out_mul56 => m1_56
);
m2_with_82: mul82
port map (
in_mul82 => m2,
out_mul82 => m2_82
);
m3_with_f3: mulf3
port map (
in_mulf3 => m3,
out_mulf3 => m3_f3
);
m4_with_1e: mul1e
port map (
in_mul1e => m4,
out_mul1e => m4_1e
);
m5_with_c6: mulc6
port map (
in_mulc6 => m5,
out_mulc6 => m5_c6
);
m6_with_68: mul68
port map (
in_mul68 => m6,
out_mul68 => m6_68
);
m7_with_e5: mule5
port map (
in_mule5 => m7,
out_mule5 => m7_e5
);
-- the third row creates s02
m0_with_02: mul02
port map (
in_mul02 => m0,
out_mul02 => m0_02
);
m1_with_a1: mula1
port map (
in_mula1 => m1,
out_mula1 => m1_a1
);
m2_with_fc: mulfc
port map (
in_mulfc => m2,
out_mulfc => m2_fc
);
m3_with_c1: mulc1
port map (
in_mulc1 => m3,
out_mulc1 => m3_c1
);
m4_with_47: mul47
port map (
in_mul47 => m4,
out_mul47 => m4_47
);
m5_with_ae: mulae
port map (
in_mulae => m5,
out_mulae => m5_ae
);
m6_with_3d: mul3d
port map (
in_mul3d => m6,
out_mul3d => m6_3d
);
m7_with_19: mul19
port map (
in_mul19 => m7,
out_mul19 => m7_19
);
-- the fourth row creates s03
m0_with_a4_1: mula4
port map (
in_mula4 => m0,
out_mula4 => m0_a4_1
);
m1_with_55: mul55
port map (
in_mul55 => m1,
out_mul55 => m1_55
);
m2_with_87: mul87
port map (
in_mul87 => m2,
out_mul87 => m2_87
);
m3_with_5a: mul5a
port map (
in_mul5a => m3,
out_mul5a => m3_5a
);
m4_with_58: mul58
port map (
in_mul58 => m4,
out_mul58 => m4_58
);
m5_with_db: muldb
port map (
in_muldb => m5,
out_muldb => m5_db
);
m6_with_9e: mul9e
port map (
in_mul9e => m6,
out_mul9e => m6_9e
);
m7_with_03: mul03
port map (
in_mul03 => m7,
out_mul03 => m7_03
);
-- we create the s1,j j=0..3
-- the first row of m0..7 creates the s10
m8_with_01: mul01
port map (
in_mul01 => m8,
out_mul01 => m8_01
);
m9_with_a4: mula4
port map (
in_mula4 => m9,
out_mula4 => m9_a4
);
m10_with_55: mul55
port map (
in_mul55 => m10,
out_mul55 => m10_55
);
m11_with_87: mul87
port map (
in_mul87 => m11,
out_mul87 => m11_87
);
m12_with_5a: mul5a
port map (
in_mul5a => m12,
out_mul5a => m12_5a
);
m13_with_58: mul58
port map (
in_mul58 => m13,
out_mul58 => m13_58
);
m14_with_db: muldb
port map (
in_muldb => m14,
out_muldb => m14_db
);
m15_with_9e: mul9e
port map (
in_mul9e => m15,
out_mul9e => m15_9e
);
-- the second row creates s11
m8_with_a4: mula4
port map (
in_mula4 => m8,
out_mula4 => m8_a4
);
m9_with_56: mul56
port map (
in_mul56 => m9,
out_mul56 => m9_56
);
m10_with_82: mul82
port map (
in_mul82 => m10,
out_mul82 => m10_82
);
m11_with_f3: mulf3
port map (
in_mulf3 => m11,
out_mulf3 => m11_f3
);
m12_with_1e: mul1e
port map (
in_mul1e => m12,
out_mul1e => m12_1e
);
m13_with_c6: mulc6
port map (
in_mulc6 => m13,
out_mulc6 => m13_c6
);
m14_with_68: mul68
port map (
in_mul68 => m14,
out_mul68 => m14_68
);
m15_with_e5: mule5
port map (
in_mule5 => m15,
out_mule5 => m15_e5
);
-- the third row creates s12
m8_with_02: mul02
port map (
in_mul02 => m8,
out_mul02 => m8_02
);
m9_with_a1: mula1
port map (
in_mula1 => m9,
out_mula1 => m9_a1
);
m10_with_fc: mulfc
port map (
in_mulfc => m10,
out_mulfc => m10_fc
);
m11_with_c1: mulc1
port map (
in_mulc1 => m11,
out_mulc1 => m11_c1
);
m12_with_47: mul47
port map (
in_mul47 => m12,
out_mul47 => m12_47
);
m13_with_ae: mulae
port map (
in_mulae => m13,
out_mulae => m13_ae
);
m14_with_3d: mul3d
port map (
in_mul3d => m14,
out_mul3d => m14_3d
);
m15_with_19: mul19
port map (
in_mul19 => m15,
out_mul19 => m15_19
);
-- the fourth row creates s13
m8_with_a4_1: mula4
port map (
in_mula4 => m8,
out_mula4 => m8_a4_1
);
m9_with_55: mul55
port map (
in_mul55 => m9,
out_mul55 => m9_55
);
m10_with_87: mul87
port map (
in_mul87 => m10,
out_mul87 => m10_87
);
m11_with_5a: mul5a
port map (
in_mul5a => m11,
out_mul5a => m11_5a
);
m12_with_58: mul58
port map (
in_mul58 => m12,
out_mul58 => m12_58
);
m13_with_db: muldb
port map (
in_muldb => m13,
out_muldb => m13_db
);
m14_with_9e: mul9e
port map (
in_mul9e => m14,
out_mul9e => m14_9e
);
m15_with_03: mul03
port map (
in_mul03 => m15,
out_mul03 => m15_03
);
-- after getting the results from multipliers
-- we combine them in order to get the additions
s00 <= m0_01 XOR m1_a4 XOR m2_55 XOR m3_87 XOR m4_5a XOR m5_58 XOR m6_db XOR m7_9e;
s01 <= m0_a4 XOR m1_56 XOR m2_82 XOR m3_f3 XOR m4_1e XOR m5_c6 XOR m6_68 XOR m7_e5;
s02 <= m0_02 XOR m1_a1 XOR m2_fc XOR m3_c1 XOR m4_47 XOR m5_ae XOR m6_3d XOR m7_19;
s03 <= m0_a4_1 XOR m1_55 XOR m2_87 XOR m3_5a XOR m4_58 XOR m5_db XOR m6_9e XOR m7_03;
-- after creating s0,j j=0...3 we form the S0
-- little endian
out_Sfirst_rs128 <= s03 & s02 & s01 & s00;
s10 <= m8_01 XOR m9_a4 XOR m10_55 XOR m11_87 XOR m12_5a XOR m13_58 XOR m14_db XOR m15_9e;
s11 <= m8_a4 XOR m9_56 XOR m10_82 XOR m11_f3 XOR m12_1e XOR m13_c6 XOR m14_68 XOR m15_e5;
s12 <= m8_02 XOR m9_a1 XOR m10_fc XOR m11_c1 XOR m12_47 XOR m13_ae XOR m14_3d XOR m15_19;
s13 <= m8_a4_1 XOR m9_55 XOR m10_87 XOR m11_5a XOR m12_58 XOR m13_db XOR m14_9e XOR m15_03;
-- after creating s1,j j=0...3 we form the S1
-- little endian
out_Ssecond_rs128 <= s13 & s12 & s11 & s10;
end rs_128_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- h function for 128 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity h_128 is
port (
in_h128 : in std_logic_vector(7 downto 0);
Mfirst_h128,
Msecond_h128 : in std_logic_vector(31 downto 0);
out_h128 : out std_logic_vector(31 downto 0)
);
end h_128;
architecture h128_arch of h_128 is
-- we declare internal signals
signal from_first_row,
to_second_row,
from_second_row,
to_third_row,
to_mds : std_logic_vector(31 downto 0);
-- we declare all components needed
component q0
port (
in_q0 : in std_logic_vector(7 downto 0);
out_q0 : out std_logic_vector(7 downto 0)
);
end component;
component q1
port (
in_q1 : in std_logic_vector(7 downto 0);
out_q1 : out std_logic_vector(7 downto 0)
);
end component;
component mds
port (
y0,
y1,
y2,
y3 : in std_logic_vector(7 downto 0);
z0,
z1,
z2,
z3 : out std_logic_vector(7 downto 0)
);
end component;
-- begin architecture description
begin
-- first row of q
first_q0_1: q0
port map (
in_q0 => in_h128,
out_q0 => from_first_row(7 downto 0)
);
first_q1_1: q1
port map (
in_q1 => in_h128,
out_q1 => from_first_row(15 downto 8)
);
first_q0_2: q0
port map (
in_q0 => in_h128,
out_q0 => from_first_row(23 downto 16)
);
first_q1_2: q1
port map (
in_q1 => in_h128,
out_q1 => from_first_row(31 downto 24)
);
-- we perform the XOR of the results of the first row
-- with first M of h (Mfist_h128)
to_second_row <= from_first_row XOR Mfirst_h128;
-- second row of q
second_q0_1: q0
port map (
in_q0 => to_second_row(7 downto 0),
out_q0 => from_second_row(7 downto 0)
);
second_q0_2: q0
port map (
in_q0 => to_second_row(15 downto 8),
out_q0 => from_second_row(15 downto 8)
);
second_q1_1: q1
port map (
in_q1 => to_second_row(23 downto 16),
out_q1 => from_second_row(23 downto 16)
);
second_q1_2: q1
port map (
in_q1 => to_second_row(31 downto 24),
out_q1 => from_second_row(31 downto 24)
);
-- we perform the second XOR
to_third_row <= from_second_row XOR Msecond_h128;
-- the third row of q
third_q1_1: q1
port map (
in_q1 => to_third_row(7 downto 0),
out_q1 => to_mds(7 downto 0)
);
third_q0_1: q0
port map (
in_q0 => to_third_row(15 downto 8),
out_q0 => to_mds(15 downto 8)
);
third_q1_2: q1
port map (
in_q1 => to_third_row(23 downto 16),
out_q1 => to_mds(23 downto 16)
);
third_q0_2: q0
port map (
in_q0 => to_third_row(31 downto 24),
out_q0 => to_mds(31 downto 24)
);
-- mds table
mds_table: mds
port map (
y0 => to_mds(7 downto 0),
y1 => to_mds(15 downto 8),
y2 => to_mds(23 downto 16),
y3 => to_mds(31 downto 24),
z0 => out_h128(7 downto 0),
z1 => out_h128(15 downto 8),
z2 => out_h128(23 downto 16),
z3 => out_h128(31 downto 24)
);
end h128_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- g function for 128 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity g_128 is
port (
in_g128,
in_S0_g128,
in_S1_g128 : in std_logic_vector(31 downto 0);
out_g128 : out std_logic_vector(31 downto 0)
);
end g_128;
architecture g128_arch of g_128 is
-- we declare the internal signals
signal from_first_row,
to_second_row,
from_second_row,
to_third_row,
to_mds : std_logic_vector(31 downto 0);
component q0
port (
in_q0 : in std_logic_vector(7 downto 0);
out_q0 : out std_logic_vector(7 downto 0)
);
end component;
component q1
port (
in_q1 : in std_logic_vector(7 downto 0);
out_q1 : out std_logic_vector(7 downto 0)
);
end component;
component mds
port (
y0,
y1,
y2,
y3 : in std_logic_vector(7 downto 0);
z0,
z1,
z2,
z3 : out std_logic_vector(7 downto 0)
);
end component;
-- begin architecture description
begin
-- first row of q
first_q0_1: q0
port map (
in_q0 => in_g128(7 downto 0),
out_q0 => from_first_row(7 downto 0)
);
first_q1_1: q1
port map (
in_q1 => in_g128(15 downto 8),
out_q1 => from_first_row(15 downto 8)
);
first_q0_2: q0
port map (
in_q0 => in_g128(23 downto 16),
out_q0 => from_first_row(23 downto 16)
);
first_q1_2: q1
port map (
in_q1 => in_g128(31 downto 24),
out_q1 => from_first_row(31 downto 24)
);
-- we XOR the result of the first row
-- with the S0
to_second_row <= from_first_row XOR in_S0_g128;
-- second row of q
second_q0_1: q0
port map (
in_q0 => to_second_row(7 downto 0),
out_q0 => from_second_row(7 downto 0)
);
second_q0_2: q0
port map (
in_q0 => to_second_row(15 downto 8),
out_q0 => from_second_row(15 downto 8)
);
second_q1_1: q1
port map (
in_q1 => to_second_row(23 downto 16),
out_q1 => from_second_row(23 downto 16)
);
second_q1_2: q1
port map (
in_q1 => to_second_row(31 downto 24),
out_q1 => from_second_row(31 downto 24)
);
-- we perform the XOR
to_third_row <= from_second_row XOR in_S1_g128;
-- third row of q
third_q1_1: q1
port map (
in_q1 => to_third_row(7 downto 0),
out_q1 => to_mds(7 downto 0)
);
third_q0_1: q0
port map (
in_q0 => to_third_row(15 downto 8),
out_q0 => to_mds(15 downto 8)
);
third_q1_2: q1
port map (
in_q1 => to_third_row(23 downto 16),
out_q1 => to_mds(23 downto 16)
);
third_q0_2: q0
port map (
in_q0 => to_third_row(31 downto 24),
out_q0 => to_mds(31 downto 24)
);
-- mds table
mds_table: mds
port map (
y0 => to_mds(7 downto 0),
y1 => to_mds(15 downto 8),
y2 => to_mds(23 downto 16),
y3 => to_mds(31 downto 24),
z0 => out_g128(7 downto 0),
z1 => out_g128(15 downto 8),
z2 => out_g128(23 downto 16),
z3 => out_g128(31 downto 24)
);
end g128_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- f function with 128 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity f_128 is
port (
up_in_f128,
low_in_f128,
S0_in_f128,
S1_in_f128,
up_key_f128,
low_key_f128 : in std_logic_vector(31 downto 0);
up_out_f128,
low_out_f128 : out std_logic_vector(31 downto 0)
);
end f_128;
architecture f128_arch of f_128 is
-- we declare the internal signals
signal from_shift_8,
to_up_pht,
to_low_pht,
to_up_key,
to_low_key,
intermediate_carry1,
intermediate_carry2 : std_logic_vector(31 downto 0);
signal zero : std_logic;
component g_128
port (
in_g128,
in_S0_g128,
in_S1_g128 : in std_logic_vector(31 downto 0);
out_g128 : out std_logic_vector(31 downto 0)
);
end component;
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component adder
port (
in1_adder,
in2_adder,
in_carry_adder : in std_logic;
out_adder,
out_carry_adder : out std_logic
);
end component;
-- begin architecture description
begin
-- we initialize zero
zero <= '0';
-- upper g_128
upper_g128: g_128
port map (
in_g128 => up_in_f128,
in_S0_g128 => S0_in_f128,
in_S1_g128 => S1_in_f128,
out_g128 => to_up_pht
);
-- left rotation by 8
from_shift_8(31 downto 8) <= low_in_f128(23 downto 0);
from_shift_8(7 downto 0) <= low_in_f128(31 downto 24);
-- lower g128
lower_g128: g_128
port map (
in_g128 => from_shift_8,
in_S0_g128 => S0_in_f128,
in_S1_g128 => S1_in_f128,
out_g128 => to_low_pht
);
-- pht
pht_transform: pht
port map (
up_in_pht => to_up_pht,
down_in_pht => to_low_pht,
up_out_pht => to_up_key,
down_out_pht => to_low_key
);
-- upper adder of 32 bits
up_adder: for i in 0 to 31 generate
first: if (i=0) generate
the_adder: adder
port map (
in1_adder => to_up_key(0),
in2_adder => up_key_f128(0),
in_carry_adder => zero,
out_adder => up_out_f128(0),
out_carry_adder => intermediate_carry1(0)
);
end generate first;
the_rest: if (i>0) generate
the_adders: adder
port map (
in1_adder => to_up_key(i),
in2_adder => up_key_f128(i),
in_carry_adder => intermediate_carry1(i-1),
out_adder => up_out_f128(i),
out_carry_adder => intermediate_carry1(i)
);
end generate the_rest;
end generate up_adder;
-- lower adder of 32 bits
low_adder: for i in 0 to 31 generate
first1: if (i=0) generate
the_adder1:adder
port map (
in1_adder => to_low_key(0),
in2_adder => low_key_f128(0),
in_carry_adder => zero,
out_adder => low_out_f128(0),
out_carry_adder => intermediate_carry2(0)
);
end generate first1;
the_rest1: if (i>0) generate
the_adders1: adder
port map (
in1_adder => to_low_key(i),
in2_adder => low_key_f128(i),
in_carry_adder => intermediate_carry2(i-1),
out_adder => low_out_f128(i),
out_carry_adder => intermediate_carry2(i)
);
end generate the_rest1;
end generate low_adder;
end f128_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish key scheduler for 128 bits key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_keysched128 is
port (
odd_in_tk128,
even_in_tk128 : in std_logic_vector(7 downto 0);
in_key_tk128 : in std_logic_vector(127 downto 0);
out_key_up_tk128,
out_key_down_tk128 : out std_logic_vector(31 downto 0)
);
end twofish_keysched128;
architecture twofish_keysched128_arch of twofish_keysched128 is
-- we declare internal signals
signal to_up_pht,
to_shift_8,
from_shift_8,
to_shift_9,
M0, M1, M2, M3 : std_logic_vector(31 downto 0);
signal byte0, byte1, byte2, byte3,
byte4, byte5, byte6, byte7,
byte8, byte9, byte10, byte11,
byte12, byte13, byte14, byte15 : std_logic_vector(7 downto 0);
-- we declare the components to be used
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component h_128
port (
in_h128 : in std_logic_vector(7 downto 0);
Mfirst_h128,
Msecond_h128 : in std_logic_vector(31 downto 0);
out_h128 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we assign the input signal to the respective
-- bytes as is described in the prototype
byte15 <= in_key_tk128(7 downto 0);
byte14 <= in_key_tk128(15 downto 8);
byte13 <= in_key_tk128(23 downto 16);
byte12 <= in_key_tk128(31 downto 24);
byte11 <= in_key_tk128(39 downto 32);
byte10 <= in_key_tk128(47 downto 40);
byte9 <= in_key_tk128(55 downto 48);
byte8 <= in_key_tk128(63 downto 56);
byte7 <= in_key_tk128(71 downto 64);
byte6 <= in_key_tk128(79 downto 72);
byte5 <= in_key_tk128(87 downto 80);
byte4 <= in_key_tk128(95 downto 88);
byte3 <= in_key_tk128(103 downto 96);
byte2 <= in_key_tk128(111 downto 104);
byte1 <= in_key_tk128(119 downto 112);
byte0 <= in_key_tk128(127 downto 120);
-- we form the M{0..3}
M0 <= byte3 & byte2 & byte1 & byte0;
M1 <= byte7 & byte6 & byte5 & byte4;
M2 <= byte11 & byte10 & byte9 & byte8;
M3 <= byte15 & byte14 & byte13 & byte12;
-- upper h
upper_h: h_128
port map (
in_h128 => even_in_tk128,
Mfirst_h128 => M2,
Msecond_h128 => M0,
out_h128 => to_up_pht
);
-- lower h
lower_h: h_128
port map (
in_h128 => odd_in_tk128,
Mfirst_h128 => M3,
Msecond_h128 => M1,
out_h128 => to_shift_8
);
-- left rotate by 8
from_shift_8(31 downto 8) <= to_shift_8(23 downto 0);
from_shift_8(7 downto 0) <= to_shift_8(31 downto 24);
-- pht transformation
pht_transform: pht
port map (
up_in_pht => to_up_pht,
down_in_pht => from_shift_8,
up_out_pht => out_key_up_tk128,
down_out_pht => to_shift_9
);
-- left rotate by 9
out_key_down_tk128(31 downto 9) <= to_shift_9(22 downto 0);
out_key_down_tk128(8 downto 0) <= to_shift_9(31 downto 23);
end twofish_keysched128_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish S key component for 128 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_S128 is
port (
in_key_ts128 : in std_logic_vector(127 downto 0);
out_Sfirst_ts128,
out_Ssecond_ts128 : out std_logic_vector(31 downto 0)
);
end twofish_S128;
architecture twofish_S128_arch of twofish_S128 is
-- we declare the components to be used
component reed_solomon128
port (
in_rs128 : in std_logic_vector(127 downto 0);
out_Sfirst_rs128,
out_Ssecond_rs128 : out std_logic_vector(31 downto 0)
);
end component;
signal twofish_key : std_logic_vector(127 downto 0);
signal byte15, byte14, byte13, byte12, byte11, byte10,
byte9, byte8, byte7, byte6, byte5, byte4,
byte3, byte2, byte1, byte0 : std_logic_vector(7 downto 0);
-- begin architecture description
begin
-- splitting the input
byte15 <= in_key_ts128(7 downto 0);
byte14 <= in_key_ts128(15 downto 8);
byte13 <= in_key_ts128(23 downto 16);
byte12 <= in_key_ts128(31 downto 24);
byte11 <= in_key_ts128(39 downto 32);
byte10 <= in_key_ts128(47 downto 40);
byte9 <= in_key_ts128(55 downto 48);
byte8 <= in_key_ts128(63 downto 56);
byte7 <= in_key_ts128(71 downto 64);
byte6 <= in_key_ts128(79 downto 72);
byte5 <= in_key_ts128(87 downto 80);
byte4 <= in_key_ts128(95 downto 88);
byte3 <= in_key_ts128(103 downto 96);
byte2 <= in_key_ts128(111 downto 104);
byte1 <= in_key_ts128(119 downto 112);
byte0 <= in_key_ts128(127 downto 120);
-- forming the key
twofish_key <= byte15 & byte14 & byte13 & byte12 & byte11 & byte10 & byte9 & byte8 & byte7 &
byte6 & byte5 & byte4 & byte3 & byte2 & byte1 & byte0;
-- the keys S0,1
produce_S0_S1: reed_solomon128
port map (
in_rs128 => twofish_key,
out_Sfirst_rs128 => out_Sfirst_ts128,
out_Ssecond_rs128 => out_Ssecond_ts128
);
end twofish_S128_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish whitening key scheduler for 128 bits key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_whit_keysched128 is
port (
in_key_twk128 : in std_logic_vector(127 downto 0);
out_K0_twk128,
out_K1_twk128,
out_K2_twk128,
out_K3_twk128,
out_K4_twk128,
out_K5_twk128,
out_K6_twk128,
out_K7_twk128 : out std_logic_vector(31 downto 0)
);
end twofish_whit_keysched128;
architecture twofish_whit_keysched128_arch of twofish_whit_keysched128 is
-- we declare internal signals
signal to_up_pht_1,
to_shift_8_1,
from_shift_8_1,
to_shift_9_1,
to_up_pht_2,
to_shift_8_2,
from_shift_8_2,
to_shift_9_2,
to_up_pht_3,
to_shift_8_3,
from_shift_8_3,
to_shift_9_3,
to_up_pht_4,
to_shift_8_4,
from_shift_8_4,
to_shift_9_4,
M0, M1, M2, M3 : std_logic_vector(31 downto 0);
signal byte0, byte1, byte2, byte3,
byte4, byte5, byte6, byte7,
byte8, byte9, byte10, byte11,
byte12, byte13, byte14, byte15 : std_logic_vector(7 downto 0);
signal zero, one, two, three, four, five, six, seven : std_logic_vector(7 downto 0);
-- we declare the components to be used
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component h_128
port (
in_h128 : in std_logic_vector(7 downto 0);
Mfirst_h128,
Msecond_h128 : in std_logic_vector(31 downto 0);
out_h128 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we produce the first eight numbers
zero <= "00000000";
one <= "00000001";
two <= "00000010";
three <= "00000011";
four <= "00000100";
five <= "00000101";
six <= "00000110";
seven <= "00000111";
-- we assign the input signal to the respective
-- bytes as is described in the prototype
byte15 <= in_key_twk128(7 downto 0);
byte14 <= in_key_twk128(15 downto 8);
byte13 <= in_key_twk128(23 downto 16);
byte12 <= in_key_twk128(31 downto 24);
byte11 <= in_key_twk128(39 downto 32);
byte10 <= in_key_twk128(47 downto 40);
byte9 <= in_key_twk128(55 downto 48);
byte8 <= in_key_twk128(63 downto 56);
byte7 <= in_key_twk128(71 downto 64);
byte6 <= in_key_twk128(79 downto 72);
byte5 <= in_key_twk128(87 downto 80);
byte4 <= in_key_twk128(95 downto 88);
byte3 <= in_key_twk128(103 downto 96);
byte2 <= in_key_twk128(111 downto 104);
byte1 <= in_key_twk128(119 downto 112);
byte0 <= in_key_twk128(127 downto 120);
-- we form the M{0..3}
M0 <= byte3 & byte2 & byte1 & byte0;
M1 <= byte7 & byte6 & byte5 & byte4;
M2 <= byte11 & byte10 & byte9 & byte8;
M3 <= byte15 & byte14 & byte13 & byte12;
-- we produce the keys for the whitening steps
-- keys K0,1
-- upper h
upper_h1: h_128
port map (
in_h128 => zero,
Mfirst_h128 => M2,
Msecond_h128 => M0,
out_h128 => to_up_pht_1
);
-- lower h
lower_h1: h_128
port map (
in_h128 => one,
Mfirst_h128 => M3,
Msecond_h128 => M1,
out_h128 => to_shift_8_1
);
-- left rotate by 8
from_shift_8_1(31 downto 8) <= to_shift_8_1(23 downto 0);
from_shift_8_1(7 downto 0) <= to_shift_8_1(31 downto 24);
-- pht transformation
pht_transform1: pht
port map (
up_in_pht => to_up_pht_1,
down_in_pht => from_shift_8_1,
up_out_pht => out_K0_twk128,
down_out_pht => to_shift_9_1
);
-- left rotate by 9
out_K1_twk128(31 downto 9) <= to_shift_9_1(22 downto 0);
out_K1_twk128(8 downto 0) <= to_shift_9_1(31 downto 23);
-- keys K2,3
-- upper h
upper_h2: h_128
port map (
in_h128 => two,
Mfirst_h128 => M2,
Msecond_h128 => M0,
out_h128 => to_up_pht_2
);
-- lower h
lower_h2: h_128
port map (
in_h128 => three,
Mfirst_h128 => M3,
Msecond_h128 => M1,
out_h128 => to_shift_8_2
);
-- left rotate by 8
from_shift_8_2(31 downto 8) <= to_shift_8_2(23 downto 0);
from_shift_8_2(7 downto 0) <= to_shift_8_2(31 downto 24);
-- pht transformation
pht_transform2: pht
port map (
up_in_pht => to_up_pht_2,
down_in_pht => from_shift_8_2,
up_out_pht => out_K2_twk128,
down_out_pht => to_shift_9_2
);
-- left rotate by 9
out_K3_twk128(31 downto 9) <= to_shift_9_2(22 downto 0);
out_K3_twk128(8 downto 0) <= to_shift_9_2(31 downto 23);
-- keys K4,5
-- upper h
upper_h3: h_128
port map (
in_h128 => four,
Mfirst_h128 => M2,
Msecond_h128 => M0,
out_h128 => to_up_pht_3
);
-- lower h
lower_h3: h_128
port map (
in_h128 => five,
Mfirst_h128 => M3,
Msecond_h128 => M1,
out_h128 => to_shift_8_3
);
-- left rotate by 8
from_shift_8_3(31 downto 8) <= to_shift_8_3(23 downto 0);
from_shift_8_3(7 downto 0) <= to_shift_8_3(31 downto 24);
-- pht transformation
pht_transform3: pht
port map (
up_in_pht => to_up_pht_3,
down_in_pht => from_shift_8_3,
up_out_pht => out_K4_twk128,
down_out_pht => to_shift_9_3
);
-- left rotate by 9
out_K5_twk128(31 downto 9) <= to_shift_9_3(22 downto 0);
out_K5_twk128(8 downto 0) <= to_shift_9_3(31 downto 23);
-- keys K6,7
-- upper h
upper_h4: h_128
port map (
in_h128 => six,
Mfirst_h128 => M2,
Msecond_h128 => M0,
out_h128 => to_up_pht_4
);
-- lower h
lower_h4: h_128
port map (
in_h128 => seven,
Mfirst_h128 => M3,
Msecond_h128 => M1,
out_h128 => to_shift_8_4
);
-- left rotate by 8
from_shift_8_4(31 downto 8) <= to_shift_8_4(23 downto 0);
from_shift_8_4(7 downto 0) <= to_shift_8_4(31 downto 24);
-- pht transformation
pht_transform4: pht
port map (
up_in_pht => to_up_pht_4,
down_in_pht => from_shift_8_4,
up_out_pht => out_K6_twk128,
down_out_pht => to_shift_9_4
);
-- left rotate by 9
out_K7_twk128(31 downto 9) <= to_shift_9_4(22 downto 0);
out_K7_twk128(8 downto 0) <= to_shift_9_4(31 downto 23);
end twofish_whit_keysched128_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish encryption round with 128 bit key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_encryption_round128 is
port (
in1_ter128,
in2_ter128,
in3_ter128,
in4_ter128,
in_Sfirst_ter128,
in_Ssecond_ter128,
in_key_up_ter128,
in_key_down_ter128 : in std_logic_vector(31 downto 0);
out1_ter128,
out2_ter128,
out3_ter128,
out4_ter128 : out std_logic_vector(31 downto 0)
);
end twofish_encryption_round128;
architecture twofish_encryption_round128_arch of twofish_encryption_round128 is
-- we declare internal signals
signal to_left_shift,
from_right_shift,
to_xor_with3,
to_xor_with4 : std_logic_vector(31 downto 0);
component f_128
port (
up_in_f128,
low_in_f128,
S0_in_f128,
S1_in_f128,
up_key_f128,
low_key_f128 : in std_logic_vector(31 downto 0);
up_out_f128,
low_out_f128 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we declare f_128
function_f: f_128
port map (
up_in_f128 => in1_ter128,
low_in_f128 => in2_ter128,
S0_in_f128 => in_Sfirst_ter128,
S1_in_f128 => in_Ssecond_ter128,
up_key_f128 => in_key_up_ter128,
low_key_f128 => in_key_down_ter128,
up_out_f128 => to_xor_with3,
low_out_f128 => to_xor_with4
);
-- we perform the exchange
-- in1_ter128 -> out3_ter128
-- in2_ter128 -> out4_ter128
-- in3_ter128 -> out1_ter128
-- in4_ter128 -> out2_ter128
-- we perform the left xor between the upper f function and
-- the third input (input 3)
to_left_shift <= to_xor_with3 XOR in3_ter128;
-- we perform the left side rotation to the right by 1 and
-- we perform the exchange too
out1_ter128(30 downto 0) <= to_left_shift(31 downto 1);
out1_ter128(31) <= to_left_shift(0);
-- we perform the right side rotation to the left by 1
from_right_shift(0) <= in4_ter128(31);
from_right_shift(31 downto 1) <= in4_ter128(30 downto 0);
-- we perform the right xor between the lower f function and
-- the fourth input (input 4)
out2_ter128 <= from_right_shift XOR to_xor_with4;
-- we perform the last exchanges
out3_ter128 <= in1_ter128;
out4_ter128 <= in2_ter128;
end twofish_encryption_round128_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish decryption round with 128 bit key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_decryption_round128 is
port (
in1_tdr128,
in2_tdr128,
in3_tdr128,
in4_tdr128,
in_Sfirst_tdr128,
in_Ssecond_tdr128,
in_key_up_tdr128,
in_key_down_tdr128 : in std_logic_vector(31 downto 0);
out1_tdr128,
out2_tdr128,
out3_tdr128,
out4_tdr128 : out std_logic_vector(31 downto 0)
);
end twofish_decryption_round128;
architecture twofish_decryption_round128_arch of twofish_decryption_round128 is
signal to_xor_with3,
to_xor_with4,
to_xor_with_up_f,
from_xor_with_down_f : std_logic_vector(31 downto 0);
component f_128
port (
up_in_f128,
low_in_f128,
S0_in_f128,
S1_in_f128,
up_key_f128,
low_key_f128 : in std_logic_vector(31 downto 0);
up_out_f128,
low_out_f128 : out std_logic_vector(31 downto 0)
);
end component;
begin
-- we instantiate f function
function_f: f_128
port map (
up_in_f128 => in1_tdr128,
low_in_f128 => in2_tdr128,
S0_in_f128 => in_Sfirst_tdr128,
S1_in_f128 => in_Ssecond_tdr128,
up_key_f128 => in_key_up_tdr128,
low_key_f128 => in_key_down_tdr128,
up_out_f128 => to_xor_with3,
low_out_f128 => to_xor_with4
);
-- output 1: input3 with upper f
-- we first rotate the input3 by 1 bit leftwise
to_xor_with_up_f(0) <= in3_tdr128(31);
to_xor_with_up_f(31 downto 1) <= in3_tdr128(30 downto 0);
-- we perform the XOR with the upper output of f and the result
-- is ouput 1
out1_tdr128 <= to_xor_with_up_f XOR to_xor_with3;
-- output 2: input4 with lower f
-- we perform the XOR with the lower output of f
from_xor_with_down_f <= in4_tdr128 XOR to_xor_with4;
-- we perform the rotation by 1 bit rightwise and the result
-- is output2
out2_tdr128(31) <= from_xor_with_down_f(0);
out2_tdr128(30 downto 0) <= from_xor_with_down_f(31 downto 1);
-- we assign outputs 3 and 4
out3_tdr128 <= in1_tdr128;
out4_tdr128 <= in2_tdr128;
end twofish_decryption_round128_arch;
-- ============================================== --
-- ============================================== --
-- --
-- third part: 192 key input dependent components --
-- --
-- ============================================== --
-- ============================================== --
--
-- reed solomon for 192bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity reed_solomon192 is
port (
in_rs192 : in std_logic_vector(191 downto 0);
out_Sfirst_rs192,
out_Ssecond_rs192,
out_Sthird_rs192 : out std_logic_vector(31 downto 0)
);
end reed_solomon192;
architecture rs_192_arch of reed_solomon192 is
-- declaring all components necessary for reed solomon
-- 01
component mul01
port (
in_mul01 : in std_logic_vector(7 downto 0);
out_mul01 : out std_logic_vector(7 downto 0)
);
end component;
-- a4
component mula4
port (
in_mula4 : in std_logic_vector(7 downto 0);
out_mula4 : out std_logic_vector(7 downto 0)
);
end component;
-- 55
component mul55
port (
in_mul55 : in std_logic_vector(7 downto 0);
out_mul55 : out std_logic_vector(7 downto 0)
);
end component;
-- 87
component mul87
port (
in_mul87 : in std_logic_vector(7 downto 0);
out_mul87 : out std_logic_vector(7 downto 0)
);
end component;
-- 5a
component mul5a
port (
in_mul5a : in std_logic_vector(7 downto 0);
out_mul5a : out std_logic_vector(7 downto 0)
);
end component;
-- 58
component mul58
port (
in_mul58 : in std_logic_vector(7 downto 0);
out_mul58 : out std_logic_vector(7 downto 0)
);
end component;
-- db
component muldb
port (
in_muldb : in std_logic_vector(7 downto 0);
out_muldb : out std_logic_vector(7 downto 0)
);
end component;
-- 9e
component mul9e
port (
in_mul9e : in std_logic_vector(7 downto 0);
out_mul9e : out std_logic_vector(7 downto 0)
);
end component;
-- 56
component mul56
port (
in_mul56 : in std_logic_vector(7 downto 0);
out_mul56 : out std_logic_vector(7 downto 0)
);
end component;
-- 82
component mul82
port (
in_mul82 : in std_logic_vector(7 downto 0);
out_mul82 : out std_logic_vector(7 downto 0)
);
end component;
-- f3
component mulf3
port (
in_mulf3 : in std_logic_vector(7 downto 0);
out_mulf3 : out std_logic_vector(7 downto 0)
);
end component;
-- 1e
component mul1e
port (
in_mul1e : in std_logic_vector(7 downto 0);
out_mul1e : out std_logic_vector(7 downto 0)
);
end component;
-- c6
component mulc6
port (
in_mulc6 : in std_logic_vector(7 downto 0);
out_mulc6 : out std_logic_vector(7 downto 0)
);
end component;
-- 68
component mul68
port (
in_mul68 : in std_logic_vector(7 downto 0);
out_mul68 : out std_logic_vector(7 downto 0)
);
end component;
-- e5
component mule5
port (
in_mule5 : in std_logic_vector(7 downto 0);
out_mule5 : out std_logic_vector(7 downto 0)
);
end component;
-- 02
component mul02
port (
in_mul02 : in std_logic_vector(7 downto 0);
out_mul02 : out std_logic_vector(7 downto 0)
);
end component;
-- a1
component mula1
port (
in_mula1 : in std_logic_vector(7 downto 0);
out_mula1 : out std_logic_vector(7 downto 0)
);
end component;
-- fc
component mulfc
port (
in_mulfc : in std_logic_vector(7 downto 0);
out_mulfc : out std_logic_vector(7 downto 0)
);
end component;
-- c1
component mulc1
port (
in_mulc1 : in std_logic_vector(7 downto 0);
out_mulc1 : out std_logic_vector(7 downto 0)
);
end component;
-- 47
component mul47
port (
in_mul47 : in std_logic_vector(7 downto 0);
out_mul47 : out std_logic_vector(7 downto 0)
);
end component;
-- ae
component mulae
port (
in_mulae : in std_logic_vector(7 downto 0);
out_mulae : out std_logic_vector(7 downto 0)
);
end component;
-- 3d
component mul3d
port (
in_mul3d : in std_logic_vector(7 downto 0);
out_mul3d : out std_logic_vector(7 downto 0)
);
end component;
-- 19
component mul19
port (
in_mul19 : in std_logic_vector(7 downto 0);
out_mul19 : out std_logic_vector(7 downto 0)
);
end component;
-- 03
component mul03
port (
in_mul03 : in std_logic_vector(7 downto 0);
out_mul03 : out std_logic_vector(7 downto 0)
);
end component;
-- declaring internal signals
signal m0,m1,m2,m3,m4,m5,m6,m7,m8,m9,m10,m11,m12,m13,m14,m15,
m16, m17, m18, m19, m20, m21, m22, m23 : std_logic_vector(7 downto 0);
signal s00,s01,s02,s03,s10,s11,s12,s13, s20, s21, s22, s23 : std_logic_vector(7 downto 0);
signal m0_01,m1_a4,m2_55,m3_87,m4_5a,m5_58,m6_db,m7_9e,
m0_a4,m1_56,m2_82,m3_f3,m4_1e,m5_c6,m6_68,m7_e5,
m0_02,m1_a1,m2_fc,m3_c1,m4_47,m5_ae,m6_3d,m7_19,
m0_a4_1,m1_55,m2_87,m3_5a,m4_58,m5_db,m6_9e,m7_03 : std_logic_vector(7 downto 0);
signal m8_01,m9_a4,m10_55,m11_87,m12_5a,m13_58,m14_db,m15_9e,
m8_a4,m9_56,m10_82,m11_f3,m12_1e,m13_c6,m14_68,m15_e5,
m8_02,m9_a1,m10_fc,m11_c1,m12_47,m13_ae,m14_3d,m15_19,
m8_a4_1,m9_55,m10_87,m11_5a,m12_58,m13_db,m14_9e,m15_03 : std_logic_vector(7 downto 0);
signal m16_01,m17_a4,m18_55,m19_87,m20_5a,m21_58,m22_db,m23_9e,
m16_a4,m17_56,m18_82,m19_f3,m20_1e,m21_c6,m22_68,m23_e5,
m16_02,m17_a1,m18_fc,m19_c1,m20_47,m21_ae,m22_3d,m23_19,
m16_a4_1,m17_55,m18_87,m19_5a,m20_58,m21_db,m22_9e,m23_03 : std_logic_vector(7 downto 0);
-- begin architecture description
begin
-- first, we separate the input to the respective m
-- for s0j j=0..3
m0 <= in_rs192(7 downto 0);
m1 <= in_rs192(15 downto 8);
m2 <= in_rs192(23 downto 16);
m3 <= in_rs192(31 downto 24);
m4 <= in_rs192(39 downto 32);
m5 <= in_rs192(47 downto 40);
m6 <= in_rs192(55 downto 48);
m7 <= in_rs192(63 downto 56);
-- for s1j j=0..3
m8 <= in_rs192(71 downto 64);
m9 <= in_rs192(79 downto 72);
m10 <= in_rs192(87 downto 80);
m11 <= in_rs192(95 downto 88);
m12 <= in_rs192(103 downto 96);
m13 <= in_rs192(111 downto 104);
m14 <= in_rs192(119 downto 112);
m15 <= in_rs192(127 downto 120);
-- for s2j j=0..3
m16 <= in_rs192(135 downto 128);
m17 <= in_rs192(143 downto 136);
m18 <= in_rs192(151 downto 144);
m19 <= in_rs192(159 downto 152);
m20 <= in_rs192(167 downto 160);
m21 <= in_rs192(175 downto 168);
m22 <= in_rs192(183 downto 176);
m23 <= in_rs192(191 downto 184);
-- after separating signals, we drive them to multipliers
-- the first line of m0..7 forms s00
m0_with_01: mul01
port map (
in_mul01 => m0,
out_mul01 => m0_01
);
m1_with_a4: mula4
port map (
in_mula4 => m1,
out_mula4 => m1_a4
);
m2_with_55: mul55
port map (
in_mul55 => m2,
out_mul55 => m2_55
);
m3_with_87: mul87
port map (
in_mul87 => m3,
out_mul87 => m3_87
);
m4_with_5a: mul5a
port map (
in_mul5a => m4,
out_mul5a => m4_5a
);
m5_with_58: mul58
port map (
in_mul58 => m5,
out_mul58 => m5_58
);
m6_with_db: muldb
port map (
in_muldb => m6,
out_muldb => m6_db
);
m7_with_9e: mul9e
port map (
in_mul9e => m7,
out_mul9e => m7_9e
);
-- the second row creates s01
m0_with_a4: mula4
port map (
in_mula4 => m0,
out_mula4 => m0_a4
);
m1_with_56: mul56
port map (
in_mul56 => m1,
out_mul56 => m1_56
);
m2_with_82: mul82
port map (
in_mul82 => m2,
out_mul82 => m2_82
);
m3_with_f3: mulf3
port map (
in_mulf3 => m3,
out_mulf3 => m3_f3
);
m4_with_1e: mul1e
port map (
in_mul1e => m4,
out_mul1e => m4_1e
);
m5_with_c6: mulc6
port map (
in_mulc6 => m5,
out_mulc6 => m5_c6
);
m6_with_68: mul68
port map (
in_mul68 => m6,
out_mul68 => m6_68
);
m7_with_e5: mule5
port map (
in_mule5 => m7,
out_mule5 => m7_e5
);
-- the third row creates s02
m0_with_02: mul02
port map (
in_mul02 => m0,
out_mul02 => m0_02
);
m1_with_a1: mula1
port map (
in_mula1 => m1,
out_mula1 => m1_a1
);
m2_with_fc: mulfc
port map (
in_mulfc => m2,
out_mulfc => m2_fc
);
m3_with_c1: mulc1
port map (
in_mulc1 => m3,
out_mulc1 => m3_c1
);
m4_with_47: mul47
port map (
in_mul47 => m4,
out_mul47 => m4_47
);
m5_with_ae: mulae
port map (
in_mulae => m5,
out_mulae => m5_ae
);
m6_with_3d: mul3d
port map (
in_mul3d => m6,
out_mul3d => m6_3d
);
m7_with_19: mul19
port map (
in_mul19 => m7,
out_mul19 => m7_19
);
-- the fourth row creates s03
m0_with_a4_1: mula4
port map (
in_mula4 => m0,
out_mula4 => m0_a4_1
);
m1_with_55: mul55
port map (
in_mul55 => m1,
out_mul55 => m1_55
);
m2_with_87: mul87
port map (
in_mul87 => m2,
out_mul87 => m2_87
);
m3_with_5a: mul5a
port map (
in_mul5a => m3,
out_mul5a => m3_5a
);
m4_with_58: mul58
port map (
in_mul58 => m4,
out_mul58 => m4_58
);
m5_with_db: muldb
port map (
in_muldb => m5,
out_muldb => m5_db
);
m6_with_9e: mul9e
port map (
in_mul9e => m6,
out_mul9e => m6_9e
);
m7_with_03: mul03
port map (
in_mul03 => m7,
out_mul03 => m7_03
);
-- we create the s1,j j=0..3
-- the first row of m8..15 creates the s10
m8_with_01: mul01
port map (
in_mul01 => m8,
out_mul01 => m8_01
);
m9_with_a4: mula4
port map (
in_mula4 => m9,
out_mula4 => m9_a4
);
m10_with_55: mul55
port map (
in_mul55 => m10,
out_mul55 => m10_55
);
m11_with_87: mul87
port map (
in_mul87 => m11,
out_mul87 => m11_87
);
m12_with_5a: mul5a
port map (
in_mul5a => m12,
out_mul5a => m12_5a
);
m13_with_58: mul58
port map (
in_mul58 => m13,
out_mul58 => m13_58
);
m14_with_db: muldb
port map (
in_muldb => m14,
out_muldb => m14_db
);
m15_with_9e: mul9e
port map (
in_mul9e => m15,
out_mul9e => m15_9e
);
-- the second row creates s11
m8_with_a4: mula4
port map (
in_mula4 => m8,
out_mula4 => m8_a4
);
m9_with_56: mul56
port map (
in_mul56 => m9,
out_mul56 => m9_56
);
m10_with_82: mul82
port map (
in_mul82 => m10,
out_mul82 => m10_82
);
m11_with_f3: mulf3
port map (
in_mulf3 => m11,
out_mulf3 => m11_f3
);
m12_with_1e: mul1e
port map (
in_mul1e => m12,
out_mul1e => m12_1e
);
m13_with_c6: mulc6
port map (
in_mulc6 => m13,
out_mulc6 => m13_c6
);
m14_with_68: mul68
port map (
in_mul68 => m14,
out_mul68 => m14_68
);
m15_with_e5: mule5
port map (
in_mule5 => m15,
out_mule5 => m15_e5
);
-- the third row creates s12
m8_with_02: mul02
port map (
in_mul02 => m8,
out_mul02 => m8_02
);
m9_with_a1: mula1
port map (
in_mula1 => m9,
out_mula1 => m9_a1
);
m10_with_fc: mulfc
port map (
in_mulfc => m10,
out_mulfc => m10_fc
);
m11_with_c1: mulc1
port map (
in_mulc1 => m11,
out_mulc1 => m11_c1
);
m12_with_47: mul47
port map (
in_mul47 => m12,
out_mul47 => m12_47
);
m13_with_ae: mulae
port map (
in_mulae => m13,
out_mulae => m13_ae
);
m14_with_3d: mul3d
port map (
in_mul3d => m14,
out_mul3d => m14_3d
);
m15_with_19: mul19
port map (
in_mul19 => m15,
out_mul19 => m15_19
);
-- the fourth row creates s13
m8_with_a4_1: mula4
port map (
in_mula4 => m8,
out_mula4 => m8_a4_1
);
m9_with_55: mul55
port map (
in_mul55 => m9,
out_mul55 => m9_55
);
m10_with_87: mul87
port map (
in_mul87 => m10,
out_mul87 => m10_87
);
m11_with_5a: mul5a
port map (
in_mul5a => m11,
out_mul5a => m11_5a
);
m12_with_58: mul58
port map (
in_mul58 => m12,
out_mul58 => m12_58
);
m13_with_db: muldb
port map (
in_muldb => m13,
out_muldb => m13_db
);
m14_with_9e: mul9e
port map (
in_mul9e => m14,
out_mul9e => m14_9e
);
m15_with_03: mul03
port map (
in_mul03 => m15,
out_mul03 => m15_03
);
-- we create the s2,j j=0..3
-- the first row of m16..23 creates the s20
m16_with_01: mul01
port map (
in_mul01 => m16,
out_mul01 => m16_01
);
m17_with_a4: mula4
port map (
in_mula4 => m17,
out_mula4 => m17_a4
);
m18_with_55: mul55
port map (
in_mul55 => m18,
out_mul55 => m18_55
);
m19_with_87: mul87
port map (
in_mul87 => m19,
out_mul87 => m19_87
);
m20_with_5a: mul5a
port map (
in_mul5a => m20,
out_mul5a => m20_5a
);
m21_with_58: mul58
port map (
in_mul58 => m21,
out_mul58 => m21_58
);
m22_with_db: muldb
port map (
in_muldb => m22,
out_muldb => m22_db
);
m23_with_9e: mul9e
port map (
in_mul9e => m23,
out_mul9e => m23_9e
);
-- the second row creates s21
m16_with_a4: mula4
port map (
in_mula4 => m16,
out_mula4 => m16_a4
);
m17_with_56: mul56
port map (
in_mul56 => m17,
out_mul56 => m17_56
);
m18_with_82: mul82
port map (
in_mul82 => m18,
out_mul82 => m18_82
);
m19_with_f3: mulf3
port map (
in_mulf3 => m19,
out_mulf3 => m19_f3
);
m20_with_1e: mul1e
port map (
in_mul1e => m20,
out_mul1e => m20_1e
);
m21_with_c6: mulc6
port map (
in_mulc6 => m21,
out_mulc6 => m21_c6
);
m22_with_68: mul68
port map (
in_mul68 => m22,
out_mul68 => m22_68
);
m23_with_e5: mule5
port map (
in_mule5 => m23,
out_mule5 => m23_e5
);
-- the third row creates s22
m16_with_02: mul02
port map (
in_mul02 => m16,
out_mul02 => m16_02
);
m17_with_a1: mula1
port map (
in_mula1 => m17,
out_mula1 => m17_a1
);
m18_with_fc: mulfc
port map (
in_mulfc => m18,
out_mulfc => m18_fc
);
m19_with_c1: mulc1
port map (
in_mulc1 => m19,
out_mulc1 => m19_c1
);
m20_with_47: mul47
port map (
in_mul47 => m20,
out_mul47 => m20_47
);
m21_with_ae: mulae
port map (
in_mulae => m21,
out_mulae => m21_ae
);
m22_with_3d: mul3d
port map (
in_mul3d => m22,
out_mul3d => m22_3d
);
m23_with_19: mul19
port map (
in_mul19 => m23,
out_mul19 => m23_19
);
-- the fourth row creates s23
m16_with_a4_1: mula4
port map (
in_mula4 => m16,
out_mula4 => m16_a4_1
);
m17_with_55: mul55
port map (
in_mul55 => m17,
out_mul55 => m17_55
);
m18_with_87: mul87
port map (
in_mul87 => m18,
out_mul87 => m18_87
);
m19_with_5a: mul5a
port map (
in_mul5a => m19,
out_mul5a => m19_5a
);
m20_with_58: mul58
port map (
in_mul58 => m20,
out_mul58 => m20_58
);
m21_with_db: muldb
port map (
in_muldb => m21,
out_muldb => m21_db
);
m22_with_9e: mul9e
port map (
in_mul9e => m22,
out_mul9e => m22_9e
);
m23_with_03: mul03
port map (
in_mul03 => m23,
out_mul03 => m23_03
);
-- after getting the results from multipliers
-- we combine them in order to get the additions
s00 <= m0_01 XOR m1_a4 XOR m2_55 XOR m3_87 XOR m4_5a XOR m5_58 XOR m6_db XOR m7_9e;
s01 <= m0_a4 XOR m1_56 XOR m2_82 XOR m3_f3 XOR m4_1e XOR m5_c6 XOR m6_68 XOR m7_e5;
s02 <= m0_02 XOR m1_a1 XOR m2_fc XOR m3_c1 XOR m4_47 XOR m5_ae XOR m6_3d XOR m7_19;
s03 <= m0_a4_1 XOR m1_55 XOR m2_87 XOR m3_5a XOR m4_58 XOR m5_db XOR m6_9e XOR m7_03;
-- after creating s0,j j=0...3 we form the S0
-- little endian
out_Sfirst_rs192 <= s03 & s02 & s01 & s00;
s10 <= m8_01 XOR m9_a4 XOR m10_55 XOR m11_87 XOR m12_5a XOR m13_58 XOR m14_db XOR m15_9e;
s11 <= m8_a4 XOR m9_56 XOR m10_82 XOR m11_f3 XOR m12_1e XOR m13_c6 XOR m14_68 XOR m15_e5;
s12 <= m8_02 XOR m9_a1 XOR m10_fc XOR m11_c1 XOR m12_47 XOR m13_ae XOR m14_3d XOR m15_19;
s13 <= m8_a4_1 XOR m9_55 XOR m10_87 XOR m11_5a XOR m12_58 XOR m13_db XOR m14_9e XOR m15_03;
-- after creating s1,j j=0...3 we form the S1
-- little endian
out_Ssecond_rs192 <= s13 & s12 & s11 & s10;
s20 <= m16_01 XOR m17_a4 XOR m18_55 XOR m19_87 XOR m20_5a XOR m21_58 XOR m22_db XOR m23_9e;
s21 <= m16_a4 XOR m17_56 XOR m18_82 XOR m19_f3 XOR m20_1e XOR m21_c6 XOR m22_68 XOR m23_e5;
s22 <= m16_02 XOR m17_a1 XOR m18_fc XOR m19_c1 XOR m20_47 XOR m21_ae XOR m22_3d XOR m23_19;
s23 <= m16_a4_1 XOR m17_55 XOR m18_87 XOR m19_5a XOR m20_58 XOR m21_db XOR m22_9e XOR m23_03;
-- after creating s2j j=0...3 we form the S2
-- little endian
out_Sthird_rs192 <= s23 & s22 & s21 & s20;
end rs_192_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- h function for 192 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity h_192 is
port (
in_h192 : in std_logic_vector(7 downto 0);
Mfirst_h192,
Msecond_h192,
Mthird_h192 : in std_logic_vector(31 downto 0);
out_h192 : out std_logic_vector(31 downto 0)
);
end h_192;
architecture h192_arch of h_192 is
-- we declare internal signals
signal from_first_row,
to_second_row,
from_second_row,
to_third_row,
from_third_row,
to_fourth_row,
to_mds : std_logic_vector(31 downto 0);
-- we declare all components needed
component q0
port (
in_q0 : in std_logic_vector(7 downto 0);
out_q0 : out std_logic_vector(7 downto 0)
);
end component;
component q1
port (
in_q1 : in std_logic_vector(7 downto 0);
out_q1 : out std_logic_vector(7 downto 0)
);
end component;
component mds
port (
y0,
y1,
y2,
y3 : in std_logic_vector(7 downto 0);
z0,
z1,
z2,
z3 : out std_logic_vector(7 downto 0)
);
end component;
-- begin architecture description
begin
-- first row of q
first_q1_1: q1
port map (
in_q1 => in_h192,
out_q1 => from_first_row(7 downto 0)
);
first_q1_2: q1
port map (
in_q1 => in_h192,
out_q1 => from_first_row(15 downto 8)
);
first_q0_1: q0
port map (
in_q0 => in_h192,
out_q0 => from_first_row(23 downto 16)
);
first_q0_2: q0
port map (
in_q0 => in_h192,
out_q0 => from_first_row(31 downto 24)
);
-- we perform the XOR of the results of the first row
-- with first M of h (Mfirst_h128)
to_second_row <= from_first_row XOR Mfirst_h192;
-- second row of q
second_q0_1: q0
port map (
in_q0 => to_second_row(7 downto 0),
out_q0 => from_second_row(7 downto 0)
);
second_q1_1: q1
port map (
in_q1 => to_second_row(15 downto 8),
out_q1 => from_second_row(15 downto 8)
);
second_q0_2: q0
port map (
in_q0 => to_second_row(23 downto 16),
out_q0 => from_second_row(23 downto 16)
);
second_q1_2: q1
port map (
in_q1 => to_second_row(31 downto 24),
out_q1 => from_second_row(31 downto 24)
);
-- we perform the XOR of the results of the second row
-- with second M of h (Msecond_h128)
to_third_row <= from_second_row XOR Msecond_h192;
-- third row of q
third_q0_1: q0
port map (
in_q0 => to_third_row(7 downto 0),
out_q0 => from_third_row(7 downto 0)
);
third_q0_2: q0
port map (
in_q0 => to_third_row(15 downto 8),
out_q0 => from_third_row(15 downto 8)
);
third_q1_1: q1
port map (
in_q1 => to_third_row(23 downto 16),
out_q1 => from_third_row(23 downto 16)
);
third_q1_2: q1
port map (
in_q1 => to_third_row(31 downto 24),
out_q1 => from_third_row(31 downto 24)
);
-- we perform the third XOR
to_fourth_row <= from_third_row XOR Mthird_h192;
-- the fourth row of q
fourth_q1_1: q1
port map (
in_q1 => to_fourth_row(7 downto 0),
out_q1 => to_mds(7 downto 0)
);
fourth_q0_1: q0
port map (
in_q0 => to_fourth_row(15 downto 8),
out_q0 => to_mds(15 downto 8)
);
fourth_q1_2: q1
port map (
in_q1 => to_fourth_row(23 downto 16),
out_q1 => to_mds(23 downto 16)
);
fourth_q0_2: q0
port map (
in_q0 => to_fourth_row(31 downto 24),
out_q0 => to_mds(31 downto 24)
);
-- mds table
mds_table: mds
port map (
y0 => to_mds(7 downto 0),
y1 => to_mds(15 downto 8),
y2 => to_mds(23 downto 16),
y3 => to_mds(31 downto 24),
z0 => out_h192(7 downto 0),
z1 => out_h192(15 downto 8),
z2 => out_h192(23 downto 16),
z3 => out_h192(31 downto 24)
);
end h192_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- g function for 192 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity g_192 is
port (
in_g192,
in_S0_g192,
in_S1_g192,
in_S2_g192 : in std_logic_vector(31 downto 0);
out_g192 : out std_logic_vector(31 downto 0)
);
end g_192;
architecture g192_arch of g_192 is
-- we declare the internal signals
signal from_first_row,
to_second_row,
from_second_row,
to_third_row,
from_third_row,
to_fourth_row,
to_mds : std_logic_vector(31 downto 0);
component q0
port (
in_q0 : in std_logic_vector(7 downto 0);
out_q0 : out std_logic_vector(7 downto 0)
);
end component;
component q1
port (
in_q1 : in std_logic_vector(7 downto 0);
out_q1 : out std_logic_vector(7 downto 0)
);
end component;
component mds
port (
y0,
y1,
y2,
y3 : in std_logic_vector(7 downto 0);
z0,
z1,
z2,
z3 : out std_logic_vector(7 downto 0)
);
end component;
-- begin architecture description
begin
-- first row of q
first_q1_1: q1
port map (
in_q1 => in_g192(7 downto 0),
out_q1 => from_first_row(7 downto 0)
);
first_q1_2: q1
port map (
in_q1 => in_g192(15 downto 8),
out_q1 => from_first_row(15 downto 8)
);
first_q0_1: q0
port map (
in_q0 => in_g192(23 downto 16),
out_q0 => from_first_row(23 downto 16)
);
first_q0_2: q0
port map (
in_q0 => in_g192(31 downto 24),
out_q0 => from_first_row(31 downto 24)
);
-- we XOR the result of the first row
-- with the S0
to_second_row <= from_first_row XOR in_S0_g192;
-- second row of q
second_q0_1: q0
port map (
in_q0 => to_second_row(7 downto 0),
out_q0 => from_second_row(7 downto 0)
);
second_q1_1: q1
port map (
in_q1 => to_second_row(15 downto 8),
out_q1 => from_second_row(15 downto 8)
);
second_q0_2: q0
port map (
in_q0 => to_second_row(23 downto 16),
out_q0 => from_second_row(23 downto 16)
);
second_q1_2: q1
port map (
in_q1 => to_second_row(31 downto 24),
out_q1 => from_second_row(31 downto 24)
);
-- we perform the XOR
to_third_row <= from_second_row XOR in_S1_g192;
-- third row of q
third_q0_1: q0
port map (
in_q0 => to_third_row(7 downto 0),
out_q0 => from_third_row(7 downto 0)
);
third_q0_2: q0
port map (
in_q0 => to_third_row(15 downto 8),
out_q0 => from_third_row(15 downto 8)
);
third_q1_1: q1
port map (
in_q1 => to_third_row(23 downto 16),
out_q1 => from_third_row(23 downto 16)
);
third_q1_2: q1
port map (
in_q1 => to_third_row(31 downto 24),
out_q1 => from_third_row(31 downto 24)
);
-- we perform the XOR
to_fourth_row <= from_third_row XOR in_S2_g192;
-- fourth row of q
fourth_q1_1: q1
port map (
in_q1=> to_fourth_row(7 downto 0),
out_q1 => to_mds(7 downto 0)
);
fourth_q0_1: q0
port map (
in_q0 => to_fourth_row(15 downto 8),
out_q0 => to_mds(15 downto 8)
);
fourth_q1_2: q1
port map (
in_q1 => to_fourth_row(23 downto 16),
out_q1 => to_mds(23 downto 16)
);
fourth_q0_2: q0
port map (
in_q0 => to_fourth_row(31 downto 24),
out_q0 => to_mds(31 downto 24)
);
-- mds table
mds_table: mds
port map (
y0 => to_mds(7 downto 0),
y1 => to_mds(15 downto 8),
y2 => to_mds(23 downto 16),
y3 => to_mds(31 downto 24),
z0 => out_g192(7 downto 0),
z1 => out_g192(15 downto 8),
z2 => out_g192(23 downto 16),
z3 => out_g192(31 downto 24)
);
end g192_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- f function with 192 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity f_192 is
port (
up_in_f192,
low_in_f192,
S0_in_f192,
S1_in_f192,
S2_in_f192,
up_key_f192,
low_key_f192 : in std_logic_vector(31 downto 0);
up_out_f192,
low_out_f192 : out std_logic_vector(31 downto 0)
);
end f_192;
architecture f192_arch of f_192 is
-- we declare the internal signals
signal from_shift_8,
to_up_pht,
to_low_pht,
to_up_key,
to_low_key,
intermediate_carry1,
intermediate_carry2 : std_logic_vector(31 downto 0);
signal zero : std_logic;
component g_192
port (
in_g192,
in_S0_g192,
in_S1_g192,
in_S2_g192 : in std_logic_vector(31 downto 0);
out_g192 : out std_logic_vector(31 downto 0)
);
end component;
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component adder
port (
in1_adder,
in2_adder,
in_carry_adder : in std_logic;
out_adder,
out_carry_adder : out std_logic
);
end component;
-- begin architecture description
begin
-- we initialize zero
zero <= '0';
-- upper g_192
upper_g192: g_192
port map (
in_g192 => up_in_f192,
in_S0_g192 => S0_in_f192,
in_S1_g192 => S1_in_f192,
in_S2_g192 => S2_in_f192,
out_g192 => to_up_pht
);
-- left rotation by 8
from_shift_8(31 downto 8) <= low_in_f192(23 downto 0);
from_shift_8(7 downto 0) <= low_in_f192(31 downto 24);
-- lower g192
lower_g192: g_192
port map (
in_g192 => from_shift_8,
in_S0_g192 => S0_in_f192,
in_S1_g192 => S1_in_f192,
in_S2_g192 => S2_in_f192,
out_g192 => to_low_pht
);
-- pht
pht_transform: pht
port map (
up_in_pht => to_up_pht,
down_in_pht => to_low_pht,
up_out_pht => to_up_key,
down_out_pht => to_low_key
);
-- upper adder of 32 bits
up_adder: for i in 0 to 31 generate
first: if (i=0) generate
the_adder: adder
port map (
in1_adder => to_up_key(0),
in2_adder => up_key_f192(0),
in_carry_adder => zero,
out_adder => up_out_f192(0),
out_carry_adder => intermediate_carry1(0)
);
end generate first;
the_rest: if (i>0) generate
the_adders: adder
port map (
in1_adder => to_up_key(i),
in2_adder => up_key_f192(i),
in_carry_adder => intermediate_carry1(i-1),
out_adder => up_out_f192(i),
out_carry_adder => intermediate_carry1(i)
);
end generate the_rest;
end generate up_adder;
-- lower adder of 32 bits
low_adder: for i in 0 to 31 generate
first1: if (i=0) generate
the_adder1:adder
port map (
in1_adder => to_low_key(0),
in2_adder => low_key_f192(0),
in_carry_adder => zero,
out_adder => low_out_f192(0),
out_carry_adder => intermediate_carry2(0)
);
end generate first1;
the_rest1: if (i>0) generate
the_adders1: adder
port map (
in1_adder => to_low_key(i),
in2_adder => low_key_f192(i),
in_carry_adder => intermediate_carry2(i-1),
out_adder => low_out_f192(i),
out_carry_adder => intermediate_carry2(i)
);
end generate the_rest1;
end generate low_adder;
end f192_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish key scheduler for 192 bits key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_keysched192 is
port (
odd_in_tk192,
even_in_tk192 : in std_logic_vector(7 downto 0);
in_key_tk192 : in std_logic_vector(191 downto 0);
out_key_up_tk192,
out_key_down_tk192 : out std_logic_vector(31 downto 0)
);
end twofish_keysched192;
architecture twofish_keysched192_arch of twofish_keysched192 is
-- we declare internal signals
signal to_up_pht,
to_shift_8,
from_shift_8,
to_shift_9,
M0, M1, M2, M3, M4, M5 : std_logic_vector(31 downto 0);
signal byte0, byte1, byte2, byte3,
byte4, byte5, byte6, byte7,
byte8, byte9, byte10, byte11,
byte12, byte13, byte14, byte15,
byte16, byte17, byte18, byte19,
byte20, byte21, byte22, byte23 : std_logic_vector(7 downto 0);
-- we declare the components to be used
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component h_192
port (
in_h192 : in std_logic_vector(7 downto 0);
Mfirst_h192,
Msecond_h192,
Mthird_h192 : in std_logic_vector(31 downto 0);
out_h192 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we assign the input signal to the respective
-- bytes as is described in the prototype
byte23 <= in_key_tk192(7 downto 0);
byte22 <= in_key_tk192(15 downto 8);
byte21 <= in_key_tk192(23 downto 16);
byte20 <= in_key_tk192(31 downto 24);
byte19 <= in_key_tk192(39 downto 32);
byte18 <= in_key_tk192(47 downto 40);
byte17 <= in_key_tk192(55 downto 48);
byte16 <= in_key_tk192(63 downto 56);
byte15 <= in_key_tk192(71 downto 64);
byte14 <= in_key_tk192(79 downto 72);
byte13 <= in_key_tk192(87 downto 80);
byte12 <= in_key_tk192(95 downto 88);
byte11 <= in_key_tk192(103 downto 96);
byte10 <= in_key_tk192(111 downto 104);
byte9 <= in_key_tk192(119 downto 112);
byte8 <= in_key_tk192(127 downto 120);
byte7 <= in_key_tk192(135 downto 128);
byte6 <= in_key_tk192(143 downto 136);
byte5 <= in_key_tk192(151 downto 144);
byte4 <= in_key_tk192(159 downto 152);
byte3 <= in_key_tk192(167 downto 160);
byte2 <= in_key_tk192(175 downto 168);
byte1 <= in_key_tk192(183 downto 176);
byte0 <= in_key_tk192(191 downto 184);
-- we form the M{0..5}
M0 <= byte3 & byte2 & byte1 & byte0;
M1 <= byte7 & byte6 & byte5 & byte4;
M2 <= byte11 & byte10 & byte9 & byte8;
M3 <= byte15 & byte14 & byte13 & byte12;
M4 <= byte19 & byte18 & byte17 & byte16;
M5 <= byte23 & byte22 & byte21 & byte20;
-- upper h
upper_h: h_192
port map (
in_h192 => even_in_tk192,
Mfirst_h192 => M4,
Msecond_h192 => M2,
Mthird_h192 => M0,
out_h192 => to_up_pht
);
-- lower h
lower_h: h_192
port map (
in_h192 => odd_in_tk192,
Mfirst_h192 => M5,
Msecond_h192 => M3,
Mthird_h192 => M1,
out_h192 => to_shift_8
);
-- left rotate by 8
from_shift_8(31 downto 8) <= to_shift_8(23 downto 0);
from_shift_8(7 downto 0) <= to_shift_8(31 downto 24);
-- pht transformation
pht_transform: pht
port map (
up_in_pht => to_up_pht,
down_in_pht => from_shift_8,
up_out_pht => out_key_up_tk192,
down_out_pht => to_shift_9
);
-- left rotate by 9
out_key_down_tk192(31 downto 9) <= to_shift_9(22 downto 0);
out_key_down_tk192(8 downto 0) <= to_shift_9(31 downto 23);
end twofish_keysched192_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish S key component for 192 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_S192 is
port (
in_key_ts192 : in std_logic_vector(191 downto 0);
out_Sfirst_ts192,
out_Ssecond_ts192,
out_Sthird_ts192 : out std_logic_vector(31 downto 0)
);
end twofish_S192;
architecture twofish_S192_arch of twofish_S192 is
-- we declare the components to be used
component reed_solomon192
port (
in_rs192 : in std_logic_vector(191 downto 0);
out_Sfirst_rs192,
out_Ssecond_rs192,
out_Sthird_rs192 : out std_logic_vector(31 downto 0)
);
end component;
signal twofish_key : std_logic_vector(191 downto 0);
signal byte15, byte14, byte13, byte12, byte11, byte10,
byte9, byte8, byte7, byte6, byte5, byte4,
byte3, byte2, byte1, byte0,
byte16, byte17, byte18, byte19,
byte20, byte21, byte22, byte23 : std_logic_vector(7 downto 0);
-- begin architecture description
begin
-- splitting the input
byte23 <= in_key_ts192(7 downto 0);
byte22 <= in_key_ts192(15 downto 8);
byte21 <= in_key_ts192(23 downto 16);
byte20 <= in_key_ts192(31 downto 24);
byte19 <= in_key_ts192(39 downto 32);
byte18 <= in_key_ts192(47 downto 40);
byte17 <= in_key_ts192(55 downto 48);
byte16 <= in_key_ts192(63 downto 56);
byte15 <= in_key_ts192(71 downto 64);
byte14 <= in_key_ts192(79 downto 72);
byte13 <= in_key_ts192(87 downto 80);
byte12 <= in_key_ts192(95 downto 88);
byte11 <= in_key_ts192(103 downto 96);
byte10 <= in_key_ts192(111 downto 104);
byte9 <= in_key_ts192(119 downto 112);
byte8 <= in_key_ts192(127 downto 120);
byte7 <= in_key_ts192(135 downto 128);
byte6 <= in_key_ts192(143 downto 136);
byte5 <= in_key_ts192(151 downto 144);
byte4 <= in_key_ts192(159 downto 152);
byte3 <= in_key_ts192(167 downto 160);
byte2 <= in_key_ts192(175 downto 168);
byte1 <= in_key_ts192(183 downto 176);
byte0 <= in_key_ts192(191 downto 184);
-- forming the key
twofish_key <= byte23 & byte22 & byte21 & byte20 & byte19 & byte18 & byte17 & byte16 &
byte15 & byte14 & byte13 & byte12 & byte11 & byte10 & byte9 & byte8 & byte7 &
byte6 & byte5 & byte4 & byte3 & byte2 & byte1 & byte0;
-- the keys S0,1,2
produce_S0_S1_S2: reed_solomon192
port map (
in_rs192 => twofish_key,
out_Sfirst_rs192 => out_Sfirst_ts192,
out_Ssecond_rs192 => out_Ssecond_ts192,
out_Sthird_rs192 => out_Sthird_ts192
);
end twofish_S192_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish whitening key scheduler for 192 bits key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_whit_keysched192 is
port (
in_key_twk192 : in std_logic_vector(191 downto 0);
out_K0_twk192,
out_K1_twk192,
out_K2_twk192,
out_K3_twk192,
out_K4_twk192,
out_K5_twk192,
out_K6_twk192,
out_K7_twk192 : out std_logic_vector(31 downto 0)
);
end twofish_whit_keysched192;
architecture twofish_whit_keysched192_arch of twofish_whit_keysched192 is
-- we declare internal signals
signal to_up_pht_1,
to_shift_8_1,
from_shift_8_1,
to_shift_9_1,
to_up_pht_2,
to_shift_8_2,
from_shift_8_2,
to_shift_9_2,
to_up_pht_3,
to_shift_8_3,
from_shift_8_3,
to_shift_9_3,
to_up_pht_4,
to_shift_8_4,
from_shift_8_4,
to_shift_9_4,
M0, M1, M2, M3, M4, M5 : std_logic_vector(31 downto 0);
signal byte0, byte1, byte2, byte3,
byte4, byte5, byte6, byte7,
byte8, byte9, byte10, byte11,
byte12, byte13, byte14, byte15,
byte16, byte17, byte18, byte19,
byte20, byte21, byte22, byte23 : std_logic_vector(7 downto 0);
signal zero, one, two, three, four, five, six, seven : std_logic_vector(7 downto 0);
-- we declare the components to be used
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component h_192
port (
in_h192 : in std_logic_vector(7 downto 0);
Mfirst_h192,
Msecond_h192,
Mthird_h192 : in std_logic_vector(31 downto 0);
out_h192 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we produce the first eight numbers
zero <= "00000000";
one <= "00000001";
two <= "00000010";
three <= "00000011";
four <= "00000100";
five <= "00000101";
six <= "00000110";
seven <= "00000111";
-- we assign the input signal to the respective
-- bytes as is described in the prototype
byte23 <= in_key_twk192(7 downto 0);
byte22 <= in_key_twk192(15 downto 8);
byte21 <= in_key_twk192(23 downto 16);
byte20 <= in_key_twk192(31 downto 24);
byte19 <= in_key_twk192(39 downto 32);
byte18 <= in_key_twk192(47 downto 40);
byte17 <= in_key_twk192(55 downto 48);
byte16 <= in_key_twk192(63 downto 56);
byte15 <= in_key_twk192(71 downto 64);
byte14 <= in_key_twk192(79 downto 72);
byte13 <= in_key_twk192(87 downto 80);
byte12 <= in_key_twk192(95 downto 88);
byte11 <= in_key_twk192(103 downto 96);
byte10 <= in_key_twk192(111 downto 104);
byte9 <= in_key_twk192(119 downto 112);
byte8 <= in_key_twk192(127 downto 120);
byte7 <= in_key_twk192(135 downto 128);
byte6 <= in_key_twk192(143 downto 136);
byte5 <= in_key_twk192(151 downto 144);
byte4 <= in_key_twk192(159 downto 152);
byte3 <= in_key_twk192(167 downto 160);
byte2 <= in_key_twk192(175 downto 168);
byte1 <= in_key_twk192(183 downto 176);
byte0 <= in_key_twk192(191 downto 184);
-- we form the M{0..5}
M0 <= byte3 & byte2 & byte1 & byte0;
M1 <= byte7 & byte6 & byte5 & byte4;
M2 <= byte11 & byte10 & byte9 & byte8;
M3 <= byte15 & byte14 & byte13 & byte12;
M4 <= byte19 & byte18 & byte17 & byte16;
M5 <= byte23 & byte22 & byte21 & byte20;
-- we produce the keys for the whitening steps
-- keys K0,1
-- upper h
upper_h1: h_192
port map (
in_h192 => zero,
Mfirst_h192 => M4,
Msecond_h192 => M2,
Mthird_h192 => M0,
out_h192 => to_up_pht_1
);
-- lower h
lower_h1: h_192
port map (
in_h192 => one,
Mfirst_h192 => M5,
Msecond_h192 => M3,
Mthird_h192 => M1,
out_h192 => to_shift_8_1
);
-- left rotate by 8
from_shift_8_1(31 downto 8) <= to_shift_8_1(23 downto 0);
from_shift_8_1(7 downto 0) <= to_shift_8_1(31 downto 24);
-- pht transformation
pht_transform1: pht
port map (
up_in_pht => to_up_pht_1,
down_in_pht => from_shift_8_1,
up_out_pht => out_K0_twk192,
down_out_pht => to_shift_9_1
);
-- left rotate by 9
out_K1_twk192(31 downto 9) <= to_shift_9_1(22 downto 0);
out_K1_twk192(8 downto 0) <= to_shift_9_1(31 downto 23);
-- keys K2,3
-- upper h
upper_h2: h_192
port map (
in_h192 => two,
Mfirst_h192 => M4,
Msecond_h192 => M2,
Mthird_h192 => M0,
out_h192 => to_up_pht_2
);
-- lower h
lower_h2: h_192
port map (
in_h192 => three,
Mfirst_h192 => M5,
Msecond_h192 => M3,
Mthird_h192 => M1,
out_h192 => to_shift_8_2
);
-- left rotate by 8
from_shift_8_2(31 downto 8) <= to_shift_8_2(23 downto 0);
from_shift_8_2(7 downto 0) <= to_shift_8_2(31 downto 24);
-- pht transformation
pht_transform2: pht
port map (
up_in_pht => to_up_pht_2,
down_in_pht => from_shift_8_2,
up_out_pht => out_K2_twk192,
down_out_pht => to_shift_9_2
);
-- left rotate by 9
out_K3_twk192(31 downto 9) <= to_shift_9_2(22 downto 0);
out_K3_twk192(8 downto 0) <= to_shift_9_2(31 downto 23);
-- keys K4,5
-- upper h
upper_h3: h_192
port map (
in_h192 => four,
Mfirst_h192 => M4,
Msecond_h192 => M2,
Mthird_h192 => M0,
out_h192 => to_up_pht_3
);
-- lower h
lower_h3: h_192
port map (
in_h192 => five,
Mfirst_h192 => M5,
Msecond_h192 => M3,
Mthird_h192 => M1,
out_h192 => to_shift_8_3
);
-- left rotate by 8
from_shift_8_3(31 downto 8) <= to_shift_8_3(23 downto 0);
from_shift_8_3(7 downto 0) <= to_shift_8_3(31 downto 24);
-- pht transformation
pht_transform3: pht
port map (
up_in_pht => to_up_pht_3,
down_in_pht => from_shift_8_3,
up_out_pht => out_K4_twk192,
down_out_pht => to_shift_9_3
);
-- left rotate by 9
out_K5_twk192(31 downto 9) <= to_shift_9_3(22 downto 0);
out_K5_twk192(8 downto 0) <= to_shift_9_3(31 downto 23);
-- keys K6,7
-- upper h
upper_h4: h_192
port map (
in_h192 => six,
Mfirst_h192 => M4,
Msecond_h192 => M2,
Mthird_h192 => M0,
out_h192 => to_up_pht_4
);
-- lower h
lower_h4: h_192
port map (
in_h192 => seven,
Mfirst_h192 => M5,
Msecond_h192 => M3,
Mthird_h192 => M1,
out_h192 => to_shift_8_4
);
-- left rotate by 8
from_shift_8_4(31 downto 8) <= to_shift_8_4(23 downto 0);
from_shift_8_4(7 downto 0) <= to_shift_8_4(31 downto 24);
-- pht transformation
pht_transform4: pht
port map (
up_in_pht => to_up_pht_4,
down_in_pht => from_shift_8_4,
up_out_pht => out_K6_twk192,
down_out_pht => to_shift_9_4
);
-- left rotate by 9
out_K7_twk192(31 downto 9) <= to_shift_9_4(22 downto 0);
out_K7_twk192(8 downto 0) <= to_shift_9_4(31 downto 23);
end twofish_whit_keysched192_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish encryption round with 192 bit key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_encryption_round192 is
port (
in1_ter192,
in2_ter192,
in3_ter192,
in4_ter192,
in_Sfirst_ter192,
in_Ssecond_ter192,
in_Sthird_ter192,
in_key_up_ter192,
in_key_down_ter192 : in std_logic_vector(31 downto 0);
out1_ter192,
out2_ter192,
out3_ter192,
out4_ter192 : out std_logic_vector(31 downto 0)
);
end twofish_encryption_round192;
architecture twofish_encryption_round192_arch of twofish_encryption_round192 is
-- we declare internal signals
signal to_left_shift,
from_right_shift,
to_xor_with3,
to_xor_with4 : std_logic_vector(31 downto 0);
component f_192
port (
up_in_f192,
low_in_f192,
S0_in_f192,
S1_in_f192,
S2_in_f192,
up_key_f192,
low_key_f192 : in std_logic_vector(31 downto 0);
up_out_f192,
low_out_f192 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we declare f_192
function_f: f_192
port map (
up_in_f192 => in1_ter192,
low_in_f192 => in2_ter192,
S0_in_f192 => in_Sfirst_ter192,
S1_in_f192 => in_Ssecond_ter192,
S2_in_f192 => in_Sthird_ter192,
up_key_f192 => in_key_up_ter192,
low_key_f192 => in_key_down_ter192,
up_out_f192 => to_xor_with3,
low_out_f192 => to_xor_with4
);
-- we perform the exchange
-- in1_ter128 -> out3_ter128
-- in2_ter128 -> out4_ter128
-- in3_ter128 -> out1_ter128
-- in4_ter128 -> out2_ter128
-- we perform the left xor between the upper f function and
-- the third input (input 3)
to_left_shift <= to_xor_with3 XOR in3_ter192;
-- we perform the left side rotation to the right by 1 and
-- we perform the exchange too
out1_ter192(30 downto 0) <= to_left_shift(31 downto 1);
out1_ter192(31) <= to_left_shift(0);
-- we perform the right side rotation to the left by 1
from_right_shift(0) <= in4_ter192(31);
from_right_shift(31 downto 1) <= in4_ter192(30 downto 0);
-- we perform the right xor between the lower f function and
-- the fourth input (input 4)
out2_ter192 <= from_right_shift XOR to_xor_with4;
-- we perform the last exchanges
out3_ter192 <= in1_ter192;
out4_ter192 <= in2_ter192;
end twofish_encryption_round192_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish decryption round with 192 bit key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_decryption_round192 is
port (
in1_tdr192,
in2_tdr192,
in3_tdr192,
in4_tdr192,
in_Sfirst_tdr192,
in_Ssecond_tdr192,
in_Sthird_tdr192,
in_key_up_tdr192,
in_key_down_tdr192 : in std_logic_vector(31 downto 0);
out1_tdr192,
out2_tdr192,
out3_tdr192,
out4_tdr192 : out std_logic_vector(31 downto 0)
);
end twofish_decryption_round192;
architecture twofish_decryption_round192_arch of twofish_decryption_round192 is
signal to_xor_with3,
to_xor_with4,
to_xor_with_up_f,
from_xor_with_down_f : std_logic_vector(31 downto 0);
component f_192
port (
up_in_f192,
low_in_f192,
S0_in_f192,
S1_in_f192,
S2_in_f192,
up_key_f192,
low_key_f192 : in std_logic_vector(31 downto 0);
up_out_f192,
low_out_f192 : out std_logic_vector(31 downto 0)
);
end component;
begin
-- we instantiate f function
function_f: f_192
port map (
up_in_f192 => in1_tdr192,
low_in_f192 => in2_tdr192,
S0_in_f192 => in_Sfirst_tdr192,
S1_in_f192 => in_Ssecond_tdr192,
S2_in_f192 => in_Sthird_tdr192,
up_key_f192 => in_key_up_tdr192,
low_key_f192 => in_key_down_tdr192,
up_out_f192 => to_xor_with3,
low_out_f192 => to_xor_with4
);
-- output 1: input3 with upper f
-- we first rotate the input3 by 1 bit leftwise
to_xor_with_up_f(0) <= in3_tdr192(31);
to_xor_with_up_f(31 downto 1) <= in3_tdr192(30 downto 0);
-- we perform the XOR with the upper output of f and the result
-- is ouput 1
out1_tdr192 <= to_xor_with_up_f XOR to_xor_with3;
-- output 2: input4 with lower f
-- we perform the XOR with the lower output of f
from_xor_with_down_f <= in4_tdr192 XOR to_xor_with4;
-- we perform the rotation by 1 bit rightwise and the result
-- is output2
out2_tdr192(31) <= from_xor_with_down_f(0);
out2_tdr192(30 downto 0) <= from_xor_with_down_f(31 downto 1);
-- we assign outputs 3 and 4
out3_tdr192 <= in1_tdr192;
out4_tdr192 <= in2_tdr192;
end twofish_decryption_round192_arch;
-- =============================================== --
-- =============================================== --
-- --
-- fourth part: 256 key input dependent components --
-- --
-- =============================================== --
-- =============================================== --
--
-- reed solomon for 256bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity reed_solomon256 is
port (
in_rs256 : in std_logic_vector(255 downto 0);
out_Sfirst_rs256,
out_Ssecond_rs256,
out_Sthird_rs256,
out_Sfourth_rs256 : out std_logic_vector(31 downto 0)
);
end reed_solomon256;
architecture rs_256_arch of reed_solomon256 is
-- declaring all components necessary for reed solomon
-- 01
component mul01
port (
in_mul01 : in std_logic_vector(7 downto 0);
out_mul01 : out std_logic_vector(7 downto 0)
);
end component;
-- a4
component mula4
port (
in_mula4 : in std_logic_vector(7 downto 0);
out_mula4 : out std_logic_vector(7 downto 0)
);
end component;
-- 55
component mul55
port (
in_mul55 : in std_logic_vector(7 downto 0);
out_mul55 : out std_logic_vector(7 downto 0)
);
end component;
-- 87
component mul87
port (
in_mul87 : in std_logic_vector(7 downto 0);
out_mul87 : out std_logic_vector(7 downto 0)
);
end component;
-- 5a
component mul5a
port (
in_mul5a : in std_logic_vector(7 downto 0);
out_mul5a : out std_logic_vector(7 downto 0)
);
end component;
-- 58
component mul58
port (
in_mul58 : in std_logic_vector(7 downto 0);
out_mul58 : out std_logic_vector(7 downto 0)
);
end component;
-- db
component muldb
port (
in_muldb : in std_logic_vector(7 downto 0);
out_muldb : out std_logic_vector(7 downto 0)
);
end component;
-- 9e
component mul9e
port (
in_mul9e : in std_logic_vector(7 downto 0);
out_mul9e : out std_logic_vector(7 downto 0)
);
end component;
-- 56
component mul56
port (
in_mul56 : in std_logic_vector(7 downto 0);
out_mul56 : out std_logic_vector(7 downto 0)
);
end component;
-- 82
component mul82
port (
in_mul82 : in std_logic_vector(7 downto 0);
out_mul82 : out std_logic_vector(7 downto 0)
);
end component;
-- f3
component mulf3
port (
in_mulf3 : in std_logic_vector(7 downto 0);
out_mulf3 : out std_logic_vector(7 downto 0)
);
end component;
-- 1e
component mul1e
port (
in_mul1e : in std_logic_vector(7 downto 0);
out_mul1e : out std_logic_vector(7 downto 0)
);
end component;
-- c6
component mulc6
port (
in_mulc6 : in std_logic_vector(7 downto 0);
out_mulc6 : out std_logic_vector(7 downto 0)
);
end component;
-- 68
component mul68
port (
in_mul68 : in std_logic_vector(7 downto 0);
out_mul68 : out std_logic_vector(7 downto 0)
);
end component;
-- e5
component mule5
port (
in_mule5 : in std_logic_vector(7 downto 0);
out_mule5 : out std_logic_vector(7 downto 0)
);
end component;
-- 02
component mul02
port (
in_mul02 : in std_logic_vector(7 downto 0);
out_mul02 : out std_logic_vector(7 downto 0)
);
end component;
-- a1
component mula1
port (
in_mula1 : in std_logic_vector(7 downto 0);
out_mula1 : out std_logic_vector(7 downto 0)
);
end component;
-- fc
component mulfc
port (
in_mulfc : in std_logic_vector(7 downto 0);
out_mulfc : out std_logic_vector(7 downto 0)
);
end component;
-- c1
component mulc1
port (
in_mulc1 : in std_logic_vector(7 downto 0);
out_mulc1 : out std_logic_vector(7 downto 0)
);
end component;
-- 47
component mul47
port (
in_mul47 : in std_logic_vector(7 downto 0);
out_mul47 : out std_logic_vector(7 downto 0)
);
end component;
-- ae
component mulae
port (
in_mulae : in std_logic_vector(7 downto 0);
out_mulae : out std_logic_vector(7 downto 0)
);
end component;
-- 3d
component mul3d
port (
in_mul3d : in std_logic_vector(7 downto 0);
out_mul3d : out std_logic_vector(7 downto 0)
);
end component;
-- 19
component mul19
port (
in_mul19 : in std_logic_vector(7 downto 0);
out_mul19 : out std_logic_vector(7 downto 0)
);
end component;
-- 03
component mul03
port (
in_mul03 : in std_logic_vector(7 downto 0);
out_mul03 : out std_logic_vector(7 downto 0)
);
end component;
-- declaring internal signals
signal m0,m1,m2,m3,m4,m5,m6,m7,m8,m9,m10,m11,m12,m13,m14,m15,
m16, m17, m18, m19, m20, m21, m22, m23, m24, m25, m26, m27, m28, m29, m30, m31 : std_logic_vector(7 downto 0);
signal s00,s01,s02,s03,s10,s11,s12,s13, s20, s21, s22, s23, s30, s31, s32, s33 : std_logic_vector(7 downto 0);
signal m0_01,m1_a4,m2_55,m3_87,m4_5a,m5_58,m6_db,m7_9e,
m0_a4,m1_56,m2_82,m3_f3,m4_1e,m5_c6,m6_68,m7_e5,
m0_02,m1_a1,m2_fc,m3_c1,m4_47,m5_ae,m6_3d,m7_19,
m0_a4_1,m1_55,m2_87,m3_5a,m4_58,m5_db,m6_9e,m7_03 : std_logic_vector(7 downto 0);
signal m8_01,m9_a4,m10_55,m11_87,m12_5a,m13_58,m14_db,m15_9e,
m8_a4,m9_56,m10_82,m11_f3,m12_1e,m13_c6,m14_68,m15_e5,
m8_02,m9_a1,m10_fc,m11_c1,m12_47,m13_ae,m14_3d,m15_19,
m8_a4_1,m9_55,m10_87,m11_5a,m12_58,m13_db,m14_9e,m15_03 : std_logic_vector(7 downto 0);
signal m16_01,m17_a4,m18_55,m19_87,m20_5a,m21_58,m22_db,m23_9e,
m16_a4,m17_56,m18_82,m19_f3,m20_1e,m21_c6,m22_68,m23_e5,
m16_02,m17_a1,m18_fc,m19_c1,m20_47,m21_ae,m22_3d,m23_19,
m16_a4_1,m17_55,m18_87,m19_5a,m20_58,m21_db,m22_9e,m23_03 : std_logic_vector(7 downto 0);
signal m24_01,m25_a4,m26_55,m27_87,m28_5a,m29_58,m30_db,m31_9e,
m24_a4,m25_56,m26_82,m27_f3,m28_1e,m29_c6,m30_68,m31_e5,
m24_02,m25_a1,m26_fc,m27_c1,m28_47,m29_ae,m30_3d,m31_19,
m24_a4_1,m25_55,m26_87,m27_5a,m28_58,m29_db,m30_9e,m31_03 : std_logic_vector(7 downto 0);
-- begin architecture description
begin
-- first, we separate the input to the respective m
-- for s0j j=0..3
m0 <= in_rs256(7 downto 0);
m1 <= in_rs256(15 downto 8);
m2 <= in_rs256(23 downto 16);
m3 <= in_rs256(31 downto 24);
m4 <= in_rs256(39 downto 32);
m5 <= in_rs256(47 downto 40);
m6 <= in_rs256(55 downto 48);
m7 <= in_rs256(63 downto 56);
-- for s1j j=0..3
m8 <= in_rs256(71 downto 64);
m9 <= in_rs256(79 downto 72);
m10 <= in_rs256(87 downto 80);
m11 <= in_rs256(95 downto 88);
m12 <= in_rs256(103 downto 96);
m13 <= in_rs256(111 downto 104);
m14 <= in_rs256(119 downto 112);
m15 <= in_rs256(127 downto 120);
-- for s2j j=0..3
m16 <= in_rs256(135 downto 128);
m17 <= in_rs256(143 downto 136);
m18 <= in_rs256(151 downto 144);
m19 <= in_rs256(159 downto 152);
m20 <= in_rs256(167 downto 160);
m21 <= in_rs256(175 downto 168);
m22 <= in_rs256(183 downto 176);
m23 <= in_rs256(191 downto 184);
-- for s3j j=0..3
m24 <= in_rs256(199 downto 192);
m25 <= in_rs256(207 downto 200);
m26 <= in_rs256(215 downto 208);
m27 <= in_rs256(223 downto 216);
m28 <= in_rs256(231 downto 224);
m29 <= in_rs256(239 downto 232);
m30 <= in_rs256(247 downto 240);
m31 <= in_rs256(255 downto 248);
-- after separating signals, we drive them to multipliers
-- the first line of m0..7 forms s00
m0_with_01: mul01
port map (
in_mul01 => m0,
out_mul01 => m0_01
);
m1_with_a4: mula4
port map (
in_mula4 => m1,
out_mula4 => m1_a4
);
m2_with_55: mul55
port map (
in_mul55 => m2,
out_mul55 => m2_55
);
m3_with_87: mul87
port map (
in_mul87 => m3,
out_mul87 => m3_87
);
m4_with_5a: mul5a
port map (
in_mul5a => m4,
out_mul5a => m4_5a
);
m5_with_58: mul58
port map (
in_mul58 => m5,
out_mul58 => m5_58
);
m6_with_db: muldb
port map (
in_muldb => m6,
out_muldb => m6_db
);
m7_with_9e: mul9e
port map (
in_mul9e => m7,
out_mul9e => m7_9e
);
-- the second row creates s01
m0_with_a4: mula4
port map (
in_mula4 => m0,
out_mula4 => m0_a4
);
m1_with_56: mul56
port map (
in_mul56 => m1,
out_mul56 => m1_56
);
m2_with_82: mul82
port map (
in_mul82 => m2,
out_mul82 => m2_82
);
m3_with_f3: mulf3
port map (
in_mulf3 => m3,
out_mulf3 => m3_f3
);
m4_with_1e: mul1e
port map (
in_mul1e => m4,
out_mul1e => m4_1e
);
m5_with_c6: mulc6
port map (
in_mulc6 => m5,
out_mulc6 => m5_c6
);
m6_with_68: mul68
port map (
in_mul68 => m6,
out_mul68 => m6_68
);
m7_with_e5: mule5
port map (
in_mule5 => m7,
out_mule5 => m7_e5
);
-- the third row creates s02
m0_with_02: mul02
port map (
in_mul02 => m0,
out_mul02 => m0_02
);
m1_with_a1: mula1
port map (
in_mula1 => m1,
out_mula1 => m1_a1
);
m2_with_fc: mulfc
port map (
in_mulfc => m2,
out_mulfc => m2_fc
);
m3_with_c1: mulc1
port map (
in_mulc1 => m3,
out_mulc1 => m3_c1
);
m4_with_47: mul47
port map (
in_mul47 => m4,
out_mul47 => m4_47
);
m5_with_ae: mulae
port map (
in_mulae => m5,
out_mulae => m5_ae
);
m6_with_3d: mul3d
port map (
in_mul3d => m6,
out_mul3d => m6_3d
);
m7_with_19: mul19
port map (
in_mul19 => m7,
out_mul19 => m7_19
);
-- the fourth row creates s03
m0_with_a4_1: mula4
port map (
in_mula4 => m0,
out_mula4 => m0_a4_1
);
m1_with_55: mul55
port map (
in_mul55 => m1,
out_mul55 => m1_55
);
m2_with_87: mul87
port map (
in_mul87 => m2,
out_mul87 => m2_87
);
m3_with_5a: mul5a
port map (
in_mul5a => m3,
out_mul5a => m3_5a
);
m4_with_58: mul58
port map (
in_mul58 => m4,
out_mul58 => m4_58
);
m5_with_db: muldb
port map (
in_muldb => m5,
out_muldb => m5_db
);
m6_with_9e: mul9e
port map (
in_mul9e => m6,
out_mul9e => m6_9e
);
m7_with_03: mul03
port map (
in_mul03 => m7,
out_mul03 => m7_03
);
-- we create the s1,j j=0..3
-- the first row of m8..15 creates the s10
m8_with_01: mul01
port map (
in_mul01 => m8,
out_mul01 => m8_01
);
m9_with_a4: mula4
port map (
in_mula4 => m9,
out_mula4 => m9_a4
);
m10_with_55: mul55
port map (
in_mul55 => m10,
out_mul55 => m10_55
);
m11_with_87: mul87
port map (
in_mul87 => m11,
out_mul87 => m11_87
);
m12_with_5a: mul5a
port map (
in_mul5a => m12,
out_mul5a => m12_5a
);
m13_with_58: mul58
port map (
in_mul58 => m13,
out_mul58 => m13_58
);
m14_with_db: muldb
port map (
in_muldb => m14,
out_muldb => m14_db
);
m15_with_9e: mul9e
port map (
in_mul9e => m15,
out_mul9e => m15_9e
);
-- the second row creates s11
m8_with_a4: mula4
port map (
in_mula4 => m8,
out_mula4 => m8_a4
);
m9_with_56: mul56
port map (
in_mul56 => m9,
out_mul56 => m9_56
);
m10_with_82: mul82
port map (
in_mul82 => m10,
out_mul82 => m10_82
);
m11_with_f3: mulf3
port map (
in_mulf3 => m11,
out_mulf3 => m11_f3
);
m12_with_1e: mul1e
port map (
in_mul1e => m12,
out_mul1e => m12_1e
);
m13_with_c6: mulc6
port map (
in_mulc6 => m13,
out_mulc6 => m13_c6
);
m14_with_68: mul68
port map (
in_mul68 => m14,
out_mul68 => m14_68
);
m15_with_e5: mule5
port map (
in_mule5 => m15,
out_mule5 => m15_e5
);
-- the third row creates s12
m8_with_02: mul02
port map (
in_mul02 => m8,
out_mul02 => m8_02
);
m9_with_a1: mula1
port map (
in_mula1 => m9,
out_mula1 => m9_a1
);
m10_with_fc: mulfc
port map (
in_mulfc => m10,
out_mulfc => m10_fc
);
m11_with_c1: mulc1
port map (
in_mulc1 => m11,
out_mulc1 => m11_c1
);
m12_with_47: mul47
port map (
in_mul47 => m12,
out_mul47 => m12_47
);
m13_with_ae: mulae
port map (
in_mulae => m13,
out_mulae => m13_ae
);
m14_with_3d: mul3d
port map (
in_mul3d => m14,
out_mul3d => m14_3d
);
m15_with_19: mul19
port map (
in_mul19 => m15,
out_mul19 => m15_19
);
-- the fourth row creates s13
m8_with_a4_1: mula4
port map (
in_mula4 => m8,
out_mula4 => m8_a4_1
);
m9_with_55: mul55
port map (
in_mul55 => m9,
out_mul55 => m9_55
);
m10_with_87: mul87
port map (
in_mul87 => m10,
out_mul87 => m10_87
);
m11_with_5a: mul5a
port map (
in_mul5a => m11,
out_mul5a => m11_5a
);
m12_with_58: mul58
port map (
in_mul58 => m12,
out_mul58 => m12_58
);
m13_with_db: muldb
port map (
in_muldb => m13,
out_muldb => m13_db
);
m14_with_9e: mul9e
port map (
in_mul9e => m14,
out_mul9e => m14_9e
);
m15_with_03: mul03
port map (
in_mul03 => m15,
out_mul03 => m15_03
);
-- we create the s2,j j=0..3
-- the first row of m16..23 creates the s20
m16_with_01: mul01
port map (
in_mul01 => m16,
out_mul01 => m16_01
);
m17_with_a4: mula4
port map (
in_mula4 => m17,
out_mula4 => m17_a4
);
m18_with_55: mul55
port map (
in_mul55 => m18,
out_mul55 => m18_55
);
m19_with_87: mul87
port map (
in_mul87 => m19,
out_mul87 => m19_87
);
m20_with_5a: mul5a
port map (
in_mul5a => m20,
out_mul5a => m20_5a
);
m21_with_58: mul58
port map (
in_mul58 => m21,
out_mul58 => m21_58
);
m22_with_db: muldb
port map (
in_muldb => m22,
out_muldb => m22_db
);
m23_with_9e: mul9e
port map (
in_mul9e => m23,
out_mul9e => m23_9e
);
-- the second row creates s21
m16_with_a4: mula4
port map (
in_mula4 => m16,
out_mula4 => m16_a4
);
m17_with_56: mul56
port map (
in_mul56 => m17,
out_mul56 => m17_56
);
m18_with_82: mul82
port map (
in_mul82 => m18,
out_mul82 => m18_82
);
m19_with_f3: mulf3
port map (
in_mulf3 => m19,
out_mulf3 => m19_f3
);
m20_with_1e: mul1e
port map (
in_mul1e => m20,
out_mul1e => m20_1e
);
m21_with_c6: mulc6
port map (
in_mulc6 => m21,
out_mulc6 => m21_c6
);
m22_with_68: mul68
port map (
in_mul68 => m22,
out_mul68 => m22_68
);
m23_with_e5: mule5
port map (
in_mule5 => m23,
out_mule5 => m23_e5
);
-- the third row creates s22
m16_with_02: mul02
port map (
in_mul02 => m16,
out_mul02 => m16_02
);
m17_with_a1: mula1
port map (
in_mula1 => m17,
out_mula1 => m17_a1
);
m18_with_fc: mulfc
port map (
in_mulfc => m18,
out_mulfc => m18_fc
);
m19_with_c1: mulc1
port map (
in_mulc1 => m19,
out_mulc1 => m19_c1
);
m20_with_47: mul47
port map (
in_mul47 => m20,
out_mul47 => m20_47
);
m21_with_ae: mulae
port map (
in_mulae => m21,
out_mulae => m21_ae
);
m22_with_3d: mul3d
port map (
in_mul3d => m22,
out_mul3d => m22_3d
);
m23_with_19: mul19
port map (
in_mul19 => m23,
out_mul19 => m23_19
);
-- the fourth row creates s23
m16_with_a4_1: mula4
port map (
in_mula4 => m16,
out_mula4 => m16_a4_1
);
m17_with_55: mul55
port map (
in_mul55 => m17,
out_mul55 => m17_55
);
m18_with_87: mul87
port map (
in_mul87 => m18,
out_mul87 => m18_87
);
m19_with_5a: mul5a
port map (
in_mul5a => m19,
out_mul5a => m19_5a
);
m20_with_58: mul58
port map (
in_mul58 => m20,
out_mul58 => m20_58
);
m21_with_db: muldb
port map (
in_muldb => m21,
out_muldb => m21_db
);
m22_with_9e: mul9e
port map (
in_mul9e => m22,
out_mul9e => m22_9e
);
m23_with_03: mul03
port map (
in_mul03 => m23,
out_mul03 => m23_03
);
-- we create the s3j j=0..3
-- the first row of m24..31 creates the s30
m24_with_01: mul01
port map (
in_mul01 => m24,
out_mul01 => m24_01
);
m25_with_a4: mula4
port map (
in_mula4 => m25,
out_mula4 => m25_a4
);
m26_with_55: mul55
port map (
in_mul55 => m26,
out_mul55 => m26_55
);
m27_with_87: mul87
port map (
in_mul87 => m27,
out_mul87 => m27_87
);
m28_with_5a: mul5a
port map (
in_mul5a => m28,
out_mul5a => m28_5a
);
m29_with_58: mul58
port map (
in_mul58 => m29,
out_mul58 => m29_58
);
m30_with_db: muldb
port map (
in_muldb => m30,
out_muldb => m30_db
);
m31_with_9e: mul9e
port map (
in_mul9e => m31,
out_mul9e => m31_9e
);
-- the second row creates s31
m24_with_a4: mula4
port map (
in_mula4 => m24,
out_mula4 => m24_a4
);
m25_with_56: mul56
port map (
in_mul56 => m25,
out_mul56 => m25_56
);
m26_with_82: mul82
port map (
in_mul82 => m26,
out_mul82 => m26_82
);
m27_with_f3: mulf3
port map (
in_mulf3 => m27,
out_mulf3 => m27_f3
);
m28_with_1e: mul1e
port map (
in_mul1e => m28,
out_mul1e => m28_1e
);
m29_with_c6: mulc6
port map (
in_mulc6 => m29,
out_mulc6 => m29_c6
);
m30_with_68: mul68
port map (
in_mul68 => m30,
out_mul68 => m30_68
);
m31_with_e5: mule5
port map (
in_mule5 => m31,
out_mule5 => m31_e5
);
-- the third row creates s32
m24_with_02: mul02
port map (
in_mul02 => m24,
out_mul02 => m24_02
);
m25_with_a1: mula1
port map (
in_mula1 => m25,
out_mula1 => m25_a1
);
m26_with_fc: mulfc
port map (
in_mulfc => m26,
out_mulfc => m26_fc
);
m27_with_c1: mulc1
port map (
in_mulc1 => m27,
out_mulc1 => m27_c1
);
m28_with_47: mul47
port map (
in_mul47 => m28,
out_mul47 => m28_47
);
m29_with_ae: mulae
port map (
in_mulae => m29,
out_mulae => m29_ae
);
m30_with_3d: mul3d
port map (
in_mul3d => m30,
out_mul3d => m30_3d
);
m31_with_19: mul19
port map (
in_mul19 => m31,
out_mul19 => m31_19
);
-- the fourth row creates s33
m24_with_a4_1: mula4
port map (
in_mula4 => m24,
out_mula4 => m24_a4_1
);
m25_with_55: mul55
port map (
in_mul55 => m25,
out_mul55 => m25_55
);
m26_with_87: mul87
port map (
in_mul87 => m26,
out_mul87 => m26_87
);
m27_with_5a: mul5a
port map (
in_mul5a => m27,
out_mul5a => m27_5a
);
m28_with_58: mul58
port map (
in_mul58 => m28,
out_mul58 => m28_58
);
m29_with_db: muldb
port map (
in_muldb => m29,
out_muldb => m29_db
);
m30_with_9e: mul9e
port map (
in_mul9e => m30,
out_mul9e => m30_9e
);
m31_with_03: mul03
port map (
in_mul03 => m31,
out_mul03 => m31_03
);
-- after getting the results from multipliers
-- we combine them in order to get the additions
s00 <= m0_01 XOR m1_a4 XOR m2_55 XOR m3_87 XOR m4_5a XOR m5_58 XOR m6_db XOR m7_9e;
s01 <= m0_a4 XOR m1_56 XOR m2_82 XOR m3_f3 XOR m4_1e XOR m5_c6 XOR m6_68 XOR m7_e5;
s02 <= m0_02 XOR m1_a1 XOR m2_fc XOR m3_c1 XOR m4_47 XOR m5_ae XOR m6_3d XOR m7_19;
s03 <= m0_a4_1 XOR m1_55 XOR m2_87 XOR m3_5a XOR m4_58 XOR m5_db XOR m6_9e XOR m7_03;
-- after creating s0,j j=0...3 we form the S0
-- little endian
out_Sfirst_rs256 <= s03 & s02 & s01 & s00;
s10 <= m8_01 XOR m9_a4 XOR m10_55 XOR m11_87 XOR m12_5a XOR m13_58 XOR m14_db XOR m15_9e;
s11 <= m8_a4 XOR m9_56 XOR m10_82 XOR m11_f3 XOR m12_1e XOR m13_c6 XOR m14_68 XOR m15_e5;
s12 <= m8_02 XOR m9_a1 XOR m10_fc XOR m11_c1 XOR m12_47 XOR m13_ae XOR m14_3d XOR m15_19;
s13 <= m8_a4_1 XOR m9_55 XOR m10_87 XOR m11_5a XOR m12_58 XOR m13_db XOR m14_9e XOR m15_03;
-- after creating s1,j j=0...3 we form the S1
-- little endian
out_Ssecond_rs256 <= s13 & s12 & s11 & s10;
s20 <= m16_01 XOR m17_a4 XOR m18_55 XOR m19_87 XOR m20_5a XOR m21_58 XOR m22_db XOR m23_9e;
s21 <= m16_a4 XOR m17_56 XOR m18_82 XOR m19_f3 XOR m20_1e XOR m21_c6 XOR m22_68 XOR m23_e5;
s22 <= m16_02 XOR m17_a1 XOR m18_fc XOR m19_c1 XOR m20_47 XOR m21_ae XOR m22_3d XOR m23_19;
s23 <= m16_a4_1 XOR m17_55 XOR m18_87 XOR m19_5a XOR m20_58 XOR m21_db XOR m22_9e XOR m23_03;
-- after creating s2j j=0...3 we form the S2
-- little endian
out_Sthird_rs256 <= s23 & s22 & s21 & s20;
s30 <= m24_01 XOR m25_a4 XOR m26_55 XOR m27_87 XOR m28_5a XOR m29_58 XOR m30_db XOR m31_9e;
s31 <= m24_a4 XOR m25_56 XOR m26_82 XOR m27_f3 XOR m28_1e XOR m29_c6 XOR m30_68 XOR m31_e5;
s32 <= m24_02 XOR m25_a1 XOR m26_fc XOR m27_c1 XOR m28_47 XOR m29_ae XOR m30_3d XOR m31_19;
s33 <= m24_a4_1 XOR m25_55 XOR m26_87 XOR m27_5a XOR m28_58 XOR m29_db XOR m30_9e XOR m31_03;
-- after creating s3j j=0...3 we form the S3
-- little endian
out_Sfourth_rs256 <= s33 & s32 & s31 & s30;
end rs_256_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- h function for 256 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity h_256 is
port (
in_h256 : in std_logic_vector(7 downto 0);
Mfirst_h256,
Msecond_h256,
Mthird_h256,
Mfourth_h256 : in std_logic_vector(31 downto 0);
out_h256 : out std_logic_vector(31 downto 0)
);
end h_256;
architecture h256_arch of h_256 is
-- we declare internal signals
signal from_first_row,
to_second_row,
from_second_row,
to_third_row,
from_third_row,
to_fourth_row,
from_fourth_row,
to_fifth_row,
to_mds : std_logic_vector(31 downto 0);
-- we declare all components needed
component q0
port (
in_q0 : in std_logic_vector(7 downto 0);
out_q0 : out std_logic_vector(7 downto 0)
);
end component;
component q1
port (
in_q1 : in std_logic_vector(7 downto 0);
out_q1 : out std_logic_vector(7 downto 0)
);
end component;
component mds
port (
y0,
y1,
y2,
y3 : in std_logic_vector(7 downto 0);
z0,
z1,
z2,
z3 : out std_logic_vector(7 downto 0)
);
end component;
-- begin architecture description
begin
-- first row of q
first_q1_1: q1
port map (
in_q1 => in_h256,
out_q1 => from_first_row(7 downto 0)
);
first_q0_1: q0
port map (
in_q0 => in_h256,
out_q0 => from_first_row(15 downto 8)
);
first_q0_2: q0
port map (
in_q0 => in_h256,
out_q0 => from_first_row(23 downto 16)
);
first_q1_2: q1
port map (
in_q1 => in_h256,
out_q1 => from_first_row(31 downto 24)
);
-- we perform the XOR of the results of the first row
-- with first M of h (Mfirst_h256)
to_second_row <= from_first_row XOR Mfirst_h256;
-- second row of q
second_q1_1: q1
port map (
in_q1 => to_second_row(7 downto 0),
out_q1 => from_second_row(7 downto 0)
);
second_q1_2: q1
port map (
in_q1 => to_second_row(15 downto 8),
out_q1 => from_second_row(15 downto 8)
);
second_q0_1: q0
port map (
in_q0 => to_second_row(23 downto 16),
out_q0 => from_second_row(23 downto 16)
);
second_q0_2: q0
port map (
in_q0 => to_second_row(31 downto 24),
out_q0 => from_second_row(31 downto 24)
);
-- we perform the XOR of the results of the second row
-- with second M of h (Msecond_h256)
to_third_row <= from_second_row XOR Msecond_h256;
-- third row of q
third_q0_1: q0
port map (
in_q0 => to_third_row(7 downto 0),
out_q0 => from_third_row(7 downto 0)
);
third_q1_1: q1
port map (
in_q1 => to_third_row(15 downto 8),
out_q1 => from_third_row(15 downto 8)
);
third_q0_2: q0
port map (
in_q0 => to_third_row(23 downto 16),
out_q0 => from_third_row(23 downto 16)
);
third_q1_2: q1
port map (
in_q1 => to_third_row(31 downto 24),
out_q1 => from_third_row(31 downto 24)
);
-- we perform the XOR of the results of the third row
-- with third M of h (Mthird_h256)
to_fourth_row <= from_third_row XOR Mthird_h256;
-- fourth row of q
fourth_q0_1: q0
port map (
in_q0 => to_fourth_row(7 downto 0),
out_q0 => from_fourth_row(7 downto 0)
);
fourth_q0_2: q0
port map (
in_q0 => to_fourth_row(15 downto 8),
out_q0 => from_fourth_row(15 downto 8)
);
fourth_q1_1: q1
port map (
in_q1 => to_fourth_row(23 downto 16),
out_q1 => from_fourth_row(23 downto 16)
);
fourth_q1_2: q1
port map (
in_q1 => to_fourth_row(31 downto 24),
out_q1 => from_fourth_row(31 downto 24)
);
-- we perform the fourth XOR
to_fifth_row <= from_fourth_row XOR Mfourth_h256;
-- the fifth row of q
fifth_q1_1: q1
port map (
in_q1 => to_fifth_row(7 downto 0),
out_q1 => to_mds(7 downto 0)
);
fifth_q0_1: q0
port map (
in_q0 => to_fifth_row(15 downto 8),
out_q0 => to_mds(15 downto 8)
);
fifth_q1_2: q1
port map (
in_q1 => to_fifth_row(23 downto 16),
out_q1 => to_mds(23 downto 16)
);
fifth_q0_2: q0
port map (
in_q0 => to_fifth_row(31 downto 24),
out_q0 => to_mds(31 downto 24)
);
-- mds table
mds_table: mds
port map (
y0 => to_mds(7 downto 0),
y1 => to_mds(15 downto 8),
y2 => to_mds(23 downto 16),
y3 => to_mds(31 downto 24),
z0 => out_h256(7 downto 0),
z1 => out_h256(15 downto 8),
z2 => out_h256(23 downto 16),
z3 => out_h256(31 downto 24)
);
end h256_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- g function for 256 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity g_256 is
port (
in_g256,
in_S0_g256,
in_S1_g256,
in_S2_g256,
in_S3_g256 : in std_logic_vector(31 downto 0);
out_g256 : out std_logic_vector(31 downto 0)
);
end g_256;
architecture g256_arch of g_256 is
-- we declare the internal signals
signal from_first_row,
to_second_row,
from_second_row,
to_third_row,
from_third_row,
to_fourth_row,
from_fourth_row,
to_fifth_row,
to_mds : std_logic_vector(31 downto 0);
component q0
port (
in_q0 : in std_logic_vector(7 downto 0);
out_q0 : out std_logic_vector(7 downto 0)
);
end component;
component q1
port (
in_q1 : in std_logic_vector(7 downto 0);
out_q1 : out std_logic_vector(7 downto 0)
);
end component;
component mds
port (
y0,
y1,
y2,
y3 : in std_logic_vector(7 downto 0);
z0,
z1,
z2,
z3 : out std_logic_vector(7 downto 0)
);
end component;
-- begin architecture description
begin
-- first row of q
first_q1_1: q1
port map (
in_q1 => in_g256(7 downto 0),
out_q1 => from_first_row(7 downto 0)
);
first_q0_1: q0
port map (
in_q0 => in_g256(15 downto 8),
out_q0 => from_first_row(15 downto 8)
);
first_q0_2: q0
port map (
in_q0 => in_g256(23 downto 16),
out_q0 => from_first_row(23 downto 16)
);
first_q1_2: q1
port map (
in_q1 => in_g256(31 downto 24),
out_q1 => from_first_row(31 downto 24)
);
-- we perform the XOR of the results of the first row
-- with S0
to_second_row <= from_first_row XOR in_S0_g256;
-- second row of q
second_q1_1: q1
port map (
in_q1 => to_second_row(7 downto 0),
out_q1 => from_second_row(7 downto 0)
);
second_q1_2: q1
port map (
in_q1 => to_second_row(15 downto 8),
out_q1 => from_second_row(15 downto 8)
);
second_q0_1: q0
port map (
in_q0 => to_second_row(23 downto 16),
out_q0 => from_second_row(23 downto 16)
);
second_q0_2: q0
port map (
in_q0 => to_second_row(31 downto 24),
out_q0 => from_second_row(31 downto 24)
);
-- we perform the XOR of the results of the second row
-- with S1
to_third_row <= from_second_row XOR in_S1_g256;
-- third row of q
third_q0_1: q0
port map (
in_q0 => to_third_row(7 downto 0),
out_q0 => from_third_row(7 downto 0)
);
third_q1_1: q1
port map (
in_q1 => to_third_row(15 downto 8),
out_q1 => from_third_row(15 downto 8)
);
third_q0_2: q0
port map (
in_q0 => to_third_row(23 downto 16),
out_q0 => from_third_row(23 downto 16)
);
third_q1_2: q1
port map (
in_q1 => to_third_row(31 downto 24),
out_q1 => from_third_row(31 downto 24)
);
-- we perform the XOR of the results of the third row
-- with S2
to_fourth_row <= from_third_row XOR in_S2_g256;
-- fourth row of q
fourth_q0_1: q0
port map (
in_q0 => to_fourth_row(7 downto 0),
out_q0 => from_fourth_row(7 downto 0)
);
fourth_q0_2: q0
port map (
in_q0 => to_fourth_row(15 downto 8),
out_q0 => from_fourth_row(15 downto 8)
);
fourth_q1_1: q1
port map (
in_q1 => to_fourth_row(23 downto 16),
out_q1 => from_fourth_row(23 downto 16)
);
fourth_q1_2: q1
port map (
in_q1 => to_fourth_row(31 downto 24),
out_q1 => from_fourth_row(31 downto 24)
);
-- we perform the fourth XOR
to_fifth_row <= from_fourth_row XOR in_S3_g256;
-- the fifth row of q
fifth_q1_1: q1
port map (
in_q1 => to_fifth_row(7 downto 0),
out_q1 => to_mds(7 downto 0)
);
fifth_q0_1: q0
port map (
in_q0 => to_fifth_row(15 downto 8),
out_q0 => to_mds(15 downto 8)
);
fifth_q1_2: q1
port map (
in_q1 => to_fifth_row(23 downto 16),
out_q1 => to_mds(23 downto 16)
);
fifth_q0_2: q0
port map (
in_q0 => to_fifth_row(31 downto 24),
out_q0 => to_mds(31 downto 24)
);
-- mds table
mds_table: mds
port map (
y0 => to_mds(7 downto 0),
y1 => to_mds(15 downto 8),
y2 => to_mds(23 downto 16),
y3 => to_mds(31 downto 24),
z0 => out_g256(7 downto 0),
z1 => out_g256(15 downto 8),
z2 => out_g256(23 downto 16),
z3 => out_g256(31 downto 24)
);
end g256_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- f function with 256 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity f_256 is
port (
up_in_f256,
low_in_f256,
S0_in_f256,
S1_in_f256,
S2_in_f256,
S3_in_f256,
up_key_f256,
low_key_f256 : in std_logic_vector(31 downto 0);
up_out_f256,
low_out_f256 : out std_logic_vector(31 downto 0)
);
end f_256;
architecture f256_arch of f_256 is
-- we declare the internal signals
signal from_shift_8,
to_up_pht,
to_low_pht,
to_up_key,
to_low_key,
intermediate_carry1,
intermediate_carry2 : std_logic_vector(31 downto 0);
signal zero : std_logic;
component g_256
port (
in_g256,
in_S0_g256,
in_S1_g256,
in_S2_g256,
in_S3_g256 : in std_logic_vector(31 downto 0);
out_g256 : out std_logic_vector(31 downto 0)
);
end component;
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component adder
port (
in1_adder,
in2_adder,
in_carry_adder : in std_logic;
out_adder,
out_carry_adder : out std_logic
);
end component;
-- begin architecture description
begin
-- we initialize zero
zero <= '0';
-- upper g_256
upper_g256: g_256
port map (
in_g256 => up_in_f256,
in_S0_g256 => S0_in_f256,
in_S1_g256 => S1_in_f256,
in_S2_g256 => S2_in_f256,
in_S3_g256 => S3_in_f256,
out_g256 => to_up_pht
);
-- left rotation by 8
from_shift_8(31 downto 8) <= low_in_f256(23 downto 0);
from_shift_8(7 downto 0) <= low_in_f256(31 downto 24);
-- lower g256
lower_g256: g_256
port map (
in_g256 => from_shift_8,
in_S0_g256 => S0_in_f256,
in_S1_g256 => S1_in_f256,
in_S2_g256 => S2_in_f256,
in_S3_g256 => S3_in_f256,
out_g256 => to_low_pht
);
-- pht
pht_transform: pht
port map (
up_in_pht => to_up_pht,
down_in_pht => to_low_pht,
up_out_pht => to_up_key,
down_out_pht => to_low_key
);
-- upper adder of 32 bits
up_adder: for i in 0 to 31 generate
first: if (i=0) generate
the_adder: adder
port map (
in1_adder => to_up_key(0),
in2_adder => up_key_f256(0),
in_carry_adder => zero,
out_adder => up_out_f256(0),
out_carry_adder => intermediate_carry1(0)
);
end generate first;
the_rest: if (i>0) generate
the_adders: adder
port map (
in1_adder => to_up_key(i),
in2_adder => up_key_f256(i),
in_carry_adder => intermediate_carry1(i-1),
out_adder => up_out_f256(i),
out_carry_adder => intermediate_carry1(i)
);
end generate the_rest;
end generate up_adder;
-- lower adder of 32 bits
low_adder: for i in 0 to 31 generate
first1: if (i=0) generate
the_adder1:adder
port map (
in1_adder => to_low_key(0),
in2_adder => low_key_f256(0),
in_carry_adder => zero,
out_adder => low_out_f256(0),
out_carry_adder => intermediate_carry2(0)
);
end generate first1;
the_rest1: if (i>0) generate
the_adders1: adder
port map (
in1_adder => to_low_key(i),
in2_adder => low_key_f256(i),
in_carry_adder => intermediate_carry2(i-1),
out_adder => low_out_f256(i),
out_carry_adder => intermediate_carry2(i)
);
end generate the_rest1;
end generate low_adder;
end f256_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish key scheduler for 256 bits key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_keysched256 is
port (
odd_in_tk256,
even_in_tk256 : in std_logic_vector(7 downto 0);
in_key_tk256 : in std_logic_vector(255 downto 0);
out_key_up_tk256,
out_key_down_tk256 : out std_logic_vector(31 downto 0)
);
end twofish_keysched256;
architecture twofish_keysched256_arch of twofish_keysched256 is
-- we declare internal signals
signal to_up_pht,
to_shift_8,
from_shift_8,
to_shift_9,
M0, M1, M2, M3, M4, M5, M6, M7 : std_logic_vector(31 downto 0);
signal byte15, byte14, byte13, byte12, byte11, byte10,
byte9, byte8, byte7, byte6, byte5, byte4,
byte3, byte2, byte1, byte0,
byte16, byte17, byte18, byte19,
byte20, byte21, byte22, byte23,
byte24, byte25, byte26, byte27,
byte28, byte29, byte30, byte31 : std_logic_vector(7 downto 0);
-- we declare the components to be used
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component h_256
port (
in_h256 : in std_logic_vector(7 downto 0);
Mfirst_h256,
Msecond_h256,
Mthird_h256,
Mfourth_h256 : in std_logic_vector(31 downto 0);
out_h256 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we assign the input signal to the respective
-- bytes as is described in the prototype
-- splitting the input
byte31 <= in_key_tk256(7 downto 0);
byte30 <= in_key_tk256(15 downto 8);
byte29 <= in_key_tk256(23 downto 16);
byte28 <= in_key_tk256(31 downto 24);
byte27 <= in_key_tk256(39 downto 32);
byte26 <= in_key_tk256(47 downto 40);
byte25 <= in_key_tk256(55 downto 48);
byte24 <= in_key_tk256(63 downto 56);
byte23 <= in_key_tk256(71 downto 64);
byte22 <= in_key_tk256(79 downto 72);
byte21 <= in_key_tk256(87 downto 80);
byte20 <= in_key_tk256(95 downto 88);
byte19 <= in_key_tk256(103 downto 96);
byte18 <= in_key_tk256(111 downto 104);
byte17 <= in_key_tk256(119 downto 112);
byte16 <= in_key_tk256(127 downto 120);
byte15 <= in_key_tk256(135 downto 128);
byte14 <= in_key_tk256(143 downto 136);
byte13 <= in_key_tk256(151 downto 144);
byte12 <= in_key_tk256(159 downto 152);
byte11 <= in_key_tk256(167 downto 160);
byte10 <= in_key_tk256(175 downto 168);
byte9 <= in_key_tk256(183 downto 176);
byte8 <= in_key_tk256(191 downto 184);
byte7 <= in_key_tk256(199 downto 192);
byte6 <= in_key_tk256(207 downto 200);
byte5 <= in_key_tk256(215 downto 208);
byte4 <= in_key_tk256(223 downto 216);
byte3 <= in_key_tk256(231 downto 224);
byte2 <= in_key_tk256(239 downto 232);
byte1 <= in_key_tk256(247 downto 240);
byte0 <= in_key_tk256(255 downto 248);
-- we form the M{0..7}
M0 <= byte3 & byte2 & byte1 & byte0;
M1 <= byte7 & byte6 & byte5 & byte4;
M2 <= byte11 & byte10 & byte9 & byte8;
M3 <= byte15 & byte14 & byte13 & byte12;
M4 <= byte19 & byte18 & byte17 & byte16;
M5 <= byte23 & byte22 & byte21 & byte20;
M6 <= byte27 & byte26 & byte25 & byte24;
M7 <= byte31 & byte30 & byte29 & byte28;
-- upper h
upper_h: h_256
port map (
in_h256 => even_in_tk256,
Mfirst_h256 => M6,
Msecond_h256 => M4,
Mthird_h256 => M2,
Mfourth_h256 => M0,
out_h256 => to_up_pht
);
-- lower h
lower_h: h_256
port map (
in_h256 => odd_in_tk256,
Mfirst_h256 => M7,
Msecond_h256 => M5,
Mthird_h256 => M3,
Mfourth_h256 => M1,
out_h256 => to_shift_8
);
-- left rotate by 8
from_shift_8(31 downto 8) <= to_shift_8(23 downto 0);
from_shift_8(7 downto 0) <= to_shift_8(31 downto 24);
-- pht transformation
pht_transform: pht
port map (
up_in_pht => to_up_pht,
down_in_pht => from_shift_8,
up_out_pht => out_key_up_tk256,
down_out_pht => to_shift_9
);
-- left rotate by 9
out_key_down_tk256(31 downto 9) <= to_shift_9(22 downto 0);
out_key_down_tk256(8 downto 0) <= to_shift_9(31 downto 23);
end twofish_keysched256_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish S key component for 256 bits key
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_S256 is
port (
in_key_ts256 : in std_logic_vector(255 downto 0);
out_Sfirst_ts256,
out_Ssecond_ts256,
out_Sthird_ts256,
out_Sfourth_ts256 : out std_logic_vector(31 downto 0)
);
end twofish_S256;
architecture twofish_S256_arch of twofish_S256 is
-- we declare the components to be used
component reed_solomon256
port (
in_rs256 : in std_logic_vector(255 downto 0);
out_Sfirst_rs256,
out_Ssecond_rs256,
out_Sthird_rs256,
out_Sfourth_rs256 : out std_logic_vector(31 downto 0)
);
end component;
signal twofish_key : std_logic_vector(255 downto 0);
signal byte15, byte14, byte13, byte12, byte11, byte10,
byte9, byte8, byte7, byte6, byte5, byte4,
byte3, byte2, byte1, byte0,
byte16, byte17, byte18, byte19,
byte20, byte21, byte22, byte23,
byte24, byte25, byte26, byte27,
byte28, byte29, byte30, byte31 : std_logic_vector(7 downto 0);
-- begin architecture description
begin
-- splitting the input
byte31 <= in_key_ts256(7 downto 0);
byte30 <= in_key_ts256(15 downto 8);
byte29 <= in_key_ts256(23 downto 16);
byte28 <= in_key_ts256(31 downto 24);
byte27 <= in_key_ts256(39 downto 32);
byte26 <= in_key_ts256(47 downto 40);
byte25 <= in_key_ts256(55 downto 48);
byte24 <= in_key_ts256(63 downto 56);
byte23 <= in_key_ts256(71 downto 64);
byte22 <= in_key_ts256(79 downto 72);
byte21 <= in_key_ts256(87 downto 80);
byte20 <= in_key_ts256(95 downto 88);
byte19 <= in_key_ts256(103 downto 96);
byte18 <= in_key_ts256(111 downto 104);
byte17 <= in_key_ts256(119 downto 112);
byte16 <= in_key_ts256(127 downto 120);
byte15 <= in_key_ts256(135 downto 128);
byte14 <= in_key_ts256(143 downto 136);
byte13 <= in_key_ts256(151 downto 144);
byte12 <= in_key_ts256(159 downto 152);
byte11 <= in_key_ts256(167 downto 160);
byte10 <= in_key_ts256(175 downto 168);
byte9 <= in_key_ts256(183 downto 176);
byte8 <= in_key_ts256(191 downto 184);
byte7 <= in_key_ts256(199 downto 192);
byte6 <= in_key_ts256(207 downto 200);
byte5 <= in_key_ts256(215 downto 208);
byte4 <= in_key_ts256(223 downto 216);
byte3 <= in_key_ts256(231 downto 224);
byte2 <= in_key_ts256(239 downto 232);
byte1 <= in_key_ts256(247 downto 240);
byte0 <= in_key_ts256(255 downto 248);
-- forming the key
twofish_key <= byte31 & byte30 & byte29 & byte28 & byte27 & byte26 & byte25 & byte24 &
byte23 & byte22 & byte21 & byte20 & byte19 & byte18 & byte17 & byte16 &
byte15 & byte14 & byte13 & byte12 & byte11 & byte10 & byte9 & byte8 & byte7 &
byte6 & byte5 & byte4 & byte3 & byte2 & byte1 & byte0;
-- the keys S0,1,2,3
produce_S0_S1_S2_S3: reed_solomon256
port map (
in_rs256 => twofish_key,
out_Sfirst_rs256 => out_Sfirst_ts256,
out_Ssecond_rs256 => out_Ssecond_ts256,
out_Sthird_rs256 => out_Sthird_ts256,
out_Sfourth_rs256 => out_Sfourth_ts256
);
end twofish_S256_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish whitening key scheduler for 256 bits key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_whit_keysched256 is
port (
in_key_twk256 : in std_logic_vector(255 downto 0);
out_K0_twk256,
out_K1_twk256,
out_K2_twk256,
out_K3_twk256,
out_K4_twk256,
out_K5_twk256,
out_K6_twk256,
out_K7_twk256 : out std_logic_vector(31 downto 0)
);
end twofish_whit_keysched256;
architecture twofish_whit_keysched256_arch of twofish_whit_keysched256 is
-- we declare internal signals
signal to_up_pht_1,
to_shift_8_1,
from_shift_8_1,
to_shift_9_1,
to_up_pht_2,
to_shift_8_2,
from_shift_8_2,
to_shift_9_2,
to_up_pht_3,
to_shift_8_3,
from_shift_8_3,
to_shift_9_3,
to_up_pht_4,
to_shift_8_4,
from_shift_8_4,
to_shift_9_4,
M0, M1, M2, M3, M4, M5, M6, M7 : std_logic_vector(31 downto 0);
signal byte15, byte14, byte13, byte12, byte11, byte10,
byte9, byte8, byte7, byte6, byte5, byte4,
byte3, byte2, byte1, byte0,
byte16, byte17, byte18, byte19,
byte20, byte21, byte22, byte23,
byte24, byte25, byte26, byte27,
byte28, byte29, byte30, byte31 : std_logic_vector(7 downto 0);
signal zero, one, two, three, four, five, six, seven : std_logic_vector(7 downto 0);
-- we declare the components to be used
component pht
port (
up_in_pht,
down_in_pht : in std_logic_vector(31 downto 0);
up_out_pht,
down_out_pht : out std_logic_vector(31 downto 0)
);
end component;
component h_256
port (
in_h256 : in std_logic_vector(7 downto 0);
Mfirst_h256,
Msecond_h256,
Mthird_h256,
Mfourth_h256 : in std_logic_vector(31 downto 0);
out_h256 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we produce the first eight numbers
zero <= "00000000";
one <= "00000001";
two <= "00000010";
three <= "00000011";
four <= "00000100";
five <= "00000101";
six <= "00000110";
seven <= "00000111";
-- we assign the input signal to the respective
-- bytes as is described in the prototype
byte31 <= in_key_twk256(7 downto 0);
byte30 <= in_key_twk256(15 downto 8);
byte29 <= in_key_twk256(23 downto 16);
byte28 <= in_key_twk256(31 downto 24);
byte27 <= in_key_twk256(39 downto 32);
byte26 <= in_key_twk256(47 downto 40);
byte25 <= in_key_twk256(55 downto 48);
byte24 <= in_key_twk256(63 downto 56);
byte23 <= in_key_twk256(71 downto 64);
byte22 <= in_key_twk256(79 downto 72);
byte21 <= in_key_twk256(87 downto 80);
byte20 <= in_key_twk256(95 downto 88);
byte19 <= in_key_twk256(103 downto 96);
byte18 <= in_key_twk256(111 downto 104);
byte17 <= in_key_twk256(119 downto 112);
byte16 <= in_key_twk256(127 downto 120);
byte15 <= in_key_twk256(135 downto 128);
byte14 <= in_key_twk256(143 downto 136);
byte13 <= in_key_twk256(151 downto 144);
byte12 <= in_key_twk256(159 downto 152);
byte11 <= in_key_twk256(167 downto 160);
byte10 <= in_key_twk256(175 downto 168);
byte9 <= in_key_twk256(183 downto 176);
byte8 <= in_key_twk256(191 downto 184);
byte7 <= in_key_twk256(199 downto 192);
byte6 <= in_key_twk256(207 downto 200);
byte5 <= in_key_twk256(215 downto 208);
byte4 <= in_key_twk256(223 downto 216);
byte3 <= in_key_twk256(231 downto 224);
byte2 <= in_key_twk256(239 downto 232);
byte1 <= in_key_twk256(247 downto 240);
byte0 <= in_key_twk256(255 downto 248);
-- we form the M{0..7}
M0 <= byte3 & byte2 & byte1 & byte0;
M1 <= byte7 & byte6 & byte5 & byte4;
M2 <= byte11 & byte10 & byte9 & byte8;
M3 <= byte15 & byte14 & byte13 & byte12;
M4 <= byte19 & byte18 & byte17 & byte16;
M5 <= byte23 & byte22 & byte21 & byte20;
M6 <= byte27 & byte26 & byte25 & byte24;
M7 <= byte31 & byte30 & byte29 & byte28;
-- we produce the keys for the whitening steps
-- keys K0,1
-- upper h
upper_h1: h_256
port map (
in_h256 => zero,
Mfirst_h256 => M6,
Msecond_h256 => M4,
Mthird_h256 => M2,
Mfourth_h256 => M0,
out_h256 => to_up_pht_1
);
-- lower h
lower_h1: h_256
port map (
in_h256 => one,
Mfirst_h256 => M7,
Msecond_h256 => M5,
Mthird_h256 => M3,
Mfourth_h256 => M1,
out_h256 => to_shift_8_1
);
-- left rotate by 8
from_shift_8_1(31 downto 8) <= to_shift_8_1(23 downto 0);
from_shift_8_1(7 downto 0) <= to_shift_8_1(31 downto 24);
-- pht transformation
pht_transform1: pht
port map (
up_in_pht => to_up_pht_1,
down_in_pht => from_shift_8_1,
up_out_pht => out_K0_twk256,
down_out_pht => to_shift_9_1
);
-- left rotate by 9
out_K1_twk256(31 downto 9) <= to_shift_9_1(22 downto 0);
out_K1_twk256(8 downto 0) <= to_shift_9_1(31 downto 23);
-- keys K2,3
-- upper h
upper_h2: h_256
port map (
in_h256 => two,
Mfirst_h256 => M6,
Msecond_h256 => M4,
Mthird_h256 => M2,
Mfourth_h256 => M0,
out_h256 => to_up_pht_2
);
-- lower h
lower_h2: h_256
port map (
in_h256 => three,
Mfirst_h256 => M7,
Msecond_h256 => M5,
Mthird_h256 => M3,
Mfourth_h256 => M1,
out_h256 => to_shift_8_2
);
-- left rotate by 8
from_shift_8_2(31 downto 8) <= to_shift_8_2(23 downto 0);
from_shift_8_2(7 downto 0) <= to_shift_8_2(31 downto 24);
-- pht transformation
pht_transform2: pht
port map (
up_in_pht => to_up_pht_2,
down_in_pht => from_shift_8_2,
up_out_pht => out_K2_twk256,
down_out_pht => to_shift_9_2
);
-- left rotate by 9
out_K3_twk256(31 downto 9) <= to_shift_9_2(22 downto 0);
out_K3_twk256(8 downto 0) <= to_shift_9_2(31 downto 23);
-- keys K4,5
-- upper h
upper_h3: h_256
port map (
in_h256 => four,
Mfirst_h256 => M6,
Msecond_h256 => M4,
Mthird_h256 => M2,
Mfourth_h256 => M0,
out_h256 => to_up_pht_3
);
-- lower h
lower_h3: h_256
port map (
in_h256 => five,
Mfirst_h256 => M7,
Msecond_h256 => M5,
Mthird_h256 => M3,
Mfourth_h256 => M1,
out_h256 => to_shift_8_3
);
-- left rotate by 8
from_shift_8_3(31 downto 8) <= to_shift_8_3(23 downto 0);
from_shift_8_3(7 downto 0) <= to_shift_8_3(31 downto 24);
-- pht transformation
pht_transform3: pht
port map (
up_in_pht => to_up_pht_3,
down_in_pht => from_shift_8_3,
up_out_pht => out_K4_twk256,
down_out_pht => to_shift_9_3
);
-- left rotate by 9
out_K5_twk256(31 downto 9) <= to_shift_9_3(22 downto 0);
out_K5_twk256(8 downto 0) <= to_shift_9_3(31 downto 23);
-- keys K6,7
-- upper h
upper_h4: h_256
port map (
in_h256 => six,
Mfirst_h256 => M6,
Msecond_h256 => M4,
Mthird_h256 => M2,
Mfourth_h256 => M0,
out_h256 => to_up_pht_4
);
-- lower h
lower_h4: h_256
port map (
in_h256 => seven,
Mfirst_h256 => M7,
Msecond_h256 => M5,
Mthird_h256 => M3,
Mfourth_h256 => M1,
out_h256 => to_shift_8_4
);
-- left rotate by 8
from_shift_8_4(31 downto 8) <= to_shift_8_4(23 downto 0);
from_shift_8_4(7 downto 0) <= to_shift_8_4(31 downto 24);
-- pht transformation
pht_transform4: pht
port map (
up_in_pht => to_up_pht_4,
down_in_pht => from_shift_8_4,
up_out_pht => out_K6_twk256,
down_out_pht => to_shift_9_4
);
-- left rotate by 9
out_K7_twk256(31 downto 9) <= to_shift_9_4(22 downto 0);
out_K7_twk256(8 downto 0) <= to_shift_9_4(31 downto 23);
end twofish_whit_keysched256_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish encryption round with 256 bit key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_encryption_round256 is
port (
in1_ter256,
in2_ter256,
in3_ter256,
in4_ter256,
in_Sfirst_ter256,
in_Ssecond_ter256,
in_Sthird_ter256,
in_Sfourth_ter256,
in_key_up_ter256,
in_key_down_ter256 : in std_logic_vector(31 downto 0);
out1_ter256,
out2_ter256,
out3_ter256,
out4_ter256 : out std_logic_vector(31 downto 0)
);
end twofish_encryption_round256;
architecture twofish_encryption_round256_arch of twofish_encryption_round256 is
-- we declare internal signals
signal to_left_shift,
from_right_shift,
to_xor_with3,
to_xor_with4 : std_logic_vector(31 downto 0);
component f_256
port (
up_in_f256,
low_in_f256,
S0_in_f256,
S1_in_f256,
S2_in_f256,
S3_in_f256,
up_key_f256,
low_key_f256 : in std_logic_vector(31 downto 0);
up_out_f256,
low_out_f256 : out std_logic_vector(31 downto 0)
);
end component;
-- begin architecture description
begin
-- we declare f_256
function_f: f_256
port map (
up_in_f256 => in1_ter256,
low_in_f256 => in2_ter256,
S0_in_f256 => in_Sfirst_ter256,
S1_in_f256 => in_Ssecond_ter256,
S2_in_f256 => in_Sthird_ter256,
S3_in_f256 => in_Sfourth_ter256,
up_key_f256 => in_key_up_ter256,
low_key_f256 => in_key_down_ter256,
up_out_f256 => to_xor_with3,
low_out_f256 => to_xor_with4
);
-- we perform the exchange
-- in1_ter256 -> out3_ter256
-- in2_ter256 -> out4_ter256
-- in3_ter256 -> out1_ter256
-- in4_ter256 -> out2_ter256
-- we perform the left xor between the upper f function and
-- the third input (input 3)
to_left_shift <= to_xor_with3 XOR in3_ter256;
-- we perform the left side rotation to the right by 1 and
-- we perform the exchange too
out1_ter256(30 downto 0) <= to_left_shift(31 downto 1);
out1_ter256(31) <= to_left_shift(0);
-- we perform the right side rotation to the left by 1
from_right_shift(0) <= in4_ter256(31);
from_right_shift(31 downto 1) <= in4_ter256(30 downto 0);
-- we perform the right xor between the lower f function and
-- the fourth input (input 4)
out2_ter256 <= from_right_shift XOR to_xor_with4;
-- we perform the last exchanges
out3_ter256 <= in1_ter256;
out4_ter256 <= in2_ter256;
end twofish_encryption_round256_arch;
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
-- --
-- new component --
-- --
-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ --
--
-- twofish decryption round with 256 bit key input
--
library ieee;
use ieee.std_logic_1164.all;
entity twofish_decryption_round256 is
port (
in1_tdr256,
in2_tdr256,
in3_tdr256,
in4_tdr256,
in_Sfirst_tdr256,
in_Ssecond_tdr256,
in_Sthird_tdr256,
in_Sfourth_tdr256,
in_key_up_tdr256,
in_key_down_tdr256 : in std_logic_vector(31 downto 0);
out1_tdr256,
out2_tdr256,
out3_tdr256,
out4_tdr256 : out std_logic_vector(31 downto 0)
);
end twofish_decryption_round256;
architecture twofish_decryption_round256_arch of twofish_decryption_round256 is
signal to_xor_with3,
to_xor_with4,
to_xor_with_up_f,
from_xor_with_down_f : std_logic_vector(31 downto 0);
component f_256
port (
up_in_f256,
low_in_f256,
S0_in_f256,
S1_in_f256,
S2_in_f256,
S3_in_f256,
up_key_f256,
low_key_f256 : in std_logic_vector(31 downto 0);
up_out_f256,
low_out_f256 : out std_logic_vector(31 downto 0)
);
end component;
begin
-- we instantiate f function
function_f: f_256
port map (
up_in_f256 => in1_tdr256,
low_in_f256 => in2_tdr256,
S0_in_f256 => in_Sfirst_tdr256,
S1_in_f256 => in_Ssecond_tdr256,
S2_in_f256 => in_Sthird_tdr256,
S3_in_f256 => in_Sfourth_tdr256,
up_key_f256 => in_key_up_tdr256,
low_key_f256 => in_key_down_tdr256,
up_out_f256 => to_xor_with3,
low_out_f256 => to_xor_with4
);
-- output 1: input3 with upper f
-- we first rotate the input3 by 1 bit leftwise
to_xor_with_up_f(0) <= in3_tdr256(31);
to_xor_with_up_f(31 downto 1) <= in3_tdr256(30 downto 0);
-- we perform the XOR with the upper output of f and the result
-- is ouput 1
out1_tdr256 <= to_xor_with_up_f XOR to_xor_with3;
-- output 2: input4 with lower f
-- we perform the XOR with the lower output of f
from_xor_with_down_f <= in4_tdr256 XOR to_xor_with4;
-- we perform the rotation by 1 bit rightwise and the result
-- is output2
out2_tdr256(31) <= from_xor_with_down_f(0);
out2_tdr256(30 downto 0) <= from_xor_with_down_f(31 downto 1);
-- we assign outputs 3 and 4
out3_tdr256 <= in1_tdr256;
out4_tdr256 <= in2_tdr256;
end twofish_decryption_round256_arch;
|
entity tb_sram05 is
end tb_sram05;
library ieee;
use ieee.std_logic_1164.all;
architecture behav of tb_sram05 is
signal rst : std_logic;
signal addr : std_logic_vector(3 downto 0);
signal rdat : std_logic_vector(7 downto 0);
signal wdat : std_logic_vector(7 downto 0);
signal wen : std_logic;
signal clk : std_logic;
begin
dut: entity work.sram05
port map (rst => rst, clk_i => clk,
addr_i => addr, data_i => wdat, data_o => rdat,
wen_i => wen);
process
procedure pulse is
begin
clk <= '0';
wait for 1 ns;
clk <= '1';
wait for 1 ns;
end pulse;
begin
rst <= '0';
-- [0] := x03
addr <= "0000";
wdat <= x"03";
wen <= '1';
pulse;
assert rdat = x"03" severity failure;
-- [0] := x41
wdat <= x"41";
pulse;
assert rdat = x"41" severity failure;
-- [4] := x07
addr <= "0100";
wdat <= x"07";
wait for 1 ns;
pulse;
assert rdat = x"07" severity failure;
-- Not en.
addr <= "0000";
wen <= '0';
pulse;
assert rdat = x"41" severity failure;
-- [4] := x23
wen <= '1';
addr <= "0100";
wdat <= x"23";
wait for 1 ns;
pulse;
assert rdat = x"23" severity failure;
-- Reset
rst <= '1';
addr <= "0100";
wdat <= x"ff";
wait for 1 ns;
pulse;
assert rdat = x"23" severity failure;
-- None
rst <= '0';
wen <= '0';
addr <= "0000";
wdat <= x"c5";
pulse;
assert rdat = x"41" severity failure;
-- None
addr <= "0100";
pulse;
assert rdat = x"23" severity failure;
wait;
end process;
end behav;
|
library ieee;
use ieee.numeric_bit.all;
entity uadd23 is
port (
a_i : in unsigned (22 downto 0);
b_i : in unsigned (22 downto 0);
c_o : out unsigned (22 downto 0)
);
end entity uadd23;
architecture rtl of uadd23 is
begin
c_o <= a_i + b_i;
end architecture rtl;
|
library ieee;
use ieee.numeric_bit.all;
entity uadd23 is
port (
a_i : in unsigned (22 downto 0);
b_i : in unsigned (22 downto 0);
c_o : out unsigned (22 downto 0)
);
end entity uadd23;
architecture rtl of uadd23 is
begin
c_o <= a_i + b_i;
end architecture rtl;
|
library ieee;
use ieee.numeric_bit.all;
entity uadd23 is
port (
a_i : in unsigned (22 downto 0);
b_i : in unsigned (22 downto 0);
c_o : out unsigned (22 downto 0)
);
end entity uadd23;
architecture rtl of uadd23 is
begin
c_o <= a_i + b_i;
end architecture rtl;
|
library ieee;
use ieee.numeric_bit.all;
entity uadd23 is
port (
a_i : in unsigned (22 downto 0);
b_i : in unsigned (22 downto 0);
c_o : out unsigned (22 downto 0)
);
end entity uadd23;
architecture rtl of uadd23 is
begin
c_o <= a_i + b_i;
end architecture rtl;
|
-------------------------------------------------------------------------------
-- Ce bloc est un multiplexeur
--
-- Il selectionne une configuration de serpentin parmis les 4 en entrées,
-- a partir des 2 interrupteurs en entrée
--
-- En sortie, on a la configuration selectionnée
--
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
-- multiplexeur serpentin
ENTITY serpentinmux IS
PORT(
-- interrupteur de selection
E1 : IN STD_LOGIC;
E0 : IN STD_LOGIC;
-- les 4 configurations possibles
Config3 : IN STD_LOGIC_VECTOR(229 downto 0);
Config2 : IN STD_LOGIC_VECTOR(229 downto 0);
Config1 : IN STD_LOGIC_VECTOR(229 downto 0);
Config0 : IN STD_LOGIC_VECTOR(229 downto 0);
-- la config selectionné
SelectedConfig : OUT STD_LOGIC_VECTOR(229 downto 0)
);
END serpentinmux;
ARCHITECTURE montage OF serpentinmux IS
-------------------------------------------------------------------------------
-- Partie Opérative
-------------------------------------------------------------------------------
signal E : STD_LOGIC_VECTOR(1 downto 0);
begin
E(1) <= E1;
E(0) <= E0;
-------------------------------------------------------------------------------
-- Partie Contrôle
-------------------------------------------------------------------------------
-- Inputs: E (interrupteur)
-- Outputs: SelectedConfig (la configuration selectionnée)
-------------------------------------------------------------------------------
-- fonction de sortie
WITH E SELECT SelectedConfig <=
Config0 WHEN "00",
Config1 WHEN "01",
Config2 WHEN "10",
Config3 WHEN "11"
;
end montage;
|
----------------------------------------------------------------------------------
-- Company: NTU ATHNENS - BNL - Michigan
-- Engineer: Panagiotis Gkountoumis & Reid Pinkham & Paris Moschovakos
--
-- Copyright Notice/Copying Permission:
-- Copyright 2017 Panagiotis Gkountoumis & Reid Pinkham & Paris Moschovakos
--
-- This file is part of NTUA-BNL_VMM_firmware.
--
-- NTUA-BNL_VMM_firmware is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- NTUA-BNL_VMM_firmware is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with NTUA-BNL_VMM_firmware. If not, see <http://www.gnu.org/licenses/>.
--
-- Create Date: 18.04.2016 13:00:21
-- Design Name:
-- Module Name: config_logic - Behavioral
-- Project Name: MMFE8
-- Target Devices: Arix7 xc7a200t-2fbg484 and xc7a200t-3fbg484
-- Tool Versions: Vivado 2016.2
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Changelog:
-- 23.07.2016 Output signal "sending" to hold packet_formation from issuing new
-- packets (Paris)
-- 26.07.2016 Increased the size of the FIFO to 2048 in order to be able to handle
-- jumbo UDP frames. (Paris)
-- 22.08.2016 Re-wrote the main logic into a single state machine to fix the freezing
-- bug. (Reid Pinkham)
-- 26.02.2016 Moved to a global clock domain @125MHz (Paris)
--
----------------------------------------------------------------------------------
library unisim;
use unisim.vcomponents.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.axi.all;
use work.ipv4_types.all;
use work.arp_types.all;
entity FIFO2UDP is
Port (
clk_125 : in std_logic;
destinationIP : in std_logic_vector(31 downto 0);
daq_data_in : in std_logic_vector(15 downto 0);
fifo_data_out : out std_logic_vector (7 downto 0);
udp_txi : out udp_tx_type;
udp_tx_start : out std_logic;
re_out : out std_logic;
control : out std_logic;
UDPDone : out std_logic;
udp_tx_data_out_ready : in std_logic;
wr_en : in std_logic;
end_packet : in std_logic;
global_reset : in std_logic;
packet_length_in : in std_logic_vector(11 downto 0);
reset_DAQ_FIFO : in std_logic;
confReply_packet : in std_logic;
vmmID : in std_logic_vector(2 downto 0);
trigger_out : out std_logic;
count_o : out std_logic_vector(3 downto 0);
faifouki : out std_logic
);
end FIFO2UDP;
architecture Behavioral of FIFO2UDP is
signal count : unsigned(3 downto 0) := x"0";
signal i : integer := 0;
signal count_length : unsigned(15 downto 0) := x"0000";
signal daq_fifo_re : std_logic := '0';
signal fifo_empty_UDP : std_logic := '0';
signal fifo_full_UDP : std_logic := '0';
signal prog_fifo_empty : std_logic := '0';
signal daq_out : std_logic_vector(255 downto 0);
signal data_out : std_logic_vector(7 downto 0) := x"00";
signal data_out_valid : std_logic := '0';
signal packet_length : unsigned(15 downto 0) := x"0000";
signal data_out_last : std_logic := '0';
signal end_packet_synced : std_logic := '0';
signal udp_tx_start_int : std_logic := '0';
signal wr_en_int : std_logic := '0';
signal fifo_len_wr_en : std_logic := '0';
signal fifo_len_rd_en : std_logic := '0';
signal packet_len_r : std_logic_vector(11 downto 0);
signal fifo_empty_len : std_logic;
signal state : std_logic := '0';
signal is_trailer : integer := 0;
signal temp_buffer : std_logic_vector(63 downto 0) := (others=> '0');
signal daq_data_out : std_logic_vector(7 downto 0) := x"00";
signal vmmID_i : std_logic_vector(2 downto 0);
signal trigger : std_logic;
signal len_cnt : unsigned(7 downto 0) := "00000000";
signal rst_fifo : std_logic := '0';
-- attribute mark_debug : string;
-- attribute mark_debug of prog_fifo_empty : signal is "true";
-- attribute mark_debug of fifo_empty_UDP : signal is "true";
-- attribute mark_debug of daq_fifo_re : signal is "true";
-- attribute mark_debug of data_out_last : signal is "true";
-- attribute mark_debug of data_out : signal is "true";
-- attribute mark_debug of data_out_valid : signal is "true";
-- attribute mark_debug of udp_tx_data_out_ready : signal is "true";
-- attribute mark_debug of daq_data_out : signal is "true";
-- attribute mark_debug of udp_tx_start : signal is "true";
-- attribute mark_debug of end_packet_synced : signal is "true";
-- attribute mark_debug of i : signal is "true";
-- attribute mark_debug of packet_length : signal is "true";
-- attribute mark_debug of count : signal is "true";
-- attribute mark_debug of count_length : signal is "true";
-- attribute mark_debug of wr_en_int : signal is "true";
-- attribute mark_debug of fifo_full_UDP : signal is "true";
-- attribute mark_debug of fifo_empty_len : signal is "true";
-- attribute mark_debug of wr_en : signal is "true";
-- attribute mark_debug of packet_length_in : signal is "true";
-- attribute mark_debug of vmmID_i : signal is "true";
-- attribute mark_debug of trigger : signal is "true";
-- attribute mark_debug of len_cnt : signal is "true";
-- attribute mark_debug of fifo_len_wr_en : signal is "true";
-- attribute mark_debug of fifo_len_rd_en : signal is "true";
-- attribute mark_debug of packet_len_r : signal is "true";
component readout_fifo is
port(
clk : in std_logic;
srst : in std_logic;
din : in std_logic_vector(15 downto 0);
wr_en : in std_logic;
rd_en : in std_logic;
dout : out std_logic_vector(7 downto 0);
full : out std_logic;
empty : out std_logic
);
end component;
component packet_len_fifo
port (
clk : in std_logic;
srst : in std_logic;
din : in std_logic_vector(11 downto 0);
wr_en : in std_logic;
rd_en : in std_logic;
dout : out std_logic_vector(11 downto 0);
full : out std_logic;
empty : out std_logic
);
end component;
component ila_0
PORT (
clk : in std_logic;
probe0 : in std_logic_vector(255 DOWNTO 0);
probe1 : in std_logic);
end component;
begin
-- process ot trigger ILAs
trigger_proc: process (clk_125, vmmID_i, data_out_last)
begin
if rising_edge(clk_125) then
if (vmmID_i = "000" and data_out_last = '1') then
trigger <= '1';
else
trigger <= '0';
end if;
end if;
end process;
daq_FIFO_instance: readout_fifo
port map(
clk => clk_125,
srst => rst_fifo,
din => daq_data_in,
wr_en => wr_en,
rd_en => daq_fifo_re,
dout => daq_data_out,
full => fifo_full_UDP,
empty => fifo_empty_UDP
);
packet_len_fifo_instance: packet_len_fifo
port map (
clk => clk_125,
srst => rst_fifo,
din => packet_length_in,
wr_en => fifo_len_wr_en,
rd_en => fifo_len_rd_en,
dout => packet_len_r,
full => open,
empty => fifo_empty_len
);
fill_packet_len: process (clk_125, state) -- small state machine to write packet_len to fifo
begin
if rising_edge(clk_125) then
case state is
when '0' => -- idle
if (end_packet_synced = '1') then -- latch the packet_len into the fifo
fifo_len_wr_en <= '1';
state <= '1';
else
state <= '0';
end if;
when '1' => -- st1
if (end_packet_synced = '0') then-- prevent a double latch
state <= '0';
else
state <= '1';
end if;
fifo_len_wr_en <= '0';
when others =>
state <= '0';
end case;
end if;
end process;
process (clk_125, fifo_len_rd_en)
begin
if rising_edge(clk_125) then
if fifo_len_rd_en = '1' then
len_cnt <= len_cnt + 1;
end if;
end if;
end process;
UDPDone_proc: process (clk_125)
begin
if rising_edge(clk_125) then
if fifo_empty_UDP = '1' and fifo_empty_len = '1' then -- IF Statement to inidcate when packets have been sent
UDPDone <= '1';
else
UDPDone <= '0';
end if;
end if;
end process;
process (clk_125, count, udp_tx_data_out_ready, fifo_empty_UDP, prog_fifo_empty, data_out_valid)
begin
if rising_edge(clk_125) then
if global_reset = '1' then -- IF statement to read from length fifo and initiate a packet send
data_out_last <= '0';
data_out_valid <= '0';
udp_tx_start_int <= '0';
fifo_len_rd_en <= '0';
daq_fifo_re <= '0';
count <= x"0";
else
case count is
when x"0" =>
if fifo_empty_len = '0' then -- Send packets until FIFO is empty
fifo_len_rd_en <= '1';
count <= x"1";
end if;
when x"1" => -- state to allow fifo time to respond
count <= x"2";
fifo_len_rd_en <= '0';
when x"2" =>
packet_length <= resize(unsigned("0000" & packet_len_r) * 2 + 4, 16);
count_length <= resize(unsigned("0000" & packet_len_r) * 2, 16);
fifo_len_rd_en <= '0';
count <= x"3";
when x"3" =>
data_out_last <= '0';
data_out_valid <= '0';
data_out <= (others => '0');
udp_tx_start_int <= '0';
if(confReply_packet = '1')then
udp_txi.hdr.dst_port <= x"E887";
else
udp_txi.hdr.dst_port <= x"1778";
end if;
count <= x"4";
when x"4" =>
udp_tx_start_int <= '1';
udp_txi.hdr.dst_ip_addr <= destinationIP; -- set a generic ip adrress (192.168.0.255)
udp_txi.hdr.src_port <= x"19CB"; -- set src and dst ports
udp_txi.hdr.data_length <= std_logic_vector(packet_length); -- defined to be 16 bits in UDP
daq_fifo_re <= '0';
udp_txi.hdr.checksum <= x"0000";
count <= x"5";
when x"5" =>
if udp_tx_data_out_ready = '1' then
udp_tx_start_int <= '0';
daq_fifo_re <= '1';
count <= x"6";
end if;
when x"6" =>
if udp_tx_data_out_ready = '1' then
count_length <= count_length - 1;
udp_tx_start_int <= '0';
data_out <= daq_data_out;
count <= x"7";
end if;
when x"7" =>
if udp_tx_data_out_ready = '1' then
if count_length = 1 then
daq_fifo_re <= '0';
elsif count_length = 0 then
count <= x"8";
daq_fifo_re <= '0';
else
daq_fifo_re <= '1';
end if;
count_length <= count_length - 1;
udp_tx_start_int <= '0';
data_out_valid <= '1';
control <= '0';
data_out_last <= '0';
data_out <= daq_data_out;
else
daq_fifo_re <= '0';
end if;
when x"8" =>
if udp_tx_data_out_ready = '1' then
daq_fifo_re <= '0';
udp_tx_start_int <= '0';
data_out_last <= '0';
data_out <= x"ff";
count <= x"9";
end if;
when x"9" =>
if udp_tx_data_out_ready = '1' then
daq_fifo_re <= '0';
udp_tx_start_int <= '0';
data_out_last <= '0';
data_out <= x"ff";
count <= x"a";
end if;
when x"a" =>
if udp_tx_data_out_ready = '1' then
daq_fifo_re <= '0';
udp_tx_start_int <= '0';
data_out_last <= '0';
data_out <= x"ff";
count <= x"b";
end if;
when x"b" =>
if udp_tx_data_out_ready = '1' then
daq_fifo_re <= '0';
udp_tx_start_int <= '0';
data_out_last <= '1';
data_out <= x"ff";
count <= x"c";
end if;
when x"c" =>
data_out_last <= '0';
data_out_valid <= '0';
data_out <= (others => '0');
udp_tx_start_int <= '0';
count <= x"d";
when x"d" =>
count <= x"0";
count_length <= x"0000";
data_out_last <= '0';
data_out_valid <= '0';
udp_tx_start_int <= '0';
when others =>
count <= x"0";
end case;
end if;
end if;
end process;
vmmID_i <= vmmID; -- assign external signal to internal
udp_tx_start <= udp_tx_start_int;
udp_txi.data.data_out_last <= data_out_last;
udp_txi.data.data_out_valid <= data_out_valid ;
udp_txi.data.data_out <= data_out;
wr_en_int <= wr_en;
end_packet_synced <= end_packet;
rst_fifo <= reset_DAQ_FIFO or global_reset;
trigger_out <= trigger;
count_o <= std_logic_vector(count);
faifouki <= fifo_empty_len;
--ila_daq_send : ila_0
-- port map
-- (
-- clk => clk_125,
-- probe0 => daq_out,
-- probe1 => udp_tx_data_out_ready
-- );
daq_out(0) <= end_packet_synced;
daq_out(1) <= fifo_empty_UDP;
daq_out(2) <= daq_fifo_re;
daq_out(3) <= data_out_valid;
daq_out(4) <= data_out_last;
daq_out(12 downto 5) <= data_out;
daq_out(16 downto 13) <= std_logic_vector(count);
daq_out(38 downto 17) <= (others => '0');
daq_out(39) <= udp_tx_start_int;
daq_out(40) <= '0'; --udp_tx_data_out_ready;
daq_out(48 downto 41) <= daq_data_out;
daq_out(112 downto 49) <= (others => '0');
daq_out(113) <= '0';
daq_out(129 downto 114) <= std_logic_vector(packet_length);
daq_out(145 downto 130) <= std_logic_vector(count_length);
daq_out(157 downto 146) <= packet_len_r;
daq_out(221 downto 158) <= (others => '0');
daq_out(222) <= wr_en_int;
daq_out(223) <= wr_en;
daq_out(235 downto 224) <= packet_length_in;
daq_out(236) <= udp_tx_data_out_ready;
daq_out(237) <= fifo_len_wr_en;
daq_out(238) <= fifo_len_rd_en;
daq_out(239) <= fifo_empty_len;
daq_out(240) <= fifo_full_UDP;
daq_out(243 downto 241) <= vmmID_i;
daq_out(244) <= trigger;
daq_out(252 downto 245) <= std_logic_vector(len_cnt);
daq_out(255 downto 253) <= (others => '0');
end Behavioral; |
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2932.vhd,v 1.2 2001-10-26 16:29:50 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c02s02b00x00p07n01i02932ent IS
END c02s02b00x00p07n01i02932ent;
ARCHITECTURE c02s02b00x00p07n01i02932arch OF c02s02b00x00p07n01i02932ent IS
BEGIN
TESTING: PROCESS
variable global_int : integer := 0;
procedure Recursive_subr ( x: integer ) is
begin
global_int := global_int + 1;
if x > 1 then
Recursive_subr (x-1);
end if;
end Recursive_subr ;
BEGIN
Recursive_subr (10);
wait for 5 ns;
assert NOT( global_int = 10 )
report "***PASSED TEST: c02s02b00x00p07n01i02932"
severity NOTE;
assert ( global_int = 10 )
report "***FAILED TEST: c02s02b00x00p07n01i02932 - Recursive procedure test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c02s02b00x00p07n01i02932arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2932.vhd,v 1.2 2001-10-26 16:29:50 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c02s02b00x00p07n01i02932ent IS
END c02s02b00x00p07n01i02932ent;
ARCHITECTURE c02s02b00x00p07n01i02932arch OF c02s02b00x00p07n01i02932ent IS
BEGIN
TESTING: PROCESS
variable global_int : integer := 0;
procedure Recursive_subr ( x: integer ) is
begin
global_int := global_int + 1;
if x > 1 then
Recursive_subr (x-1);
end if;
end Recursive_subr ;
BEGIN
Recursive_subr (10);
wait for 5 ns;
assert NOT( global_int = 10 )
report "***PASSED TEST: c02s02b00x00p07n01i02932"
severity NOTE;
assert ( global_int = 10 )
report "***FAILED TEST: c02s02b00x00p07n01i02932 - Recursive procedure test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c02s02b00x00p07n01i02932arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2932.vhd,v 1.2 2001-10-26 16:29:50 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c02s02b00x00p07n01i02932ent IS
END c02s02b00x00p07n01i02932ent;
ARCHITECTURE c02s02b00x00p07n01i02932arch OF c02s02b00x00p07n01i02932ent IS
BEGIN
TESTING: PROCESS
variable global_int : integer := 0;
procedure Recursive_subr ( x: integer ) is
begin
global_int := global_int + 1;
if x > 1 then
Recursive_subr (x-1);
end if;
end Recursive_subr ;
BEGIN
Recursive_subr (10);
wait for 5 ns;
assert NOT( global_int = 10 )
report "***PASSED TEST: c02s02b00x00p07n01i02932"
severity NOTE;
assert ( global_int = 10 )
report "***FAILED TEST: c02s02b00x00p07n01i02932 - Recursive procedure test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c02s02b00x00p07n01i02932arch;
|
-------------------------------------------------------------------------------
--! @file synchronizerRtl.vhd
--
--! @brief Synchronizer
--
--! @details This is a synchronizer with configurable stage size.
-------------------------------------------------------------------------------
--
-- (c) B&R, 2013
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact [email protected]
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.global.all;
entity synchronizer is
generic (
--! Stages
gStages : natural := 2;
--! Initialization level
gInit : std_logic := cInactivated
);
port (
--! Asynchronous reset
iArst : in std_logic;
--! Clock
iClk : in std_logic;
--! Asynchronous input
iAsync : in std_logic;
--! Synchronous output
oSync : out std_logic
);
end synchronizer;
architecture rtl of synchronizer is
--! Meta registers used to synchronize input signal
signal metaReg : std_logic_vector(gStages-1 downto 0);
--! Meta registers next
signal metaReg_next : std_logic_vector(metaReg'range);
begin
-- handle wrong stage generic
assert (gStages > 0)
report "gStages must be set higher 0!" severity failure;
-- output last synchronizer stage
oSync <= metaReg(metaReg'left);
-- assign asynchronous signal to metaRegisters
metaReg_next <= metaReg(metaReg'left-1 downto 0) & iAsync;
reg : process(iArst, iClk)
begin
if iArst = cActivated then
metaReg <= (others => gInit);
elsif rising_edge(iClk) then
metaReg <= metaReg_next;
end if;
end process;
end rtl;
|
----------------------------------------------------------------------------------
-- Create Date: 21:52:35 04/10/2017
-- Module Name: XOR_BitABit - Behavioral
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity XOR_BitABit is
Port ( A : in STD_LOGIC_VECTOR (3 downto 0);
B : in STD_LOGIC_VECTOR (3 downto 0);
Z : out STD_LOGIC_VECTOR (3 downto 0));
end XOR_BitABit;
architecture Behavioral of XOR_BitABit is
signal Zout : STD_LOGIC_VECTOR(3 downto 0);
begin
Zout(0) <= A(0) XOR B(0);
Zout(1) <= A(1) XOR B(1);
Zout(2) <= A(2) XOR B(2);
Zout(3) <= A(3) XOR B(3);
Z <= Zout;
end Behavioral;
|
library ieee;
use ieee.std_logic_1164.all;
library lib;
use lib.io.all;
--------------------------------------------------------------------------------
-- I/O PACKAGE
--------------------------------------------------------------------------------
package io is
constant ALIENS_PER_LINE : integer := 7;
constant ALIEN_LINES : integer := 5;
type pos_arr_xt is array(ALIENS_PER_LINE*ALIEN_LINES-1 downto 0) of integer range 0 to 160;
type pos_arr_yt is array(ALIENS_PER_LINE*ALIEN_LINES-1 downto 0) of integer range 0 to 120;
type GAME_STATE is (START, PLAYING, GAME_OVER_STATE, WIN);
component kbd_input is
port
(
clock_i : in std_logic;
reset_i : in std_logic;
hold_i : in std_logic;
PS2_DAT : inout STD_LOGIC; -- PS2 Data
PS2_CLK : inout STD_LOGIC; -- PS2 Clock
shot_o : buffer std_logic;
move_o : buffer std_logic;
control_o : buffer std_logic_vector(2 downto 0)
);
end component;
component vga_module IS
generic (
RX : INTEGER := 160; -- Number of horizontal pixels
RY : INTEGER := 120; -- Number of vertical pixels
NUM_OF_ALIENS : INTEGER := 24 -- Number of enemies
);
port (
clk27m : in std_logic;
reset : in std_logic;
game_state_i : GAME_STATE;
nave_x : INTEGER RANGE 0 TO RX;
nave_y : INTEGER RANGE 0 TO RY;
nave_d : std_logic; -- nave destroy
tiro_x : INTEGER RANGE 0 TO RX;
tiro_y : INTEGER RANGE 0 TO RY;
tiro_enemy_x : INTEGER RANGE 0 TO RX;
tiro_enemy_y : INTEGER RANGE 0 TO RY;
cpu_e : std_logic_vector(NUM_OF_ALIENS-1 downto 0);
cpu_d : std_logic_vector(NUM_OF_ALIENS-1 downto 0);
cpu_x : pos_arr_xt;
cpu_y : pos_arr_yt;
red, green, blue : out std_logic_vector (3 downto 0);
hsync, vsync : out std_logic
);
end component;
end package;
|
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2Ej2SorPIsptmHZ/DCSFFYDkMn5571diDPN/J186aNSl0l/fiA==
`protect end_protected
|
-------------------------------------------------------------------------------
-- $Id: pf_counter.vhd,v 1.2 2004/11/23 01:04:03 jcanaris Exp $
-------------------------------------------------------------------------------
-- pf_counter - entity/architecture pair
-------------------------------------------------------------------------------
--
-- ****************************
-- ** Copyright Xilinx, Inc. **
-- ** All rights reserved. **
-- ****************************
--
-------------------------------------------------------------------------------
-- Filename: pf_counter.vhd
--
-- Description: Implements 32-bit timer/counter
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- pf_counter.vhd
--
-------------------------------------------------------------------------------
-- Author: B.L. Tise
-- Revision: $Revision: 1.2 $
-- Date: $Date: 2004/11/23 01:04:03 $
--
-- History:
-- D. Thorpe 2001-08-30 First Version
-- - adapted from B Tise MicroBlaze counters
--
-- DET 2001-09-11
-- - Added the Rst input to the pf_counter_bit component
-- LCW Nov 8, 2004 -- updated for NCSim
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
library unisim;
use unisim.vcomponents.all;
library opb_ipif_v2_00_h;
use opb_ipif_v2_00_h.pf_counter_bit;
-----------------------------------------------------------------------------
-- Entity section
-----------------------------------------------------------------------------
entity pf_counter is
generic (
C_COUNT_WIDTH : integer := 9
);
port (
Clk : in std_logic;
Rst : in std_logic;
Carry_Out : out std_logic;
Load_In : in std_logic_vector(0 to C_COUNT_WIDTH-1);
Count_Enable : in std_logic;
Count_Load : in std_logic;
Count_Down : in std_logic;
Count_Out : out std_logic_vector(0 to C_COUNT_WIDTH-1)
);
end entity pf_counter;
-----------------------------------------------------------------------------
-- Architecture section
-----------------------------------------------------------------------------
architecture implementation of pf_counter is
constant CY_START : integer := 1;
signal alu_cy : std_logic_vector(0 to C_COUNT_WIDTH);
signal iCount_Out : std_logic_vector(0 to C_COUNT_WIDTH-1);
signal count_clock_en : std_logic;
signal carry_active_high : std_logic;
begin -- VHDL_RTL
-----------------------------------------------------------------------------
-- Generate the Counter bits
-----------------------------------------------------------------------------
alu_cy(C_COUNT_WIDTH) <= (Count_Down and Count_Load) or
(not Count_Down and not Count_load);
count_clock_en <= Count_Enable or Count_Load;
I_ADDSUB_GEN : for i in 0 to C_COUNT_WIDTH-1 generate
begin
Counter_Bit_I : entity opb_ipif_v2_00_h.pf_counter_bit
port map (
Clk => Clk, -- [in]
Rst => Rst, -- [in]
Count_In => iCount_Out(i), -- [in]
Load_In => Load_In(i), -- [in]
Count_Load => Count_Load, -- [in]
Count_Down => Count_Down, -- [in]
Carry_In => alu_cy(i+CY_Start), -- [in]
Clock_Enable => count_clock_en, -- [in]
Result => iCount_Out(i), -- [out]
Carry_Out => alu_cy(i+(1-CY_Start))); -- [out]
end generate I_ADDSUB_GEN;
carry_active_high <= alu_cy(0) xor Count_Down;
I_CARRY_OUT: FDRE
port map (
Q => Carry_Out, -- [out]
C => Clk, -- [in]
CE => count_clock_en, -- [in]
D => carry_active_high, -- [in]
R => Rst -- [in]
);
Count_Out <= iCount_Out;
end architecture implementation;
|
-------------------------------------------------------------------------------
-- $Id: pf_counter.vhd,v 1.2 2004/11/23 01:04:03 jcanaris Exp $
-------------------------------------------------------------------------------
-- pf_counter - entity/architecture pair
-------------------------------------------------------------------------------
--
-- ****************************
-- ** Copyright Xilinx, Inc. **
-- ** All rights reserved. **
-- ****************************
--
-------------------------------------------------------------------------------
-- Filename: pf_counter.vhd
--
-- Description: Implements 32-bit timer/counter
--
-- VHDL-Standard: VHDL'93
-------------------------------------------------------------------------------
-- Structure:
-- pf_counter.vhd
--
-------------------------------------------------------------------------------
-- Author: B.L. Tise
-- Revision: $Revision: 1.2 $
-- Date: $Date: 2004/11/23 01:04:03 $
--
-- History:
-- D. Thorpe 2001-08-30 First Version
-- - adapted from B Tise MicroBlaze counters
--
-- DET 2001-09-11
-- - Added the Rst input to the pf_counter_bit component
-- LCW Nov 8, 2004 -- updated for NCSim
-------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port "*_i"
-- device pins: "*_pin"
-- ports: - Names begin with Uppercase
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
library unisim;
use unisim.vcomponents.all;
library opb_ipif_v2_00_h;
use opb_ipif_v2_00_h.pf_counter_bit;
-----------------------------------------------------------------------------
-- Entity section
-----------------------------------------------------------------------------
entity pf_counter is
generic (
C_COUNT_WIDTH : integer := 9
);
port (
Clk : in std_logic;
Rst : in std_logic;
Carry_Out : out std_logic;
Load_In : in std_logic_vector(0 to C_COUNT_WIDTH-1);
Count_Enable : in std_logic;
Count_Load : in std_logic;
Count_Down : in std_logic;
Count_Out : out std_logic_vector(0 to C_COUNT_WIDTH-1)
);
end entity pf_counter;
-----------------------------------------------------------------------------
-- Architecture section
-----------------------------------------------------------------------------
architecture implementation of pf_counter is
constant CY_START : integer := 1;
signal alu_cy : std_logic_vector(0 to C_COUNT_WIDTH);
signal iCount_Out : std_logic_vector(0 to C_COUNT_WIDTH-1);
signal count_clock_en : std_logic;
signal carry_active_high : std_logic;
begin -- VHDL_RTL
-----------------------------------------------------------------------------
-- Generate the Counter bits
-----------------------------------------------------------------------------
alu_cy(C_COUNT_WIDTH) <= (Count_Down and Count_Load) or
(not Count_Down and not Count_load);
count_clock_en <= Count_Enable or Count_Load;
I_ADDSUB_GEN : for i in 0 to C_COUNT_WIDTH-1 generate
begin
Counter_Bit_I : entity opb_ipif_v2_00_h.pf_counter_bit
port map (
Clk => Clk, -- [in]
Rst => Rst, -- [in]
Count_In => iCount_Out(i), -- [in]
Load_In => Load_In(i), -- [in]
Count_Load => Count_Load, -- [in]
Count_Down => Count_Down, -- [in]
Carry_In => alu_cy(i+CY_Start), -- [in]
Clock_Enable => count_clock_en, -- [in]
Result => iCount_Out(i), -- [out]
Carry_Out => alu_cy(i+(1-CY_Start))); -- [out]
end generate I_ADDSUB_GEN;
carry_active_high <= alu_cy(0) xor Count_Down;
I_CARRY_OUT: FDRE
port map (
Q => Carry_Out, -- [out]
C => Clk, -- [in]
CE => count_clock_en, -- [in]
D => carry_active_high, -- [in]
R => Rst -- [in]
);
Count_Out <= iCount_Out;
end architecture implementation;
|
-- --------------------------------------------------------------------
-- "fixed_float_types" package contains types used in the fixed and floating
-- point packages..
-- Please see the documentation for the floating point package.
-- This package should be compiled into "ieee_proposed" and used as follows:
--
-- This verison is designed to work with the VHDL-93 compilers. Please
-- note the "%%%" comments. These are where we diverge from the
-- VHDL-200X LRM.
--
-- --------------------------------------------------------------------
-- Version : $Revision: 1.21 $
-- Date : $Date: 2007-09-11 14:52:13-04 $
-- Version : $Revision: 1.1 $
-- Date : $Date: 2010/09/22 18:44:20 $
-- --------------------------------------------------------------------
package fixed_float_types is
-- Types used for generics of fixed_generic_pkg
type fixed_round_style_type is (fixed_round, fixed_truncate);
type fixed_overflow_style_type is (fixed_saturate, fixed_wrap);
-- Type used for generics of float_generic_pkg
-- These are the same as the C FE_TONEAREST, FE_UPWARD, FE_DOWNWARD,
-- and FE_TOWARDZERO floating point rounding macros.
type round_type is (round_nearest, -- Default, nearest LSB '0'
round_inf, -- Round toward positive infinity
round_neginf, -- Round toward negative infinity
round_zero); -- Round toward zero (truncate)
end package fixed_float_types;
|
-- ==============================================================
-- File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2014.1
-- Copyright (C) 2014 Xilinx Inc. All rights reserved.
--
-- ==============================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity nfa_forward_buckets_if_ap_fifo is
generic (
DATA_WIDTH : integer := 32;
ADDR_WIDTH : integer := 16;
DEPTH : integer := 1);
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
if_empty_n : OUT STD_LOGIC;
if_read_ce : IN STD_LOGIC := '1';
if_read : IN STD_LOGIC;
if_dout : OUT STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
if_full_n : OUT STD_LOGIC;
if_write_ce : IN STD_LOGIC := '1';
if_write : IN STD_LOGIC;
if_din : IN STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0));
end entity;
architecture rtl of nfa_forward_buckets_if_ap_fifo is
type memtype is array (0 to DEPTH - 1) of STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
signal mStorage : memtype := (others => (others => '0'));
signal mInPtr : UNSIGNED(ADDR_WIDTH - 1 downto 0) := (others => '0');
signal mOutPtr : UNSIGNED(ADDR_WIDTH - 1 downto 0) := (others => '0');
signal internal_empty_n, internal_full_n : STD_LOGIC;
signal mFlag_nEF_hint : STD_LOGIC := '0'; -- 0: empty hint, 1: full hint
begin
if_dout <= mStorage(CONV_INTEGER(mOutPtr));
if_empty_n <= internal_empty_n;
if_full_n <= internal_full_n;
internal_empty_n <= '0' when mInPtr = mOutPtr and mFlag_nEF_hint = '0' else '1';
internal_full_n <= '0' when mInptr = mOutPtr and mFlag_nEF_hint = '1' else '1';
process (clk, reset)
begin
if reset = '1' then
mInPtr <= (others => '0');
mOutPtr <= (others => '0');
mFlag_nEF_hint <= '0'; -- empty hint
elsif clk'event and clk = '1' then
if if_read_ce = '1' and if_read = '1' and internal_empty_n = '1' then
if (mOutPtr = DEPTH -1) then
mOutPtr <= (others => '0');
mFlag_nEF_hint <= not mFlag_nEF_hint;
else
mOutPtr <= mOutPtr + 1;
end if;
end if;
if if_write_ce = '1' and if_write = '1' and internal_full_n = '1' then
mStorage(CONV_INTEGER(mInPtr)) <= if_din;
if (mInPtr = DEPTH -1) then
mInPtr <= (others => '0');
mFlag_nEF_hint <= not mFlag_nEF_hint;
else
mInPtr <= mInPtr + 1;
end if;
end if;
end if;
end process;
end architecture;
|
-- ==============================================================
-- File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2014.1
-- Copyright (C) 2014 Xilinx Inc. All rights reserved.
--
-- ==============================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity nfa_forward_buckets_if_ap_fifo is
generic (
DATA_WIDTH : integer := 32;
ADDR_WIDTH : integer := 16;
DEPTH : integer := 1);
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
if_empty_n : OUT STD_LOGIC;
if_read_ce : IN STD_LOGIC := '1';
if_read : IN STD_LOGIC;
if_dout : OUT STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
if_full_n : OUT STD_LOGIC;
if_write_ce : IN STD_LOGIC := '1';
if_write : IN STD_LOGIC;
if_din : IN STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0));
end entity;
architecture rtl of nfa_forward_buckets_if_ap_fifo is
type memtype is array (0 to DEPTH - 1) of STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
signal mStorage : memtype := (others => (others => '0'));
signal mInPtr : UNSIGNED(ADDR_WIDTH - 1 downto 0) := (others => '0');
signal mOutPtr : UNSIGNED(ADDR_WIDTH - 1 downto 0) := (others => '0');
signal internal_empty_n, internal_full_n : STD_LOGIC;
signal mFlag_nEF_hint : STD_LOGIC := '0'; -- 0: empty hint, 1: full hint
begin
if_dout <= mStorage(CONV_INTEGER(mOutPtr));
if_empty_n <= internal_empty_n;
if_full_n <= internal_full_n;
internal_empty_n <= '0' when mInPtr = mOutPtr and mFlag_nEF_hint = '0' else '1';
internal_full_n <= '0' when mInptr = mOutPtr and mFlag_nEF_hint = '1' else '1';
process (clk, reset)
begin
if reset = '1' then
mInPtr <= (others => '0');
mOutPtr <= (others => '0');
mFlag_nEF_hint <= '0'; -- empty hint
elsif clk'event and clk = '1' then
if if_read_ce = '1' and if_read = '1' and internal_empty_n = '1' then
if (mOutPtr = DEPTH -1) then
mOutPtr <= (others => '0');
mFlag_nEF_hint <= not mFlag_nEF_hint;
else
mOutPtr <= mOutPtr + 1;
end if;
end if;
if if_write_ce = '1' and if_write = '1' and internal_full_n = '1' then
mStorage(CONV_INTEGER(mInPtr)) <= if_din;
if (mInPtr = DEPTH -1) then
mInPtr <= (others => '0');
mFlag_nEF_hint <= not mFlag_nEF_hint;
else
mInPtr <= mInPtr + 1;
end if;
end if;
end if;
end process;
end architecture;
|
-- ==============================================================
-- RTL generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2013.4
-- Copyright (C) 2013 Xilinx Inc. All rights reserved.
--
-- ===========================================================
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity nfa_accept_samples_generic_hw is
port (
ap_clk : IN STD_LOGIC;
ap_rst : IN STD_LOGIC;
ap_start : IN STD_LOGIC;
ap_done : OUT STD_LOGIC;
ap_idle : OUT STD_LOGIC;
ap_ready : OUT STD_LOGIC;
nfa_initials_buckets_req_din : OUT STD_LOGIC;
nfa_initials_buckets_req_full_n : IN STD_LOGIC;
nfa_initials_buckets_req_write : OUT STD_LOGIC;
nfa_initials_buckets_rsp_empty_n : IN STD_LOGIC;
nfa_initials_buckets_rsp_read : OUT STD_LOGIC;
nfa_initials_buckets_address : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_initials_buckets_datain : IN STD_LOGIC_VECTOR (31 downto 0);
nfa_initials_buckets_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_initials_buckets_size : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_finals_buckets_req_din : OUT STD_LOGIC;
nfa_finals_buckets_req_full_n : IN STD_LOGIC;
nfa_finals_buckets_req_write : OUT STD_LOGIC;
nfa_finals_buckets_rsp_empty_n : IN STD_LOGIC;
nfa_finals_buckets_rsp_read : OUT STD_LOGIC;
nfa_finals_buckets_address : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_finals_buckets_datain : IN STD_LOGIC_VECTOR (31 downto 0);
nfa_finals_buckets_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_finals_buckets_size : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_forward_buckets_req_din : OUT STD_LOGIC;
nfa_forward_buckets_req_full_n : IN STD_LOGIC;
nfa_forward_buckets_req_write : OUT STD_LOGIC;
nfa_forward_buckets_rsp_empty_n : IN STD_LOGIC;
nfa_forward_buckets_rsp_read : OUT STD_LOGIC;
nfa_forward_buckets_address : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_forward_buckets_datain : IN STD_LOGIC_VECTOR (31 downto 0);
nfa_forward_buckets_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_forward_buckets_size : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_symbols : IN STD_LOGIC_VECTOR (7 downto 0);
sample_buffer_req_din : OUT STD_LOGIC;
sample_buffer_req_full_n : IN STD_LOGIC;
sample_buffer_req_write : OUT STD_LOGIC;
sample_buffer_rsp_empty_n : IN STD_LOGIC;
sample_buffer_rsp_read : OUT STD_LOGIC;
sample_buffer_address : OUT STD_LOGIC_VECTOR (31 downto 0);
sample_buffer_datain : IN STD_LOGIC_VECTOR (7 downto 0);
sample_buffer_dataout : OUT STD_LOGIC_VECTOR (7 downto 0);
sample_buffer_size : OUT STD_LOGIC_VECTOR (31 downto 0);
sample_buffer_length : IN STD_LOGIC_VECTOR (31 downto 0);
sample_length : IN STD_LOGIC_VECTOR (15 downto 0);
indices_begin_req_din : OUT STD_LOGIC;
indices_begin_req_full_n : IN STD_LOGIC;
indices_begin_req_write : OUT STD_LOGIC;
indices_begin_rsp_empty_n : IN STD_LOGIC;
indices_begin_rsp_read : OUT STD_LOGIC;
indices_begin_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_begin_datain : IN STD_LOGIC_VECTOR (31 downto 0);
indices_begin_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_begin_size : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_samples_req_din : OUT STD_LOGIC;
indices_samples_req_full_n : IN STD_LOGIC;
indices_samples_req_write : OUT STD_LOGIC;
indices_samples_rsp_empty_n : IN STD_LOGIC;
indices_samples_rsp_read : OUT STD_LOGIC;
indices_samples_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_samples_datain : IN STD_LOGIC_VECTOR (15 downto 0);
indices_samples_dataout : OUT STD_LOGIC_VECTOR (15 downto 0);
indices_samples_size : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_stride_req_din : OUT STD_LOGIC;
indices_stride_req_full_n : IN STD_LOGIC;
indices_stride_req_write : OUT STD_LOGIC;
indices_stride_rsp_empty_n : IN STD_LOGIC;
indices_stride_rsp_read : OUT STD_LOGIC;
indices_stride_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_stride_datain : IN STD_LOGIC_VECTOR (7 downto 0);
indices_stride_dataout : OUT STD_LOGIC_VECTOR (7 downto 0);
indices_stride_size : OUT STD_LOGIC_VECTOR (31 downto 0);
i_size : IN STD_LOGIC_VECTOR (15 downto 0);
begin_index : IN STD_LOGIC_VECTOR (15 downto 0);
begin_sample : IN STD_LOGIC_VECTOR (15 downto 0);
end_index : IN STD_LOGIC_VECTOR (15 downto 0);
end_sample : IN STD_LOGIC_VECTOR (15 downto 0);
stop_on_first : IN STD_LOGIC_VECTOR (0 downto 0);
accept : IN STD_LOGIC_VECTOR (0 downto 0);
ap_return : OUT STD_LOGIC_VECTOR (31 downto 0) );
end;
architecture behav of nfa_accept_samples_generic_hw is
attribute CORE_GENERATION_INFO : STRING;
attribute CORE_GENERATION_INFO of behav : architecture is
"nfa_accept_samples_generic_hw,hls_ip_2013_4,{HLS_INPUT_TYPE=c,HLS_INPUT_FLOAT=0,HLS_INPUT_FIXED=0,HLS_INPUT_PART=xc6slx9ftg256-3,HLS_INPUT_CLOCK=1.000000,HLS_INPUT_ARCH=others,HLS_SYN_CLOCK=3.000000,HLS_SYN_LAT=129180014,HLS_SYN_TPT=none,HLS_SYN_MEM=0,HLS_SYN_DSP=0,HLS_SYN_FF=0,HLS_SYN_LUT=0}";
constant ap_const_logic_1 : STD_LOGIC := '1';
constant ap_const_logic_0 : STD_LOGIC := '0';
constant ap_ST_st1_fsm_0 : STD_LOGIC_VECTOR (5 downto 0) := "000000";
constant ap_ST_st2_fsm_1 : STD_LOGIC_VECTOR (5 downto 0) := "000001";
constant ap_ST_st3_fsm_2 : STD_LOGIC_VECTOR (5 downto 0) := "000010";
constant ap_ST_st4_fsm_3 : STD_LOGIC_VECTOR (5 downto 0) := "000011";
constant ap_ST_st5_fsm_4 : STD_LOGIC_VECTOR (5 downto 0) := "000100";
constant ap_ST_st6_fsm_5 : STD_LOGIC_VECTOR (5 downto 0) := "000101";
constant ap_ST_st7_fsm_6 : STD_LOGIC_VECTOR (5 downto 0) := "000110";
constant ap_ST_st8_fsm_7 : STD_LOGIC_VECTOR (5 downto 0) := "000111";
constant ap_ST_st9_fsm_8 : STD_LOGIC_VECTOR (5 downto 0) := "001000";
constant ap_ST_st10_fsm_9 : STD_LOGIC_VECTOR (5 downto 0) := "001001";
constant ap_ST_st11_fsm_10 : STD_LOGIC_VECTOR (5 downto 0) := "001010";
constant ap_ST_st12_fsm_11 : STD_LOGIC_VECTOR (5 downto 0) := "001011";
constant ap_ST_st13_fsm_12 : STD_LOGIC_VECTOR (5 downto 0) := "001100";
constant ap_ST_st14_fsm_13 : STD_LOGIC_VECTOR (5 downto 0) := "001101";
constant ap_ST_st15_fsm_14 : STD_LOGIC_VECTOR (5 downto 0) := "001110";
constant ap_ST_st16_fsm_15 : STD_LOGIC_VECTOR (5 downto 0) := "001111";
constant ap_ST_st17_fsm_16 : STD_LOGIC_VECTOR (5 downto 0) := "010000";
constant ap_ST_st18_fsm_17 : STD_LOGIC_VECTOR (5 downto 0) := "010001";
constant ap_ST_st19_fsm_18 : STD_LOGIC_VECTOR (5 downto 0) := "010010";
constant ap_ST_st20_fsm_19 : STD_LOGIC_VECTOR (5 downto 0) := "010011";
constant ap_ST_st21_fsm_20 : STD_LOGIC_VECTOR (5 downto 0) := "010100";
constant ap_ST_st22_fsm_21 : STD_LOGIC_VECTOR (5 downto 0) := "010101";
constant ap_ST_st23_fsm_22 : STD_LOGIC_VECTOR (5 downto 0) := "010110";
constant ap_ST_st24_fsm_23 : STD_LOGIC_VECTOR (5 downto 0) := "010111";
constant ap_ST_st25_fsm_24 : STD_LOGIC_VECTOR (5 downto 0) := "011000";
constant ap_ST_st26_fsm_25 : STD_LOGIC_VECTOR (5 downto 0) := "011001";
constant ap_ST_st27_fsm_26 : STD_LOGIC_VECTOR (5 downto 0) := "011010";
constant ap_ST_st28_fsm_27 : STD_LOGIC_VECTOR (5 downto 0) := "011011";
constant ap_ST_st29_fsm_28 : STD_LOGIC_VECTOR (5 downto 0) := "011100";
constant ap_ST_st30_fsm_29 : STD_LOGIC_VECTOR (5 downto 0) := "011101";
constant ap_ST_st31_fsm_30 : STD_LOGIC_VECTOR (5 downto 0) := "011110";
constant ap_ST_st32_fsm_31 : STD_LOGIC_VECTOR (5 downto 0) := "011111";
constant ap_ST_st33_fsm_32 : STD_LOGIC_VECTOR (5 downto 0) := "100000";
constant ap_ST_st34_fsm_33 : STD_LOGIC_VECTOR (5 downto 0) := "100001";
constant ap_ST_st35_fsm_34 : STD_LOGIC_VECTOR (5 downto 0) := "100010";
constant ap_ST_st36_fsm_35 : STD_LOGIC_VECTOR (5 downto 0) := "100011";
constant ap_ST_st37_fsm_36 : STD_LOGIC_VECTOR (5 downto 0) := "100100";
constant ap_ST_st38_fsm_37 : STD_LOGIC_VECTOR (5 downto 0) := "100101";
constant ap_ST_st39_fsm_38 : STD_LOGIC_VECTOR (5 downto 0) := "100110";
constant ap_ST_st40_fsm_39 : STD_LOGIC_VECTOR (5 downto 0) := "100111";
constant ap_ST_st41_fsm_40 : STD_LOGIC_VECTOR (5 downto 0) := "101000";
constant ap_ST_st42_fsm_41 : STD_LOGIC_VECTOR (5 downto 0) := "101001";
constant ap_ST_st43_fsm_42 : STD_LOGIC_VECTOR (5 downto 0) := "101010";
constant ap_const_lv1_0 : STD_LOGIC_VECTOR (0 downto 0) := "0";
constant ap_const_lv32_1 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000001";
constant ap_const_lv32_0 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000000";
signal ap_CS_fsm : STD_LOGIC_VECTOR (5 downto 0) := "000000";
signal stop_on_first_read_read_fu_104_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal tmp_i_fu_230_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal tmp_i_reg_315 : STD_LOGIC_VECTOR (0 downto 0);
signal tmp_i_10_fu_235_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal tmp_i_10_reg_320 : STD_LOGIC_VECTOR (0 downto 0);
signal tmp_i_11_fu_240_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal tmp_i_11_reg_325 : STD_LOGIC_VECTOR (0 downto 0);
signal c_load_reg_329 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_ap_return : STD_LOGIC_VECTOR (31 downto 0);
signal offset_reg_335 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_ap_return : STD_LOGIC_VECTOR (0 downto 0);
signal r_reg_340 : STD_LOGIC_VECTOR (0 downto 0);
signal grp_nfa_accept_sample_fu_178_ap_done : STD_LOGIC;
signal or_cond_fu_247_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal or_cond_reg_345 : STD_LOGIC_VECTOR (0 downto 0);
signal grp_fu_251_p2 : STD_LOGIC_VECTOR (31 downto 0);
signal c_1_reg_349 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_ap_start : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_ap_idle : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_ap_ready : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_din : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_full_n : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_write : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_rsp_empty_n : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_rsp_read : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_datain : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_dataout : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_initials_buckets_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_din : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_full_n : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_write : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_rsp_empty_n : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_rsp_read : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_datain : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_dataout : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_finals_buckets_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_din : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_full_n : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_write : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_rsp_empty_n : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_rsp_read : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_datain : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_dataout : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_forward_buckets_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_nfa_symbols : STD_LOGIC_VECTOR (7 downto 0);
signal grp_nfa_accept_sample_fu_178_sample_req_din : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_sample_req_full_n : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_sample_req_write : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_sample_rsp_empty_n : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_sample_rsp_read : STD_LOGIC;
signal grp_nfa_accept_sample_fu_178_sample_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_sample_datain : STD_LOGIC_VECTOR (7 downto 0);
signal grp_nfa_accept_sample_fu_178_sample_dataout : STD_LOGIC_VECTOR (7 downto 0);
signal grp_nfa_accept_sample_fu_178_sample_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_tmp_36 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_length_r : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_get_offset_fu_194_ap_start : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_ap_done : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_ap_idle : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_ap_ready : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_stride_req_din : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_stride_req_full_n : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_stride_req_write : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_stride_rsp_empty_n : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_stride_rsp_read : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_stride_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_stride_datain : STD_LOGIC_VECTOR (7 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_stride_dataout : STD_LOGIC_VECTOR (7 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_stride_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_begin_req_din : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_begin_req_full_n : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_begin_req_write : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_begin_rsp_empty_n : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_begin_rsp_read : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_begin_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_begin_datain : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_begin_dataout : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_begin_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_ap_ce : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_i_index : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_get_offset_fu_194_i_sample : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_samples_req_din : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_samples_req_full_n : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_samples_req_write : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_samples_rsp_empty_n : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_samples_rsp_read : STD_LOGIC;
signal grp_sample_iterator_get_offset_fu_194_indices_samples_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_samples_datain : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_samples_dataout : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_get_offset_fu_194_indices_samples_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_sample_buffer_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_get_offset_fu_194_sample_length : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_next_fu_211_ap_start : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_ap_done : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_ap_idle : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_ap_ready : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_samples_req_din : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_samples_req_full_n : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_samples_req_write : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_samples_rsp_empty_n : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_samples_rsp_read : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_samples_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_next_fu_211_indices_samples_datain : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_next_fu_211_indices_samples_dataout : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_next_fu_211_indices_samples_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_next_fu_211_ap_ce : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_begin_req_din : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_begin_req_full_n : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_begin_req_write : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_begin_rsp_empty_n : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_begin_rsp_read : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_begin_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_next_fu_211_indices_begin_datain : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_next_fu_211_indices_begin_dataout : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_next_fu_211_indices_begin_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_next_fu_211_indices_stride_req_din : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_stride_req_full_n : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_stride_req_write : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_stride_rsp_empty_n : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_stride_rsp_read : STD_LOGIC;
signal grp_sample_iterator_next_fu_211_indices_stride_address : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_next_fu_211_indices_stride_datain : STD_LOGIC_VECTOR (7 downto 0);
signal grp_sample_iterator_next_fu_211_indices_stride_dataout : STD_LOGIC_VECTOR (7 downto 0);
signal grp_sample_iterator_next_fu_211_indices_stride_size : STD_LOGIC_VECTOR (31 downto 0);
signal grp_sample_iterator_next_fu_211_i_index : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_next_fu_211_i_sample : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_next_fu_211_ap_return_0 : STD_LOGIC_VECTOR (15 downto 0);
signal grp_sample_iterator_next_fu_211_ap_return_1 : STD_LOGIC_VECTOR (15 downto 0);
signal i_index_reg_146 : STD_LOGIC_VECTOR (15 downto 0);
signal i_sample_reg_156 : STD_LOGIC_VECTOR (15 downto 0);
signal p_0_reg_166 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_nfa_accept_sample_fu_178_ap_start_ap_start_reg : STD_LOGIC := '0';
signal grp_sample_iterator_get_offset_fu_194_ap_start_ap_start_reg : STD_LOGIC := '0';
signal ap_NS_fsm : STD_LOGIC_VECTOR (5 downto 0);
signal grp_sample_iterator_next_fu_211_ap_start_ap_start_reg : STD_LOGIC := '0';
signal c_fu_94 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_fu_251_p0 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_fu_251_p1 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_fu_251_ce : STD_LOGIC;
component nfa_accept_sample IS
port (
ap_clk : IN STD_LOGIC;
ap_rst : IN STD_LOGIC;
ap_start : IN STD_LOGIC;
ap_done : OUT STD_LOGIC;
ap_idle : OUT STD_LOGIC;
ap_ready : OUT STD_LOGIC;
nfa_initials_buckets_req_din : OUT STD_LOGIC;
nfa_initials_buckets_req_full_n : IN STD_LOGIC;
nfa_initials_buckets_req_write : OUT STD_LOGIC;
nfa_initials_buckets_rsp_empty_n : IN STD_LOGIC;
nfa_initials_buckets_rsp_read : OUT STD_LOGIC;
nfa_initials_buckets_address : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_initials_buckets_datain : IN STD_LOGIC_VECTOR (31 downto 0);
nfa_initials_buckets_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_initials_buckets_size : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_finals_buckets_req_din : OUT STD_LOGIC;
nfa_finals_buckets_req_full_n : IN STD_LOGIC;
nfa_finals_buckets_req_write : OUT STD_LOGIC;
nfa_finals_buckets_rsp_empty_n : IN STD_LOGIC;
nfa_finals_buckets_rsp_read : OUT STD_LOGIC;
nfa_finals_buckets_address : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_finals_buckets_datain : IN STD_LOGIC_VECTOR (31 downto 0);
nfa_finals_buckets_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_finals_buckets_size : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_forward_buckets_req_din : OUT STD_LOGIC;
nfa_forward_buckets_req_full_n : IN STD_LOGIC;
nfa_forward_buckets_req_write : OUT STD_LOGIC;
nfa_forward_buckets_rsp_empty_n : IN STD_LOGIC;
nfa_forward_buckets_rsp_read : OUT STD_LOGIC;
nfa_forward_buckets_address : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_forward_buckets_datain : IN STD_LOGIC_VECTOR (31 downto 0);
nfa_forward_buckets_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_forward_buckets_size : OUT STD_LOGIC_VECTOR (31 downto 0);
nfa_symbols : IN STD_LOGIC_VECTOR (7 downto 0);
sample_req_din : OUT STD_LOGIC;
sample_req_full_n : IN STD_LOGIC;
sample_req_write : OUT STD_LOGIC;
sample_rsp_empty_n : IN STD_LOGIC;
sample_rsp_read : OUT STD_LOGIC;
sample_address : OUT STD_LOGIC_VECTOR (31 downto 0);
sample_datain : IN STD_LOGIC_VECTOR (7 downto 0);
sample_dataout : OUT STD_LOGIC_VECTOR (7 downto 0);
sample_size : OUT STD_LOGIC_VECTOR (31 downto 0);
tmp_36 : IN STD_LOGIC_VECTOR (31 downto 0);
length_r : IN STD_LOGIC_VECTOR (15 downto 0);
ap_return : OUT STD_LOGIC_VECTOR (0 downto 0) );
end component;
component sample_iterator_get_offset IS
port (
ap_clk : IN STD_LOGIC;
ap_rst : IN STD_LOGIC;
ap_start : IN STD_LOGIC;
ap_done : OUT STD_LOGIC;
ap_idle : OUT STD_LOGIC;
ap_ready : OUT STD_LOGIC;
indices_stride_req_din : OUT STD_LOGIC;
indices_stride_req_full_n : IN STD_LOGIC;
indices_stride_req_write : OUT STD_LOGIC;
indices_stride_rsp_empty_n : IN STD_LOGIC;
indices_stride_rsp_read : OUT STD_LOGIC;
indices_stride_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_stride_datain : IN STD_LOGIC_VECTOR (7 downto 0);
indices_stride_dataout : OUT STD_LOGIC_VECTOR (7 downto 0);
indices_stride_size : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_begin_req_din : OUT STD_LOGIC;
indices_begin_req_full_n : IN STD_LOGIC;
indices_begin_req_write : OUT STD_LOGIC;
indices_begin_rsp_empty_n : IN STD_LOGIC;
indices_begin_rsp_read : OUT STD_LOGIC;
indices_begin_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_begin_datain : IN STD_LOGIC_VECTOR (31 downto 0);
indices_begin_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_begin_size : OUT STD_LOGIC_VECTOR (31 downto 0);
ap_ce : IN STD_LOGIC;
i_index : IN STD_LOGIC_VECTOR (15 downto 0);
i_sample : IN STD_LOGIC_VECTOR (15 downto 0);
indices_samples_req_din : OUT STD_LOGIC;
indices_samples_req_full_n : IN STD_LOGIC;
indices_samples_req_write : OUT STD_LOGIC;
indices_samples_rsp_empty_n : IN STD_LOGIC;
indices_samples_rsp_read : OUT STD_LOGIC;
indices_samples_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_samples_datain : IN STD_LOGIC_VECTOR (15 downto 0);
indices_samples_dataout : OUT STD_LOGIC_VECTOR (15 downto 0);
indices_samples_size : OUT STD_LOGIC_VECTOR (31 downto 0);
sample_buffer_size : IN STD_LOGIC_VECTOR (31 downto 0);
sample_length : IN STD_LOGIC_VECTOR (15 downto 0);
ap_return : OUT STD_LOGIC_VECTOR (31 downto 0) );
end component;
component sample_iterator_next IS
port (
ap_clk : IN STD_LOGIC;
ap_rst : IN STD_LOGIC;
ap_start : IN STD_LOGIC;
ap_done : OUT STD_LOGIC;
ap_idle : OUT STD_LOGIC;
ap_ready : OUT STD_LOGIC;
indices_samples_req_din : OUT STD_LOGIC;
indices_samples_req_full_n : IN STD_LOGIC;
indices_samples_req_write : OUT STD_LOGIC;
indices_samples_rsp_empty_n : IN STD_LOGIC;
indices_samples_rsp_read : OUT STD_LOGIC;
indices_samples_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_samples_datain : IN STD_LOGIC_VECTOR (15 downto 0);
indices_samples_dataout : OUT STD_LOGIC_VECTOR (15 downto 0);
indices_samples_size : OUT STD_LOGIC_VECTOR (31 downto 0);
ap_ce : IN STD_LOGIC;
indices_begin_req_din : OUT STD_LOGIC;
indices_begin_req_full_n : IN STD_LOGIC;
indices_begin_req_write : OUT STD_LOGIC;
indices_begin_rsp_empty_n : IN STD_LOGIC;
indices_begin_rsp_read : OUT STD_LOGIC;
indices_begin_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_begin_datain : IN STD_LOGIC_VECTOR (31 downto 0);
indices_begin_dataout : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_begin_size : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_stride_req_din : OUT STD_LOGIC;
indices_stride_req_full_n : IN STD_LOGIC;
indices_stride_req_write : OUT STD_LOGIC;
indices_stride_rsp_empty_n : IN STD_LOGIC;
indices_stride_rsp_read : OUT STD_LOGIC;
indices_stride_address : OUT STD_LOGIC_VECTOR (31 downto 0);
indices_stride_datain : IN STD_LOGIC_VECTOR (7 downto 0);
indices_stride_dataout : OUT STD_LOGIC_VECTOR (7 downto 0);
indices_stride_size : OUT STD_LOGIC_VECTOR (31 downto 0);
i_index : IN STD_LOGIC_VECTOR (15 downto 0);
i_sample : IN STD_LOGIC_VECTOR (15 downto 0);
ap_return_0 : OUT STD_LOGIC_VECTOR (15 downto 0);
ap_return_1 : OUT STD_LOGIC_VECTOR (15 downto 0) );
end component;
component nfa_accept_samples_generic_hw_add_32ns_32ns_32_8 IS
generic (
ID : INTEGER;
NUM_STAGE : INTEGER;
din0_WIDTH : INTEGER;
din1_WIDTH : INTEGER;
dout_WIDTH : INTEGER );
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
din0 : IN STD_LOGIC_VECTOR (31 downto 0);
din1 : IN STD_LOGIC_VECTOR (31 downto 0);
ce : IN STD_LOGIC;
dout : OUT STD_LOGIC_VECTOR (31 downto 0) );
end component;
begin
grp_nfa_accept_sample_fu_178 : component nfa_accept_sample
port map (
ap_clk => ap_clk,
ap_rst => ap_rst,
ap_start => grp_nfa_accept_sample_fu_178_ap_start,
ap_done => grp_nfa_accept_sample_fu_178_ap_done,
ap_idle => grp_nfa_accept_sample_fu_178_ap_idle,
ap_ready => grp_nfa_accept_sample_fu_178_ap_ready,
nfa_initials_buckets_req_din => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_din,
nfa_initials_buckets_req_full_n => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_full_n,
nfa_initials_buckets_req_write => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_write,
nfa_initials_buckets_rsp_empty_n => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_rsp_empty_n,
nfa_initials_buckets_rsp_read => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_rsp_read,
nfa_initials_buckets_address => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_address,
nfa_initials_buckets_datain => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_datain,
nfa_initials_buckets_dataout => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_dataout,
nfa_initials_buckets_size => grp_nfa_accept_sample_fu_178_nfa_initials_buckets_size,
nfa_finals_buckets_req_din => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_din,
nfa_finals_buckets_req_full_n => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_full_n,
nfa_finals_buckets_req_write => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_write,
nfa_finals_buckets_rsp_empty_n => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_rsp_empty_n,
nfa_finals_buckets_rsp_read => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_rsp_read,
nfa_finals_buckets_address => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_address,
nfa_finals_buckets_datain => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_datain,
nfa_finals_buckets_dataout => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_dataout,
nfa_finals_buckets_size => grp_nfa_accept_sample_fu_178_nfa_finals_buckets_size,
nfa_forward_buckets_req_din => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_din,
nfa_forward_buckets_req_full_n => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_full_n,
nfa_forward_buckets_req_write => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_write,
nfa_forward_buckets_rsp_empty_n => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_rsp_empty_n,
nfa_forward_buckets_rsp_read => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_rsp_read,
nfa_forward_buckets_address => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_address,
nfa_forward_buckets_datain => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_datain,
nfa_forward_buckets_dataout => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_dataout,
nfa_forward_buckets_size => grp_nfa_accept_sample_fu_178_nfa_forward_buckets_size,
nfa_symbols => grp_nfa_accept_sample_fu_178_nfa_symbols,
sample_req_din => grp_nfa_accept_sample_fu_178_sample_req_din,
sample_req_full_n => grp_nfa_accept_sample_fu_178_sample_req_full_n,
sample_req_write => grp_nfa_accept_sample_fu_178_sample_req_write,
sample_rsp_empty_n => grp_nfa_accept_sample_fu_178_sample_rsp_empty_n,
sample_rsp_read => grp_nfa_accept_sample_fu_178_sample_rsp_read,
sample_address => grp_nfa_accept_sample_fu_178_sample_address,
sample_datain => grp_nfa_accept_sample_fu_178_sample_datain,
sample_dataout => grp_nfa_accept_sample_fu_178_sample_dataout,
sample_size => grp_nfa_accept_sample_fu_178_sample_size,
tmp_36 => grp_nfa_accept_sample_fu_178_tmp_36,
length_r => grp_nfa_accept_sample_fu_178_length_r,
ap_return => grp_nfa_accept_sample_fu_178_ap_return);
grp_sample_iterator_get_offset_fu_194 : component sample_iterator_get_offset
port map (
ap_clk => ap_clk,
ap_rst => ap_rst,
ap_start => grp_sample_iterator_get_offset_fu_194_ap_start,
ap_done => grp_sample_iterator_get_offset_fu_194_ap_done,
ap_idle => grp_sample_iterator_get_offset_fu_194_ap_idle,
ap_ready => grp_sample_iterator_get_offset_fu_194_ap_ready,
indices_stride_req_din => grp_sample_iterator_get_offset_fu_194_indices_stride_req_din,
indices_stride_req_full_n => grp_sample_iterator_get_offset_fu_194_indices_stride_req_full_n,
indices_stride_req_write => grp_sample_iterator_get_offset_fu_194_indices_stride_req_write,
indices_stride_rsp_empty_n => grp_sample_iterator_get_offset_fu_194_indices_stride_rsp_empty_n,
indices_stride_rsp_read => grp_sample_iterator_get_offset_fu_194_indices_stride_rsp_read,
indices_stride_address => grp_sample_iterator_get_offset_fu_194_indices_stride_address,
indices_stride_datain => grp_sample_iterator_get_offset_fu_194_indices_stride_datain,
indices_stride_dataout => grp_sample_iterator_get_offset_fu_194_indices_stride_dataout,
indices_stride_size => grp_sample_iterator_get_offset_fu_194_indices_stride_size,
indices_begin_req_din => grp_sample_iterator_get_offset_fu_194_indices_begin_req_din,
indices_begin_req_full_n => grp_sample_iterator_get_offset_fu_194_indices_begin_req_full_n,
indices_begin_req_write => grp_sample_iterator_get_offset_fu_194_indices_begin_req_write,
indices_begin_rsp_empty_n => grp_sample_iterator_get_offset_fu_194_indices_begin_rsp_empty_n,
indices_begin_rsp_read => grp_sample_iterator_get_offset_fu_194_indices_begin_rsp_read,
indices_begin_address => grp_sample_iterator_get_offset_fu_194_indices_begin_address,
indices_begin_datain => grp_sample_iterator_get_offset_fu_194_indices_begin_datain,
indices_begin_dataout => grp_sample_iterator_get_offset_fu_194_indices_begin_dataout,
indices_begin_size => grp_sample_iterator_get_offset_fu_194_indices_begin_size,
ap_ce => grp_sample_iterator_get_offset_fu_194_ap_ce,
i_index => grp_sample_iterator_get_offset_fu_194_i_index,
i_sample => grp_sample_iterator_get_offset_fu_194_i_sample,
indices_samples_req_din => grp_sample_iterator_get_offset_fu_194_indices_samples_req_din,
indices_samples_req_full_n => grp_sample_iterator_get_offset_fu_194_indices_samples_req_full_n,
indices_samples_req_write => grp_sample_iterator_get_offset_fu_194_indices_samples_req_write,
indices_samples_rsp_empty_n => grp_sample_iterator_get_offset_fu_194_indices_samples_rsp_empty_n,
indices_samples_rsp_read => grp_sample_iterator_get_offset_fu_194_indices_samples_rsp_read,
indices_samples_address => grp_sample_iterator_get_offset_fu_194_indices_samples_address,
indices_samples_datain => grp_sample_iterator_get_offset_fu_194_indices_samples_datain,
indices_samples_dataout => grp_sample_iterator_get_offset_fu_194_indices_samples_dataout,
indices_samples_size => grp_sample_iterator_get_offset_fu_194_indices_samples_size,
sample_buffer_size => grp_sample_iterator_get_offset_fu_194_sample_buffer_size,
sample_length => grp_sample_iterator_get_offset_fu_194_sample_length,
ap_return => grp_sample_iterator_get_offset_fu_194_ap_return);
grp_sample_iterator_next_fu_211 : component sample_iterator_next
port map (
ap_clk => ap_clk,
ap_rst => ap_rst,
ap_start => grp_sample_iterator_next_fu_211_ap_start,
ap_done => grp_sample_iterator_next_fu_211_ap_done,
ap_idle => grp_sample_iterator_next_fu_211_ap_idle,
ap_ready => grp_sample_iterator_next_fu_211_ap_ready,
indices_samples_req_din => grp_sample_iterator_next_fu_211_indices_samples_req_din,
indices_samples_req_full_n => grp_sample_iterator_next_fu_211_indices_samples_req_full_n,
indices_samples_req_write => grp_sample_iterator_next_fu_211_indices_samples_req_write,
indices_samples_rsp_empty_n => grp_sample_iterator_next_fu_211_indices_samples_rsp_empty_n,
indices_samples_rsp_read => grp_sample_iterator_next_fu_211_indices_samples_rsp_read,
indices_samples_address => grp_sample_iterator_next_fu_211_indices_samples_address,
indices_samples_datain => grp_sample_iterator_next_fu_211_indices_samples_datain,
indices_samples_dataout => grp_sample_iterator_next_fu_211_indices_samples_dataout,
indices_samples_size => grp_sample_iterator_next_fu_211_indices_samples_size,
ap_ce => grp_sample_iterator_next_fu_211_ap_ce,
indices_begin_req_din => grp_sample_iterator_next_fu_211_indices_begin_req_din,
indices_begin_req_full_n => grp_sample_iterator_next_fu_211_indices_begin_req_full_n,
indices_begin_req_write => grp_sample_iterator_next_fu_211_indices_begin_req_write,
indices_begin_rsp_empty_n => grp_sample_iterator_next_fu_211_indices_begin_rsp_empty_n,
indices_begin_rsp_read => grp_sample_iterator_next_fu_211_indices_begin_rsp_read,
indices_begin_address => grp_sample_iterator_next_fu_211_indices_begin_address,
indices_begin_datain => grp_sample_iterator_next_fu_211_indices_begin_datain,
indices_begin_dataout => grp_sample_iterator_next_fu_211_indices_begin_dataout,
indices_begin_size => grp_sample_iterator_next_fu_211_indices_begin_size,
indices_stride_req_din => grp_sample_iterator_next_fu_211_indices_stride_req_din,
indices_stride_req_full_n => grp_sample_iterator_next_fu_211_indices_stride_req_full_n,
indices_stride_req_write => grp_sample_iterator_next_fu_211_indices_stride_req_write,
indices_stride_rsp_empty_n => grp_sample_iterator_next_fu_211_indices_stride_rsp_empty_n,
indices_stride_rsp_read => grp_sample_iterator_next_fu_211_indices_stride_rsp_read,
indices_stride_address => grp_sample_iterator_next_fu_211_indices_stride_address,
indices_stride_datain => grp_sample_iterator_next_fu_211_indices_stride_datain,
indices_stride_dataout => grp_sample_iterator_next_fu_211_indices_stride_dataout,
indices_stride_size => grp_sample_iterator_next_fu_211_indices_stride_size,
i_index => grp_sample_iterator_next_fu_211_i_index,
i_sample => grp_sample_iterator_next_fu_211_i_sample,
ap_return_0 => grp_sample_iterator_next_fu_211_ap_return_0,
ap_return_1 => grp_sample_iterator_next_fu_211_ap_return_1);
nfa_accept_samples_generic_hw_add_32ns_32ns_32_8_U38 : component nfa_accept_samples_generic_hw_add_32ns_32ns_32_8
generic map (
ID => 38,
NUM_STAGE => 8,
din0_WIDTH => 32,
din1_WIDTH => 32,
dout_WIDTH => 32)
port map (
clk => ap_clk,
reset => ap_rst,
din0 => grp_fu_251_p0,
din1 => grp_fu_251_p1,
ce => grp_fu_251_ce,
dout => grp_fu_251_p2);
-- the current state (ap_CS_fsm) of the state machine. --
ap_CS_fsm_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_CS_fsm <= ap_ST_st1_fsm_0;
else
ap_CS_fsm <= ap_NS_fsm;
end if;
end if;
end process;
-- grp_nfa_accept_sample_fu_178_ap_start_ap_start_reg assign process. --
grp_nfa_accept_sample_fu_178_ap_start_ap_start_reg_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
grp_nfa_accept_sample_fu_178_ap_start_ap_start_reg <= ap_const_logic_0;
else
if ((ap_ST_st21_fsm_20 = ap_CS_fsm)) then
grp_nfa_accept_sample_fu_178_ap_start_ap_start_reg <= ap_const_logic_1;
elsif ((ap_const_logic_1 = grp_nfa_accept_sample_fu_178_ap_ready)) then
grp_nfa_accept_sample_fu_178_ap_start_ap_start_reg <= ap_const_logic_0;
end if;
end if;
end if;
end process;
-- grp_sample_iterator_get_offset_fu_194_ap_start_ap_start_reg assign process. --
grp_sample_iterator_get_offset_fu_194_ap_start_ap_start_reg_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
grp_sample_iterator_get_offset_fu_194_ap_start_ap_start_reg <= ap_const_logic_0;
else
if (((ap_ST_st3_fsm_2 = ap_CS_fsm) and (ap_ST_st4_fsm_3 = ap_NS_fsm) and (tmp_i_11_fu_240_p2 = ap_const_lv1_0))) then
grp_sample_iterator_get_offset_fu_194_ap_start_ap_start_reg <= ap_const_logic_1;
elsif ((ap_const_logic_1 = grp_sample_iterator_get_offset_fu_194_ap_ready)) then
grp_sample_iterator_get_offset_fu_194_ap_start_ap_start_reg <= ap_const_logic_0;
end if;
end if;
end if;
end process;
-- grp_sample_iterator_next_fu_211_ap_start_ap_start_reg assign process. --
grp_sample_iterator_next_fu_211_ap_start_ap_start_reg_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
grp_sample_iterator_next_fu_211_ap_start_ap_start_reg <= ap_const_logic_0;
else
if (((ap_ST_st31_fsm_30 = ap_NS_fsm) and ((ap_ST_st23_fsm_22 = ap_CS_fsm) or (ap_ST_st30_fsm_29 = ap_CS_fsm)))) then
grp_sample_iterator_next_fu_211_ap_start_ap_start_reg <= ap_const_logic_1;
elsif ((ap_const_logic_1 = grp_sample_iterator_next_fu_211_ap_ready)) then
grp_sample_iterator_next_fu_211_ap_start_ap_start_reg <= ap_const_logic_0;
end if;
end if;
end if;
end process;
-- c_fu_94 assign process. --
c_fu_94_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_ST_st31_fsm_30 = ap_CS_fsm) and (or_cond_reg_345 = ap_const_lv1_0))) then
c_fu_94 <= c_1_reg_349;
elsif (((ap_ST_st1_fsm_0 = ap_CS_fsm) and not((ap_start = ap_const_logic_0)))) then
c_fu_94 <= ap_const_lv32_0;
end if;
end if;
end process;
-- i_index_reg_146 assign process. --
i_index_reg_146_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_ST_st42_fsm_41 = ap_CS_fsm)) then
i_index_reg_146 <= grp_sample_iterator_next_fu_211_ap_return_0;
elsif (((ap_ST_st1_fsm_0 = ap_CS_fsm) and not((ap_start = ap_const_logic_0)))) then
i_index_reg_146 <= begin_index;
end if;
end if;
end process;
-- i_sample_reg_156 assign process. --
i_sample_reg_156_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_ST_st42_fsm_41 = ap_CS_fsm)) then
i_sample_reg_156 <= grp_sample_iterator_next_fu_211_ap_return_1;
elsif (((ap_ST_st1_fsm_0 = ap_CS_fsm) and not((ap_start = ap_const_logic_0)))) then
i_sample_reg_156 <= begin_sample;
end if;
end if;
end process;
-- p_0_reg_166 assign process. --
p_0_reg_166_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_ST_st23_fsm_22 = ap_CS_fsm) and not((stop_on_first_read_read_fu_104_p2 = ap_const_lv1_0)) and (or_cond_fu_247_p2 = ap_const_lv1_0))) then
p_0_reg_166 <= ap_const_lv32_1;
elsif (((ap_ST_st4_fsm_3 = ap_CS_fsm) and not((tmp_i_11_reg_325 = ap_const_lv1_0)))) then
p_0_reg_166 <= c_fu_94;
end if;
end if;
end process;
-- assign process. --
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_ST_st30_fsm_29 = ap_CS_fsm)) then
c_1_reg_349 <= grp_fu_251_p2;
end if;
end if;
end process;
-- assign process. --
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_ST_st4_fsm_3 = ap_CS_fsm)) then
c_load_reg_329 <= c_fu_94;
end if;
end if;
end process;
-- assign process. --
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_ST_st21_fsm_20 = ap_CS_fsm)) then
offset_reg_335 <= grp_sample_iterator_get_offset_fu_194_ap_return;
end if;
end if;
end process;
-- assign process. --
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_ST_st23_fsm_22 = ap_CS_fsm)) then
or_cond_reg_345 <= or_cond_fu_247_p2;
end if;
end if;
end process;
-- assign process. --
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_ST_st22_fsm_21 = ap_CS_fsm) and not((ap_const_logic_0 = grp_nfa_accept_sample_fu_178_ap_done)))) then
r_reg_340 <= grp_nfa_accept_sample_fu_178_ap_return;
end if;
end if;
end process;
-- assign process. --
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_ST_st2_fsm_1 = ap_CS_fsm)) then
tmp_i_10_reg_320 <= tmp_i_10_fu_235_p2;
tmp_i_reg_315 <= tmp_i_fu_230_p2;
end if;
end if;
end process;
-- assign process. --
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_ST_st3_fsm_2 = ap_CS_fsm)) then
tmp_i_11_reg_325 <= tmp_i_11_fu_240_p2;
end if;
end if;
end process;
-- the next state (ap_NS_fsm) of the state machine. --
ap_NS_fsm_assign_proc : process (ap_start , ap_CS_fsm , stop_on_first_read_read_fu_104_p2 , tmp_i_11_reg_325 , grp_nfa_accept_sample_fu_178_ap_done , or_cond_fu_247_p2)
begin
case ap_CS_fsm is
when ap_ST_st1_fsm_0 =>
if (not((ap_start = ap_const_logic_0))) then
ap_NS_fsm <= ap_ST_st2_fsm_1;
else
ap_NS_fsm <= ap_ST_st1_fsm_0;
end if;
when ap_ST_st2_fsm_1 =>
ap_NS_fsm <= ap_ST_st3_fsm_2;
when ap_ST_st3_fsm_2 =>
ap_NS_fsm <= ap_ST_st4_fsm_3;
when ap_ST_st4_fsm_3 =>
if (not((tmp_i_11_reg_325 = ap_const_lv1_0))) then
ap_NS_fsm <= ap_ST_st43_fsm_42;
else
ap_NS_fsm <= ap_ST_st5_fsm_4;
end if;
when ap_ST_st5_fsm_4 =>
ap_NS_fsm <= ap_ST_st6_fsm_5;
when ap_ST_st6_fsm_5 =>
ap_NS_fsm <= ap_ST_st7_fsm_6;
when ap_ST_st7_fsm_6 =>
ap_NS_fsm <= ap_ST_st8_fsm_7;
when ap_ST_st8_fsm_7 =>
ap_NS_fsm <= ap_ST_st9_fsm_8;
when ap_ST_st9_fsm_8 =>
ap_NS_fsm <= ap_ST_st10_fsm_9;
when ap_ST_st10_fsm_9 =>
ap_NS_fsm <= ap_ST_st11_fsm_10;
when ap_ST_st11_fsm_10 =>
ap_NS_fsm <= ap_ST_st12_fsm_11;
when ap_ST_st12_fsm_11 =>
ap_NS_fsm <= ap_ST_st13_fsm_12;
when ap_ST_st13_fsm_12 =>
ap_NS_fsm <= ap_ST_st14_fsm_13;
when ap_ST_st14_fsm_13 =>
ap_NS_fsm <= ap_ST_st15_fsm_14;
when ap_ST_st15_fsm_14 =>
ap_NS_fsm <= ap_ST_st16_fsm_15;
when ap_ST_st16_fsm_15 =>
ap_NS_fsm <= ap_ST_st17_fsm_16;
when ap_ST_st17_fsm_16 =>
ap_NS_fsm <= ap_ST_st18_fsm_17;
when ap_ST_st18_fsm_17 =>
ap_NS_fsm <= ap_ST_st19_fsm_18;
when ap_ST_st19_fsm_18 =>
ap_NS_fsm <= ap_ST_st20_fsm_19;
when ap_ST_st20_fsm_19 =>
ap_NS_fsm <= ap_ST_st21_fsm_20;
when ap_ST_st21_fsm_20 =>
ap_NS_fsm <= ap_ST_st22_fsm_21;
when ap_ST_st22_fsm_21 =>
if (not((ap_const_logic_0 = grp_nfa_accept_sample_fu_178_ap_done))) then
ap_NS_fsm <= ap_ST_st23_fsm_22;
else
ap_NS_fsm <= ap_ST_st22_fsm_21;
end if;
when ap_ST_st23_fsm_22 =>
if ((not((stop_on_first_read_read_fu_104_p2 = ap_const_lv1_0)) and (or_cond_fu_247_p2 = ap_const_lv1_0))) then
ap_NS_fsm <= ap_ST_st43_fsm_42;
elsif (((stop_on_first_read_read_fu_104_p2 = ap_const_lv1_0) and (or_cond_fu_247_p2 = ap_const_lv1_0))) then
ap_NS_fsm <= ap_ST_st24_fsm_23;
else
ap_NS_fsm <= ap_ST_st31_fsm_30;
end if;
when ap_ST_st24_fsm_23 =>
ap_NS_fsm <= ap_ST_st25_fsm_24;
when ap_ST_st25_fsm_24 =>
ap_NS_fsm <= ap_ST_st26_fsm_25;
when ap_ST_st26_fsm_25 =>
ap_NS_fsm <= ap_ST_st27_fsm_26;
when ap_ST_st27_fsm_26 =>
ap_NS_fsm <= ap_ST_st28_fsm_27;
when ap_ST_st28_fsm_27 =>
ap_NS_fsm <= ap_ST_st29_fsm_28;
when ap_ST_st29_fsm_28 =>
ap_NS_fsm <= ap_ST_st30_fsm_29;
when ap_ST_st30_fsm_29 =>
ap_NS_fsm <= ap_ST_st31_fsm_30;
when ap_ST_st31_fsm_30 =>
ap_NS_fsm <= ap_ST_st32_fsm_31;
when ap_ST_st32_fsm_31 =>
ap_NS_fsm <= ap_ST_st33_fsm_32;
when ap_ST_st33_fsm_32 =>
ap_NS_fsm <= ap_ST_st34_fsm_33;
when ap_ST_st34_fsm_33 =>
ap_NS_fsm <= ap_ST_st35_fsm_34;
when ap_ST_st35_fsm_34 =>
ap_NS_fsm <= ap_ST_st36_fsm_35;
when ap_ST_st36_fsm_35 =>
ap_NS_fsm <= ap_ST_st37_fsm_36;
when ap_ST_st37_fsm_36 =>
ap_NS_fsm <= ap_ST_st38_fsm_37;
when ap_ST_st38_fsm_37 =>
ap_NS_fsm <= ap_ST_st39_fsm_38;
when ap_ST_st39_fsm_38 =>
ap_NS_fsm <= ap_ST_st40_fsm_39;
when ap_ST_st40_fsm_39 =>
ap_NS_fsm <= ap_ST_st41_fsm_40;
when ap_ST_st41_fsm_40 =>
ap_NS_fsm <= ap_ST_st42_fsm_41;
when ap_ST_st42_fsm_41 =>
ap_NS_fsm <= ap_ST_st2_fsm_1;
when ap_ST_st43_fsm_42 =>
ap_NS_fsm <= ap_ST_st1_fsm_0;
when others =>
ap_NS_fsm <= "XXXXXX";
end case;
end process;
-- ap_done assign process. --
ap_done_assign_proc : process(ap_CS_fsm)
begin
if ((ap_ST_st43_fsm_42 = ap_CS_fsm)) then
ap_done <= ap_const_logic_1;
else
ap_done <= ap_const_logic_0;
end if;
end process;
-- ap_idle assign process. --
ap_idle_assign_proc : process(ap_start, ap_CS_fsm)
begin
if ((not((ap_const_logic_1 = ap_start)) and (ap_ST_st1_fsm_0 = ap_CS_fsm))) then
ap_idle <= ap_const_logic_1;
else
ap_idle <= ap_const_logic_0;
end if;
end process;
-- ap_ready assign process. --
ap_ready_assign_proc : process(ap_CS_fsm)
begin
if ((ap_ST_st43_fsm_42 = ap_CS_fsm)) then
ap_ready <= ap_const_logic_1;
else
ap_ready <= ap_const_logic_0;
end if;
end process;
ap_return <= p_0_reg_166;
grp_fu_251_ce <= ap_const_logic_1;
grp_fu_251_p0 <= c_load_reg_329;
grp_fu_251_p1 <= ap_const_lv32_1;
grp_nfa_accept_sample_fu_178_ap_start <= grp_nfa_accept_sample_fu_178_ap_start_ap_start_reg;
grp_nfa_accept_sample_fu_178_length_r <= sample_length;
grp_nfa_accept_sample_fu_178_nfa_finals_buckets_datain <= nfa_finals_buckets_datain;
grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_full_n <= nfa_finals_buckets_req_full_n;
grp_nfa_accept_sample_fu_178_nfa_finals_buckets_rsp_empty_n <= nfa_finals_buckets_rsp_empty_n;
grp_nfa_accept_sample_fu_178_nfa_forward_buckets_datain <= nfa_forward_buckets_datain;
grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_full_n <= nfa_forward_buckets_req_full_n;
grp_nfa_accept_sample_fu_178_nfa_forward_buckets_rsp_empty_n <= nfa_forward_buckets_rsp_empty_n;
grp_nfa_accept_sample_fu_178_nfa_initials_buckets_datain <= nfa_initials_buckets_datain;
grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_full_n <= nfa_initials_buckets_req_full_n;
grp_nfa_accept_sample_fu_178_nfa_initials_buckets_rsp_empty_n <= nfa_initials_buckets_rsp_empty_n;
grp_nfa_accept_sample_fu_178_nfa_symbols <= nfa_symbols;
grp_nfa_accept_sample_fu_178_sample_datain <= sample_buffer_datain;
grp_nfa_accept_sample_fu_178_sample_req_full_n <= sample_buffer_req_full_n;
grp_nfa_accept_sample_fu_178_sample_rsp_empty_n <= sample_buffer_rsp_empty_n;
grp_nfa_accept_sample_fu_178_tmp_36 <= offset_reg_335;
grp_sample_iterator_get_offset_fu_194_ap_ce <= ap_const_logic_1;
grp_sample_iterator_get_offset_fu_194_ap_start <= grp_sample_iterator_get_offset_fu_194_ap_start_ap_start_reg;
grp_sample_iterator_get_offset_fu_194_i_index <= i_index_reg_146;
grp_sample_iterator_get_offset_fu_194_i_sample <= i_sample_reg_156;
grp_sample_iterator_get_offset_fu_194_indices_begin_datain <= indices_begin_datain;
grp_sample_iterator_get_offset_fu_194_indices_begin_req_full_n <= indices_begin_req_full_n;
grp_sample_iterator_get_offset_fu_194_indices_begin_rsp_empty_n <= indices_begin_rsp_empty_n;
grp_sample_iterator_get_offset_fu_194_indices_samples_datain <= indices_samples_datain;
grp_sample_iterator_get_offset_fu_194_indices_samples_req_full_n <= indices_samples_req_full_n;
grp_sample_iterator_get_offset_fu_194_indices_samples_rsp_empty_n <= indices_samples_rsp_empty_n;
grp_sample_iterator_get_offset_fu_194_indices_stride_datain <= indices_stride_datain;
grp_sample_iterator_get_offset_fu_194_indices_stride_req_full_n <= indices_stride_req_full_n;
grp_sample_iterator_get_offset_fu_194_indices_stride_rsp_empty_n <= indices_stride_rsp_empty_n;
grp_sample_iterator_get_offset_fu_194_sample_buffer_size <= sample_buffer_length;
grp_sample_iterator_get_offset_fu_194_sample_length <= sample_length;
grp_sample_iterator_next_fu_211_ap_ce <= ap_const_logic_1;
grp_sample_iterator_next_fu_211_ap_start <= grp_sample_iterator_next_fu_211_ap_start_ap_start_reg;
grp_sample_iterator_next_fu_211_i_index <= i_index_reg_146;
grp_sample_iterator_next_fu_211_i_sample <= i_sample_reg_156;
grp_sample_iterator_next_fu_211_indices_begin_datain <= indices_begin_datain;
grp_sample_iterator_next_fu_211_indices_begin_req_full_n <= indices_begin_req_full_n;
grp_sample_iterator_next_fu_211_indices_begin_rsp_empty_n <= indices_begin_rsp_empty_n;
grp_sample_iterator_next_fu_211_indices_samples_datain <= indices_samples_datain;
grp_sample_iterator_next_fu_211_indices_samples_req_full_n <= indices_samples_req_full_n;
grp_sample_iterator_next_fu_211_indices_samples_rsp_empty_n <= indices_samples_rsp_empty_n;
grp_sample_iterator_next_fu_211_indices_stride_datain <= indices_stride_datain;
grp_sample_iterator_next_fu_211_indices_stride_req_full_n <= indices_stride_req_full_n;
grp_sample_iterator_next_fu_211_indices_stride_rsp_empty_n <= indices_stride_rsp_empty_n;
-- indices_begin_address assign process. --
indices_begin_address_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_begin_address, grp_sample_iterator_next_fu_211_indices_begin_address)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_begin_address <= grp_sample_iterator_next_fu_211_indices_begin_address;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_begin_address <= grp_sample_iterator_get_offset_fu_194_indices_begin_address;
else
indices_begin_address <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
end if;
end process;
-- indices_begin_dataout assign process. --
indices_begin_dataout_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_begin_dataout, grp_sample_iterator_next_fu_211_indices_begin_dataout)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_begin_dataout <= grp_sample_iterator_next_fu_211_indices_begin_dataout;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_begin_dataout <= grp_sample_iterator_get_offset_fu_194_indices_begin_dataout;
else
indices_begin_dataout <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
end if;
end process;
-- indices_begin_req_din assign process. --
indices_begin_req_din_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_begin_req_din, grp_sample_iterator_next_fu_211_indices_begin_req_din)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_begin_req_din <= grp_sample_iterator_next_fu_211_indices_begin_req_din;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_begin_req_din <= grp_sample_iterator_get_offset_fu_194_indices_begin_req_din;
else
indices_begin_req_din <= 'X';
end if;
end process;
-- indices_begin_req_write assign process. --
indices_begin_req_write_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_begin_req_write, grp_sample_iterator_next_fu_211_indices_begin_req_write)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_begin_req_write <= grp_sample_iterator_next_fu_211_indices_begin_req_write;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_begin_req_write <= grp_sample_iterator_get_offset_fu_194_indices_begin_req_write;
else
indices_begin_req_write <= 'X';
end if;
end process;
-- indices_begin_rsp_read assign process. --
indices_begin_rsp_read_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_begin_rsp_read, grp_sample_iterator_next_fu_211_indices_begin_rsp_read)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_begin_rsp_read <= grp_sample_iterator_next_fu_211_indices_begin_rsp_read;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_begin_rsp_read <= grp_sample_iterator_get_offset_fu_194_indices_begin_rsp_read;
else
indices_begin_rsp_read <= 'X';
end if;
end process;
-- indices_begin_size assign process. --
indices_begin_size_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_begin_size, grp_sample_iterator_next_fu_211_indices_begin_size)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_begin_size <= grp_sample_iterator_next_fu_211_indices_begin_size;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_begin_size <= grp_sample_iterator_get_offset_fu_194_indices_begin_size;
else
indices_begin_size <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
end if;
end process;
-- indices_samples_address assign process. --
indices_samples_address_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_samples_address, grp_sample_iterator_next_fu_211_indices_samples_address)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_samples_address <= grp_sample_iterator_next_fu_211_indices_samples_address;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_samples_address <= grp_sample_iterator_get_offset_fu_194_indices_samples_address;
else
indices_samples_address <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
end if;
end process;
-- indices_samples_dataout assign process. --
indices_samples_dataout_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_samples_dataout, grp_sample_iterator_next_fu_211_indices_samples_dataout)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_samples_dataout <= grp_sample_iterator_next_fu_211_indices_samples_dataout;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_samples_dataout <= grp_sample_iterator_get_offset_fu_194_indices_samples_dataout;
else
indices_samples_dataout <= "XXXXXXXXXXXXXXXX";
end if;
end process;
-- indices_samples_req_din assign process. --
indices_samples_req_din_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_samples_req_din, grp_sample_iterator_next_fu_211_indices_samples_req_din)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_samples_req_din <= grp_sample_iterator_next_fu_211_indices_samples_req_din;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_samples_req_din <= grp_sample_iterator_get_offset_fu_194_indices_samples_req_din;
else
indices_samples_req_din <= 'X';
end if;
end process;
-- indices_samples_req_write assign process. --
indices_samples_req_write_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_samples_req_write, grp_sample_iterator_next_fu_211_indices_samples_req_write)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_samples_req_write <= grp_sample_iterator_next_fu_211_indices_samples_req_write;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_samples_req_write <= grp_sample_iterator_get_offset_fu_194_indices_samples_req_write;
else
indices_samples_req_write <= 'X';
end if;
end process;
-- indices_samples_rsp_read assign process. --
indices_samples_rsp_read_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_samples_rsp_read, grp_sample_iterator_next_fu_211_indices_samples_rsp_read)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_samples_rsp_read <= grp_sample_iterator_next_fu_211_indices_samples_rsp_read;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_samples_rsp_read <= grp_sample_iterator_get_offset_fu_194_indices_samples_rsp_read;
else
indices_samples_rsp_read <= 'X';
end if;
end process;
-- indices_samples_size assign process. --
indices_samples_size_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_samples_size, grp_sample_iterator_next_fu_211_indices_samples_size)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_samples_size <= grp_sample_iterator_next_fu_211_indices_samples_size;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_samples_size <= grp_sample_iterator_get_offset_fu_194_indices_samples_size;
else
indices_samples_size <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
end if;
end process;
-- indices_stride_address assign process. --
indices_stride_address_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_stride_address, grp_sample_iterator_next_fu_211_indices_stride_address)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_stride_address <= grp_sample_iterator_next_fu_211_indices_stride_address;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_stride_address <= grp_sample_iterator_get_offset_fu_194_indices_stride_address;
else
indices_stride_address <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
end if;
end process;
-- indices_stride_dataout assign process. --
indices_stride_dataout_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_stride_dataout, grp_sample_iterator_next_fu_211_indices_stride_dataout)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_stride_dataout <= grp_sample_iterator_next_fu_211_indices_stride_dataout;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_stride_dataout <= grp_sample_iterator_get_offset_fu_194_indices_stride_dataout;
else
indices_stride_dataout <= "XXXXXXXX";
end if;
end process;
-- indices_stride_req_din assign process. --
indices_stride_req_din_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_stride_req_din, grp_sample_iterator_next_fu_211_indices_stride_req_din)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_stride_req_din <= grp_sample_iterator_next_fu_211_indices_stride_req_din;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_stride_req_din <= grp_sample_iterator_get_offset_fu_194_indices_stride_req_din;
else
indices_stride_req_din <= 'X';
end if;
end process;
-- indices_stride_req_write assign process. --
indices_stride_req_write_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_stride_req_write, grp_sample_iterator_next_fu_211_indices_stride_req_write)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_stride_req_write <= grp_sample_iterator_next_fu_211_indices_stride_req_write;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_stride_req_write <= grp_sample_iterator_get_offset_fu_194_indices_stride_req_write;
else
indices_stride_req_write <= 'X';
end if;
end process;
-- indices_stride_rsp_read assign process. --
indices_stride_rsp_read_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_stride_rsp_read, grp_sample_iterator_next_fu_211_indices_stride_rsp_read)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_stride_rsp_read <= grp_sample_iterator_next_fu_211_indices_stride_rsp_read;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_stride_rsp_read <= grp_sample_iterator_get_offset_fu_194_indices_stride_rsp_read;
else
indices_stride_rsp_read <= 'X';
end if;
end process;
-- indices_stride_size assign process. --
indices_stride_size_assign_proc : process(ap_CS_fsm, tmp_i_11_reg_325, grp_sample_iterator_get_offset_fu_194_indices_stride_size, grp_sample_iterator_next_fu_211_indices_stride_size)
begin
if (((ap_ST_st42_fsm_41 = ap_CS_fsm) or (ap_ST_st31_fsm_30 = ap_CS_fsm) or (ap_ST_st32_fsm_31 = ap_CS_fsm) or (ap_ST_st33_fsm_32 = ap_CS_fsm) or (ap_ST_st34_fsm_33 = ap_CS_fsm) or (ap_ST_st35_fsm_34 = ap_CS_fsm) or (ap_ST_st36_fsm_35 = ap_CS_fsm) or (ap_ST_st37_fsm_36 = ap_CS_fsm) or (ap_ST_st38_fsm_37 = ap_CS_fsm) or (ap_ST_st39_fsm_38 = ap_CS_fsm) or (ap_ST_st40_fsm_39 = ap_CS_fsm) or (ap_ST_st41_fsm_40 = ap_CS_fsm))) then
indices_stride_size <= grp_sample_iterator_next_fu_211_indices_stride_size;
elsif (((ap_ST_st21_fsm_20 = ap_CS_fsm) or ((ap_ST_st4_fsm_3 = ap_CS_fsm) and (tmp_i_11_reg_325 = ap_const_lv1_0)) or (ap_ST_st5_fsm_4 = ap_CS_fsm) or (ap_ST_st6_fsm_5 = ap_CS_fsm) or (ap_ST_st7_fsm_6 = ap_CS_fsm) or (ap_ST_st8_fsm_7 = ap_CS_fsm) or (ap_ST_st9_fsm_8 = ap_CS_fsm) or (ap_ST_st10_fsm_9 = ap_CS_fsm) or (ap_ST_st11_fsm_10 = ap_CS_fsm) or (ap_ST_st12_fsm_11 = ap_CS_fsm) or (ap_ST_st13_fsm_12 = ap_CS_fsm) or (ap_ST_st14_fsm_13 = ap_CS_fsm) or (ap_ST_st15_fsm_14 = ap_CS_fsm) or (ap_ST_st16_fsm_15 = ap_CS_fsm) or (ap_ST_st17_fsm_16 = ap_CS_fsm) or (ap_ST_st18_fsm_17 = ap_CS_fsm) or (ap_ST_st19_fsm_18 = ap_CS_fsm) or (ap_ST_st20_fsm_19 = ap_CS_fsm))) then
indices_stride_size <= grp_sample_iterator_get_offset_fu_194_indices_stride_size;
else
indices_stride_size <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
end if;
end process;
nfa_finals_buckets_address <= grp_nfa_accept_sample_fu_178_nfa_finals_buckets_address;
nfa_finals_buckets_dataout <= grp_nfa_accept_sample_fu_178_nfa_finals_buckets_dataout;
nfa_finals_buckets_req_din <= grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_din;
nfa_finals_buckets_req_write <= grp_nfa_accept_sample_fu_178_nfa_finals_buckets_req_write;
nfa_finals_buckets_rsp_read <= grp_nfa_accept_sample_fu_178_nfa_finals_buckets_rsp_read;
nfa_finals_buckets_size <= grp_nfa_accept_sample_fu_178_nfa_finals_buckets_size;
nfa_forward_buckets_address <= grp_nfa_accept_sample_fu_178_nfa_forward_buckets_address;
nfa_forward_buckets_dataout <= grp_nfa_accept_sample_fu_178_nfa_forward_buckets_dataout;
nfa_forward_buckets_req_din <= grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_din;
nfa_forward_buckets_req_write <= grp_nfa_accept_sample_fu_178_nfa_forward_buckets_req_write;
nfa_forward_buckets_rsp_read <= grp_nfa_accept_sample_fu_178_nfa_forward_buckets_rsp_read;
nfa_forward_buckets_size <= grp_nfa_accept_sample_fu_178_nfa_forward_buckets_size;
nfa_initials_buckets_address <= grp_nfa_accept_sample_fu_178_nfa_initials_buckets_address;
nfa_initials_buckets_dataout <= grp_nfa_accept_sample_fu_178_nfa_initials_buckets_dataout;
nfa_initials_buckets_req_din <= grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_din;
nfa_initials_buckets_req_write <= grp_nfa_accept_sample_fu_178_nfa_initials_buckets_req_write;
nfa_initials_buckets_rsp_read <= grp_nfa_accept_sample_fu_178_nfa_initials_buckets_rsp_read;
nfa_initials_buckets_size <= grp_nfa_accept_sample_fu_178_nfa_initials_buckets_size;
or_cond_fu_247_p2 <= (r_reg_340 xor accept);
sample_buffer_address <= grp_nfa_accept_sample_fu_178_sample_address;
sample_buffer_dataout <= grp_nfa_accept_sample_fu_178_sample_dataout;
sample_buffer_req_din <= grp_nfa_accept_sample_fu_178_sample_req_din;
sample_buffer_req_write <= grp_nfa_accept_sample_fu_178_sample_req_write;
sample_buffer_rsp_read <= grp_nfa_accept_sample_fu_178_sample_rsp_read;
sample_buffer_size <= grp_nfa_accept_sample_fu_178_sample_size;
stop_on_first_read_read_fu_104_p2 <= stop_on_first;
tmp_i_10_fu_235_p2 <= "1" when (i_index_reg_146 = end_index) else "0";
tmp_i_11_fu_240_p2 <= (tmp_i_reg_315 and tmp_i_10_reg_320);
tmp_i_fu_230_p2 <= "1" when (i_sample_reg_156 = end_sample) else "0";
end behav;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2056.vhd,v 1.2 2001-10-26 16:30:15 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s02b04x00p01n01i02056ent IS
END c07s02b04x00p01n01i02056ent;
ARCHITECTURE c07s02b04x00p01n01i02056arch OF c07s02b04x00p01n01i02056ent IS
BEGIN
TESTING: PROCESS
type MEMORY is array(INTEGER range <>) of BIT;
type ADDRESS is access MEMORY;
variable ADDRESSV: ADDRESS;
BEGIN
ADDRESSV := ADDRESSV - NULL;
assert FALSE
report "***FAILED TEST: c07s02b04x00p01n01i02056 - The adding operators + and - are predefined for any numeric type."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s02b04x00p01n01i02056arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2056.vhd,v 1.2 2001-10-26 16:30:15 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s02b04x00p01n01i02056ent IS
END c07s02b04x00p01n01i02056ent;
ARCHITECTURE c07s02b04x00p01n01i02056arch OF c07s02b04x00p01n01i02056ent IS
BEGIN
TESTING: PROCESS
type MEMORY is array(INTEGER range <>) of BIT;
type ADDRESS is access MEMORY;
variable ADDRESSV: ADDRESS;
BEGIN
ADDRESSV := ADDRESSV - NULL;
assert FALSE
report "***FAILED TEST: c07s02b04x00p01n01i02056 - The adding operators + and - are predefined for any numeric type."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s02b04x00p01n01i02056arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2056.vhd,v 1.2 2001-10-26 16:30:15 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c07s02b04x00p01n01i02056ent IS
END c07s02b04x00p01n01i02056ent;
ARCHITECTURE c07s02b04x00p01n01i02056arch OF c07s02b04x00p01n01i02056ent IS
BEGIN
TESTING: PROCESS
type MEMORY is array(INTEGER range <>) of BIT;
type ADDRESS is access MEMORY;
variable ADDRESSV: ADDRESS;
BEGIN
ADDRESSV := ADDRESSV - NULL;
assert FALSE
report "***FAILED TEST: c07s02b04x00p01n01i02056 - The adding operators + and - are predefined for any numeric type."
severity ERROR;
wait;
END PROCESS TESTING;
END c07s02b04x00p01n01i02056arch;
|
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 01:03:26 02/20/2011
-- Design Name:
-- Module Name: hamming_encoder_26bit - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity hamming_encoder_26b is
port (
INPUT_1 : in STD_LOGIC_VECTOR(31 downto 0);
OUTPUT_1 : out STD_LOGIC_VECTOR(31 downto 0)
);
end hamming_encoder_26b;
architecture Behavioral of hamming_encoder_26b is
SUBTYPE parity_ham_26bit IS std_logic_vector(5 DOWNTO 0);
SUBTYPE data_ham_26bit IS std_logic_vector(25 DOWNTO 0);
SUBTYPE coded_ham_26bit IS std_logic_vector(31 DOWNTO 0);
---------------------
-- HAMMING ENCODER --
---------------------
FUNCTION hamming_encoder_26bit(data_in:data_ham_26bit) RETURN parity_ham_26bit IS
VARIABLE parity: parity_ham_26bit;
BEGIN
parity(5) := data_in(11) XOR data_in(12) XOR data_in(13) XOR data_in(14) XOR data_in(15) XOR
data_in(16) XOR data_in(17) XOR data_in(18) XOR data_in(19) XOR data_in(20) XOR
data_in(21) XOR data_in(22) XOR data_in(23) XOR data_in(24) XOR data_in(25);
parity(4) := data_in(4) XOR data_in(5) XOR data_in(6) XOR data_in(7) XOR data_in(8) XOR
data_in(9) XOR data_in(10) XOR data_in(18) XOR data_in(19) XOR data_in(20) XOR
data_in(21) XOR data_in(22) XOR data_in(23) XOR data_in(24) XOR data_in(25);
parity(3) := data_in(1) XOR data_in(2) XOR data_in(3) XOR data_in(7) XOR data_in(8) XOR
data_in(9) XOR data_in(10) XOR data_in(14) XOR data_in(15) XOR data_in(16) XOR
data_in(17) XOR data_in(22) XOR data_in(23) XOR data_in(24) XOR data_in(25);
parity(2) := data_in(0) XOR data_in(2) XOR data_in(3) XOR data_in(5) XOR data_in(6) XOR
data_in(9) XOR data_in(10) XOR data_in(12) XOR data_in(13) XOR data_in(16) XOR
data_in(17) XOR data_in(20) XOR data_in(21) XOR data_in(24) XOR data_in(25);
parity(1) := data_in(0) XOR data_in(1) XOR data_in(3) XOR data_in(4) XOR data_in(6) XOR
data_in(8) XOR data_in(10) XOR data_in(11) XOR data_in(13) XOR data_in(15) XOR
data_in(17) XOR data_in(19) XOR data_in(21) XOR data_in(23) XOR data_in(25);
parity(0) := data_in(0) XOR data_in(1) XOR data_in(2) XOR data_in(3) XOR data_in(4) XOR
data_in(5) XOR data_in(6) XOR data_in(7) XOR data_in(8) XOR data_in(9) XOR
data_in(10) XOR data_in(11) XOR data_in(12) XOR data_in(13) XOR data_in(14) XOR
data_in(15) XOR data_in(16) XOR data_in(17) XOR data_in(18) XOR data_in(19) XOR
data_in(20) XOR data_in(21) XOR data_in(22) XOR data_in(23) XOR data_in(24) XOR
data_in(25) XOR parity(1) XOR parity(2) XOR parity(3) XOR parity(4) XOR
parity(5) ;
RETURN parity;
END;
begin
PROCESS(INPUT_1)
BEGIN
OUTPUT_1 <= hamming_encoder_26bit( INPUT_1(25 downto 0) ) & INPUT_1(25 downto 0);
end process;
end Behavioral;
|
---------------------------------------------------------------------
-- TITLE: Plasma (CPU core with memory)
-- AUTHOR: Steve Rhoads ([email protected])
-- DATE CREATED: 6/4/02
-- FILENAME: plasma.vhd
-- PROJECT: Plasma CPU core
-- COPYRIGHT: Software placed into the public domain by the author.
-- Software 'as is' without warranty. Author liable for nothing.
-- DESCRIPTION:
-- This entity combines the CPU core with memory and a UART.
--
-- Memory Map:
-- 0x00000000 - 0x0000ffff Internal RAM (8KB) - 0000 0000 0000
-- 0x10000000 - 0x100fffff External RAM (1MB) - 0001 0000 0000
-- Access all Misc registers with 32-bit accesses
-- 0x20000000 Uart Write (will pause CPU if busy)
-- 0x20000000 Uart Read
-- 0x20000010 IRQ Mask
-- 0x20000020 IRQ Status
-- 0x20000030 GPIO0 Out Set bits
-- 0x20000040 GPIO0 Out Clear bits
-- 0x20000050 GPIOA In
-- 0x20000060 Counter
-- 0x20000070 Ethernet transmit count
-- IRQ bits:
-- 7 GPIO31
-- 6 ^GPIO31
-- 5 EthernetSendDone
-- 4 EthernetReceive
-- 3 Counter(18)
-- 2 ^Counter(18)
-- 1 ^UartWriteBusy
-- 0 UartDataAvailable
-- 0x30000000 FIFO IN EMPTY
-- 0x30000010 FIFO OUT EMPTY
-- 0x30000020 FIFO IN VALID
-- 0x30000030 FIFO OUT VALID
-- 0x30000040 FIFO IN FULL
-- 0x30000050 FIFO IN FULL
-- 0x30000060 FIFO IN COUNTER
-- 0x30000070 FIFO OUT COUNTER
-- 0x30000080 FIFO IN READ DATA
-- 0x30000090 FIFO OUT WRITE DATA
-- 0x40000000 COPROCESSOR 1 (reset)
-- 0x40000010 COPROCESSOR 1 (input/output)
-- 0x40000030 COPROCESSOR 2 (reset)
-- 0x40000040 COPROCESSOR 2 (input/output)
-- 0x40000060 COPROCESSOR 3 (reset)
-- 0x40000070 COPROCESSOR 3 (input/output)
-- 0x40000090 COPROCESSOR 4 (reset)
-- 0x400000A0 COPROCESSOR 4 (input/output)
-- 0x80000000 DMA ENGINE (NOT WORKING YET)
---------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use work.mlite_pack.all;
entity plasma is
generic(memory_type : string := "XILINX_16X"; --"DUAL_PORT_" "ALTERA_LPM";
log_file : string := "UNUSED";
ethernet : std_logic := '0';
eUart : std_logic := '0';
use_cache : std_logic := '0';
plasma_code : string
);
port(clk : in std_logic;
--clk_VGA : in std_logic;
reset : in std_logic;
uart_write : out std_logic;
uart_read : in std_logic;
address : out std_logic_vector(31 downto 2);
byte_we : out std_logic_vector(3 downto 0);
--data_write : out std_logic_vector(31 downto 0);
--data_read : in std_logic_vector(31 downto 0);
---mem_pause_in : in std_logic;
no_ddr_start : out std_logic;
no_ddr_stop : out std_logic;
-- BLG START
fifo_1_out_data : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
fifo_1_read_en : OUT STD_LOGIC;
fifo_1_empty : IN STD_LOGIC;
fifo_2_in_data : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
fifo_1_write_en : OUT STD_LOGIC;
fifo_2_full : IN STD_LOGIC;
fifo_1_full : IN STD_LOGIC;
fifo_1_valid : IN STD_LOGIC;
fifo_2_empty : IN STD_LOGIC;
fifo_2_valid : IN STD_LOGIC;
fifo_1_compteur : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
fifo_2_compteur : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
-- BLG END
--VGA_hs : out std_logic; -- horisontal vga syncr.
-- VGA_vs : out std_logic; -- vertical vga syncr.
data_enable :out std_logic;
ADDR : out std_logic_vector(16 downto 0);
data_out : out std_logic_vector(11 downto 0);
--VGA_green : out std_logic_vector(3 downto 0); -- green output
--VGA_blue : out std_logic_vector(3 downto 0); -- blue output
gpio0_out : out std_logic_vector(31 downto 0);
gpioA_in : in std_logic_vector(31 downto 0));
end; --entity plasma
architecture logic of plasma is
signal address_next : std_logic_vector(31 downto 2);
signal byte_we_next : std_logic_vector(3 downto 0);
signal cpu_address : std_logic_vector(31 downto 0);
signal cpu_byte_we : std_logic_vector(3 downto 0);
signal cpu_data_w : std_logic_vector(31 downto 0);
signal cpu_data_r : std_logic_vector(31 downto 0);
signal cpu_pause : std_logic;
signal ppcie_rdata : std_logic_vector(31 downto 0);
signal data_read_uart : std_logic_vector(7 downto 0);
signal write_enable : std_logic;
signal eth_pause_in : std_logic;
signal eth_pause : std_logic;
signal mem_busy : std_logic;
signal enable_misc : std_logic;
signal enable_uart : std_logic;
signal enable_uart_read : std_logic;
signal enable_uart_write : std_logic;
signal enable_eth : std_logic;
signal enable_local_mem : std_logic;
signal gpio0_reg : std_logic_vector(31 downto 0);
signal uart_write_busy : std_logic;
signal uart_data_avail : std_logic;
signal irq_mask_reg : std_logic_vector(7 downto 0);
signal irq_status : std_logic_vector(7 downto 0);
signal irq : std_logic;
signal irq_eth_rec : std_logic;
signal irq_eth_send : std_logic;
signal counter_reg : std_logic_vector(31 downto 0);
signal ram_boot_enable : std_logic;
signal ram_enable : std_logic;
signal ram_byte_we : std_logic_vector( 3 downto 0);
signal ram_address : std_logic_vector(31 downto 2);
signal ram_data_w : std_logic_vector(31 downto 0);
signal ram_data_r : std_logic_vector(31 downto 0);
signal ram_data_lm : std_logic_vector(31 downto 0);
signal dma_address : std_logic_vector(31 downto 0);
signal dma_byte_we : std_logic_vector( 3 downto 0);
signal dma_data_write : std_logic_vector(31 downto 0);
signal dma_data_read : std_logic_vector(31 downto 0);
signal dma_start : std_logic;
signal cop_1_reset : std_logic;
signal cop_1_valid : std_logic;
signal cop_1_output : std_logic_vector(31 downto 0);
signal cop_2_reset : std_logic;
signal cop_2_valid : std_logic;
signal cop_2_output : std_logic_vector(31 downto 0);
signal cop_3_reset : std_logic;
signal cop_3_valid : std_logic;
signal cop_3_output : std_logic_vector(31 downto 0);
signal cop_4_reset : std_logic;
signal cop_4_valid : std_logic;
signal cop_4_output : std_logic_vector(31 downto 0);
signal cache_access : std_logic;
signal cache_checking : std_logic;
signal cache_miss : std_logic;
signal cache_hit : std_logic;
COMPONENT memory_64k
Port ( clk : in STD_LOGIC;
addr_in : in STD_LOGIC_VECTOR (31 downto 2);
data_in : in STD_LOGIC_VECTOR (31 downto 0);
enable : in STD_LOGIC;
we_select : in STD_LOGIC_VECTOR (3 downto 0);
data_out : out STD_LOGIC_VECTOR (31 downto 0));
end COMPONENT;
begin --architecture
write_enable <= '1' when cpu_byte_we /= "0000" else '0';
mem_busy <= eth_pause;-- or mem_pause_in;
cache_hit <= cache_checking and not cache_miss;
cpu_pause <= (uart_write_busy and enable_uart and write_enable) --UART busy
-- or cache_miss --Cache wait
-- or (cpu_address(31) and not cache_hit and mem_busy); --DDR or flash
or (eth_pause); -- DMA ENGINE FREEZE ALL (BLG)
irq_status <= gpioA_in(31) & not gpioA_in(31) &
irq_eth_send & irq_eth_rec &
counter_reg(18) & not counter_reg(18) &
not uart_write_busy & uart_data_avail;
irq <= '1' when (irq_status and irq_mask_reg) /= ZERO(7 downto 0) else '0';
gpio0_out(31 downto 29) <= gpio0_reg(31 downto 29);
gpio0_out(23 downto 0) <= gpio0_reg(23 downto 0);
enable_misc <= '1' when cpu_address(30 downto 28) = "010" else '0';
enable_uart <= '1' when enable_misc = '1' and cpu_address(7 downto 4) = "0000" else '0';
enable_uart_read <= enable_uart and not write_enable;
enable_uart_write <= enable_uart and write_enable;
enable_eth <= '1' when enable_misc = '1' and cpu_address(7 downto 4) = "0111" else '0';
cpu_address(1 downto 0) <= "00";
--
-- ON GENERE LES SIGNAUX DE COMMANDE EN DIRECTION DU PORT PCIe
--
--fifo_1_read_en <= '1' when ((cpu_address(31 downto 28) = "0011") AND (cpu_address(7 downto 4) = "1000") ) else '0';
--fifo_1_write_en <= '1' when ((cpu_address(31 downto 28) = "0011") AND (cpu_address(7 downto 4) = "1001") AND (write_enable = '1')) else '0';
fifo_1_read_en <= '1' when (cpu_address = x"30000080") AND (cpu_pause = '0') else '0';
fifo_1_write_en <= '1' when (cpu_address = x"30000090") AND (cpu_pause = '0') AND(write_enable = '1') else '0';
cop_1_reset <= '1' when (cpu_address = x"40000000") AND (cpu_pause = '0') AND (write_enable = '1') else '0';
cop_1_valid <= '1' when (cpu_address = x"40000004") AND (cpu_pause = '0') AND (write_enable = '1') else '0';
cop_2_reset <= '1' when (cpu_address = x"40000030") AND (cpu_pause = '0') AND (write_enable = '1') else '0';
cop_2_valid <= '1' when (cpu_address = x"40000034") AND (cpu_pause = '0') AND (write_enable = '1') else '0';
cop_3_reset <= '1' when (cpu_address = x"40000060") AND (cpu_pause = '0') AND (write_enable = '1') else '0';
cop_3_valid <= '1' when (cpu_address = x"40000064") AND (cpu_pause = '0') AND (write_enable = '1') else '0';
cop_4_reset <= '1' when (cpu_address = x"40000090") AND (cpu_pause = '0') AND (write_enable = '1') else '0';
cop_4_valid <= '1' when (cpu_address = x"40000094") AND (cpu_pause = '0') AND (write_enable = '1') else '0';
-- assert cop_4_valid /= '1' severity failure;
--
-- ON LIT/ECRIT DANS LA MEMOIRE LOCALE UNIQUEMENT LORSQUE LE BUS
-- D'ADRESSE (MSB) = "001". SINON ON ADRESSE UN AUTRE PERIPHERIQUE
--
--dram_procr: process(clk)
--begin
-- if rising_edge(clk) then
-- ppcie_rdata <= pcie_rdata;
-- end if;
--end process;
--
-- INTERNAL RAM MEMORY (64ko)
--
-- enable_local_mem <= '1' when (cpu_address(31 downto 28) = "0001") else '0';
-- enable_local_mem <= '1' when (ram_address(31 downto 28) = "0001") else '0';
local_memory: memory_64k
port map (
clk => clk,
addr_in => ram_address, --cpu_data_r,
data_in => ram_data_w,
enable => enable_local_mem,
we_select => ram_byte_we,
data_out => ram_data_lm
);
--
--
--
u1_cpu: mlite_cpu
generic map (memory_type => memory_type)
PORT MAP (
clk => clk,
reset_in => reset,
intr_in => irq,
address_next => address_next, --before rising_edge(clk)
byte_we_next => byte_we_next,
address => cpu_address(31 downto 2), --after rising_edge(clk)
byte_we => cpu_byte_we,
data_w => cpu_data_w,
data_r => cpu_data_r,
mem_pause => cpu_pause);
--
--
--
opt_cache: if use_cache = '0' generate
cache_access <= '0';
cache_checking <= '0';
cache_miss <= '0';
end generate;
--
--
--
opt_cache2: if use_cache = '1' generate
--Control 4KB unified cache that uses the upper 4KB of the 8KB
--internal RAM. Only lowest 2MB of DDR is cached.
u_cache: cache
generic map (memory_type => memory_type)
PORT MAP (
clk => clk,
reset => reset,
address_next => address_next,
byte_we_next => byte_we_next,
cpu_address => cpu_address(31 downto 2),
mem_busy => mem_busy,
cache_access => cache_access, --access 4KB cache
cache_checking => cache_checking, --checking if cache hit
cache_miss => cache_miss); --cache miss
end generate; --opt_cache2
no_ddr_start <= not eth_pause and cache_checking;
no_ddr_stop <= not eth_pause and cache_miss;
eth_pause_in <= (not eth_pause and cache_miss and not cache_checking);
--
--
--
misc_proc: process(clk, reset, cpu_address, enable_misc,
ram_data_r, data_read_uart, cpu_pause,
irq_mask_reg, irq_status, gpio0_reg, write_enable,
cache_checking,
gpioA_in, counter_reg, cpu_data_w, ram_data_lm,
fifo_1_empty, fifo_2_empty, fifo_1_full, fifo_2_full,
fifo_1_valid, fifo_2_valid, fifo_1_compteur, fifo_2_compteur, fifo_1_out_data, cop_1_output)
begin
case cpu_address(30 downto 28) is
-- ON LIT LES DONNEES DE LA MEMOIRE INTERNE
when "000" => --internal ROM
cpu_data_r <= ram_data_r;
-- ON LIT LES DONNEES DE LA MEMOIRE EXTERNE (LOCAL RAM)
when "001" => --external (local) RAM
--if cache_checking = '1' then
--cpu_data_r <= ram_data_r; --cache
--else
--cpu_data_r <= data_read; --DDR
--end if;
cpu_data_r <= ram_data_lm;
-- ON LIT LES DONNEES DES PERIPHERIQUES MISC.
when "010" => --misc
case cpu_address(6 downto 4) is
when "000" => --uart
cpu_data_r <= ZERO(31 downto 8) & data_read_uart;
when "001" => --irq_mask
cpu_data_r <= ZERO(31 downto 8) & irq_mask_reg;
when "010" => --irq_status
cpu_data_r <= ZERO(31 downto 8) & irq_status;
when "011" => --gpio0
cpu_data_r <= gpio0_reg;
when "101" => --gpioA
cpu_data_r <= gpioA_in;
when "110" => --counter
cpu_data_r <= counter_reg;
when others => -- ce n'est pas pr\E9vu...
cpu_data_r <= x"FFFFFFFF";
end case;
-- ON LIT LES DONNEES EN PROVENANCE DU PCIe 0x3....XX
when "011" =>
case cpu_address(7 downto 4) is
when "0000" => cpu_data_r <= ZERO(31 downto 1) & fifo_1_empty;
when "0001" => cpu_data_r <= ZERO(31 downto 1) & fifo_2_empty;
when "0010" => cpu_data_r <= ZERO(31 downto 1) & fifo_1_full;
when "0011" => cpu_data_r <= ZERO(31 downto 1) & fifo_2_full;
when "0100" => cpu_data_r <= ZERO(31 downto 1) & fifo_1_valid;
when "0101" => cpu_data_r <= ZERO(31 downto 1) & fifo_2_valid;
when "0110" => cpu_data_r <= fifo_1_compteur;
when "0111" => cpu_data_r <= fifo_2_compteur;
when "1000" => cpu_data_r <= fifo_1_out_data;
when others => -- ce n'est pas pr\E9vu...
cpu_data_r <= x"FFFFFFFF";
end case;
--
-- LECTURE DES RESULTATS DES COPROCESSEURS
--
when "100" =>
case cpu_address(7 downto 0) is
when "00000100" => cpu_data_r <= cop_1_output; -- COPROCESSOR 1 (OUTPUT)
when "00110100" => cpu_data_r <= cop_2_output; -- COPROCESSOR 2 (OUTPUT)
when "01100100" => cpu_data_r <= cop_3_output; -- COPROCESSOR 3 (OUTPUT)
when "10010100" => cpu_data_r <= cop_4_output; -- COPROCESSOR 4 (OUTPUT)
when others => cpu_data_r <= x"FFFFFFFF";
end case;
--when "011" => --flash
-- cpu_data_r <= data_read;
when others =>
cpu_data_r <= ZERO(31 downto 8) & x"FF";
end case;
if reset = '1' then
irq_mask_reg <= ZERO(7 downto 0);
gpio0_reg <= ZERO;
counter_reg <= ZERO;
elsif rising_edge(clk) then
if cpu_pause = '0' then
if enable_misc = '1' and write_enable = '1' then
if cpu_address(6 downto 4) = "001" then
irq_mask_reg <= cpu_data_w(7 downto 0);
elsif cpu_address(6 downto 4) = "011" then
gpio0_reg <= gpio0_reg or cpu_data_w;
elsif cpu_address(6 downto 4) = "100" then
gpio0_reg <= gpio0_reg and not cpu_data_w;
end if;
end if;
end if;
counter_reg <= bv_inc(counter_reg);
end if;
end process;
ram_proc: process(cache_access, cache_miss,
address_next, cpu_address,
byte_we_next, cpu_data_w,
dma_address,
dma_byte_we, eth_pause,
dma_data_write,
dma_start, eth_pause)
begin
if eth_pause = '1' then --Check if cache hit or write through
if dma_address(31 downto 28) = "0000" then
ram_boot_enable <= '1';
else
ram_boot_enable <= '0';
end if;
if dma_address(31 downto 28) = "0001" then
enable_local_mem <= '1';
else
enable_local_mem <= '0';
end if;
ram_address <= dma_address(31 downto 2); -- adr from ram
ram_byte_we <= dma_byte_we;
ram_data_w <= dma_data_write;
else --Normal non-cache access
if address_next(31 downto 28) = "0000" then
ram_boot_enable <= '1';
else
ram_boot_enable <= '0';
end if;
if address_next(31 downto 28) = "0001" then
enable_local_mem <= '1';
else
enable_local_mem <= '0';
end if;
ram_byte_we <= byte_we_next;
ram_address(31 downto 2) <= address_next(31 downto 2);
ram_data_w <= cpu_data_w;
end if;
end process;
--
-- RAM DATA CONTROLLER
--
--ram_boot_enable <= '1' WHEN (ram_enable = '1') AND eth_pause = '0' ELSE '0';
u2_boot: ram
generic map (memory_type => memory_type,
plasma_code => plasma_code)
port map (
clk => clk,
enable => ram_boot_enable,
write_byte_enable => ram_byte_we,
address => ram_address,
data_write => ram_data_w,
data_read => ram_data_r);
-- ON RELIT L'ENTREE DU PCIe (port de sortie) AU BUS DE DONNEE DU PROCESSEUR
-- PLASMA
fifo_2_in_data <= cpu_data_w;
--
-- UART CONTROLLER CAN BE REMOVED (FOR ASIC DESIGN)
--
uart_gen: if eUart = '1' generate
u3_uart: uart
generic map (log_file => log_file)
port map(
clk => clk,
reset => reset,
enable_read => enable_uart_read,
enable_write => enable_uart_write,
data_in => cpu_data_w(7 downto 0),
data_out => data_read_uart,
uart_read => uart_read,
uart_write => uart_write,
busy_write => uart_write_busy,
data_avail => uart_data_avail
);
end generate;
uart_gen2: if eUart = '0' generate
data_read_uart <= "00000000";
uart_write_busy <= '0';
uart_data_avail <= '0';
end generate;
--
-- ETHERNET CONTROLLER CAN BE REMOVED (FOR ASIC DESIGN)
--
-- dma_gen: if ethernet = '2' generate
-- address <= cpu_address(31 downto 2);
-- byte_we <= cpu_byte_we;
-- data_write <= cpu_data_w;
-- eth_pause <= '0';
-- irq_eth_rec <= '0';
-- irq_eth_send <= '0';
-- gpio0_out(28 downto 24) <= ZERO(28 downto 24);
-- end generate;
-- dma_gen2: if ethernet = '1' generate
-- u4_eth: eth_dma
-- port map(
-- clk => clk,
-- reset => reset,
-- enable_eth => gpio0_reg(24),
-- select_eth => enable_eth,
-- rec_isr => irq_eth_rec,
-- send_isr => irq_eth_send,
--
-- address => address, --to DDR
-- byte_we => byte_we,
-- data_write => data_write,
-- data_read => data_read,
-- pause_in => eth_pause_in,
--
-- mem_address => cpu_address(31 downto 2), --from CPU
-- mem_byte_we => cpu_byte_we,
-- data_w => cpu_data_w,
-- pause_out => eth_pause,
--
-- E_RX_CLK => gpioA_in(20),
-- E_RX_DV => gpioA_in(19),
-- E_RXD => gpioA_in(18 downto 15),
-- E_TX_CLK => gpioA_in(14),
-- E_TX_EN => gpio0_out(28),
-- E_TXD => gpio0_out(27 downto 24));
-- end generate;
dma_start <= '1' when ((cpu_address(31 downto 28) = "1000") and (cpu_byte_we = "1111")) else '0';
------------------------------------------------------------------------------------------------------
--
--
--
--
--
------------------------------------------------------------------------------------------------------
dma_input_mux_proc: process(clk, reset, dma_address, enable_misc,
ram_data_r, data_read_uart, cpu_pause,
irq_mask_reg, irq_status, gpio0_reg, write_enable,
cache_checking,
gpioA_in, counter_reg, cpu_data_w, ram_data_lm,
fifo_1_empty, fifo_2_empty, fifo_1_full, fifo_2_full,
fifo_1_valid, fifo_2_valid, fifo_1_compteur, fifo_2_compteur, fifo_1_out_data)
begin
case dma_address(30 downto 28) is
when "000" => --internal ROM
dma_data_read <= ram_data_r;
when "001" => --external (local) RAM
dma_data_read <= ram_data_lm;
when "010" => --misc
case dma_address(6 downto 4) is
when "000" => dma_data_read <= ZERO(31 downto 8) & data_read_uart;
when "001" => dma_data_read <= ZERO(31 downto 8) & irq_mask_reg;
when "010" => dma_data_read <= ZERO(31 downto 8) & irq_status;
when "011" => dma_data_read <= gpio0_reg;
when "101" => dma_data_read <= gpioA_in;
when "110" => dma_data_read <= counter_reg;
when others => dma_data_read <= x"FFFFFFFF";
end case;
when "011" =>
case dma_address(7 downto 4) is
when "0000" => dma_data_read <= ZERO(31 downto 1) & fifo_1_empty;
when "0001" => dma_data_read <= ZERO(31 downto 1) & fifo_2_empty;
when "0010" => dma_data_read <= ZERO(31 downto 1) & fifo_1_full;
when "0011" => dma_data_read <= ZERO(31 downto 1) & fifo_2_full;
when "0100" => dma_data_read <= ZERO(31 downto 1) & fifo_1_valid;
when "0101" => dma_data_read <= ZERO(31 downto 1) & fifo_2_valid;
when "0110" => dma_data_read <= fifo_1_compteur;
when "0111" => dma_data_read <= fifo_2_compteur;
when "1000" => dma_data_read <= fifo_1_out_data;
when others => dma_data_read <= x"FFFFFFFF";
end case;
when others =>
dma_data_read <= ZERO(31 downto 8) & x"FF";
end case;
end process;
u4_dma: entity WORK.dma_engine
port map(
clk => clk,
reset => reset,
start_dma => dma_start,
--
address => dma_address, -- adr from ram
byte_we => dma_byte_we,
data_write => dma_data_write,
data_read => dma_data_read,
--
mem_address => cpu_address, -- adr from cpu
mem_byte_we => cpu_byte_we,
data_w => cpu_data_w,
pause_out => eth_pause
);
------------------------------------------------------------------------------------------------------
--
--
--
--
--
------------------------------------------------------------------------------------------------------
u5a_coproc: entity WORK.coproc_1 port map(
clock => clk,
reset => cop_1_reset,
INPUT_1 => cpu_data_w,
INPUT_1_valid => cop_1_valid,
OUTPUT_1 => cop_1_output
);
u5b_coproc: entity WORK.coproc_2 port map(
clock => clk,
reset => cop_2_reset,
INPUT_1 => cpu_data_w,
INPUT_1_valid => cop_2_valid,
OUTPUT_1 => cop_2_output
);
u5c_coproc: entity WORK.coproc_3 port map(
clock => clk,
reset => cop_3_reset,
INPUT_1 => cpu_data_w,
INPUT_1_valid => cop_3_valid,
OUTPUT_1 => cop_3_output
);
u5d_coproc: entity WORK.coproc_4
port map(
clock => clk,
--clock_VGA => clk_VGA,
reset => cop_4_reset,
INPUT_1 => cpu_data_w,
INPUT_1_valid => cop_4_valid,
OUTPUT_1 => cop_4_output,
data_out => data_out,
data_write => data_enable,
ADDR => ADDR
-- VGA_hs => VGA_hs,
-- VGA_vs => VGA_vs,
--iter => iter
--VGA_green => VGA_green,
--VGA_blue => VGA_blue
);
end; --architecture logic
|
--------------------------------------------------------------------------------
-- LGPL v2.1, Copyright (c) 2014 Johannes Walter <[email protected]>
--
-- Description:
-- Generate predefined values for filter input bit streams.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity ads1281_pattern_generator is
port (
-- Clock and resets
clk_i : in std_ulogic;
rst_asy_n_i : in std_ulogic;
rst_syn_i : in std_ulogic;
-- Enable
en_i : in std_ulogic;
-- Load selected pattern
sel_i : in std_ulogic_vector(2 downto 0);
load_i : in std_ulogic;
-- Generated bit stream
gen_o : out std_ulogic);
end entity ads1281_pattern_generator;
architecture rtl of ads1281_pattern_generator is
------------------------------------------------------------------------------
-- Types and Constants
------------------------------------------------------------------------------
type lut_t is array (0 to 2**sel_i'length - 1) of std_ulogic_vector(7 downto 0);
-- Predefined patterns
constant lut : lut_t := (
"00000000", -- 0.0 %
"00010001", -- 25.0 %
"00100101", -- 37.5 %
"01010101", -- 50.0 %
"01011011", -- 62.5 %
"01110111", -- 75.0 %
"01111111", -- 87.5 %
"11111111"); -- 100.0 %
------------------------------------------------------------------------------
-- Internal Registers
------------------------------------------------------------------------------
signal gen : std_ulogic_vector(7 downto 0);
------------------------------------------------------------------------------
-- Internal Wires
------------------------------------------------------------------------------
signal strb : std_ulogic;
begin -- architecture rtl
------------------------------------------------------------------------------
-- Outputs
------------------------------------------------------------------------------
gen_o <= gen(gen'high);
------------------------------------------------------------------------------
-- Instances
------------------------------------------------------------------------------
lfsr_strobe_generator_inst : entity work.lfsr_strobe_generator
generic map (
period_g => 40,
preset_value_g => 0)
port map (
clk_i => clk_i,
rst_asy_n_i => rst_asy_n_i,
rst_syn_i => rst_syn_i,
en_i => en_i,
pre_i => '0',
strobe_o => strb);
------------------------------------------------------------------------------
-- Registers
------------------------------------------------------------------------------
regs : process (clk_i, rst_asy_n_i) is
procedure reset is
begin
gen <= (others => '0');
end procedure reset;
begin -- process regs
if rst_asy_n_i = '0' then
reset;
elsif rising_edge(clk_i) then
if rst_syn_i = '1' then
reset;
elsif load_i = '1' then
-- Select predefined pattern
gen <= lut(to_integer(unsigned(sel_i)));
elsif strb = '1' then
gen <= gen(gen'high - 1 downto gen'low) & gen(gen'high);
end if;
end if;
end process regs;
end architecture rtl;
|
architecture rtl of fifo is
alias designator is name;
signal sig1 : std_logic;alias designator is name;
signal sig1 : std_logic; alias designator is name;
begin
end architecture rtl;
|
--Copyright (C) 2016 Siavoosh Payandeh Azad
library ieee;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use ieee.std_logic_misc.all;
entity router_channel is
generic (
DATA_WIDTH: integer := 32;
current_address : integer := 5;
Rxy_rst : integer := 60;
Cx_rst : integer := 15;
NoC_size: integer := 4
);
port (
reset, clk: in std_logic;
DCTS : in std_logic;
DRTS : in std_logic;
RTS : out std_logic;
CTS : out std_logic;
flit_type : in std_logic_vector(2 downto 0);
destination_address : in std_logic_vector(NoC_size-1 downto 0);
Grant_N_in , Grant_E_in , Grant_W_in , Grant_S_in , Grant_L_in : in std_logic;
Req_N_in , Req_E_in , Req_W_in , Req_S_in , Req_L_in :in std_logic;
-- fault injector signals
fault_shift: in std_logic;
fault_clk: in std_logic;
fault_data_in_serial: in std_logic;
fault_data_out_serial: out std_logic;
Grant_N_out, Grant_E_out, Grant_W_out, Grant_S_out, Grant_L_out: out std_logic;
Req_N_out , Req_E_out, Req_W_out, Req_S_out, Req_L_out:out std_logic;
read_pointer_out, write_pointer_out: out std_logic_vector(3 downto 0);
write_en_out :out std_logic;
Xbar_sel: out std_logic_vector(4 downto 0);
-- the checker output shift register
shift : in std_logic;
checker_clk: in std_logic;
error_signal_sync: out std_logic; -- this is the or of all outputs of the shift register
error_signal_async: out std_logic; -- this is the or of all outputs of the checkers
shift_serial_data: out std_logic
);
end router_channel;
architecture behavior of router_channel is
COMPONENT FIFO is
generic (
DATA_WIDTH: integer := 32
);
port ( reset: in std_logic;
clk: in std_logic;
DRTS: in std_logic;
read_en_N : in std_logic;
read_en_E : in std_logic;
read_en_W : in std_logic;
read_en_S : in std_logic;
read_en_L : in std_logic;
CTS: out std_logic;
empty_out: out std_logic;
read_pointer_out, write_pointer_out: out std_logic_vector(3 downto 0);
write_en_out :out std_logic;
-- fault injector signals
shift: in std_logic;
fault_clk: in std_logic;
data_in_serial: in std_logic;
data_out_serial: out std_logic;
-- Checker outputs
err_write_en_write_pointer,
err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full,
err_read_pointer_increment,
err_read_pointer_not_increment,
--err_CTS_in,
err_write_en,
err_not_CTS_in,
--err_not_write_en,
err_read_en_mismatch : out std_logic
);
end COMPONENT;
COMPONENT Arbiter
port (reset: in std_logic;
clk: in std_logic;
Req_N, Req_E, Req_W, Req_S, Req_L:in std_logic; -- From LBDR modules
DCTS: in std_logic; -- Getting the CTS signal from the input FIFO of the next router/NI (for hand-shaking)
Grant_N, Grant_E, Grant_W, Grant_S, Grant_L:out std_logic; -- Grants given to LBDR requests (encoded as one-hot)
Xbar_sel : out std_logic_vector(4 downto 0); -- select lines for XBAR
RTS: out std_logic; -- Valid output which is sent to the next router/NI to specify that the data on the output port is valid
-- fault injector signals
shift: in std_logic;
fault_clk: in std_logic;
data_in_serial: in std_logic;
data_out_serial: out std_logic;
-- Checker outputs
err_state_IDLE_xbar,
err_state_not_IDLE_xbar,
err_state_IDLE_RTS_FF_in,
err_state_not_IDLE_RTS_FF_RTS_FF_in,
err_state_not_IDLE_DCTS_RTS_FF_RTS_FF_in,
err_state_not_IDLE_not_DCTS_RTS_FF_RTS_FF_in,
err_RTS_FF_not_DCTS_state_state_in,
err_not_RTS_FF_state_in_next_state,
err_RTS_FF_DCTS_state_in_next_state,
err_not_DCTS_Grants,
err_DCTS_not_RTS_FF_Grants,
err_DCTS_RTS_FF_IDLE_Grants,
err_DCTS_RTS_FF_not_IDLE_Grants_onehot,
err_Requests_next_state_IDLE,
err_IDLE_Req_L,
err_Local_Req_L,
err_North_Req_N,
err_IDLE_Req_N,
err_Local_Req_N,
err_South_Req_L,
err_West_Req_L,
err_South_Req_N,
err_East_Req_L,
err_West_Req_N,
err_East_Req_N,
err_next_state_onehot,
err_state_in_onehot,
err_state_north_xbar_sel,
err_state_east_xbar_sel,
err_state_west_xbar_sel,
err_state_south_xbar_sel : out std_logic
);
end COMPONENT;
COMPONENT LBDR is
generic (
cur_addr_rst: integer := 5;
Rxy_rst: integer := 60;
Cx_rst: integer := 15;
NoC_size: integer := 4
);
port (reset: in std_logic;
clk: in std_logic;
empty: in std_logic;
flit_type: in std_logic_vector(2 downto 0);
dst_addr: in std_logic_vector(NoC_size-1 downto 0);
Req_N, Req_E, Req_W, Req_S, Req_L:out std_logic;
-- fault injector signals
shift: in std_logic;
fault_clk: in std_logic;
data_in_serial: in std_logic;
data_out_serial: out std_logic;
-- Checker outputs
--err_header_not_empty_Requests_in_onehot,
err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero,
err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in : out std_logic
);
end COMPONENT;
COMPONENT shift_register is
generic (
REG_WIDTH: integer := 8
);
port (
clk, reset : in std_logic;
shift: in std_logic;
data_in: in std_logic_vector(REG_WIDTH-1 downto 0);
data_out_parallel: in std_logic_vector(REG_WIDTH-1 downto 0);
data_out_serial: out std_logic
);
end COMPONENT;
-- Grant_XY : Grant signal generated from Arbiter for output X connected to FIFO of input Y
signal empty: std_logic;
signal combined_error_signals: std_logic_vector(58 downto 0);
signal shift_parallel_data: std_logic_vector(58 downto 0);
-- Signals related to Checkers
-- LBDR Checkers signals
signal err_header_empty_Requests_FF_Requests_in, err_tail_Requests_in_all_zero,
err_header_tail_Requests_FF_Requests_in, err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1, err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1, err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1, err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1, err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in, err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in, err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in : std_logic;
-- Arbiter Checkers signals
signal err_state_IDLE_xbar, err_state_not_IDLE_xbar,
err_state_IDLE_RTS_FF_in, err_state_not_IDLE_RTS_FF_RTS_FF_in,
err_state_not_IDLE_DCTS_RTS_FF_RTS_FF_in, err_state_not_IDLE_not_DCTS_RTS_FF_RTS_FF_in,
err_RTS_FF_not_DCTS_state_state_in, err_not_RTS_FF_state_in_next_state,
err_RTS_FF_DCTS_state_in_next_state, err_not_DCTS_Grants,
err_DCTS_not_RTS_FF_Grants, err_DCTS_RTS_FF_IDLE_Grants,
err_DCTS_RTS_FF_not_IDLE_Grants_onehot, err_Requests_next_state_IDLE,
err_IDLE_Req_L, err_Local_Req_L, err_North_Req_N, err_IDLE_Req_N, err_Local_Req_N,
err_South_Req_L, err_West_Req_L, err_South_Req_N, err_East_Req_L,
err_West_Req_N, err_East_Req_N, err_next_state_onehot, err_state_in_onehot,
err_state_north_xbar_sel, err_state_east_xbar_sel,
err_state_west_xbar_sel, err_state_south_xbar_sel : std_logic;
-- FIFO Control Part Checkers signals
signal err_write_en_write_pointer, err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty, err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full, err_read_pointer_write_pointer_full,
err_read_pointer_increment, err_read_pointer_not_increment,
err_write_en, err_not_CTS_in, err_read_en_mismatch : std_logic;
signal fault_DO_serial_FIFO_2_LBDR, fault_DO_serial_LBDR_2_Arbiter: std_logic;
begin
-- OR of checker outputs
error_signal_sync <= OR_REDUCE(shift_parallel_data);
error_signal_async <= OR_REDUCE(combined_error_signals);
-- making the shift register input signal
-- please keep this like this, i use this for counting the number of the signals.
combined_error_signals <= err_header_empty_Requests_FF_Requests_in &
err_tail_Requests_in_all_zero &
err_header_tail_Requests_FF_Requests_in &
err_dst_addr_cur_addr_N1 &
err_dst_addr_cur_addr_not_N1 &
err_dst_addr_cur_addr_E1 &
err_dst_addr_cur_addr_not_E1 &
err_dst_addr_cur_addr_W1 &
err_dst_addr_cur_addr_not_W1 &
err_dst_addr_cur_addr_S1 &
err_dst_addr_cur_addr_not_S1 &
err_dst_addr_cur_addr_not_Req_L_in &
err_dst_addr_cur_addr_Req_L_in &
err_header_not_empty_Req_N_in &
err_header_not_empty_Req_E_in &
err_header_not_empty_Req_W_in &
err_header_not_empty_Req_S_in &
err_state_IDLE_xbar &
err_state_not_IDLE_xbar &
err_state_IDLE_RTS_FF_in &
err_state_not_IDLE_RTS_FF_RTS_FF_in &
err_state_not_IDLE_DCTS_RTS_FF_RTS_FF_in &
err_state_not_IDLE_not_DCTS_RTS_FF_RTS_FF_in &
err_RTS_FF_not_DCTS_state_state_in &
err_not_RTS_FF_state_in_next_state &
err_RTS_FF_DCTS_state_in_next_state &
err_not_DCTS_Grants &
err_DCTS_not_RTS_FF_Grants &
err_DCTS_RTS_FF_IDLE_Grants &
err_DCTS_RTS_FF_not_IDLE_Grants_onehot &
err_Requests_next_state_IDLE &
err_IDLE_Req_L &
err_Local_Req_L &
err_North_Req_N &
err_IDLE_Req_N &
err_Local_Req_N &
err_South_Req_L &
err_West_Req_L &
err_South_Req_N &
err_East_Req_L &
err_West_Req_N &
err_East_Req_N &
err_next_state_onehot &
err_state_in_onehot &
err_state_north_xbar_sel &
err_state_east_xbar_sel &
err_state_west_xbar_sel &
err_state_south_xbar_sel &
err_write_en_write_pointer &
err_not_write_en_write_pointer &
err_read_pointer_write_pointer_not_empty &
err_read_pointer_write_pointer_empty &
err_read_pointer_write_pointer_not_full &
err_read_pointer_write_pointer_full &
err_read_pointer_increment &
err_read_pointer_not_increment &
err_write_en &
err_not_CTS_in &
err_read_en_mismatch;
---------------------------------------------------------------------------------------------------------------------------
FIFO_unit: FIFO generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (reset => reset, clk => clk, DRTS => DRTS,
read_en_N => Grant_N_in, read_en_E =>Grant_E_in, read_en_W =>Grant_W_in, read_en_S =>Grant_S_in, read_en_L =>Grant_L_in,
CTS => CTS, empty_out => empty,
read_pointer_out => read_pointer_out, write_pointer_out => write_pointer_out,
write_en_out => write_en_out,
shift=>fault_shift, fault_clk=>fault_clk, data_in_serial=> fault_data_in_serial, data_out_serial=>fault_DO_serial_FIFO_2_LBDR,
err_write_en_write_pointer => err_write_en_write_pointer,
err_not_write_en_write_pointer => err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => err_read_pointer_write_pointer_full,
err_read_pointer_increment => err_read_pointer_increment,
err_read_pointer_not_increment => err_read_pointer_not_increment,
err_write_en => err_write_en,
err_not_CTS_in => err_not_CTS_in,
err_read_en_mismatch => err_read_en_mismatch
);
------------------------------------------------------------------------------------------------------------------------------
LBDR_unit: LBDR generic map (cur_addr_rst => current_address, Rxy_rst => Rxy_rst, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty, flit_type => flit_type, dst_addr=> destination_address,
Req_N=> Req_N_out, Req_E=>Req_E_out, Req_W=>Req_W_out, Req_S=>Req_S_out, Req_L=>Req_L_out,
shift=>shift, fault_clk=>fault_clk, data_in_serial=> fault_DO_serial_FIFO_2_LBDR, data_out_serial=>fault_DO_serial_LBDR_2_Arbiter,
err_header_empty_Requests_FF_Requests_in => err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => err_tail_Requests_in_all_zero,
err_header_tail_Requests_FF_Requests_in => err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => err_header_not_empty_Req_S_in
);
------------------------------------------------------------------------------------------------------------------------------
Arbiter_unit: Arbiter
PORT MAP (reset => reset, clk => clk,
Req_N => Req_N_in , Req_E => Req_E_in, Req_W => Req_W_in, Req_S => Req_S_in, Req_L => Req_L_in,
DCTS => DCTS, Grant_N => Grant_N_out, Grant_E => Grant_E_out, Grant_W => Grant_W_out, Grant_S => Grant_S_out, Grant_L => Grant_L_out,
Xbar_sel => Xbar_sel,
RTS => RTS,
shift=>shift, fault_clk=>fault_clk, data_in_serial=> fault_DO_serial_LBDR_2_Arbiter, data_out_serial=> fault_data_out_serial,
err_state_IDLE_xbar => err_state_IDLE_xbar ,
err_state_not_IDLE_xbar => err_state_not_IDLE_xbar ,
err_state_IDLE_RTS_FF_in => err_state_IDLE_RTS_FF_in ,
err_state_not_IDLE_RTS_FF_RTS_FF_in => err_state_not_IDLE_RTS_FF_RTS_FF_in ,
err_state_not_IDLE_DCTS_RTS_FF_RTS_FF_in => err_state_not_IDLE_DCTS_RTS_FF_RTS_FF_in ,
err_state_not_IDLE_not_DCTS_RTS_FF_RTS_FF_in => err_state_not_IDLE_not_DCTS_RTS_FF_RTS_FF_in ,
err_RTS_FF_not_DCTS_state_state_in => err_RTS_FF_not_DCTS_state_state_in ,
err_not_RTS_FF_state_in_next_state => err_not_RTS_FF_state_in_next_state ,
err_RTS_FF_DCTS_state_in_next_state => err_RTS_FF_DCTS_state_in_next_state ,
err_not_DCTS_Grants => err_not_DCTS_Grants ,
err_DCTS_not_RTS_FF_Grants => err_DCTS_not_RTS_FF_Grants ,
err_DCTS_RTS_FF_IDLE_Grants => err_DCTS_RTS_FF_IDLE_Grants ,
err_DCTS_RTS_FF_not_IDLE_Grants_onehot => err_DCTS_RTS_FF_not_IDLE_Grants_onehot ,
err_Requests_next_state_IDLE => err_Requests_next_state_IDLE ,
err_IDLE_Req_L => err_IDLE_Req_L ,
err_Local_Req_L => err_Local_Req_L ,
err_North_Req_N => err_North_Req_N ,
err_IDLE_Req_N => err_IDLE_Req_N ,
err_Local_Req_N => err_Local_Req_N ,
err_South_Req_L => err_South_Req_L ,
err_West_Req_L => err_West_Req_L ,
err_South_Req_N => err_South_Req_N ,
err_East_Req_L => err_East_Req_L ,
err_West_Req_N => err_West_Req_N ,
err_East_Req_N => err_East_Req_N ,
err_next_state_onehot => err_next_state_onehot ,
err_state_in_onehot => err_state_in_onehot ,
err_state_north_xbar_sel => err_state_north_xbar_sel ,
err_state_east_xbar_sel => err_state_east_xbar_sel ,
err_state_west_xbar_sel => err_state_west_xbar_sel ,
err_state_south_xbar_sel => err_state_south_xbar_sel
);
checker_shifter: shift_register generic map (REG_WIDTH => 59)
port map (
clk => clk, reset => reset,
shift => shift,
data_in => combined_error_signals,
data_out_parallel => shift_parallel_data,
data_out_serial => shift_serial_data
);
end;
|
-----------------------------------------------------------------------------
-- LEON3 Demonstration design test bench
-- Copyright (C) 2004 Jiri Gaisler, Gaisler Research
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library gaisler;
use gaisler.libdcom.all;
use gaisler.sim.all;
library techmap;
use techmap.gencomp.all;
use work.config.all; -- configuration
use work.debug.all;
use std.textio.all;
library grlib;
use grlib.stdlib.all;
use grlib.stdio.all;
use grlib.devices.all;
entity testbench is
generic (
fabtech : integer := CFG_FABTECH;
memtech : integer := CFG_MEMTECH;
padtech : integer := CFG_PADTECH;
clktech : integer := CFG_CLKTECH;
disas : integer := CFG_DISAS; -- Enable disassembly to console
dbguart : integer := CFG_DUART; -- Print UART on console
pclow : integer := CFG_PCLOW;
clkperiod : integer := 10; -- system clock period
romwidth : integer := 16; -- rom data width (8/32)
romdepth : integer := 16 -- rom address depth
);
end;
architecture behav of testbench is
constant promfile : string := "prom.srec"; -- rom contents
constant sdramfile : string := "ram.srec"; -- sdram contents
signal clk : std_logic := '0';
signal rst : std_logic := '1'; -- Reset
signal rstn: std_logic := '0'; -- Reset
constant ct : integer := clkperiod/2;
signal address : std_logic_vector(22 downto 0);
signal data : std_logic_vector(31 downto 0);
signal romsn : std_logic_vector(1 downto 0);
signal oen : std_ulogic;
signal writen : std_ulogic;
signal iosn : std_ulogic;
-- ddr memory
signal ddr_clk : std_logic;
signal ddr_clkb : std_logic;
signal ddr_clk_fb : std_logic;
signal ddr_cke : std_logic;
signal ddr_csb : std_logic;
signal ddr_web : std_ulogic; -- ddr write enable
signal ddr_rasb : std_ulogic; -- ddr ras
signal ddr_casb : std_ulogic; -- ddr cas
signal ddr_dm : std_logic_vector (1 downto 0); -- ddr dm
signal ddr_dqs : std_logic_vector (1 downto 0); -- ddr dqs
signal ddr_ad : std_logic_vector (12 downto 0); -- ddr address
signal ddr_ba : std_logic_vector (1 downto 0); -- ddr bank address
signal ddr_dq : std_logic_vector (15 downto 0); -- ddr data
signal brdyn : std_ulogic;
signal bexcn : std_ulogic;
signal wdog : std_ulogic;
signal dsuen, dsutx, dsurx, dsubre, dsuact : std_ulogic;
signal dsurst : std_ulogic;
signal test : std_ulogic;
signal rtsn, ctsn : std_ulogic;
signal error : std_logic;
signal pio : std_logic_vector(15 downto 0);
signal GND : std_ulogic := '0';
signal VCC : std_ulogic := '1';
signal NC : std_ulogic := 'Z';
signal clk2 : std_ulogic := '1';
signal clk50 : std_ulogic := '1';
signal clk_200p : std_ulogic := '0';
signal clk_200n : std_ulogic := '1';
signal plllock : std_ulogic;
-- pulled up high, therefore std_logic
signal txd1, rxd1 : std_logic;
signal eth_macclk, etx_clk, erx_clk, erx_dv, erx_er, erx_col, erx_crs, etx_en, etx_er : std_logic := '0';
signal erxd, etxd : std_logic_vector(3 downto 0) := (others => '0');
signal erxdt, etxdt : std_logic_vector(7 downto 0) := (others => '0');
signal emdc, emdio : std_logic; --dummy signal for the mdc,mdio in the phy which is not used
constant lresp : boolean := false;
signal resoutn : std_logic;
signal dsubren : std_ulogic;
signal dsuactn : std_ulogic;
begin
dsubren <= not dsubre;
-- clock and reset
clk <= not clk after ct * 1 ns;
clk50 <= not clk50 after 10 ns;
clk_200p <= not clk_200p after 2.5 ns;
clk_200n <= not clk_200n after 2.5 ns;
rst <= '1', '0' after 1000 ns;
rstn <= not rst;
dsuen <= '0'; dsubre <= '0'; rxd1 <= 'H';
address(0) <= '0';
ddr_dqs <= (others => 'L');
d3 : entity work.leon3mp
port map (
resetn => rst,
resoutn => resoutn,
clk_100mhz => clk,
clk_50mhz => clk50,
clk_200p => clk_200p,
clk_200n => clk_200n,
errorn => error,
address => address(22 downto 1),
data => data(31 downto 16),
testdata => data(15 downto 0),
ddr_clk0 => ddr_clk,
ddr_clk0b => ddr_clkb,
ddr_clk_fb => ddr_clk_fb,
ddr_cke0 => ddr_cke,
ddr_cs0b => ddr_csb,
ddr_web => ddr_web,
ddr_rasb => ddr_rasb,
ddr_casb => ddr_casb,
ddr_dm => ddr_dm,
ddr_dqs => ddr_dqs,
ddr_ad => ddr_ad,
ddr_ba => ddr_ba,
ddr_dq => ddr_dq,
sertx => dsutx,
serrx => dsurx,
rtsn => rtsn,
ctsn => ctsn,
dsuen => dsuen,
dsubre => dsubre,
dsuact => dsuactn,
oen => oen,
writen => writen,
iosn => iosn,
romsn => romsn(0),
emdio => emdio,
etx_clk => etx_clk,
erx_clk => erx_clk,
erxd => erxd,
erx_dv => erx_dv,
erx_er => erx_er,
erx_col => erx_col,
erx_crs => erx_crs,
etxd => etxd,
etx_en => etx_en,
etx_er => etx_er,
emdc => emdc
);
ddr_clk_fb <= ddr_clk;
ddr0: ddrram
generic map (width => 16, abits => 13, colbits => 9, rowbits => 12, implbanks => 1,
fname => sdramfile, lddelay => (300 us)*CFG_MIG_DDR2)
port map (
ck => ddr_clk, cke => ddr_cke, csn => ddr_csb,
rasn => ddr_rasb, casn => ddr_casb, wen => ddr_web,
dm => ddr_dm, ba => ddr_ba, a => ddr_ad, dq => ddr_dq, dqs => ddr_dqs);
prom0 : for i in 0 to (romwidth/8)-1 generate
sr0 : sram generic map (index => i+4, abits => romdepth, fname => promfile)
port map (address(romdepth downto 1), data(31-i*8 downto 24-i*8), romsn(0),
writen, oen);
end generate;
phy0 : if (CFG_GRETH = 1) generate
emdio <= 'H';
erxd <= erxdt(3 downto 0);
etxdt <= "0000" & etxd;
p0: phy
generic map(base1000_t_fd => 0, base1000_t_hd => 0, address => 3)
port map(resoutn, emdio, etx_clk, erx_clk, erxdt, erx_dv,
erx_er, erx_col, erx_crs, etxdt, etx_en, etx_er, emdc, eth_macclk);
end generate;
error <= 'H'; -- ERROR pull-up
iuerr : process
begin
wait for 5 us;
assert (to_X01(error) = '1')
report "*** IU in error mode, simulation halted ***"
severity failure;
end process;
test0 : grtestmod
port map ( rstn, clk, error, address(21 downto 2), data,
iosn, oen, writen, brdyn);
data <= buskeep(data) after 5 ns;
dsucom : process
procedure dsucfg(signal dsurx : in std_ulogic; signal dsutx : out std_ulogic) is
variable w32 : std_logic_vector(31 downto 0);
variable c8 : std_logic_vector(7 downto 0);
constant txp : time := 160 * 1 ns;
begin
dsutx <= '1';
dsurst <= '1';
wait;
wait for 5000 ns;
txc(dsutx, 16#55#, txp); -- sync uart
-- txc(dsutx, 16#c0#, txp);
-- txa(dsutx, 16#90#, 16#00#, 16#00#, 16#00#, txp);
-- txa(dsutx, 16#00#, 16#00#, 16#00#, 16#ef#, txp);
--
-- txc(dsutx, 16#c0#, txp);
-- txa(dsutx, 16#90#, 16#00#, 16#00#, 16#20#, txp);
-- txa(dsutx, 16#00#, 16#00#, 16#ff#, 16#ff#, txp);
--
-- txc(dsutx, 16#c0#, txp);
-- txa(dsutx, 16#90#, 16#40#, 16#00#, 16#48#, txp);
-- txa(dsutx, 16#00#, 16#00#, 16#00#, 16#12#, txp);
--
-- txc(dsutx, 16#c0#, txp);
-- txa(dsutx, 16#90#, 16#40#, 16#00#, 16#60#, txp);
-- txa(dsutx, 16#00#, 16#00#, 16#12#, 16#10#, txp);
--
-- txc(dsutx, 16#80#, txp);
-- txa(dsutx, 16#90#, 16#00#, 16#00#, 16#00#, txp);
-- rxi(dsurx, w32, txp, lresp);
txc(dsutx, 16#a0#, txp);
txa(dsutx, 16#40#, 16#00#, 16#00#, 16#00#, txp);
rxi(dsurx, w32, txp, lresp);
end;
begin
dsucfg(dsutx, dsurx);
wait;
end process;
end;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2768.vhd,v 1.1.1.1 2001-08-22 18:20:52 paw Exp $
-- $Revision: 1.1.1.1 $
--
-- ---------------------------------------------------------------------
-- Dale Martin updated the bit_vectors in this file with bit_vector'()
-- qualification to make it VHDL '93 compliant. (It's still '87 compliant
-- as well.)
ENTITY c13s07b00x00p08n01i02768ent IS
END c13s07b00x00p08n01i02768ent;
ARCHITECTURE c13s07b00x00p08n01i02768arch OF c13s07b00x00p08n01i02768ent IS
BEGIN
TESTING: PROCESS
BEGIN
assert NOT( bit_vector'(O"0") = "000" and
bit_vector'(O"1") = "001" and
bit_vector'(O"2") = "010" and
bit_vector'(O"3") = "011" and
bit_vector'(O"4") = "100" and
bit_vector'(O"5") = "101" and
bit_vector'(O"6") = "110" and
bit_vector'(O"7") = "111" and
bit_vector'(O"01") = "000001" and
bit_vector'(O"10") = "001000" and
bit_vector'(O"0_1") = "000001" and
bit_vector'(X"0") = "0000" and
bit_vector'(X"1") = "0001" and
bit_vector'(X"2") = "0010" and
bit_vector'(X"3") = "0011" and
bit_vector'(X"4") = "0100" and
bit_vector'(X"5") = "0101" and
bit_vector'(X"6") = "0110" and
bit_vector'(X"7") = "0111" and
bit_vector'(X"8") = "1000" and
bit_vector'(X"9") = "1001" and
bit_vector'(X"A") = "1010" and
bit_vector'(X"a") = "1010" and
bit_vector'(X"B") = "1011" and
bit_vector'(X"b") = "1011" and
bit_vector'(X"C") = "1100" and
bit_vector'(X"c") = "1100" and
bit_vector'(X"D") = "1101" and
bit_vector'(X"d") = "1101" and
bit_vector'(X"E") = "1110" and
bit_vector'(X"e") = "1110" and
bit_vector'(X"F") = "1111" and
bit_vector'(X"f") = "1111" and
bit_vector'(X"01") = "00000001" and
bit_vector'(X"10") = "00010000" and
bit_vector'(X"0_1") = "00000001" and
bit_vector'(X"E_7") = "11100111" and
bit_vector'(X"DEAD_BEEF") = B"1101_1110_1010_1101_1011_1110_1110_1111")
report "***PASSED TEST: c13s07b00x00p08n01i02768"
severity NOTE;
assert ( bit_vector'(O"0") = "000" and
bit_vector'(O"1") = "001" and
bit_vector'(O"2") = "010" and
bit_vector'(O"3") = "011" and
bit_vector'(O"4") = "100" and
bit_vector'(O"5") = "101" and
bit_vector'(O"6") = "110" and
bit_vector'(O"7") = "111" and
bit_vector'(O"01") = "000001" and
bit_vector'(O"10") = "001000" and
bit_vector'(O"0_1") = "000001" and
bit_vector'(X"0") = "0000" and
bit_vector'(X"1") = "0001" and
bit_vector'(X"2") = "0010" and
bit_vector'(X"3") = "0011" and
bit_vector'(X"4") = "0100" and
bit_vector'(X"5") = "0101" and
bit_vector'(X"6") = "0110" and
bit_vector'(X"7") = "0111" and
bit_vector'(X"8") = "1000" and
bit_vector'(X"9") = "1001" and
bit_vector'(X"A") = "1010" and
bit_vector'(X"a") = "1010" and
bit_vector'(X"B") = "1011" and
bit_vector'(X"b") = "1011" and
bit_vector'(X"C") = "1100" and
bit_vector'(X"c") = "1100" and
bit_vector'(X"D") = "1101" and
bit_vector'(X"d") = "1101" and
bit_vector'(X"E") = "1110" and
bit_vector'(X"e") = "1110" and
bit_vector'(X"F") = "1111" and
bit_vector'(X"f") = "1111" and
bit_vector'(X"01") = "00000001" and
bit_vector'(X"10") = "00010000" and
bit_vector'(X"0_1") = "00000001" and
bit_vector'(X"E_7") = "11100111" and
bit_vector'(X"DEAD_BEEF") = B"1101_1110_1010_1101_1011_1110_1110_1111")
report "***FAILED TEST: c13s07b00x00p08n01i02768 - Bit string literal and base specifier 'O' and 'X' value transfer test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s07b00x00p08n01i02768arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2768.vhd,v 1.1.1.1 2001-08-22 18:20:52 paw Exp $
-- $Revision: 1.1.1.1 $
--
-- ---------------------------------------------------------------------
-- Dale Martin updated the bit_vectors in this file with bit_vector'()
-- qualification to make it VHDL '93 compliant. (It's still '87 compliant
-- as well.)
ENTITY c13s07b00x00p08n01i02768ent IS
END c13s07b00x00p08n01i02768ent;
ARCHITECTURE c13s07b00x00p08n01i02768arch OF c13s07b00x00p08n01i02768ent IS
BEGIN
TESTING: PROCESS
BEGIN
assert NOT( bit_vector'(O"0") = "000" and
bit_vector'(O"1") = "001" and
bit_vector'(O"2") = "010" and
bit_vector'(O"3") = "011" and
bit_vector'(O"4") = "100" and
bit_vector'(O"5") = "101" and
bit_vector'(O"6") = "110" and
bit_vector'(O"7") = "111" and
bit_vector'(O"01") = "000001" and
bit_vector'(O"10") = "001000" and
bit_vector'(O"0_1") = "000001" and
bit_vector'(X"0") = "0000" and
bit_vector'(X"1") = "0001" and
bit_vector'(X"2") = "0010" and
bit_vector'(X"3") = "0011" and
bit_vector'(X"4") = "0100" and
bit_vector'(X"5") = "0101" and
bit_vector'(X"6") = "0110" and
bit_vector'(X"7") = "0111" and
bit_vector'(X"8") = "1000" and
bit_vector'(X"9") = "1001" and
bit_vector'(X"A") = "1010" and
bit_vector'(X"a") = "1010" and
bit_vector'(X"B") = "1011" and
bit_vector'(X"b") = "1011" and
bit_vector'(X"C") = "1100" and
bit_vector'(X"c") = "1100" and
bit_vector'(X"D") = "1101" and
bit_vector'(X"d") = "1101" and
bit_vector'(X"E") = "1110" and
bit_vector'(X"e") = "1110" and
bit_vector'(X"F") = "1111" and
bit_vector'(X"f") = "1111" and
bit_vector'(X"01") = "00000001" and
bit_vector'(X"10") = "00010000" and
bit_vector'(X"0_1") = "00000001" and
bit_vector'(X"E_7") = "11100111" and
bit_vector'(X"DEAD_BEEF") = B"1101_1110_1010_1101_1011_1110_1110_1111")
report "***PASSED TEST: c13s07b00x00p08n01i02768"
severity NOTE;
assert ( bit_vector'(O"0") = "000" and
bit_vector'(O"1") = "001" and
bit_vector'(O"2") = "010" and
bit_vector'(O"3") = "011" and
bit_vector'(O"4") = "100" and
bit_vector'(O"5") = "101" and
bit_vector'(O"6") = "110" and
bit_vector'(O"7") = "111" and
bit_vector'(O"01") = "000001" and
bit_vector'(O"10") = "001000" and
bit_vector'(O"0_1") = "000001" and
bit_vector'(X"0") = "0000" and
bit_vector'(X"1") = "0001" and
bit_vector'(X"2") = "0010" and
bit_vector'(X"3") = "0011" and
bit_vector'(X"4") = "0100" and
bit_vector'(X"5") = "0101" and
bit_vector'(X"6") = "0110" and
bit_vector'(X"7") = "0111" and
bit_vector'(X"8") = "1000" and
bit_vector'(X"9") = "1001" and
bit_vector'(X"A") = "1010" and
bit_vector'(X"a") = "1010" and
bit_vector'(X"B") = "1011" and
bit_vector'(X"b") = "1011" and
bit_vector'(X"C") = "1100" and
bit_vector'(X"c") = "1100" and
bit_vector'(X"D") = "1101" and
bit_vector'(X"d") = "1101" and
bit_vector'(X"E") = "1110" and
bit_vector'(X"e") = "1110" and
bit_vector'(X"F") = "1111" and
bit_vector'(X"f") = "1111" and
bit_vector'(X"01") = "00000001" and
bit_vector'(X"10") = "00010000" and
bit_vector'(X"0_1") = "00000001" and
bit_vector'(X"E_7") = "11100111" and
bit_vector'(X"DEAD_BEEF") = B"1101_1110_1010_1101_1011_1110_1110_1111")
report "***FAILED TEST: c13s07b00x00p08n01i02768 - Bit string literal and base specifier 'O' and 'X' value transfer test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s07b00x00p08n01i02768arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2768.vhd,v 1.1.1.1 2001-08-22 18:20:52 paw Exp $
-- $Revision: 1.1.1.1 $
--
-- ---------------------------------------------------------------------
-- Dale Martin updated the bit_vectors in this file with bit_vector'()
-- qualification to make it VHDL '93 compliant. (It's still '87 compliant
-- as well.)
ENTITY c13s07b00x00p08n01i02768ent IS
END c13s07b00x00p08n01i02768ent;
ARCHITECTURE c13s07b00x00p08n01i02768arch OF c13s07b00x00p08n01i02768ent IS
BEGIN
TESTING: PROCESS
BEGIN
assert NOT( bit_vector'(O"0") = "000" and
bit_vector'(O"1") = "001" and
bit_vector'(O"2") = "010" and
bit_vector'(O"3") = "011" and
bit_vector'(O"4") = "100" and
bit_vector'(O"5") = "101" and
bit_vector'(O"6") = "110" and
bit_vector'(O"7") = "111" and
bit_vector'(O"01") = "000001" and
bit_vector'(O"10") = "001000" and
bit_vector'(O"0_1") = "000001" and
bit_vector'(X"0") = "0000" and
bit_vector'(X"1") = "0001" and
bit_vector'(X"2") = "0010" and
bit_vector'(X"3") = "0011" and
bit_vector'(X"4") = "0100" and
bit_vector'(X"5") = "0101" and
bit_vector'(X"6") = "0110" and
bit_vector'(X"7") = "0111" and
bit_vector'(X"8") = "1000" and
bit_vector'(X"9") = "1001" and
bit_vector'(X"A") = "1010" and
bit_vector'(X"a") = "1010" and
bit_vector'(X"B") = "1011" and
bit_vector'(X"b") = "1011" and
bit_vector'(X"C") = "1100" and
bit_vector'(X"c") = "1100" and
bit_vector'(X"D") = "1101" and
bit_vector'(X"d") = "1101" and
bit_vector'(X"E") = "1110" and
bit_vector'(X"e") = "1110" and
bit_vector'(X"F") = "1111" and
bit_vector'(X"f") = "1111" and
bit_vector'(X"01") = "00000001" and
bit_vector'(X"10") = "00010000" and
bit_vector'(X"0_1") = "00000001" and
bit_vector'(X"E_7") = "11100111" and
bit_vector'(X"DEAD_BEEF") = B"1101_1110_1010_1101_1011_1110_1110_1111")
report "***PASSED TEST: c13s07b00x00p08n01i02768"
severity NOTE;
assert ( bit_vector'(O"0") = "000" and
bit_vector'(O"1") = "001" and
bit_vector'(O"2") = "010" and
bit_vector'(O"3") = "011" and
bit_vector'(O"4") = "100" and
bit_vector'(O"5") = "101" and
bit_vector'(O"6") = "110" and
bit_vector'(O"7") = "111" and
bit_vector'(O"01") = "000001" and
bit_vector'(O"10") = "001000" and
bit_vector'(O"0_1") = "000001" and
bit_vector'(X"0") = "0000" and
bit_vector'(X"1") = "0001" and
bit_vector'(X"2") = "0010" and
bit_vector'(X"3") = "0011" and
bit_vector'(X"4") = "0100" and
bit_vector'(X"5") = "0101" and
bit_vector'(X"6") = "0110" and
bit_vector'(X"7") = "0111" and
bit_vector'(X"8") = "1000" and
bit_vector'(X"9") = "1001" and
bit_vector'(X"A") = "1010" and
bit_vector'(X"a") = "1010" and
bit_vector'(X"B") = "1011" and
bit_vector'(X"b") = "1011" and
bit_vector'(X"C") = "1100" and
bit_vector'(X"c") = "1100" and
bit_vector'(X"D") = "1101" and
bit_vector'(X"d") = "1101" and
bit_vector'(X"E") = "1110" and
bit_vector'(X"e") = "1110" and
bit_vector'(X"F") = "1111" and
bit_vector'(X"f") = "1111" and
bit_vector'(X"01") = "00000001" and
bit_vector'(X"10") = "00010000" and
bit_vector'(X"0_1") = "00000001" and
bit_vector'(X"E_7") = "11100111" and
bit_vector'(X"DEAD_BEEF") = B"1101_1110_1010_1101_1011_1110_1110_1111")
report "***FAILED TEST: c13s07b00x00p08n01i02768 - Bit string literal and base specifier 'O' and 'X' value transfer test failed."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s07b00x00p08n01i02768arch;
|
----------------------------------------------------------------------------------
-- Engineer: Mike Field <[email protected]>
--
-- Description: TMDS Encoder
-- 8 bits colour, 2 control bits and one blanking bits in
-- 10 bits of TMDS encoded data out
-- Clocked at the pixel clock
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity TMDS_encoder is
Port ( clk : in STD_LOGIC;
data : in STD_LOGIC_VECTOR (7 downto 0);
c : in STD_LOGIC_VECTOR (1 downto 0);
blank : in STD_LOGIC;
encoded : out STD_LOGIC_VECTOR (9 downto 0));
end TMDS_encoder;
architecture Behavioral of TMDS_encoder is
signal xored : STD_LOGIC_VECTOR (8 downto 0);
signal xnored : STD_LOGIC_VECTOR (8 downto 0);
signal ones : STD_LOGIC_VECTOR (3 downto 0);
signal data_word : STD_LOGIC_VECTOR (8 downto 0);
signal data_word_inv : STD_LOGIC_VECTOR (8 downto 0);
signal data_word_disparity : STD_LOGIC_VECTOR (3 downto 0);
signal dc_bias : STD_LOGIC_VECTOR (3 downto 0) := (others => '0');
begin
-- Work our the two different encodings for the byte
xored(0) <= data(0);
xored(1) <= data(1) xor xored(0);
xored(2) <= data(2) xor xored(1);
xored(3) <= data(3) xor xored(2);
xored(4) <= data(4) xor xored(3);
xored(5) <= data(5) xor xored(4);
xored(6) <= data(6) xor xored(5);
xored(7) <= data(7) xor xored(6);
xored(8) <= '1';
xnored(0) <= data(0);
xnored(1) <= data(1) xnor xnored(0);
xnored(2) <= data(2) xnor xnored(1);
xnored(3) <= data(3) xnor xnored(2);
xnored(4) <= data(4) xnor xnored(3);
xnored(5) <= data(5) xnor xnored(4);
xnored(6) <= data(6) xnor xnored(5);
xnored(7) <= data(7) xnor xnored(6);
xnored(8) <= '0';
-- Count how many ones are set in data
ones <= "0000" + data(0) + data(1) + data(2) + data(3)
+ data(4) + data(5) + data(6) + data(7);
-- Decide which encoding to use
process(ones, data(0), xnored, xored)
begin
if ones > 4 or (ones = 4 and data(0) = '0') then
data_word <= xnored;
data_word_inv <= NOT(xnored);
else
data_word <= xored;
data_word_inv <= NOT(xored);
end if;
end process;
-- Work out the DC bias of the dataword;
data_word_disparity <= "1100" + data_word(0) + data_word(1) + data_word(2) + data_word(3)
+ data_word(4) + data_word(5) + data_word(6) + data_word(7);
-- Now work out what the output should be
process(clk)
begin
if rising_edge(clk) then
if blank = '1' then
-- In the control periods, all values have and have balanced bit count
case c is
when "00" => encoded <= "1101010100";
when "01" => encoded <= "0010101011";
when "10" => encoded <= "0101010100";
when others => encoded <= "1010101011";
end case;
dc_bias <= (others => '0');
else
if dc_bias = "00000" or data_word_disparity = 0 then
-- dataword has no disparity
if data_word(8) = '1' then
encoded <= "01" & data_word(7 downto 0);
dc_bias <= dc_bias + data_word_disparity;
else
encoded <= "10" & data_word_inv(7 downto 0);
dc_bias <= dc_bias - data_word_disparity;
end if;
elsif (dc_bias(3) = '0' and data_word_disparity(3) = '0') or
(dc_bias(3) = '1' and data_word_disparity(3) = '1') then
encoded <= '1' & data_word(8) & data_word_inv(7 downto 0);
dc_bias <= dc_bias + data_word(8) - data_word_disparity;
else
encoded <= '0' & data_word;
dc_bias <= dc_bias - data_word_inv(8) + data_word_disparity;
end if;
end if;
end if;
end process;
end Behavioral; |
----------------------------------------------------------------------------------
-- Engineer: Mike Field <[email protected]>
--
-- Description: TMDS Encoder
-- 8 bits colour, 2 control bits and one blanking bits in
-- 10 bits of TMDS encoded data out
-- Clocked at the pixel clock
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity TMDS_encoder is
Port ( clk : in STD_LOGIC;
data : in STD_LOGIC_VECTOR (7 downto 0);
c : in STD_LOGIC_VECTOR (1 downto 0);
blank : in STD_LOGIC;
encoded : out STD_LOGIC_VECTOR (9 downto 0));
end TMDS_encoder;
architecture Behavioral of TMDS_encoder is
signal xored : STD_LOGIC_VECTOR (8 downto 0);
signal xnored : STD_LOGIC_VECTOR (8 downto 0);
signal ones : STD_LOGIC_VECTOR (3 downto 0);
signal data_word : STD_LOGIC_VECTOR (8 downto 0);
signal data_word_inv : STD_LOGIC_VECTOR (8 downto 0);
signal data_word_disparity : STD_LOGIC_VECTOR (3 downto 0);
signal dc_bias : STD_LOGIC_VECTOR (3 downto 0) := (others => '0');
begin
-- Work our the two different encodings for the byte
xored(0) <= data(0);
xored(1) <= data(1) xor xored(0);
xored(2) <= data(2) xor xored(1);
xored(3) <= data(3) xor xored(2);
xored(4) <= data(4) xor xored(3);
xored(5) <= data(5) xor xored(4);
xored(6) <= data(6) xor xored(5);
xored(7) <= data(7) xor xored(6);
xored(8) <= '1';
xnored(0) <= data(0);
xnored(1) <= data(1) xnor xnored(0);
xnored(2) <= data(2) xnor xnored(1);
xnored(3) <= data(3) xnor xnored(2);
xnored(4) <= data(4) xnor xnored(3);
xnored(5) <= data(5) xnor xnored(4);
xnored(6) <= data(6) xnor xnored(5);
xnored(7) <= data(7) xnor xnored(6);
xnored(8) <= '0';
-- Count how many ones are set in data
ones <= "0000" + data(0) + data(1) + data(2) + data(3)
+ data(4) + data(5) + data(6) + data(7);
-- Decide which encoding to use
process(ones, data(0), xnored, xored)
begin
if ones > 4 or (ones = 4 and data(0) = '0') then
data_word <= xnored;
data_word_inv <= NOT(xnored);
else
data_word <= xored;
data_word_inv <= NOT(xored);
end if;
end process;
-- Work out the DC bias of the dataword;
data_word_disparity <= "1100" + data_word(0) + data_word(1) + data_word(2) + data_word(3)
+ data_word(4) + data_word(5) + data_word(6) + data_word(7);
-- Now work out what the output should be
process(clk)
begin
if rising_edge(clk) then
if blank = '1' then
-- In the control periods, all values have and have balanced bit count
case c is
when "00" => encoded <= "1101010100";
when "01" => encoded <= "0010101011";
when "10" => encoded <= "0101010100";
when others => encoded <= "1010101011";
end case;
dc_bias <= (others => '0');
else
if dc_bias = "00000" or data_word_disparity = 0 then
-- dataword has no disparity
if data_word(8) = '1' then
encoded <= "01" & data_word(7 downto 0);
dc_bias <= dc_bias + data_word_disparity;
else
encoded <= "10" & data_word_inv(7 downto 0);
dc_bias <= dc_bias - data_word_disparity;
end if;
elsif (dc_bias(3) = '0' and data_word_disparity(3) = '0') or
(dc_bias(3) = '1' and data_word_disparity(3) = '1') then
encoded <= '1' & data_word(8) & data_word_inv(7 downto 0);
dc_bias <= dc_bias + data_word(8) - data_word_disparity;
else
encoded <= '0' & data_word;
dc_bias <= dc_bias - data_word_inv(8) + data_word_disparity;
end if;
end if;
end if;
end process;
end Behavioral; |
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 15:34:19 04/24/2017
-- Design Name:
-- Module Name: benes8 - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity benes8 is
Port ( a : in STD_LOGIC_VECTOR (7 downto 0);
sel : in STD_LOGIC_VECTOR (19 downto 0);
b : out STD_LOGIC_VECTOR (7 downto 0));
end benes8;
architecture Behavioral of benes8 is
signal a2, a1, ab, b1, b2 : STD_LOGIC_VECTOR (7 downto 0);
component sw2x2
port (
in0: in std_logic;
in1: in std_logic;
out0: out std_logic;
out1: out std_logic;
sel: in std_logic);
end component;
begin
st2a1 : sw2x2 port map(in0 => a(7), in1 => a(3), out0 => a2(7), out1 => a2(3), sel => sel(19) );
st2a2 : sw2x2 port map(in0 => a(6), in1 => a(2), out0 => a2(6), out1 => a2(2), sel => sel(18) );
st2a3 : sw2x2 port map(in0 => a(5), in1 => a(1), out0 => a2(5), out1 => a2(1), sel => sel(17) );
st2a4 : sw2x2 port map(in0 => a(4), in1 => a(0), out0 => a2(4), out1 => a2(0), sel => sel(16) );
st1a1 : sw2x2 port map(in0 => a2(7), in1 => a2(5), out0 => a1(7), out1 => a1(5), sel => sel(15) );
st1a2 : sw2x2 port map(in0 => a2(6), in1 => a2(4), out0 => a1(6), out1 => a1(4), sel => sel(14) );
st1a3 : sw2x2 port map(in0 => a2(3), in1 => a2(1), out0 => a1(3), out1 => a1(1), sel => sel(13) );
st1a4 : sw2x2 port map(in0 => a2(2), in1 => a2(0), out0 => a1(2), out1 => a1(0), sel => sel(12) );
st01 : sw2x2 port map(in0 => a1(7), in1 => a1(6), out0 => ab(7), out1 => ab(6), sel => sel(11) );
st02 : sw2x2 port map(in0 => a1(5), in1 => a1(4), out0 => ab(5), out1 => ab(4), sel => sel(10) );
st03 : sw2x2 port map(in0 => a1(3), in1 => a1(2), out0 => ab(3), out1 => ab(2), sel => sel(9) );
st04 : sw2x2 port map(in0 => a1(1), in1 => a1(0), out0 => ab(1), out1 => ab(0), sel => sel(8) );
st2b1 : sw2x2 port map(in0 => ab(7), in1 => ab(5), out0 => b1(7), out1 => b1(5), sel => sel(7) );
st2b2 : sw2x2 port map(in0 => ab(6), in1 => ab(4), out0 => b1(6), out1 => b1(4), sel => sel(6) );
st2b3 : sw2x2 port map(in0 => ab(3), in1 => ab(1), out0 => b1(3), out1 => b1(1), sel => sel(5) );
st2b4 : sw2x2 port map(in0 => ab(2), in1 => ab(0), out0 => b1(2), out1 => b1(0), sel => sel(4) );
st1b1 : sw2x2 port map(in0 => b1(7), in1 => b1(3), out0 => b(7), out1 => b(3), sel => sel(3) );
st1b2 : sw2x2 port map(in0 => b1(6), in1 => b1(2), out0 => b(6), out1 => b(2), sel => sel(2) );
st1b3 : sw2x2 port map(in0 => b1(5), in1 => b1(1), out0 => b(5), out1 => b(1), sel => sel(1) );
st1b4 : sw2x2 port map(in0 => b1(4), in1 => b1(0), out0 => b(4), out1 => b(0), sel => sel(0) );
end Behavioral;
|
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 15:34:19 04/24/2017
-- Design Name:
-- Module Name: benes8 - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity benes8 is
Port ( a : in STD_LOGIC_VECTOR (7 downto 0);
sel : in STD_LOGIC_VECTOR (19 downto 0);
b : out STD_LOGIC_VECTOR (7 downto 0));
end benes8;
architecture Behavioral of benes8 is
signal a2, a1, ab, b1, b2 : STD_LOGIC_VECTOR (7 downto 0);
component sw2x2
port (
in0: in std_logic;
in1: in std_logic;
out0: out std_logic;
out1: out std_logic;
sel: in std_logic);
end component;
begin
st2a1 : sw2x2 port map(in0 => a(7), in1 => a(3), out0 => a2(7), out1 => a2(3), sel => sel(19) );
st2a2 : sw2x2 port map(in0 => a(6), in1 => a(2), out0 => a2(6), out1 => a2(2), sel => sel(18) );
st2a3 : sw2x2 port map(in0 => a(5), in1 => a(1), out0 => a2(5), out1 => a2(1), sel => sel(17) );
st2a4 : sw2x2 port map(in0 => a(4), in1 => a(0), out0 => a2(4), out1 => a2(0), sel => sel(16) );
st1a1 : sw2x2 port map(in0 => a2(7), in1 => a2(5), out0 => a1(7), out1 => a1(5), sel => sel(15) );
st1a2 : sw2x2 port map(in0 => a2(6), in1 => a2(4), out0 => a1(6), out1 => a1(4), sel => sel(14) );
st1a3 : sw2x2 port map(in0 => a2(3), in1 => a2(1), out0 => a1(3), out1 => a1(1), sel => sel(13) );
st1a4 : sw2x2 port map(in0 => a2(2), in1 => a2(0), out0 => a1(2), out1 => a1(0), sel => sel(12) );
st01 : sw2x2 port map(in0 => a1(7), in1 => a1(6), out0 => ab(7), out1 => ab(6), sel => sel(11) );
st02 : sw2x2 port map(in0 => a1(5), in1 => a1(4), out0 => ab(5), out1 => ab(4), sel => sel(10) );
st03 : sw2x2 port map(in0 => a1(3), in1 => a1(2), out0 => ab(3), out1 => ab(2), sel => sel(9) );
st04 : sw2x2 port map(in0 => a1(1), in1 => a1(0), out0 => ab(1), out1 => ab(0), sel => sel(8) );
st2b1 : sw2x2 port map(in0 => ab(7), in1 => ab(5), out0 => b1(7), out1 => b1(5), sel => sel(7) );
st2b2 : sw2x2 port map(in0 => ab(6), in1 => ab(4), out0 => b1(6), out1 => b1(4), sel => sel(6) );
st2b3 : sw2x2 port map(in0 => ab(3), in1 => ab(1), out0 => b1(3), out1 => b1(1), sel => sel(5) );
st2b4 : sw2x2 port map(in0 => ab(2), in1 => ab(0), out0 => b1(2), out1 => b1(0), sel => sel(4) );
st1b1 : sw2x2 port map(in0 => b1(7), in1 => b1(3), out0 => b(7), out1 => b(3), sel => sel(3) );
st1b2 : sw2x2 port map(in0 => b1(6), in1 => b1(2), out0 => b(6), out1 => b(2), sel => sel(2) );
st1b3 : sw2x2 port map(in0 => b1(5), in1 => b1(1), out0 => b(5), out1 => b(1), sel => sel(1) );
st1b4 : sw2x2 port map(in0 => b1(4), in1 => b1(0), out0 => b(4), out1 => b(0), sel => sel(0) );
end Behavioral;
|
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`protect end_protected
|
`protect begin_protected
`protect version = 1
`protect encrypt_agent = "XILINX"
`protect encrypt_agent_info = "Xilinx Encryption Tool 2014"
`protect key_keyowner = "Cadence Design Systems.", key_keyname= "cds_rsa_key", key_method = "rsa"
`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
`protect key_block
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
`protect key_block
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
`protect key_block
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`protect encoding = (enctype = "BASE64", line_length = 76, bytes = 24880)
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|
--------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 15:45:14 03/06/2016
-- Design Name:
-- Module Name: C:/Users/Yakov/OneDrive/School/University Stuff/ENEL500/test232/tb_rs232.vhd
-- Project Name: test232
-- Target Device:
-- Tool versions:
-- Description:
--
-- VHDL Test Bench Created by ISE for module: rs232
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test. Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY tb_rs232 IS
END tb_rs232;
ARCHITECTURE behavior OF tb_rs232 IS
-- Component Declaration for the Unit Under Test (UUT)
component ram_sp_ar_aw is
generic (
DATA_WIDTH :integer := 8;
ADDR_WIDTH :integer := 15
);
port (
address :in std_logic_vector (ADDR_WIDTH-1 downto 0); -- address Input
data :inout std_logic_vector (DATA_WIDTH-1 downto 0); -- data bi-directional
cs :in std_logic; -- Chip Select
we :in std_logic; -- Write Enable/Read Enable
oe :in std_logic -- Output Enable
);
end component;
COMPONENT rs232
PORT(
clk32mhz : IN std_logic;
reset : IN std_logic;
td : IN std_logic;
rd : OUT std_logic;
clk_cpu : IN std_logic;
cpu_read : IN std_logic;
cpu_write : IN std_logic;
cpu_cs : IN std_logic;
cpu_parity : IN std_logic;
cpu_data : INOUT std_logic_vector(3 downto 0);
cpu_ready : OUT std_logic;
ram_data : INOUT std_logic_vector(7 downto 0);
ram_addr : OUT std_logic_vector(14 downto 0);
ram_r1w0 : OUT std_logic
);
END COMPONENT;
--Inputs
signal clk : std_logic := '0';
signal reset : std_logic := '0';
signal td : std_logic := '0';
signal clk_cpu : std_logic := '0';
signal cpu_read : std_logic := '0';
signal cpu_write : std_logic := '0';
signal cpu_cs : std_logic := '0';
signal cpu_parity : std_logic := '0';
--BiDirs
signal cpu_data : std_logic_vector(3 downto 0);
signal ram_data : std_logic_vector(7 downto 0);
--Outputs
signal rd : std_logic;
signal cpu_ready : std_logic;
signal ram_addr : std_logic_vector(14 downto 0);
signal ram_r1w0 : std_logic;
-- Clock period definitions
constant clk_period : time := 31.25 ns;
constant clk_cpu_period : time := 31.25 ns;
constant clk_uart : time := 104.16666666666666666666666 us;
constant TEST : std_logic_vector := "0011001101" & "0101011101" & "0110001101" & "0110101101" & "0100001001";
constant YAY : std_logic_vector := "0111111001";
constant MSG : std_logic_vector := "0101" & "1101";
BEGIN
RAM: ram_sp_ar_aw port map (
address => ram_addr,
data => ram_data,
cs => '1',
we => not ram_r1w0,
oe => '1'
);
-- Instantiate the Unit Under Test (UUT)
uut: rs232 PORT MAP (
clk32mhz => clk,
reset => reset,
td => td,
rd => rd,
clk_cpu => clk_cpu,
cpu_read => cpu_read,
cpu_write => cpu_write,
cpu_cs => cpu_cs,
cpu_parity => cpu_parity,
cpu_data => cpu_data,
cpu_ready => cpu_ready,
ram_data => ram_data,
ram_addr => ram_addr,
ram_r1w0 => ram_r1w0
);
-- Clock process definitions
clk_process :process
begin
clk <= '0';
wait for clk_period/2;
clk <= '1';
wait for clk_period/2;
end process;
clk_cpu_process :process
begin
clk_cpu <= '0';
wait for clk_cpu_period/2;
clk_cpu <= '1';
wait for clk_cpu_period/2;
end process;
cpu_parity <= '0';
-- Stimulus process
stim_proc: process
begin
-- hold reset state for 100 ns.
td <= '1';
cpu_read <= '0';
cpu_write <= '0';
cpu_data <= (others => 'Z');
wait for 100 ns;
reset <= '1';
wait for clk_period*10;
reset <= '0';
wait for clk_uart/2;
-- insert stimulus here
for i in TEST'range loop
wait for clk_uart;
td <= TEST(i);
end loop;
wait for 1 ms;
for i in YAY'range loop
td <= YAY(i);
wait for clk_uart;
end loop;
for i in 0 to 9 loop
wait for 1 ms;
cpu_read <= '1';
wait for clk_cpu_period * 4;
cpu_read <= '0';
end loop;
for i in 0 to 1 loop
wait for 1 ms;
cpu_write <= '1';
wait until rising_edge(cpu_ready);
cpu_data <= MSG(i*4 to i*4+3);
wait for 1ms;
cpu_write <= '0';
cpu_data <= (others => 'Z');
end loop;
wait;
end process;
END;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010 - Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : file io package
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: File IO routines
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library std;
use std.textio.all;
package file_io_pkg is
subtype t_byte is std_logic_vector(7 downto 0);
function nibbletohex(nibble : std_logic_vector(3 downto 0)) return character;
function hextonibble(c : character) return std_logic_vector;
function ishexchar(c : character) return boolean;
procedure vectohex(vec : std_logic_vector; str : out string);
function vectohex(vec : std_logic_vector; len : integer) return string;
procedure getcharfromfile(file myfile : text; l : inout line; stop : out boolean; hex : out character);
procedure getbytefromfile(file myfile : text; l : inout line; fileend : out boolean; dat : out t_byte);
type t_binary_file is file of integer;
type t_binary_file_handle is record
offset : integer range 0 to 4;
longvec : std_logic_vector(31 downto 0);
end record;
constant emptysp : string := " ";
procedure initrecord(rec : inout t_binary_file_handle);
procedure readbyte(file f : t_binary_file; b : out t_byte; rec : inout t_binary_file_handle);
procedure writebyte(file f : t_binary_file; b : in t_byte; rec : inout t_binary_file_handle);
procedure purge(file f : t_binary_file; rec : inout t_binary_file_handle);
procedure onoffchar(l : inout line; ena : std_logic; ch : character);
procedure onoffchar(l : inout line; ena : std_logic; ch, alt : character);
procedure hexout(l : inout line; ena : std_logic; vec : std_logic_vector; len : integer);
procedure write_s(variable li : inout line; s : string);
end;
package body file_io_pkg is
function nibbletohex(nibble : std_logic_vector(3 downto 0)) return character is
variable r : character := '?';
begin
case nibble is
when "0000" => r := '0';
when "0001" => r := '1';
when "0010" => r := '2';
when "0011" => r := '3';
when "0100" => r := '4';
when "0101" => r := '5';
when "0110" => r := '6';
when "0111" => r := '7';
when "1000" => r := '8';
when "1001" => r := '9';
when "1010" => r := 'a';
when "1011" => r := 'b';
when "1100" => r := 'c';
when "1101" => r := 'd';
when "1110" => r := 'e';
when "1111" => r := 'f';
when others => r := 'x';
end case;
return r;
end nibbletohex;
function hextonibble(c : character) return std_logic_vector is
variable z : std_logic_vector(3 downto 0);
begin
case c is
when '0' => z := "0000";
when '1' => z := "0001";
when '2' => z := "0010";
when '3' => z := "0011";
when '4' => z := "0100";
when '5' => z := "0101";
when '6' => z := "0110";
when '7' => z := "0111";
when '8' => z := "1000";
when '9' => z := "1001";
when 'a' => z := "1010";
when 'b' => z := "1011";
when 'c' => z := "1100";
when 'd' => z := "1101";
when 'e' => z := "1110";
when 'f' => z := "1111";
when 'A' => z := "1010";
when 'B' => z := "1011";
when 'C' => z := "1100";
when 'D' => z := "1101";
when 'E' => z := "1110";
when 'F' => z := "1111";
when others => z := "XXXX";
end case;
return z;
end hextonibble;
function ishexchar(c : character) return boolean is
begin
case c is
when '0'|'1'|'2'|'3'|'4'|'5'|'6'|'7' => return true;
when '8'|'9'|'a'|'b'|'c'|'d'|'e'|'f' => return true;
when 'A'|'B'|'C'|'D'|'E'|'F' => return true;
when others => return false;
end case;
return false;
end ishexchar;
procedure vectohex(vec : std_logic_vector; str : out string) is
variable tempvec : std_logic_vector(str'length * 4 downto 1) := (others => '0');
variable j : integer;
variable myvec : std_logic_vector(vec'range);
variable len, mylow, myhigh : integer;
begin
myvec := vec;
len := str'length;
mylow := vec'low;
myhigh := vec'high;
if vec'length < tempvec'length then
tempvec(vec'length downto 1) := vec;
else
tempvec := vec(vec'low + tempvec'length - 1 downto vec'low);
end if;
for i in str'range loop
j := (str'right - i) * 4;
str(i) := nibbletohex(tempvec(j+4 downto j+1));
end loop;
end vectohex;
function vectohex(vec : std_logic_vector; len : integer) return string is
variable str : string(1 to len);
begin
vectohex(vec, str);
return str;
end vectohex;
procedure getcharfromfile(file myfile : text; l : inout line; stop : out boolean; hex : out character) is
variable good : boolean := false;
begin
while not(good) loop
read(l, hex, good);
if not(good) then
if endfile(myfile) then
stop := true;
hex := '1';
return;
end if;
readline(myfile, l);
end if;
end loop;
end getcharfromfile;
procedure getbytefromfile(file myfile : text; l : inout line; fileend : out boolean; dat : out t_byte) is
variable hex : character;
variable d : t_byte;
variable stop : boolean := false;
begin
d := x"00";
l1 : loop
getcharfromfile(myfile, l, stop, hex);
if stop or ishexchar(hex) then
exit l1;
end if;
end loop l1;
d(3 downto 0) := hextonibble(hex);
-- see if we can read another good hex char
getcharfromfile(myfile, l, stop, hex);
if not(stop) and ishexchar(hex) then
d(7 downto 4) := d(3 downto 0);
d(3 downto 0) := hextonibble(hex);
end if;
fileend := stop;
dat := d;
end getbytefromfile;
procedure onoffchar(l : inout line; ena : std_logic; ch : character) is
begin
if ena = '1' then
write(l, ch);
else
write(l, ' ');
end if;
end onoffchar;
procedure onoffchar(l : inout line; ena : std_logic; ch, alt : character) is
begin
if ena = '1' then
write(l, ch);
else
write(l, alt);
end if;
end onoffchar;
procedure hexout(l : inout line; ena : std_logic; vec : std_logic_vector; len : integer) is
begin
if ena = '1' then
write(l, vectohex(vec, len));
else
write(l, emptysp(1 to len));
end if;
end hexout;
procedure initrecord(rec : inout binaryfilerec) is
begin
rec.offset := 0;
rec.longvec := (others => '0');
end procedure;
procedure readbyte(file f : binary_file; b : out t_byte; rec : inout binaryfilerec) is
variable i : integer;
begin
if rec.offset = 0 then
read(f, i);
rec.longvec := std_logic_vector(to_unsigned(i, 32));
end if;
b := rec.longvec(7 downto 0);
rec.longvec := "00000000" & rec.longvec(31 downto 8); -- lsb first
if rec.offset = 3 then
rec.offset := 0;
else
rec.offset := rec.offset + 1;
end if;
end procedure;
procedure writebyte(file f : binary_file; b : in t_byte; rec : inout binaryfilerec) is
variable i : integer;
begin
rec.longvec(31 downto 24) := b;
if rec.offset = 3 then
i := to_integer(unsigned(rec.longvec));
write(f, i);
rec.offset := 0;
else
rec.offset := rec.offset + 1;
rec.longvec := "00000000" & rec.longvec(31 downto 8); -- lsb first
end if;
end procedure;
procedure purge(file f : binary_file; rec : inout binaryfilerec) is
variable i : integer;
begin
if rec.offset /= 0 then
i := to_integer(unsigned(rec.longvec));
write(f, i);
end if;
end procedure;
procedure write_s(variable li : inout line; s : string) is
begin
write(li, s);
end write_s;
end;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010 - Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : file io package
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: File IO routines
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library std;
use std.textio.all;
package file_io_pkg is
subtype t_byte is std_logic_vector(7 downto 0);
function nibbletohex(nibble : std_logic_vector(3 downto 0)) return character;
function hextonibble(c : character) return std_logic_vector;
function ishexchar(c : character) return boolean;
procedure vectohex(vec : std_logic_vector; str : out string);
function vectohex(vec : std_logic_vector; len : integer) return string;
procedure getcharfromfile(file myfile : text; l : inout line; stop : out boolean; hex : out character);
procedure getbytefromfile(file myfile : text; l : inout line; fileend : out boolean; dat : out t_byte);
type t_binary_file is file of integer;
type t_binary_file_handle is record
offset : integer range 0 to 4;
longvec : std_logic_vector(31 downto 0);
end record;
constant emptysp : string := " ";
procedure initrecord(rec : inout t_binary_file_handle);
procedure readbyte(file f : t_binary_file; b : out t_byte; rec : inout t_binary_file_handle);
procedure writebyte(file f : t_binary_file; b : in t_byte; rec : inout t_binary_file_handle);
procedure purge(file f : t_binary_file; rec : inout t_binary_file_handle);
procedure onoffchar(l : inout line; ena : std_logic; ch : character);
procedure onoffchar(l : inout line; ena : std_logic; ch, alt : character);
procedure hexout(l : inout line; ena : std_logic; vec : std_logic_vector; len : integer);
procedure write_s(variable li : inout line; s : string);
end;
package body file_io_pkg is
function nibbletohex(nibble : std_logic_vector(3 downto 0)) return character is
variable r : character := '?';
begin
case nibble is
when "0000" => r := '0';
when "0001" => r := '1';
when "0010" => r := '2';
when "0011" => r := '3';
when "0100" => r := '4';
when "0101" => r := '5';
when "0110" => r := '6';
when "0111" => r := '7';
when "1000" => r := '8';
when "1001" => r := '9';
when "1010" => r := 'a';
when "1011" => r := 'b';
when "1100" => r := 'c';
when "1101" => r := 'd';
when "1110" => r := 'e';
when "1111" => r := 'f';
when others => r := 'x';
end case;
return r;
end nibbletohex;
function hextonibble(c : character) return std_logic_vector is
variable z : std_logic_vector(3 downto 0);
begin
case c is
when '0' => z := "0000";
when '1' => z := "0001";
when '2' => z := "0010";
when '3' => z := "0011";
when '4' => z := "0100";
when '5' => z := "0101";
when '6' => z := "0110";
when '7' => z := "0111";
when '8' => z := "1000";
when '9' => z := "1001";
when 'a' => z := "1010";
when 'b' => z := "1011";
when 'c' => z := "1100";
when 'd' => z := "1101";
when 'e' => z := "1110";
when 'f' => z := "1111";
when 'A' => z := "1010";
when 'B' => z := "1011";
when 'C' => z := "1100";
when 'D' => z := "1101";
when 'E' => z := "1110";
when 'F' => z := "1111";
when others => z := "XXXX";
end case;
return z;
end hextonibble;
function ishexchar(c : character) return boolean is
begin
case c is
when '0'|'1'|'2'|'3'|'4'|'5'|'6'|'7' => return true;
when '8'|'9'|'a'|'b'|'c'|'d'|'e'|'f' => return true;
when 'A'|'B'|'C'|'D'|'E'|'F' => return true;
when others => return false;
end case;
return false;
end ishexchar;
procedure vectohex(vec : std_logic_vector; str : out string) is
variable tempvec : std_logic_vector(str'length * 4 downto 1) := (others => '0');
variable j : integer;
variable myvec : std_logic_vector(vec'range);
variable len, mylow, myhigh : integer;
begin
myvec := vec;
len := str'length;
mylow := vec'low;
myhigh := vec'high;
if vec'length < tempvec'length then
tempvec(vec'length downto 1) := vec;
else
tempvec := vec(vec'low + tempvec'length - 1 downto vec'low);
end if;
for i in str'range loop
j := (str'right - i) * 4;
str(i) := nibbletohex(tempvec(j+4 downto j+1));
end loop;
end vectohex;
function vectohex(vec : std_logic_vector; len : integer) return string is
variable str : string(1 to len);
begin
vectohex(vec, str);
return str;
end vectohex;
procedure getcharfromfile(file myfile : text; l : inout line; stop : out boolean; hex : out character) is
variable good : boolean := false;
begin
while not(good) loop
read(l, hex, good);
if not(good) then
if endfile(myfile) then
stop := true;
hex := '1';
return;
end if;
readline(myfile, l);
end if;
end loop;
end getcharfromfile;
procedure getbytefromfile(file myfile : text; l : inout line; fileend : out boolean; dat : out t_byte) is
variable hex : character;
variable d : t_byte;
variable stop : boolean := false;
begin
d := x"00";
l1 : loop
getcharfromfile(myfile, l, stop, hex);
if stop or ishexchar(hex) then
exit l1;
end if;
end loop l1;
d(3 downto 0) := hextonibble(hex);
-- see if we can read another good hex char
getcharfromfile(myfile, l, stop, hex);
if not(stop) and ishexchar(hex) then
d(7 downto 4) := d(3 downto 0);
d(3 downto 0) := hextonibble(hex);
end if;
fileend := stop;
dat := d;
end getbytefromfile;
procedure onoffchar(l : inout line; ena : std_logic; ch : character) is
begin
if ena = '1' then
write(l, ch);
else
write(l, ' ');
end if;
end onoffchar;
procedure onoffchar(l : inout line; ena : std_logic; ch, alt : character) is
begin
if ena = '1' then
write(l, ch);
else
write(l, alt);
end if;
end onoffchar;
procedure hexout(l : inout line; ena : std_logic; vec : std_logic_vector; len : integer) is
begin
if ena = '1' then
write(l, vectohex(vec, len));
else
write(l, emptysp(1 to len));
end if;
end hexout;
procedure initrecord(rec : inout binaryfilerec) is
begin
rec.offset := 0;
rec.longvec := (others => '0');
end procedure;
procedure readbyte(file f : binary_file; b : out t_byte; rec : inout binaryfilerec) is
variable i : integer;
begin
if rec.offset = 0 then
read(f, i);
rec.longvec := std_logic_vector(to_unsigned(i, 32));
end if;
b := rec.longvec(7 downto 0);
rec.longvec := "00000000" & rec.longvec(31 downto 8); -- lsb first
if rec.offset = 3 then
rec.offset := 0;
else
rec.offset := rec.offset + 1;
end if;
end procedure;
procedure writebyte(file f : binary_file; b : in t_byte; rec : inout binaryfilerec) is
variable i : integer;
begin
rec.longvec(31 downto 24) := b;
if rec.offset = 3 then
i := to_integer(unsigned(rec.longvec));
write(f, i);
rec.offset := 0;
else
rec.offset := rec.offset + 1;
rec.longvec := "00000000" & rec.longvec(31 downto 8); -- lsb first
end if;
end procedure;
procedure purge(file f : binary_file; rec : inout binaryfilerec) is
variable i : integer;
begin
if rec.offset /= 0 then
i := to_integer(unsigned(rec.longvec));
write(f, i);
end if;
end procedure;
procedure write_s(variable li : inout line; s : string) is
begin
write(li, s);
end write_s;
end;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010 - Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : file io package
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: File IO routines
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library std;
use std.textio.all;
package file_io_pkg is
subtype t_byte is std_logic_vector(7 downto 0);
function nibbletohex(nibble : std_logic_vector(3 downto 0)) return character;
function hextonibble(c : character) return std_logic_vector;
function ishexchar(c : character) return boolean;
procedure vectohex(vec : std_logic_vector; str : out string);
function vectohex(vec : std_logic_vector; len : integer) return string;
procedure getcharfromfile(file myfile : text; l : inout line; stop : out boolean; hex : out character);
procedure getbytefromfile(file myfile : text; l : inout line; fileend : out boolean; dat : out t_byte);
type t_binary_file is file of integer;
type t_binary_file_handle is record
offset : integer range 0 to 4;
longvec : std_logic_vector(31 downto 0);
end record;
constant emptysp : string := " ";
procedure initrecord(rec : inout t_binary_file_handle);
procedure readbyte(file f : t_binary_file; b : out t_byte; rec : inout t_binary_file_handle);
procedure writebyte(file f : t_binary_file; b : in t_byte; rec : inout t_binary_file_handle);
procedure purge(file f : t_binary_file; rec : inout t_binary_file_handle);
procedure onoffchar(l : inout line; ena : std_logic; ch : character);
procedure onoffchar(l : inout line; ena : std_logic; ch, alt : character);
procedure hexout(l : inout line; ena : std_logic; vec : std_logic_vector; len : integer);
procedure write_s(variable li : inout line; s : string);
end;
package body file_io_pkg is
function nibbletohex(nibble : std_logic_vector(3 downto 0)) return character is
variable r : character := '?';
begin
case nibble is
when "0000" => r := '0';
when "0001" => r := '1';
when "0010" => r := '2';
when "0011" => r := '3';
when "0100" => r := '4';
when "0101" => r := '5';
when "0110" => r := '6';
when "0111" => r := '7';
when "1000" => r := '8';
when "1001" => r := '9';
when "1010" => r := 'a';
when "1011" => r := 'b';
when "1100" => r := 'c';
when "1101" => r := 'd';
when "1110" => r := 'e';
when "1111" => r := 'f';
when others => r := 'x';
end case;
return r;
end nibbletohex;
function hextonibble(c : character) return std_logic_vector is
variable z : std_logic_vector(3 downto 0);
begin
case c is
when '0' => z := "0000";
when '1' => z := "0001";
when '2' => z := "0010";
when '3' => z := "0011";
when '4' => z := "0100";
when '5' => z := "0101";
when '6' => z := "0110";
when '7' => z := "0111";
when '8' => z := "1000";
when '9' => z := "1001";
when 'a' => z := "1010";
when 'b' => z := "1011";
when 'c' => z := "1100";
when 'd' => z := "1101";
when 'e' => z := "1110";
when 'f' => z := "1111";
when 'A' => z := "1010";
when 'B' => z := "1011";
when 'C' => z := "1100";
when 'D' => z := "1101";
when 'E' => z := "1110";
when 'F' => z := "1111";
when others => z := "XXXX";
end case;
return z;
end hextonibble;
function ishexchar(c : character) return boolean is
begin
case c is
when '0'|'1'|'2'|'3'|'4'|'5'|'6'|'7' => return true;
when '8'|'9'|'a'|'b'|'c'|'d'|'e'|'f' => return true;
when 'A'|'B'|'C'|'D'|'E'|'F' => return true;
when others => return false;
end case;
return false;
end ishexchar;
procedure vectohex(vec : std_logic_vector; str : out string) is
variable tempvec : std_logic_vector(str'length * 4 downto 1) := (others => '0');
variable j : integer;
variable myvec : std_logic_vector(vec'range);
variable len, mylow, myhigh : integer;
begin
myvec := vec;
len := str'length;
mylow := vec'low;
myhigh := vec'high;
if vec'length < tempvec'length then
tempvec(vec'length downto 1) := vec;
else
tempvec := vec(vec'low + tempvec'length - 1 downto vec'low);
end if;
for i in str'range loop
j := (str'right - i) * 4;
str(i) := nibbletohex(tempvec(j+4 downto j+1));
end loop;
end vectohex;
function vectohex(vec : std_logic_vector; len : integer) return string is
variable str : string(1 to len);
begin
vectohex(vec, str);
return str;
end vectohex;
procedure getcharfromfile(file myfile : text; l : inout line; stop : out boolean; hex : out character) is
variable good : boolean := false;
begin
while not(good) loop
read(l, hex, good);
if not(good) then
if endfile(myfile) then
stop := true;
hex := '1';
return;
end if;
readline(myfile, l);
end if;
end loop;
end getcharfromfile;
procedure getbytefromfile(file myfile : text; l : inout line; fileend : out boolean; dat : out t_byte) is
variable hex : character;
variable d : t_byte;
variable stop : boolean := false;
begin
d := x"00";
l1 : loop
getcharfromfile(myfile, l, stop, hex);
if stop or ishexchar(hex) then
exit l1;
end if;
end loop l1;
d(3 downto 0) := hextonibble(hex);
-- see if we can read another good hex char
getcharfromfile(myfile, l, stop, hex);
if not(stop) and ishexchar(hex) then
d(7 downto 4) := d(3 downto 0);
d(3 downto 0) := hextonibble(hex);
end if;
fileend := stop;
dat := d;
end getbytefromfile;
procedure onoffchar(l : inout line; ena : std_logic; ch : character) is
begin
if ena = '1' then
write(l, ch);
else
write(l, ' ');
end if;
end onoffchar;
procedure onoffchar(l : inout line; ena : std_logic; ch, alt : character) is
begin
if ena = '1' then
write(l, ch);
else
write(l, alt);
end if;
end onoffchar;
procedure hexout(l : inout line; ena : std_logic; vec : std_logic_vector; len : integer) is
begin
if ena = '1' then
write(l, vectohex(vec, len));
else
write(l, emptysp(1 to len));
end if;
end hexout;
procedure initrecord(rec : inout binaryfilerec) is
begin
rec.offset := 0;
rec.longvec := (others => '0');
end procedure;
procedure readbyte(file f : binary_file; b : out t_byte; rec : inout binaryfilerec) is
variable i : integer;
begin
if rec.offset = 0 then
read(f, i);
rec.longvec := std_logic_vector(to_unsigned(i, 32));
end if;
b := rec.longvec(7 downto 0);
rec.longvec := "00000000" & rec.longvec(31 downto 8); -- lsb first
if rec.offset = 3 then
rec.offset := 0;
else
rec.offset := rec.offset + 1;
end if;
end procedure;
procedure writebyte(file f : binary_file; b : in t_byte; rec : inout binaryfilerec) is
variable i : integer;
begin
rec.longvec(31 downto 24) := b;
if rec.offset = 3 then
i := to_integer(unsigned(rec.longvec));
write(f, i);
rec.offset := 0;
else
rec.offset := rec.offset + 1;
rec.longvec := "00000000" & rec.longvec(31 downto 8); -- lsb first
end if;
end procedure;
procedure purge(file f : binary_file; rec : inout binaryfilerec) is
variable i : integer;
begin
if rec.offset /= 0 then
i := to_integer(unsigned(rec.longvec));
write(f, i);
end if;
end procedure;
procedure write_s(variable li : inout line; s : string) is
begin
write(li, s);
end write_s;
end;
|
-------------------------------------------------------------------------------
--
-- (C) COPYRIGHT 2010 - Gideon's Logic Architectures
--
-------------------------------------------------------------------------------
-- Title : file io package
-- Author : Gideon Zweijtzer <[email protected]>
-------------------------------------------------------------------------------
-- Description: File IO routines
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library std;
use std.textio.all;
package file_io_pkg is
subtype t_byte is std_logic_vector(7 downto 0);
function nibbletohex(nibble : std_logic_vector(3 downto 0)) return character;
function hextonibble(c : character) return std_logic_vector;
function ishexchar(c : character) return boolean;
procedure vectohex(vec : std_logic_vector; str : out string);
function vectohex(vec : std_logic_vector; len : integer) return string;
procedure getcharfromfile(file myfile : text; l : inout line; stop : out boolean; hex : out character);
procedure getbytefromfile(file myfile : text; l : inout line; fileend : out boolean; dat : out t_byte);
type t_binary_file is file of integer;
type t_binary_file_handle is record
offset : integer range 0 to 4;
longvec : std_logic_vector(31 downto 0);
end record;
constant emptysp : string := " ";
procedure initrecord(rec : inout t_binary_file_handle);
procedure readbyte(file f : t_binary_file; b : out t_byte; rec : inout t_binary_file_handle);
procedure writebyte(file f : t_binary_file; b : in t_byte; rec : inout t_binary_file_handle);
procedure purge(file f : t_binary_file; rec : inout t_binary_file_handle);
procedure onoffchar(l : inout line; ena : std_logic; ch : character);
procedure onoffchar(l : inout line; ena : std_logic; ch, alt : character);
procedure hexout(l : inout line; ena : std_logic; vec : std_logic_vector; len : integer);
procedure write_s(variable li : inout line; s : string);
end;
package body file_io_pkg is
function nibbletohex(nibble : std_logic_vector(3 downto 0)) return character is
variable r : character := '?';
begin
case nibble is
when "0000" => r := '0';
when "0001" => r := '1';
when "0010" => r := '2';
when "0011" => r := '3';
when "0100" => r := '4';
when "0101" => r := '5';
when "0110" => r := '6';
when "0111" => r := '7';
when "1000" => r := '8';
when "1001" => r := '9';
when "1010" => r := 'a';
when "1011" => r := 'b';
when "1100" => r := 'c';
when "1101" => r := 'd';
when "1110" => r := 'e';
when "1111" => r := 'f';
when others => r := 'x';
end case;
return r;
end nibbletohex;
function hextonibble(c : character) return std_logic_vector is
variable z : std_logic_vector(3 downto 0);
begin
case c is
when '0' => z := "0000";
when '1' => z := "0001";
when '2' => z := "0010";
when '3' => z := "0011";
when '4' => z := "0100";
when '5' => z := "0101";
when '6' => z := "0110";
when '7' => z := "0111";
when '8' => z := "1000";
when '9' => z := "1001";
when 'a' => z := "1010";
when 'b' => z := "1011";
when 'c' => z := "1100";
when 'd' => z := "1101";
when 'e' => z := "1110";
when 'f' => z := "1111";
when 'A' => z := "1010";
when 'B' => z := "1011";
when 'C' => z := "1100";
when 'D' => z := "1101";
when 'E' => z := "1110";
when 'F' => z := "1111";
when others => z := "XXXX";
end case;
return z;
end hextonibble;
function ishexchar(c : character) return boolean is
begin
case c is
when '0'|'1'|'2'|'3'|'4'|'5'|'6'|'7' => return true;
when '8'|'9'|'a'|'b'|'c'|'d'|'e'|'f' => return true;
when 'A'|'B'|'C'|'D'|'E'|'F' => return true;
when others => return false;
end case;
return false;
end ishexchar;
procedure vectohex(vec : std_logic_vector; str : out string) is
variable tempvec : std_logic_vector(str'length * 4 downto 1) := (others => '0');
variable j : integer;
variable myvec : std_logic_vector(vec'range);
variable len, mylow, myhigh : integer;
begin
myvec := vec;
len := str'length;
mylow := vec'low;
myhigh := vec'high;
if vec'length < tempvec'length then
tempvec(vec'length downto 1) := vec;
else
tempvec := vec(vec'low + tempvec'length - 1 downto vec'low);
end if;
for i in str'range loop
j := (str'right - i) * 4;
str(i) := nibbletohex(tempvec(j+4 downto j+1));
end loop;
end vectohex;
function vectohex(vec : std_logic_vector; len : integer) return string is
variable str : string(1 to len);
begin
vectohex(vec, str);
return str;
end vectohex;
procedure getcharfromfile(file myfile : text; l : inout line; stop : out boolean; hex : out character) is
variable good : boolean := false;
begin
while not(good) loop
read(l, hex, good);
if not(good) then
if endfile(myfile) then
stop := true;
hex := '1';
return;
end if;
readline(myfile, l);
end if;
end loop;
end getcharfromfile;
procedure getbytefromfile(file myfile : text; l : inout line; fileend : out boolean; dat : out t_byte) is
variable hex : character;
variable d : t_byte;
variable stop : boolean := false;
begin
d := x"00";
l1 : loop
getcharfromfile(myfile, l, stop, hex);
if stop or ishexchar(hex) then
exit l1;
end if;
end loop l1;
d(3 downto 0) := hextonibble(hex);
-- see if we can read another good hex char
getcharfromfile(myfile, l, stop, hex);
if not(stop) and ishexchar(hex) then
d(7 downto 4) := d(3 downto 0);
d(3 downto 0) := hextonibble(hex);
end if;
fileend := stop;
dat := d;
end getbytefromfile;
procedure onoffchar(l : inout line; ena : std_logic; ch : character) is
begin
if ena = '1' then
write(l, ch);
else
write(l, ' ');
end if;
end onoffchar;
procedure onoffchar(l : inout line; ena : std_logic; ch, alt : character) is
begin
if ena = '1' then
write(l, ch);
else
write(l, alt);
end if;
end onoffchar;
procedure hexout(l : inout line; ena : std_logic; vec : std_logic_vector; len : integer) is
begin
if ena = '1' then
write(l, vectohex(vec, len));
else
write(l, emptysp(1 to len));
end if;
end hexout;
procedure initrecord(rec : inout binaryfilerec) is
begin
rec.offset := 0;
rec.longvec := (others => '0');
end procedure;
procedure readbyte(file f : binary_file; b : out t_byte; rec : inout binaryfilerec) is
variable i : integer;
begin
if rec.offset = 0 then
read(f, i);
rec.longvec := std_logic_vector(to_unsigned(i, 32));
end if;
b := rec.longvec(7 downto 0);
rec.longvec := "00000000" & rec.longvec(31 downto 8); -- lsb first
if rec.offset = 3 then
rec.offset := 0;
else
rec.offset := rec.offset + 1;
end if;
end procedure;
procedure writebyte(file f : binary_file; b : in t_byte; rec : inout binaryfilerec) is
variable i : integer;
begin
rec.longvec(31 downto 24) := b;
if rec.offset = 3 then
i := to_integer(unsigned(rec.longvec));
write(f, i);
rec.offset := 0;
else
rec.offset := rec.offset + 1;
rec.longvec := "00000000" & rec.longvec(31 downto 8); -- lsb first
end if;
end procedure;
procedure purge(file f : binary_file; rec : inout binaryfilerec) is
variable i : integer;
begin
if rec.offset /= 0 then
i := to_integer(unsigned(rec.longvec));
write(f, i);
end if;
end procedure;
procedure write_s(variable li : inout line; s : string) is
begin
write(li, s);
end write_s;
end;
|
--------------------------------------------------------------------------------
-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ / Vendor: Xilinx
-- \ \ \/ Version : 14.7
-- \ \ Application :
-- / / Filename : xil_12112_30
-- /___/ /\ Timestamp : 09/23/2014 15:24:59
-- \ \ / \
-- \___\/\___\
--
--Command:
--Design Name:
--
-- This file just wraps a schematic based symbol with a VHDL wrapper so it will show up in the unused module libaries section instead of the top level in ISE Navigator.
library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;
library UNISIM;
use UNISIM.Vcomponents.ALL;
library DesignLab;
use DesignLab.ALL;
entity edit_library_wrapper is
port ( wishbone_in : in std_logic_vector (100 downto 0);
wishbone_out : out std_logic_vector (100 downto 0);
--Put your external connections here
leds : out std_logic_vector(3 downto 0);
buttons : in std_logic_vector(3 downto 0)
);
end edit_library_wrapper;
architecture BEHAVIORAL of edit_library_wrapper is
COMPONENT edit_library
PORT( wishbone_out : OUT STD_LOGIC_VECTOR (100 DOWNTO 0);
wishbone_in : IN STD_LOGIC_VECTOR (100 DOWNTO 0);
leds : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
buttons : IN STD_LOGIC_VECTOR (3 DOWNTO 0));
END COMPONENT;
begin
VHDL_Wrapper: edit_library PORT MAP(
leds => OPEN
);
end BEHAVIORAL;
|
--------------------------------------------------------------------------------
-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ / Vendor: Xilinx
-- \ \ \/ Version : 14.7
-- \ \ Application :
-- / / Filename : xil_12112_30
-- /___/ /\ Timestamp : 09/23/2014 15:24:59
-- \ \ / \
-- \___\/\___\
--
--Command:
--Design Name:
--
-- This file just wraps a schematic based symbol with a VHDL wrapper so it will show up in the unused module libaries section instead of the top level in ISE Navigator.
library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;
library UNISIM;
use UNISIM.Vcomponents.ALL;
library DesignLab;
use DesignLab.ALL;
entity edit_library_wrapper is
port ( wishbone_in : in std_logic_vector (100 downto 0);
wishbone_out : out std_logic_vector (100 downto 0);
--Put your external connections here
leds : out std_logic_vector(3 downto 0);
buttons : in std_logic_vector(3 downto 0)
);
end edit_library_wrapper;
architecture BEHAVIORAL of edit_library_wrapper is
COMPONENT edit_library
PORT( wishbone_out : OUT STD_LOGIC_VECTOR (100 DOWNTO 0);
wishbone_in : IN STD_LOGIC_VECTOR (100 DOWNTO 0);
leds : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
buttons : IN STD_LOGIC_VECTOR (3 DOWNTO 0));
END COMPONENT;
begin
VHDL_Wrapper: edit_library PORT MAP(
leds => OPEN
);
end BEHAVIORAL;
|
--------------------------------------------------------------------------------
-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ / Vendor: Xilinx
-- \ \ \/ Version : 14.7
-- \ \ Application :
-- / / Filename : xil_12112_30
-- /___/ /\ Timestamp : 09/23/2014 15:24:59
-- \ \ / \
-- \___\/\___\
--
--Command:
--Design Name:
--
-- This file just wraps a schematic based symbol with a VHDL wrapper so it will show up in the unused module libaries section instead of the top level in ISE Navigator.
library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;
library UNISIM;
use UNISIM.Vcomponents.ALL;
library DesignLab;
use DesignLab.ALL;
entity edit_library_wrapper is
port ( wishbone_in : in std_logic_vector (100 downto 0);
wishbone_out : out std_logic_vector (100 downto 0);
--Put your external connections here
leds : out std_logic_vector(3 downto 0);
buttons : in std_logic_vector(3 downto 0)
);
end edit_library_wrapper;
architecture BEHAVIORAL of edit_library_wrapper is
COMPONENT edit_library
PORT( wishbone_out : OUT STD_LOGIC_VECTOR (100 DOWNTO 0);
wishbone_in : IN STD_LOGIC_VECTOR (100 DOWNTO 0);
leds : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
buttons : IN STD_LOGIC_VECTOR (3 DOWNTO 0));
END COMPONENT;
begin
VHDL_Wrapper: edit_library PORT MAP(
leds => OPEN
);
end BEHAVIORAL;
|
--!
--! Copyright 2020 Sergey Khabarov, [email protected]
--!
--! Licensed under the Apache License, Version 2.0 (the "License");
--! you may not use this file except in compliance with the License.
--! You may obtain a copy of the License at
--!
--! http://www.apache.org/licenses/LICENSE-2.0
--!
--! Unless required by applicable law or agreed to in writing, software
--! distributed under the License is distributed on an "AS IS" BASIS,
--! WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
--! See the License for the specific language governing permissions and
--! limitations under the License.
--!
--! Standard library.
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library commonlib;
use commonlib.types_common.all;
--! AMBA system bus specific library.
library ambalib;
--! AXI4 configuration constants.
use ambalib.types_amba4.all;
use ambalib.types_bus0.all; -- TODO: REMOVE ME when update dsu
--! RIVER CPU specific library.
library riverlib;
--! RIVER CPU configuration constants.
use riverlib.river_cfg.all;
--! @brief Declaration of components visible on SoC top level.
package types_river is
-- Number of CPU per one workgroup:
constant CFG_LOG2_CPU_MAX : integer := 2; -- 1=Dual-core (maximum); 2=Quad-core (maximum)
constant CFG_TOTAL_CPU_MAX : integer := 2**CFG_LOG2_CPU_MAX;
-- +1 Coherent SBA debug port (not available in River)
-- +1 ACP coherent port (not available in River)
constant CFG_SLOT_L1_TOTAL : integer := CFG_TOTAL_CPU_MAX + 0;
-- AXI4 with ACE channels
type axi4_l1_out_type is record
aw_valid : std_logic;
aw_bits : axi4_metadata_type;
aw_id : std_logic_vector(CFG_CPU_ID_BITS-1 downto 0);
aw_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
w_valid : std_logic;
w_data : std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
w_last : std_logic;
w_strb : std_logic_vector(L1CACHE_BYTES_PER_LINE-1 downto 0);
w_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
b_ready : std_logic;
ar_valid : std_logic;
ar_bits : axi4_metadata_type;
ar_id : std_logic_vector(CFG_CPU_ID_BITS-1 downto 0);
ar_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
r_ready : std_logic;
-- ACE signals
ar_domain : std_logic_vector(1 downto 0); -- 00=Non-shareable (single master in domain)
ar_snoop : std_logic_vector(3 downto 0); -- Table C3-7:
ar_bar : std_logic_vector(1 downto 0); -- read barrier transaction
aw_domain : std_logic_vector(1 downto 0);
aw_snoop : std_logic_vector(3 downto 0); -- Table C3-8
aw_bar : std_logic_vector(1 downto 0); -- write barrier transaction
ac_ready : std_logic;
cr_valid : std_logic;
cr_resp : std_logic_vector(4 downto 0);
cd_valid : std_logic;
cd_data : std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
cd_last : std_logic;
rack : std_logic;
wack : std_logic;
end record;
constant axi4_l1_out_none : axi4_l1_out_type := (
'0', META_NONE, (others=>'0'), (others => '0'),
'0', (others=>'0'), '0', (others=>'0'), (others => '0'),
'0', '0', META_NONE, (others=>'0'), (others => '0'), '0',
"00", X"0", "00", "00", X"0", "00", '0', '0',
"00000", '0', (others => '0'), '0', '0', '0');
type axi4_l1_in_type is record
aw_ready : std_logic;
w_ready : std_logic;
b_valid : std_logic;
b_resp : std_logic_vector(1 downto 0);
b_id : std_logic_vector(CFG_CPU_ID_BITS-1 downto 0);
b_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
ar_ready : std_logic;
r_valid : std_logic;
r_resp : std_logic_vector(3 downto 0);
r_data : std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
r_last : std_logic;
r_id : std_logic_vector(CFG_CPU_ID_BITS-1 downto 0);
r_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
-- ACE signals
ac_valid : std_logic;
ac_addr : std_logic_vector(CFG_CPU_ADDR_BITS-1 downto 0);
ac_snoop : std_logic_vector(3 downto 0); -- Table C3-19
ac_prot : std_logic_vector(2 downto 0);
cr_ready : std_logic;
cd_ready : std_logic;
end record;
constant axi4_l1_in_none : axi4_l1_in_type := (
'0', '0', '0', AXI_RESP_OKAY, (others=>'0'), (others => '0'),
'0', '0', (others => '0'), (others=>'0'), '0', (others=>'0'), (others => '0'),
'0', (others => '0'), X"0", "000", '0', '0');
type axi4_l1_in_vector is array (0 to CFG_SLOT_L1_TOTAL-1) of axi4_l1_in_type;
type axi4_l1_out_vector is array (0 to CFG_SLOT_L1_TOTAL-1) of axi4_l1_out_type;
-- L2 AXI structure
type axi4_l2_out_type is record
aw_valid : std_logic;
aw_bits : axi4_metadata_type;
aw_id : std_logic_vector(CFG_CPU_ID_BITS-1 downto 0);
aw_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
w_valid : std_logic;
w_data : std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
w_last : std_logic;
w_strb : std_logic_vector(L1CACHE_BYTES_PER_LINE-1 downto 0);
w_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
b_ready : std_logic;
ar_valid : std_logic;
ar_bits : axi4_metadata_type;
ar_id : std_logic_vector(CFG_CPU_ID_BITS-1 downto 0);
ar_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
r_ready : std_logic;
end record;
constant axi4_l2_out_none : axi4_l2_out_type := (
'0', META_NONE, (others=>'0'), (others => '0'),
'0', (others=>'0'), '0', (others=>'0'), (others => '0'),
'0', '0', META_NONE, (others=>'0'), (others => '0'), '0'
);
type axi4_l2_in_type is record
aw_ready : std_logic;
w_ready : std_logic;
b_valid : std_logic;
b_resp : std_logic_vector(1 downto 0);
b_id : std_logic_vector(CFG_CPU_ID_BITS-1 downto 0);
b_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
ar_ready : std_logic;
r_valid : std_logic;
r_resp : std_logic_vector(1 downto 0);
r_data : std_logic_vector(L1CACHE_LINE_BITS-1 downto 0);
r_last : std_logic;
r_id : std_logic_vector(CFG_CPU_ID_BITS-1 downto 0);
r_user : std_logic_vector(CFG_CPU_USER_BITS-1 downto 0);
end record;
constant axi4_l2_in_none : axi4_l2_in_type := (
'0', '0', '0', AXI_RESP_OKAY, (others=>'0'), (others => '0'),
'0', '0', (others => '0'), (others=>'0'), '0', (others=>'0'), (others => '0')
);
-- River Debug port interface
type dport_in_type is record
req_valid : std_logic;
resp_ready : std_logic;
write : std_logic;
addr : std_logic_vector(CFG_DPORT_ADDR_BITS-1 downto 0);
wdata : std_logic_vector(RISCV_ARCH-1 downto 0);
end record;
constant dport_in_none : dport_in_type := (
'0', '1', '0', (others => '0'), (others => '0'));
type dport_in_vector is array (0 to CFG_TOTAL_CPU_MAX-1)
of dport_in_type;
type dport_out_type is record
halted : std_logic;
available : std_logic;
req_ready : std_logic;
resp_valid : std_logic;
rdata : std_logic_vector(RISCV_ARCH-1 downto 0);
end record;
constant dport_out_none : dport_out_type := (
'0', '0', '1', '1', (others => '0'));
type dport_out_vector is array (0 to CFG_TOTAL_CPU_MAX-1)
of dport_out_type;
--! @brief Declaration of the Debug Support Unit with the AXI interface.
--! @details This module provides access to processors CSRs via HostIO bus.
--! @param[in] clk System clock (BUS/CPU clock).
--! @param[in] rstn Reset signal with active LOW level.
--! @param[in] i_axi Slave slot input signals.
--! @param[out] o_axi Slave slot output signals.
--! @param[out] o_dporti Debug port output signals connected to River CPU.
--! @param[in] i_dporto River CPU debug port response signals.
--! @param[out] o_soft_rstn Software reset CPU and interrupt controller. Active HIGH
--! @param[in] i_bus_util_w Write bus access utilization per master statistic
--! @param[in] i_bus_util_r Write bus access utilization per master statistic
component axi_dsu is
generic (
async_reset : boolean := false;
xaddr : integer := 0;
xmask : integer := 16#fffff#
);
port
(
clk : in std_logic;
nrst : in std_logic;
o_cfg : out axi4_slave_config_type;
i_axi : in axi4_slave_in_type;
o_axi : out axi4_slave_out_type;
o_dporti : out dport_in_vector;
i_dporto : in dport_out_vector;
i_dmi_hartsel : in std_logic_vector(CFG_LOG2_CPU_MAX-1 downto 0);
o_dmi_req_valid : out std_logic;
i_dmi_req_ready : in std_logic;
o_dmi_write : out std_logic;
o_dmi_addr : out std_logic_vector(6 downto 0);
o_dmi_wdata : out std_logic_vector(31 downto 0);
i_dmi_resp_valid : in std_logic;
o_dmi_resp_ready : out std_logic;
i_dmi_rdata : in std_logic_vector(31 downto 0);
i_bus_util_w : in std_logic_vector(CFG_BUS0_XMST_TOTAL-1 downto 0);
i_bus_util_r : in std_logic_vector(CFG_BUS0_XMST_TOTAL-1 downto 0)
);
end component;
component dmi_regs is
generic (
async_reset : boolean := false;
cpu_available : integer := 1
);
port
(
clk : in std_logic;
nrst : in std_logic;
-- port[0] connected to JTAG TAP has access to AXI master interface (SBA registers)
i_dmi_jtag_req_valid : in std_logic;
o_dmi_jtag_req_ready : out std_logic;
i_dmi_jtag_write : in std_logic;
i_dmi_jtag_addr : in std_logic_vector(6 downto 0);
i_dmi_jtag_wdata : in std_logic_vector(31 downto 0);
o_dmi_jtag_resp_valid : out std_logic;
i_dmi_jtag_resp_ready : in std_logic;
o_dmi_jtag_rdata : out std_logic_vector(31 downto 0);
-- port[1] connected to DSU doesn't have access to AXI master interface
i_dmi_dsu_req_valid : in std_logic;
o_dmi_dsu_req_ready : out std_logic;
i_dmi_dsu_write : in std_logic;
i_dmi_dsu_addr : in std_logic_vector(6 downto 0);
i_dmi_dsu_wdata : in std_logic_vector(31 downto 0);
o_dmi_dsu_resp_valid : out std_logic;
i_dmi_dsu_resp_ready : in std_logic;
o_dmi_dsu_rdata : out std_logic_vector(31 downto 0);
-- Common signals
o_hartsel : out std_logic_vector(CFG_LOG2_CPU_MAX-1 downto 0);
o_dmstat : out std_logic_vector(1 downto 0);
o_ndmreset : out std_logic; -- non-debug module reset
o_cfg : out axi4_master_config_type;
i_xmsti : in axi4_master_in_type;
o_xmsto : out axi4_master_out_type;
o_dporti : out dport_in_vector;
i_dporto : in dport_out_vector
);
end component;
--! Dport interconnect to switch DSU and DMI access
component ic_dport_2s_1m is
generic (
async_reset : boolean := false
);
port
(
clk : in std_logic;
nrst : in std_logic;
-- Group <=> DMI interface
i_sdport0i : in dport_in_vector;
o_sdport0o : out dport_out_vector;
-- Group <=> DSU interface
i_sdport1i : in dport_in_vector;
o_sdport1o : out dport_out_vector;
-- Group connection
o_mdporti : out dport_in_vector;
i_mdporto : in dport_out_vector
);
end component;
--! @brief RIVER CPU component declaration.
--! @details This module implements Risc-V CPU Core named as
--! "RIVER" with AXI interface.
--! @param[in] xindex AXI master index
--! @param[in] i_rstn Reset signal with active LOW level.
--! @param[in] i_clk System clock (BUS/CPU clock).
--! @param[in] i_msti Bus-to-Master device signals.
--! @param[out] o_msto CachedTile-to-Bus request signals.
--! @param[in] i_ext_irq Interrupts line supported by Rocket chip.
component river_amba is
generic (
memtech : integer;
hartid : integer;
async_reset : boolean;
fpu_ena : boolean;
coherence_ena : boolean;
tracer_ena : boolean
);
port (
i_nrst : in std_logic;
i_clk : in std_logic;
i_msti : in axi4_l1_in_type;
o_msto : out axi4_l1_out_type;
i_dport : in dport_in_type;
o_dport : out dport_out_type;
i_ext_irq : in std_logic
);
end component;
-- Processor stub should be instantiated for unused CPU slot
component river_dummycpu is
port (
o_msto : out axi4_l1_out_type;
o_dport : out dport_out_type;
o_flush_l2 : out std_logic
);
end component;
-- L2 cache dummy implementation. Real L2 implemented in Wasserfall SoC.
component RiverL2Dummy is
generic (
async_reset : boolean := false
);
port (
i_clk : in std_logic;
i_nrst : in std_logic;
-- CPUs Workgroup
i_l1o : in axi4_l1_out_vector;
o_l1i : out axi4_l1_in_vector;
-- System bus
i_l2i : in axi4_l2_in_type;
o_l2o : out axi4_l2_out_type;
i_flush_valid : std_logic
);
end component;
-- Convert L2 cache lines into system bus transactions
component river_l2serdes is
generic (
async_reset : boolean
);
port (
i_nrst : in std_logic;
i_clk : in std_logic;
i_l2o : in axi4_l2_out_type;
o_l2i : out axi4_l2_in_type;
i_msti : in axi4_master_in_type;
o_msto : out axi4_master_out_type
);
end component;
-- River CPU group with L2-cache (stub or real)
component river_workgroup is
generic (
cpunum : integer;
memtech : integer;
async_reset : boolean;
fpu_ena : boolean;
coherence_ena : boolean;
tracer_ena : boolean
);
port (
i_nrst : in std_logic;
i_clk : in std_logic;
i_msti : in axi4_master_in_type;
o_msto : out axi4_master_out_type;
o_mstcfg : out axi4_master_config_type;
i_dport : in dport_in_vector;
o_dport : out dport_out_vector;
i_ext_irq : in std_logic_vector(CFG_TOTAL_CPU_MAX-1 downto 0)
);
end component;
end; -- package body
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003 - 2008, Gaisler Research
-- Copyright (C) 2008 - 2014, Aeroflex Gaisler
-- Copyright (C) 2015 - 2016, Cobham Gaisler
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: rgmii
-- File: rgmii.vhd
-- Author: Fredrik Ringhage - Aeroflex Gaisler
-- Description: GMII to RGMII interface
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library gaisler;
use gaisler.net.all;
use gaisler.misc.all;
library grlib;
use grlib.config_types.all;
use grlib.config.all;
use grlib.amba.all;
use grlib.stdlib.all;
use grlib.devices.all;
library techmap;
use techmap.gencomp.all;
use techmap.allclkgen.all;
library eth;
use eth.grethpkg.all;
entity rgmii is
generic (
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#fff#;
tech : integer := 0;
gmii : integer := 0;
debugmem : integer := 0;
abits : integer := 8;
no_clk_mux : integer := 0;
pirq : integer := 0;
use90degtxclk : integer := 0;
mode100 : integer := 0
);
port (
rstn : in std_ulogic;
gmiii : out eth_in_type;
gmiio : in eth_out_type;
rgmiii : in eth_in_type;
rgmiio : out eth_out_type;
-- APB Status bus
apb_clk : in std_logic;
apb_rstn : in std_logic;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type
);
end ;
architecture rtl of rgmii is
constant REVISION : integer := 1;
constant pconfig : apb_config_type := (
0 => ahb_device_reg ( VENDOR_GAISLER, GAISLER_RGMII, 0, REVISION, pirq),
1 => apb_iobar(paddr, pmask));
type status_vector_type is array(1 downto 0) of std_logic_vector(15 downto 0);
type rgmiiregs is record
clk25_wrap : unsigned(5 downto 0);
clk25_first_edge : unsigned(5 downto 0);
clk25_second_edge : unsigned(5 downto 0);
clk2_5_wrap : unsigned(5 downto 0);
clk2_5_first_edge : unsigned(5 downto 0);
clk2_5_second_edge : unsigned(5 downto 0);
irq : std_logic_vector(15 downto 0); -- interrupt
mask : std_logic_vector(15 downto 0); -- interrupt enable
clkedge : std_logic_vector(23 downto 0);
rxctrl_q1_delay : std_logic_vector(1 downto 0);
rxctrl_q2_delay : std_logic_vector(1 downto 0);
rxctrl_q1_sel : std_logic;
rxctrl_delay : std_logic;
rxctrl_c_delay : std_logic;
status_vector : status_vector_type;
end record;
-- Global signal
signal vcc, gnd : std_ulogic;
signal tx_en, tx_ctl : std_ulogic;
signal txd : std_logic_vector(7 downto 0);
signal rxd, rxd_pre, rxd_int, rxd_int0, rxd_int1, rxd_int2,rxd_q1,rxd_q2 : std_logic_vector(7 downto 0);
signal rx_clk, nrx_clk : std_ulogic;
signal rx_dv, rx_dv_pre, rx_dv_int, rx_dv0 , rx_ctl, rx_ctl_pre, rx_ctl_int, rx_ctl0, rx_error : std_logic;
signal rx_dv_int0, rx_dv_int1, rx_dv_int2 : std_logic;
signal rx_ctl_int0, rx_ctl_int1, rx_ctl_int2 : std_logic;
signal clk50i, clk50d, clk25i, clk25ni, clk2_5i, clk2_5ni : std_ulogic;
signal txp, txn, txp_sync, txn_sync, tx_clk_ddr, tx_clk, tx_clki, ntx_clk : std_ulogic;
signal cnt2_5, cnt25 : unsigned(5 downto 0);
signal rsttxclkn,rsttxclk,rsttxclk90n,rsttxclk90 : std_logic;
-- RGMII Inband status signals
signal inbandopt,inbandreq : std_logic;
signal link_status : std_logic;
signal clock_speed : std_logic_vector(1 downto 0);
signal duplex_status : std_logic;
signal false_carrier_ind : std_logic;
signal carrier_ext : std_logic;
signal carrier_ext_error : std_logic;
signal carrier_sense : std_logic;
-- Status signals and Clock domain crossing
signal line_status_vector : std_logic_vector(3 downto 0);
signal status_vector : std_logic_vector(15 downto 0);
signal status_vector_sync : std_logic_vector(15 downto 0);
-- APB and RGMII control register
constant RESET_ALL : boolean := GRLIB_CONFIG_ARRAY(grlib_sync_reset_enable_all) = 1;
-- notech default settings
constant RES : rgmiiregs :=
( clk25_wrap => to_unsigned(4,6), clk25_first_edge => to_unsigned(1,6), clk25_second_edge => to_unsigned(2,6),
clk2_5_wrap => to_unsigned(49,6), clk2_5_first_edge => to_unsigned(23,6), clk2_5_second_edge => to_unsigned(24,6),
irq => (others => '0'), mask => (others => '0'), clkedge => "000000100011100000111000",
rxctrl_q1_delay => (others => '0'), rxctrl_q2_delay => (others => '0'), rxctrl_q1_sel => '0', rxctrl_delay => '0',
rxctrl_c_delay => '0', status_vector => (others => (others => '0')) );
-- Kintex7 settings for KC705 Dev Board
constant RES_kintex7 : rgmiiregs :=
( clk25_wrap => to_unsigned(4,6), clk25_first_edge => to_unsigned(1,6), clk25_second_edge => to_unsigned(2,6),
clk2_5_wrap => to_unsigned(49,6), clk2_5_first_edge => to_unsigned(23,6), clk2_5_second_edge => to_unsigned(24,6),
irq => (others => '0'), mask => (others => '0'), clkedge => "000000100011100000111000",
rxctrl_q1_delay => (others => '0'), rxctrl_q2_delay => (others => '0'), rxctrl_q1_sel => '1', rxctrl_delay => '0',
rxctrl_c_delay => '0', status_vector => (others => (others => '0')) );
-- Spartan6 settings for GR-XC6 Dev Board
constant RES_spartan6 : rgmiiregs :=
( clk25_wrap => to_unsigned(4,6), clk25_first_edge => to_unsigned(1,6), clk25_second_edge => to_unsigned(2,6),
clk2_5_wrap => to_unsigned(49,6), clk2_5_first_edge => to_unsigned(23,6), clk2_5_second_edge => to_unsigned(24,6),
irq => (others => '0'), mask => (others => '0'), clkedge => "000000100011100000111000",
rxctrl_q1_delay => (others => '0'), rxctrl_q2_delay => "01", rxctrl_q1_sel => '1', rxctrl_delay => '0',
rxctrl_c_delay => '0', status_vector => (others => (others => '0')) );
-- Artix7 settings for AC701 Dev Board
constant RES_artix7 : rgmiiregs :=
( clk25_wrap => to_unsigned(4,6), clk25_first_edge => to_unsigned(1,6), clk25_second_edge => to_unsigned(2,6),
clk2_5_wrap => to_unsigned(49,6), clk2_5_first_edge => to_unsigned(23,6), clk2_5_second_edge => to_unsigned(24,6),
irq => (others => '0'), mask => (others => '0'), clkedge => "000000100011100000111000",
rxctrl_q1_delay => (others => '0'), rxctrl_q2_delay => (others => '0'), rxctrl_q1_sel => '1', rxctrl_delay => '0',
rxctrl_c_delay => '1', status_vector => (others => (others => '0')) );
signal r, rin : rgmiiregs;
signal clk_tx_90_n : std_logic;
signal sync_gbit : std_logic;
signal sync_speed : std_logic;
signal cnt2_5_en, cnt25_en : std_logic;
signal clkedge_sync : std_logic_vector(23 downto 0);
signal sync_rxctrl_q1_delay : std_logic_vector(1 downto 0);
signal sync_rxctrl_q2_delay : std_logic_vector(1 downto 0);
signal sync_rxctrl_q1_sel : std_logic;
signal sync_rxctrl_delay : std_logic;
signal sync_rxctrl_c_delay : std_logic;
signal cnt_en : std_logic;
signal clk10_100 : std_logic;
signal clk25_wrap_sync : unsigned(5 downto 0);
signal clk25_first_edge_sync : unsigned(5 downto 0);
signal clk25_second_edge_sync : unsigned(5 downto 0);
signal clk2_5_wrap_sync : unsigned(5 downto 0);
signal clk2_5_first_edge_sync : unsigned(5 downto 0);
signal clk2_5_second_edge_sync : unsigned(5 downto 0);
-- debug signal
signal WMemRgmiioData : std_logic_vector(15 downto 0);
signal RMemRgmiioData : std_logic_vector(15 downto 0);
signal RMemRgmiioAddr : std_logic_vector(9 downto 0);
signal WMemRgmiioAddr : std_logic_vector(9 downto 0);
signal WMemRgmiioWrEn : std_logic;
signal WMemRgmiiiData : std_logic_vector(15 downto 0);
signal RMemRgmiiiData : std_logic_vector(15 downto 0);
signal RMemRgmiiiAddr : std_logic_vector(9 downto 0);
signal WMemRgmiiiAddr : std_logic_vector(9 downto 0);
signal WMemRgmiiiWrEn : std_logic;
signal RMemRgmiiiRead : std_logic;
signal RMemRgmiioRead : std_logic;
signal clk25i_del : std_logic;
signal clk2_5i_del : std_logic;
signal clk10_100_del : std_logic;
signal tx_clki_del : std_logic;
signal tx_clk_del : std_logic;
signal ntx_clk_del : std_logic;
begin -- rtl
vcc <= '1'; gnd <= '0';
---------------------------------------------------------------------------------------
-- MDIO path
---------------------------------------------------------------------------------------
gmiii.mdint <= rgmiii.mdint;
gmiii.mdio_i <= rgmiii.mdio_i;
rgmiio.mdio_o <= gmiio.mdio_o;
rgmiio.mdio_oe <= gmiio.mdio_oe;
rgmiio.mdc <= gmiio.mdc;
---------------------------------------------------------------------------------------
-- TX path
---------------------------------------------------------------------------------------
useclkmux0 : if no_clk_mux = 0 generate
usemode100 : if mode100 = 1 generate
process (apb_clk)
begin -- process
if rising_edge(apb_clk) then
clk50i <= not clk50i;
if apb_rstn = '0' then clk50i <= '0'; end if;
end if;
end process;
process (apb_clk)
begin -- process
if rising_edge(apb_clk) then
clk50d <= clk50i;
if (clk50d = '1' and clk50i = '0') then
clk25i_del <= not clk25i_del;
end if;
if (clk50d = '0' and clk50i = '1') then
clk25i <= not clk25i;
if cnt2_5 = "001001" then
cnt2_5 <= "000000"; clk2_5i_del <= not clk2_5i_del;
else
cnt2_5 <= cnt2_5 + 1;
end if;
if cnt2_5 = "000111" then
clk2_5i <= not clk2_5i;
end if;
end if;
if apb_rstn = '0' then clk50d <= '0'; clk25i <= '0'; clk2_5i <= '0'; cnt2_5 <= "000000"; clk25i_del <= '0'; clk2_5i_del <= '0'; end if;
end if;
end process;
end generate;
usemodeAPB : if mode100 = 0 generate
process (apb_clk)
begin -- process
if rising_edge(apb_clk) then
clk25i <= not clk25i;
if cnt2_5 = "001001" then cnt2_5 <= "000000"; clk2_5i <= not clk2_5i;
else cnt2_5 <= cnt2_5 + 1; end if;
if apb_rstn = '0' then clk25i <= '0'; clk2_5i <= '0'; cnt2_5 <= "000000"; end if;
end if;
end process;
end generate;
notecclkmux : if (has_clkmux(tech) = 0) generate
tx_clki <= rgmiii.gtx_clk when ((gmii = 1) and (gmiio.gbit = '1')) else
clk25i when gmiio.speed = '1' else clk2_5i;
end generate;
tecclkmux : if (has_clkmux(tech) = 1) generate
-- Select 2.5 or 25 Mhz clockL
clkmux10_100 : clkmux generic map (tech => tech) port map (clk2_5i,clk25i,gmiio.speed,clk10_100);
clkmux1000 : clkmux generic map (tech => tech) port map (clk10_100,rgmiii.gtx_clk,gmiio.gbit,tx_clki);
clkmux10_100d : clkmux generic map (tech => tech) port map (clk2_5i_del,clk25i_del,gmiio.speed,clk10_100_del);
clkmux1000d : clkmux generic map (tech => tech) port map (clk10_100_del,rgmiii.gtx_clk,gmiio.gbit,tx_clki_del);
end generate;
clkbuf0: techbuf generic map (buftype => 2, tech => tech)
port map (i => tx_clki, o => tx_clk);
clkbuf01: techbuf generic map (buftype => 2, tech => tech)
port map (i => tx_clki_del, o => tx_clk_del);
end generate;
noclkmux0 : if no_clk_mux = 1 generate
-- Generate transmit clocks.
tx_clk <= rgmiii.gtx_clk;
-- CDC
syncreg7 : syncreg port map (tx_clk, gmiio.gbit , sync_gbit );
syncreg8 : syncreg port map (tx_clk, gmiio.speed, sync_speed );
syncreg_clkedge : for i in 0 to r.clkedge'length-1 generate
syncreg9 : syncreg port map (tx_clk, r.clkedge(i), clkedge_sync(i));
end generate;
syncreg_clk25_wrap_sync : for i in 0 to r.clk25_wrap'length-1 generate
syncreg_clk25_wrap_sync : syncreg port map (tx_clk, r.clk25_wrap(i), clk25_wrap_sync(i));
end generate;
syncreg_clk25_first_edge : for i in 0 to r.clk25_first_edge'length-1 generate
syncreg_clk25_first_edge : syncreg port map (tx_clk, r.clk25_first_edge(i), clk25_first_edge_sync(i));
end generate;
syncreg_clk25_second_edge : for i in 0 to r.clk25_second_edge'length-1 generate
syncreg_clk25_second_edge : syncreg port map (tx_clk, r.clk25_second_edge(i), clk25_second_edge_sync(i));
end generate;
syncreg_clk2_5_wrap_sync : for i in 0 to r.clk2_5_wrap'length-1 generate
syncreg_clk2_5_wrap_sync : syncreg port map (tx_clk, r.clk2_5_wrap(i), clk2_5_wrap_sync(i));
end generate;
syncreg_clk2_5_first_edge : for i in 0 to r.clk2_5_first_edge'length-1 generate
syncreg_clk2_5_first_edge : syncreg port map (tx_clk, r.clk2_5_first_edge(i), clk2_5_first_edge_sync(i));
end generate;
syncreg_clk2_5_second_edge : for i in 0 to r.clk2_5_second_edge'length-1 generate
syncreg_clk2_5_second_edge : syncreg port map (tx_clk, r.clk2_5_second_edge(i), clk2_5_second_edge_sync(i));
end generate;
process (tx_clk)
begin -- process
if rising_edge(tx_clk) then
if cnt25 >= clk25_wrap_sync then
cnt25 <= to_unsigned(0,cnt25'length);
cnt25_en <= '1';
else
cnt25_en <= '0';
cnt25 <= cnt25 + 1;
end if;
if (cnt25 >= clk25_wrap_sync) then
clk25ni <= clkedge_sync(0);
clk25i <= clkedge_sync(1);
elsif (cnt25 = clk25_first_edge_sync) then
clk25ni <= clkedge_sync(2);
clk25i <= clkedge_sync(3);
elsif (cnt25 = clk25_second_edge_sync) then
clk25ni <= clkedge_sync(4);
clk25i <= clkedge_sync(5);
end if;
if cnt2_5 >= clk2_5_wrap_sync then
cnt2_5 <= to_unsigned(0,cnt2_5'length);
cnt2_5_en <= '1';
else
cnt2_5 <= cnt2_5 + 1;
cnt2_5_en <= '0';
end if;
if (cnt2_5 >= clk2_5_wrap_sync) then
clk2_5ni <= clkedge_sync(8);
clk2_5i <= clkedge_sync(9);
elsif (cnt25 = clk2_5_first_edge_sync) then
clk2_5ni <= clkedge_sync(10);
clk2_5i <= clkedge_sync(11);
elsif (cnt2_5 = clk2_5_second_edge_sync) then
clk2_5ni <= clkedge_sync(12);
clk2_5i <= clkedge_sync(13);
end if;
if rsttxclkn = '0' then
cnt2_5_en <= '0'; cnt25_en <= '0'; clk25i <= '0'; clk25ni <= '0';
clk2_5i <= '0'; clk2_5ni <= '0'; cnt2_5 <= to_unsigned(0,cnt2_5'length);
cnt25 <= to_unsigned(0,cnt25'length);
end if;
end if;
end process;
end generate;
ntx_clk <= not tx_clk;
ntx_clk_del <= not tx_clk_del;
gmiii.gtx_clk <= tx_clk;
gmiii.tx_clk <= tx_clk;
noclkmux1 : if no_clk_mux = 1 generate
cnt_en <= '1' when ((gmii = 1) and (sync_gbit = '1')) else
cnt25_en when sync_speed = '1' else cnt2_5_en;
end generate;
useclkmux1 : if no_clk_mux = 0 generate
cnt_en <= '1';
end generate;
gmiii.tx_dv <= cnt_en when gmiio.tx_en = '1' else '1';
-- Generate RGMII control signal and check data rate
process (tx_clk)
begin -- process
if rising_edge(tx_clk) then
if (gmii = 1) and (sync_gbit = '1') then
txd(7 downto 0) <= gmiio.txd(7 downto 0);
else
txd(3 downto 0) <= gmiio.txd(3 downto 0);
txd(7 downto 4) <= gmiio.txd(3 downto 0);
end if;
tx_en <= gmiio.tx_en;
tx_ctl <= gmiio.tx_en xor gmiio.tx_er;
end if;
if (gmii = 1) and (sync_gbit = '1') then
txp <= clkedge_sync(17);
txn <= clkedge_sync(16);
else
if sync_speed = '1' then
txp <= clk25ni;
txn <= clk25i;
else
txp <= clk2_5ni;
txn <= clk2_5i;
end if;
end if;
end process;
clk_tx_rst : rstgen
generic map(syncin => 1, syncrst => 1)
port map(rstn, tx_clk, vcc, rsttxclkn, open);
rsttxclk <= not rsttxclkn;
-- DDR outputs
rgmii_txd : for i in 0 to 3 generate
ddr_oreg0 : ddr_oreg generic map (tech, arch => 1)
port map (q => rgmiio.txd(i), c1 => tx_clk, c2 => ntx_clk, ce => vcc,
d1 => txd(i), d2 => txd(i+4), r => rsttxclk, s => gnd);
end generate;
rgmii_tx_ctl : ddr_oreg generic map (tech, arch => 1)
port map (q => rgmiio.tx_en, c1 => tx_clk, c2 => ntx_clk, ce => vcc,
d1 => tx_en, d2 => tx_ctl, r => rsttxclk, s => gnd);
no_clk_mux1 : if no_clk_mux = 1 generate
use90degtxclk1 : if use90degtxclk = 1 generate
clk_tx90_rst : rstgen
generic map(syncin => 1, syncrst => 1)
port map(rstn, rgmiii.tx_clk_90, vcc, rsttxclk90n, open);
rsttxclk90 <= not rsttxclk90n;
clk_tx_90_n <= not rgmiii.tx_clk_90;
syncreg_txp : syncreg port map (rgmiii.tx_clk_90, txp, txp_sync);
syncreg_txn : syncreg port map (rgmiii.tx_clk_90, txn, txn_sync);
rgmii_tx_clk : ddr_oreg generic map (tech, arch => 1)
port map (q => tx_clk_ddr, c1 => rgmiii.tx_clk_90, c2 => clk_tx_90_n, ce => vcc,
d1 => txp_sync, d2 => txn_sync, r => rsttxclk90, s => gnd);
end generate;
use90degtxclk0 : if use90degtxclk = 0 generate
rgmii_tx_clk : ddr_oreg generic map (tech, arch => 1)
port map (q => tx_clk_ddr, c1 => tx_clk, c2 => ntx_clk, ce => vcc,
d1 => txp, d2 => txn, r => rsttxclk, s => gnd);
end generate;
end generate;
no_clk_mux0 : if no_clk_mux = 0 generate
use90degtxclk00 : if mode100 = 1 generate
rgmii_tx_clk : ddr_oreg generic map (tech, arch => 1)
port map (q => tx_clk_ddr, c1 => tx_clk_del, c2 => ntx_clk_del, ce => vcc,
d1 => '1', d2 => '0', r => rsttxclk, s => gnd);
end generate;
use90degtxclk01 : if mode100 = 0 generate
rgmii_tx_clk : ddr_oreg generic map (tech, arch => 1)
port map (q => tx_clk_ddr, c1 => tx_clk, c2 => ntx_clk, ce => vcc,
d1 => '1', d2 => '0', r => rsttxclk, s => gnd);
end generate;
end generate;
rgmiio.tx_er <= '0';
rgmiio.tx_clk <= tx_clk_ddr;
rgmiio.reset <= rstn;
rgmiio.gbit <= gmiio.gbit;
rgmiio.speed <= gmiio.speed when (gmii = 1) else '0';
-- Not used in RGMII mode
rgmiio.txd(7 downto 4) <= (others => '0');
---------------------------------------------------------------------------------------
-- RX path
---------------------------------------------------------------------------------------
-- CDC (RX Control signal)
syncreg_q1_delay : for i in 0 to r.rxctrl_q1_delay'length-1 generate
syncreg0 : syncreg port map (rx_clk, r.rxctrl_q1_delay(i), sync_rxctrl_q1_delay(i));
end generate;
syncreg_q2_delay : for i in 0 to r.rxctrl_q2_delay'length-1 generate
syncreg1 : syncreg port map (rx_clk, r.rxctrl_q2_delay(i) , sync_rxctrl_q2_delay(i));
end generate;
syncreg_q1_sel : syncreg port map (rx_clk, r.rxctrl_q1_sel, sync_rxctrl_q1_sel);
syncreg_delay_sel : syncreg port map (rx_clk, r.rxctrl_delay, sync_rxctrl_delay);
syncreg_delay_c_sel : syncreg port map (rx_clk, r.rxctrl_c_delay, sync_rxctrl_c_delay);
-- Rx Clocks
rx_clk <= rgmiii.rx_clk;
nrx_clk <= not rgmiii.rx_clk;
-- DDR inputs
rgmii_rxd : for i in 0 to 3 generate
ddr_ireg0 : ddr_ireg generic map (tech, arch => 1)
port map (q1 => rxd_pre(i), q2 => rxd_pre(i+4), c1 => rx_clk, c2 => nrx_clk,
ce => vcc, d => rgmiii.rxd(i), r => gnd, s => gnd);
process (rx_clk)
begin
if rising_edge(rx_clk) then
rxd_int <= rxd_pre;
rxd_int0(i) <= rxd_int(i);
rxd_int0(i+4) <= rxd_int(i+4);
rxd_int1(i) <= rxd_int0(i);
rxd_int1(i+4) <= rxd_int0(i+4);
rxd_int2(i) <= rxd_int1(i);
rxd_int2(i+4) <= rxd_int1(i+4);
end if;
end process;
end generate;
rgmii_rxd0 : for i in 0 to 3 generate
process (rx_clk)
begin
if (sync_rxctrl_q1_delay = "00") then
if (sync_rxctrl_delay = '1') then
rxd_q1(i) <= rxd_int(i+4);
else
rxd_q1(i) <= rxd_int(i);
end if;
elsif (sync_rxctrl_q1_delay = "01") then
rxd_q1(i) <= rxd_int0(i);
elsif (sync_rxctrl_q1_delay = "10") then
rxd_q1(i) <= rxd_int1(i);
else
rxd_q1(i) <= rxd_int2(i);
end if;
end process;
end generate;
rgmii_rxd1 : for i in 4 to 7 generate
process (rx_clk)
begin
if (sync_rxctrl_q2_delay = "00") then
if (sync_rxctrl_delay = '1') then
rxd_q2(i) <= rxd_int0(i-4);
else
rxd_q2(i) <= rxd_int(i);
end if;
elsif (sync_rxctrl_q2_delay = "01") then
rxd_q2(i) <= rxd_int0(i);
elsif (sync_rxctrl_q2_delay = "10") then
rxd_q2(i) <= rxd_int1(i);
else
rxd_q2(i) <= rxd_int2(i);
end if;
end process;
end generate;
rxd(3 downto 0) <= rxd_q1(3 downto 0) when (sync_rxctrl_q1_sel = '0') else rxd_q2(7 downto 4);
rxd(7 downto 4) <= rxd_q2(7 downto 4) when (sync_rxctrl_q1_sel = '0') else rxd_q1(3 downto 0);
ddr_dv0 : ddr_ireg generic map (tech, arch => 1)
port map (q1 => rx_dv_pre, q2 => rx_ctl_pre, c1 => rx_clk, c2 => nrx_clk,
ce => vcc, d => rgmiii.rx_dv, r => gnd, s => gnd);
process (rx_clk)
begin
if rising_edge(rx_clk) then
rx_ctl_int <= rx_ctl_pre;
rx_dv_int <= rx_dv_pre;
rx_ctl_int0 <= rx_ctl_int;
rx_ctl_int1 <= rx_ctl_int0;
rx_ctl_int2 <= rx_ctl_int1;
rx_dv_int0 <= rx_dv_int;
rx_dv_int1 <= rx_dv_int0;
rx_dv_int2 <= rx_dv_int2;
end if;
end process;
process (rx_clk)
begin
if (sync_rxctrl_q1_delay = "00") then
--rx_dv0 <= rx_dv_int;
if (sync_rxctrl_c_delay = '1') then
rx_dv0 <= rx_ctl_int;
else
rx_dv0 <= rx_dv_int;
end if;
elsif (sync_rxctrl_q1_delay = "01") then
rx_dv0 <= rx_dv_int0;
elsif (sync_rxctrl_q1_delay = "10") then
rx_dv0 <= rx_dv_int1;
else
rx_dv0 <= rx_dv_int2;
end if;
if (sync_rxctrl_q2_delay = "00") then
--rx_ctl0 <= rx_ctl_int;
if (sync_rxctrl_c_delay = '1') then
rx_ctl0 <= rx_dv_int0;
else
rx_ctl0 <= rx_ctl_int;
end if;
elsif (sync_rxctrl_q2_delay = "01") then
rx_ctl0 <= rx_ctl_int0;
elsif (sync_rxctrl_q2_delay = "10") then
rx_ctl0 <= rx_ctl_int1;
else
rx_ctl0 <= rx_ctl_int2;
end if;
end process;
rx_dv <= rx_dv0 when (sync_rxctrl_q1_sel = '0') else rx_ctl0;
rx_ctl <= rx_ctl0 when (sync_rxctrl_q1_sel = '0') else rx_dv0;
-- Decode GMII error signal
rx_error <= rx_dv xor rx_ctl;
-- Enable inband status registers during Interframe Gap
inbandopt <= not ( rx_dv or rx_error );
inbandreq <= rx_error and not rx_dv;
-- Sample RGMII inband information
process (rx_clk)
begin
if rising_edge(rx_clk) then
if (inbandopt = '1') then
link_status <= rxd(0);
clock_speed <= rxd(2 downto 1);
duplex_status <= rxd(3);
end if;
if (inbandreq = '1') then
if (rxd = x"0E") then false_carrier_ind <= '1'; else false_carrier_ind <= '0'; end if;
if (rxd = x"0F") then carrier_ext <= '1'; else carrier_ext <= '0'; end if;
if (rxd = x"1F") then carrier_ext_error <= '1'; else carrier_ext_error <= '0'; end if;
if (rxd = x"FF") then carrier_sense <= '1'; else carrier_sense <= '0'; end if;
end if;
end if;
end process;
-- GMII output
gmiii.rxd <= rxd;
gmiii.rx_dv <= rx_dv;
gmiii.rx_er <= rx_error;
gmiii.rx_clk <= rx_clk;
gmiii.rx_col <= '0';
gmiii.rx_crs <= rx_dv;
gmiii.rmii_clk <= '0';
gmiii.rx_en <= '1';
-- GMII output controlled via generics
gmiii.edclsepahb <= '0';
gmiii.edcldisable <= '0';
gmiii.phyrstaddr <= (others => '0');
gmiii.edcladdr <= (others => '0');
---------------------------------------------------------------------------------------
-- APB Section
---------------------------------------------------------------------------------------
apbo.pindex <= pindex;
apbo.pconfig <= pconfig;
-- Status Register
status_vector_sync(15) <= '1' when (no_clk_mux = 1) else '0';
status_vector_sync(14) <= '1' when (debugmem = 1 ) else '0';
status_vector_sync(13) <= '1' when (gmii = 1 ) else '0';
status_vector_sync(12 downto 10) <= (others => '0');
status_vector_sync(9) <= gmiio.gbit;
status_vector_sync(8) <= gmiio.speed;
status_vector_sync(7) <= carrier_sense;
status_vector_sync(6) <= carrier_ext_error;
status_vector_sync(5) <= carrier_ext;
status_vector_sync(4) <= false_carrier_ind;
status_vector_sync(3) <= duplex_status;
status_vector_sync(2) <= clock_speed(1);
status_vector_sync(1) <= clock_speed(0);
status_vector_sync(0) <= link_status;
-- CDC clock domain crossing
syncreg_status : for i in 0 to status_vector'length-1 generate
syncreg3 : syncreg port map (tx_clk, status_vector_sync(i), status_vector(i));
end generate;
rgmiiapb : process(apb_rstn, r, apbi, RMemRgmiiiData, RMemRgmiiiRead, RMemRgmiioRead, status_vector )
variable rdata : std_logic_vector(31 downto 0);
variable paddress : std_logic_vector(7 downto 2);
variable v : rgmiiregs;
begin
v := r;
paddress := (others => '0');
paddress(abits-1 downto 2) := apbi.paddr(abits-1 downto 2);
rdata := (others => '0');
v.status_vector(1) := r.status_vector(0);
v.status_vector(0) := status_vector;
-- read/write registers
if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then
case paddress(7 downto 2) is
when "000000" =>
rdata(15 downto 0) := r.status_vector(0);
when "000001" =>
rdata(15 downto 0) := r.irq;
v.irq := (others => '0'); -- Interrupt is clear on read
when "000010" =>
rdata(15 downto 0) := r.mask;
when "000011" =>
rdata(5 downto 0) := std_logic_vector(r.clk25_wrap);
when "000100" =>
rdata(5 downto 0) := std_logic_vector(r.clk25_first_edge);
when "000101" =>
rdata(5 downto 0) := std_logic_vector(r.clk25_second_edge);
when "000110" =>
rdata(5 downto 0) := std_logic_vector(r.clk2_5_wrap);
when "000111" =>
rdata(5 downto 0) := std_logic_vector(r.clk2_5_first_edge);
when "001000" =>
rdata(5 downto 0) := std_logic_vector(r.clk2_5_second_edge);
when "001001" =>
rdata(23 downto 0) := r.clkedge;
when "001010" =>
rdata(1 downto 0) := v.rxctrl_q2_delay;
when "001011" =>
rdata(1 downto 0) := v.rxctrl_q1_delay;
when "001100" =>
rdata(0) := v.rxctrl_q1_sel;
when "001101" =>
rdata(0) := v.rxctrl_delay;
when "001110" =>
rdata(0) := v.rxctrl_c_delay;
when others =>
null;
end case;
end if;
if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then
case paddress(7 downto 2) is
when "000000" =>
null;
when "000001" =>
null;
when "000010" =>
v.mask := apbi.pwdata(15 downto 0);
when "000011" =>
v.clk25_wrap := unsigned(apbi.pwdata(5 downto 0));
when "000100" =>
v.clk25_first_edge := unsigned(apbi.pwdata(5 downto 0));
when "000101" =>
v.clk25_second_edge := unsigned(apbi.pwdata(5 downto 0));
when "000110" =>
v.clk2_5_wrap := unsigned(apbi.pwdata(5 downto 0));
when "000111" =>
v.clk2_5_first_edge := unsigned(apbi.pwdata(5 downto 0));
when "001000" =>
v.clk2_5_second_edge := unsigned(apbi.pwdata(5 downto 0));
when "001001" =>
v.clkedge := apbi.pwdata(23 downto 0);
when "001010" =>
v.rxctrl_q2_delay := apbi.pwdata(1 downto 0);
when "001011" =>
v.rxctrl_q1_delay := apbi.pwdata(1 downto 0);
when "001100" =>
v.rxctrl_q1_sel := apbi.pwdata(0);
when "001101" =>
v.rxctrl_delay := apbi.pwdata(0);
when "001110" =>
v.rxctrl_c_delay := apbi.pwdata(0);
when others =>
null;
end case;
end if;
-- Check interrupts
for i in 0 to r.status_vector'length-1 loop
if ((r.status_vector(0)(i) xor r.status_vector(1)(i)) and r.mask(i)) = '1' then
v.irq(i) := '1';
end if;
end loop;
-- reset operation
if (not RESET_ALL) and (apb_rstn = '0') then
if (tech = kintex7) then
v := RES_kintex7;
elsif (tech = spartan6) then
v := RES_spartan6;
elsif (tech = artix7) then
v := RES_artix7;
else
v := RES;
end if;
end if;
-- update registers
rin <= v;
-- drive outputs
if apbi.psel(pindex) = '0' then
apbo.prdata <= (others => '0');
elsif RMemRgmiiiRead = '1' then
apbo.prdata(31 downto 16) <= (others => '0');
apbo.prdata(15 downto 0) <= RMemRgmiiiData;
elsif RMemRgmiioRead = '1' then
apbo.prdata(31 downto 16) <= (others => '0');
apbo.prdata(15 downto 0) <= RMemRgmiioData;
else
apbo.prdata <= rdata;
end if;
apbo.pirq <= (others => '0');
apbo.pirq(pirq) <= orv(v.irq);
end process;
regs : process(apb_clk)
begin
if rising_edge(apb_clk) then
r <= rin;
if RESET_ALL and apb_rstn = '0' then
if (tech = kintex7) then
r <= RES_kintex7;
elsif (tech = spartan6) then
r <= RES_spartan6;
else
r <= RES;
end if;
end if;
end if;
end process;
---------------------------------------------------------------------------------------
-- Debug Mem
---------------------------------------------------------------------------------------
debugmem1 : if (debugmem /= 0) generate
-- Write GMII IN data
process (tx_clk)
begin -- process
if rising_edge(tx_clk) then
WMemRgmiioData(15 downto 0) <= "000" & tx_en & "000" & tx_ctl & txd;
if (tx_en = '1') and ((WMemRgmiioAddr < "0111111110") or (WMemRgmiioAddr = "1111111111")) then
WMemRgmiioAddr <= WMemRgmiioAddr + 1;
WMemRgmiioWrEn <= '1';
else
if (tx_en = '0') then
WMemRgmiioAddr <= (others => '1');
else
WMemRgmiioAddr <= WMemRgmiioAddr;
end if;
WMemRgmiioWrEn <= '0';
end if;
end if;
end process;
-- Read
RMemRgmiioRead <= apbi.paddr(10) and apbi.psel(pindex);
RMemRgmiioAddr <= "00" & apbi.paddr(10-1 downto 2);
gmiii0 : syncram_2p generic map (tech, 10, 16, 1, 0, 0) port map(
apb_clk, RMemRgmiioRead, RMemRgmiioAddr, RMemRgmiioData,
tx_clk, WMemRgmiioWrEn, WMemRgmiioAddr(10-1 downto 0), WMemRgmiioData);
-- Write GMII IN data
process (rx_clk)
begin -- process
if rising_edge(rx_clk) then
WMemRgmiiiData(15 downto 0) <= "000" & rx_dv & "000" & rx_ctl & rxd(7 downto 4) & rxd(3 downto 0);
if ((rx_dv = '1') or (rx_ctl = '1')) and ((WMemRgmiiiAddr < "0111111110") or (WMemRgmiiiAddr = "1111111111")) then
WMemRgmiiiAddr <= WMemRgmiiiAddr + 1;
WMemRgmiiiWrEn <= '1';
else
if (rx_dv = '0') then
WMemRgmiiiAddr <= (others => '1');
else
WMemRgmiiiAddr <= WMemRgmiiiAddr;
end if;
WMemRgmiiiWrEn <= '0';
end if;
end if;
end process;
-- Read
RMemRgmiiiRead <= apbi.paddr(11) and apbi.psel(pindex);
RMemRgmiiiAddr <= "00" & apbi.paddr(10-1 downto 2);
rgmiii0 : syncram_2p generic map (tech, 10, 16, 1, 0, 0) port map(
apb_clk, RMemRgmiiiRead, RMemRgmiiiAddr, RMemRgmiiiData,
rx_clk, WMemRgmiiiWrEn, WMemRgmiiiAddr(10-1 downto 0), WMemRgmiiiData);
end generate;
-- pragma translate_off
bootmsg : report_version
generic map ("rgmii" & tost(pindex) &
": RGMII rev " & tost(REVISION) & ", irq " & tost(pirq));
-- pragma translate_on
end rtl;
|
---------------------------------------------------------------------------
-- Copyright 2010 Lawrence Wilkinson [email protected]
--
-- This file is part of LJW2030, a VHDL implementation of the IBM
-- System/360 Model 30.
--
-- LJW2030 is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- LJW2030 is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with LJW2030 . If not, see <http://www.gnu.org/licenses/>.
--
---------------------------------------------------------------------------
--
-- File: FMD2030_5-08D.vhd
-- Creation Date: 21:39:37 03/22/2010
-- Description:
-- Multiplexor Channel Controls - FA Register - Indicators
-- Page references like "5-01A" refer to the IBM Maintenance Diagram Manual (MDM)
-- for the 360/30 R25-5103-1
-- References like "02AE6" refer to coordinate "E6" on page "5-02A"
-- Logic references like "AB3D5" refer to card "D5" in board "B3" in gate "A"
-- Gate A is the main logic gate, B is the second (optional) logic gate,
-- C is the core storage and X is the CCROS unit
--
-- Revision History:
-- Revision 1.0 2010-07-13
-- Initial Release
-- Revision 1.1 2012-04-07
-- Revise Mpx and 1050 signals
---------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
USE work.Gates_package.all;
USE work.Buses_package.all;
USE work.FLL;
entity MpxFA is
Port ( BUS_O_REG : in STD_LOGIC_VECTOR (0 to 8);
DIAG_SW : in STD_LOGIC;
-- External MPX connections:
MPX_BUS_OUT_BITS : out STD_LOGIC_VECTOR (0 to 8);
MPX_BUS_IN_BITS : in STD_LOGIC_VECTOR (0 to 8);
TAGS_OUT : out MPX_TAGS_OUT;
TAGS_IN : in MPX_TAGS_IN;
--
FI : out STD_LOGIC_VECTOR(0 to 8); -- Mpx Bus In to CPU
FAK : in STD_LOGIC;
RECYCLE_RST : in STD_LOGIC;
CK_P_BIT : in STD_LOGIC;
ALU_CHK_LCH : in STD_LOGIC;
CHK_SW_PROC_SW : in STD_LOGIC;
N1050_REQ_IN : in STD_LOGIC;
ROS_SCAN : in STD_LOGIC;
FBK_T2 : in STD_LOGIC;
FT5_BIT_SEL_IN : out STD_LOGIC;
SERV_IN_SIGNAL : out STD_LOGIC;
STATUS_IN_SIGNAL : out STD_LOGIC;
FT3_BIT_MPX_SHARE_REQ : out STD_LOGIC;
MPX_SHARE_REQ : out STD_LOGIC;
T1,T2,T3 : in STD_LOGIC;
ANY_PRIORITY_LCH : in STD_LOGIC;
CK_SALS_PWR : in STD_LOGIC_VECTOR (0 to 3);
SET_BUS_O_CTRL_LCH : in STD_LOGIC;
N1401_MODE : in STD_LOGIC;
N1050_OP_IN : in STD_LOGIC;
N1050_CE_MODE : in STD_LOGIC;
MPX_METERING_IN : out STD_LOGIC;
FT7_MPX_CHNL_IN : in STD_LOGIC;
LOAD_IND : in STD_LOGIC;
SUPPR_CTRL_LCH : in STD_LOGIC;
OP_OUT_SIGNAL : in STD_LOGIC;
OP_OUT_SIG : in STD_LOGIC;
SEL_O_FT6 : out STD_LOGIC;
N1050_SEL_IN : out STD_LOGIC;
n1050_SEL_O : in STD_LOGIC;
P_1050_SEL_IN : out STD_LOGIC;
P_1050_SEL_OUT : out STD_LOGIC;
N1050_INSTALLED : in STD_LOGIC;
SUPPR_O : out STD_LOGIC;
DEBUG : inout DEBUG_BUS;
METERING_OUT : in STD_LOGIC;
CLOCK_OUT : in STD_LOGIC;
CLK : in STD_LOGIC;
-- Mpx Indicators
OPNL_IN,ADDR_IN,STATUS_IN,SERVICE_IN,
SELECT_OUT,ADDR_OUT,COMMAND_OUT,SERVICE_OUT,
SUPPRESS_OUT : out std_logic); -- 08A
end MpxFA;
architecture FMD of MpxFA is
signal sSERV_IN_SIGNAL, sSTATUS_IN_SIGNAL, sADDR_OUT, sSUPPR_O, sOP_OUT : STD_LOGIC;
signal SIS1,SIS2,SIS3 : STD_LOGIC;
signal OP_INLK_SET, OP_INLK : STD_LOGIC;
signal SERV_OUT, CMD_OUT : STD_LOGIC;
signal sTAGS_OUT : MPX_TAGS_OUT;
signal sTAGS_IN : MPX_TAGS_IN;
signal sFT5_BIT_SEL_IN, Reset_SELO : STD_LOGIC;
signal sn1050_SEL_OUT : STD_LOGIC;
signal sn1050_SEL_IN : STD_LOGIC;
signal CMD_STT_Set, RST_CMD_RSTT_ADDR_OUT, CMD_STT : STD_LOGIC;
signal sFT3_BIT_MPX_SHARE_REQ, sSEL_O_FT6, sSUPPR_O_FT0 : STD_LOGIC;
signal FAK_T2 : STD_LOGIC;
signal SetAdrO2, ADDR_OUT_2, SetAdrOut, SetCmdO, RstCmdO, SetSrvO, RstSrvO : STD_LOGIC;
signal SetCUBusyInlk, ResetCUBusyInlk, CUBusy, RST_STT_SEL_OUT : STD_LOGIC;
signal ResetBusOCtrl, BUSOCtrl : STD_LOGIC;
signal SetStartSelO, ResetStartSelO, StartSelO : STD_LOGIC;
signal NO_1050_SEL_O : STD_LOGIC;
signal SetSelReq, ResetSelReq, SetSelOInlk, SelOInlk : STD_LOGIC;
signal SS_RECYCLE_RST : STD_LOGIC;
signal NOT_OPL_IN : STD_LOGIC;
begin
STATUS_IN <= sTAGS_IN.STA_IN;
SERVICE_IN <= sTAGS_IN.SRV_IN;
ADDR_IN <= sTAGS_IN.ADR_IN; -- AA3F3
OPNL_IN <= sTAGS_IN.OPL_IN; -- AA3F2 AA3F5
SIS1 <= (not SERV_OUT and not CMD_OUT and sTAGS_IN.SRV_IN) or OP_INLK; -- AA3F2 AA3E2
sSERV_IN_SIGNAL <= SIS1 and (not sTAGS_IN.STA_IN or not sTAGS_IN.SRV_IN); -- Wire-AND, not sure about the OR bit
SERV_IN_SIGNAL <= sSERV_IN_SIGNAL;
SIS3 <= (not SERV_OUT and not CMD_OUT and sTAGS_IN.STA_IN) or (OP_INLK and not sTAGS_OUT.ADR_OUT); -- AA3D7 AA3E2
sSTATUS_IN_SIGNAL <= SIS3 and (not sTAGS_IN.STA_IN or not sTAGS_IN.SRV_IN); -- Wire-AND, not sure about the OR bit
STATUS_IN_SIGNAL <= sSTATUS_IN_SIGNAL;
OP_INLK_SET <= not sTAGS_IN.OPL_IN and T2;
OP_INLK_FL: entity FLL port map (S=>OP_INLK_SET, R=> T1, Q=>OP_INLK); -- AA3E4 ?? R=> NOT T1 ??
sn1050_SEL_IN <= sTAGS_IN.SEL_IN;
n1050_SEL_IN <= sn1050_SEL_IN;
sFT5_BIT_SEL_IN <= (sn1050_SEL_IN and not n1050_INSTALLED) or sn1050_SEL_IN; -- AA3E5 AA3E2
FT5_BIT_SEL_IN <= sFT5_BIT_SEL_IN;
Reset_SELO <= RECYCLE_RST or FBK_T2 or sFT5_BIT_SEL_IN; -- AA3D7 AA3E7
CMD_STT_Set <= CK_P_BIT and FAK_T2; -- ?? FMD has FAK not FAK_T2
RST_CMD_RSTT_ADDR_OUT <= (FAK and T1) or RECYCLE_RST; -- AA3E6 AA3E2
CMD_STT_FL: entity FLL port map (S=>CMD_STT_Set, R=>RST_CMD_RSTT_ADDR_OUT, Q=>CMD_STT); -- AA3D7 AA3E7
sFT3_BIT_MPX_SHARE_REQ <= (ROS_SCAN or not CMD_STT) and (N1050_REQ_IN or sTAGS_IN.REQ_IN or (ALU_CHK_LCH and CHK_SW_PROC_SW) or sTAGS_IN.OPL_IN); -- AA3F2 AA3E5 AA3G4
MPX_SHARE_REQ <= sFT3_BIT_MPX_SHARE_REQ;
FT3_BIT_MPX_SHARE_REQ <= sFT3_BIT_MPX_SHARE_REQ;
sTAGS_IN.OPL_IN <= TAGS_IN.OPL_IN or (DIAG_SW and BUS_O_REG(7)); -- AA3B4
sTAGS_IN.ADR_IN <= TAGS_IN.ADR_IN or (DIAG_SW and BUS_O_REG(6)); -- AA3B4
sTAGS_IN.STA_IN <= TAGS_IN.STA_IN or (DIAG_SW and BUS_O_REG(4)); -- AA3B4
sTAGS_IN.SRV_IN <= TAGS_IN.SRV_IN or (DIAG_SW and BUS_O_REG(5)); -- AA3B4
sTAGS_IN.SEL_IN <= TAGS_IN.SEL_IN or (DIAG_SW and BUS_O_REG(0)); -- AA3B4
sTAGS_IN.REQ_IN <= TAGS_IN.REQ_IN;
sTAGS_IN.MTR_IN <= TAGS_IN.MTR_IN;
MPX_BUS_OUT_BITS <= BUS_O_REG;
FAK_T2 <= FAK and (T2 and not ANY_PRIORITY_LCH); -- AA3B7 AA3F4 AA3E6
SetAdrO2 <= T3 and sADDR_OUT;
ADDR_OUT_2_FL: entity FLL port map (S=>SetAdrO2, R=>RST_CMD_RSTT_ADDR_OUT, Q=>ADDR_OUT_2); -- AA3E4
SetAdrOut <= FAK_T2 and CK_SALS_PWR(1);
ADDR_OUT_FL: entity FLL port map (S=>SetAdrOut, R=>RST_CMD_RSTT_ADDR_OUT, Q=>sADDR_OUT); -- AA3D7 AA3E7
ADDR_OUT <= sADDR_OUT;
SetCmdO <= FAK_T2 and CK_SALS_PWR(2);
RstCmdO <= not sTAGS_IN.ADR_IN and not sTAGS_IN.SRV_IN and not sTAGS_IN.STA_IN;
CMD_O: entity FLL port map (S=>SetCmdO, R=>RstCmdO, Q=>CMD_OUT); -- AA3E4 AA3E5
sTAGS_OUT.CMD_OUT <= CMD_OUT;
SetSrvO <= FAK_T2 and CK_SALS_PWR(3);
RstSrvO <= not sTAGS_IN.SRV_IN and not sTAGS_IN.STA_IN;
SRV_O: entity FLL port map (S=>SetSrvO, R=>RstSrvO, Q=>SERV_OUT); -- AA3C7
SetCUBusyInlk <= sTAGS_IN.STA_IN and ADDR_OUT_2 and FBK_T2;
ResetCUBusyInlk <= not sADDR_OUT and T2;
CU_BUSY_INLK: entity FLL port map (S=>SetCUBusyInlk, R=>ResetCUBusyInlk, Q=>CUBusy); -- AA3B5
RST_STT_SEL_OUT <= not OP_OUT_SIG or CUBusy; -- AA3F7
ResetBusOCtrl <= not sADDR_OUT and not CMD_OUT and not SERV_OUT; -- AA3D7
BUS_O_CTRL: entity FLL port map (S=>SET_BUS_O_CTRL_LCH, R=>ResetBusOCtrl, Q=>BUSOCtrl); -- AA3J5
SetStartSelO <= ADDR_OUT_2 and T2 and BUSOCtrl; -- AA3E6
ResetStartSelO <= RST_STT_SEL_OUT or (not N1401_MODE and sTAGS_IN.ADR_IN) or (not ADDR_OUT_2 and Reset_SelO); -- AA3F5 AA3K3
START_SEL_O: entity FLL port map (S=>SetStartSelO, R=>ResetStartSelO, Q=>StartSelO); -- AA3L4 AA3E7
sSEL_O_FT6 <= not CUBusy and (StartSelO or NO_1050_SEL_O or sN1050_SEL_OUT); -- AA3E5
SEL_O_FT6 <= sSEL_O_FT6;
NO_1050_SEL_O <= not N1050_INSTALLED and n1050_SEL_O; -- AA3D2
SetSelReq <= not SelOInlk and T2 and sFT3_BIT_MPX_SHARE_REQ;
ResetSelReq <= SelOInlk or not sFT3_BIT_MPX_SHARE_REQ;
SEL_REQ: entity FLL port map (S=>SetSelReq, R=>ResetSelReq, Q=>sN1050_SEL_OUT); -- AA3F4
-- To Select Out Propagation in 10B
P_1050_SEL_OUT <= sN1050_SEL_OUT;
SetSelOInlk <= (sTAGS_IN.ADR_IN and sTAGS_IN.OPL_IN) or (N1050_OP_IN and not N1050_CE_MODE); -- AA3B7
NOT_OPL_IN <= not sTAGS_IN.OPL_IN;
SEL_O_INLK: entity FLL port map (S=>SetSelOInlk, R=>NOT_OPL_IN, Q=>SelOInlk); -- AA3C7
-- sSUPPR_O <= (FT7_MPX_CHNL_IN and not sTAGS_IN.OPL_IN) or not LOAD_IND or SUPPR_CTRL_LCH; -- AA3C7 AA3E5
sSUPPR_O <= (FT7_MPX_CHNL_IN and not sTAGS_IN.OPL_IN) and not LOAD_IND and SUPPR_CTRL_LCH; -- AA3C7 AA3E5 ?? AA3C7 shown as 'OR'
SUPPR_O <= sSUPPR_O;
SS_RECYCLE_RST <= RECYCLE_RST; -- AA3G3 Single Shot ??
sOP_OUT <= OP_OUT_SIGNAL and not SS_RECYCLE_RST; -- AA3D6
sTAGS_OUT.ADR_OUT2 <= ADDR_OUT_2;
sTAGS_OUT.ADR_OUT <= sADDR_OUT;
-- sTAGS_OUT.CMD_OUT <= CMD_OUT;
sTAGS_OUT.SRV_OUT <= SERV_OUT;
sTAGS_OUT.SEL_OUT <= sSEL_O_FT6; -- ??
sTAGS_OUT.MTR_OUT <= METERING_OUT;
sTAGS_OUT.CLK_OUT <= CLOCK_OUT;
sTAGS_OUT.SUP_OUT <= sSUPPR_O;
sTAGS_OUT.OPL_OUT <= sOP_OUT;
-- sTAGS_OUT.SEL_OUT <= '0'; -- ??
sTAGS_OUT.STA_OUT <= '0'; -- ??
sTAGS_OUT.HLD_OUT <= '0'; -- ??
TAGS_OUT <= sTAGS_OUT;
FI <= MPX_BUS_IN_BITS;
-- Output tag indicators not really shown
SELECT_OUT <= sSEL_O_FT6;
ADDR_OUT <= sADDR_OUT;
COMMAND_OUT <= CMD_OUT;
SERVICE_OUT <= SERV_OUT;
SUPPRESS_OUT <= sSUPPR_O;
end FMD;
|
-- -*- vhdl -*-
-------------------------------------------------------------------------------
-- Copyright (c) 2012, The CARPE Project, All rights reserved. --
-- See the AUTHORS file for individual contributors. --
-- --
-- Copyright and related rights are licensed under the Solderpad --
-- Hardware License, Version 0.51 (the "License"); you may not use this --
-- file except in compliance with the License. You may obtain a copy of --
-- the License at http://solderpad.org/licenses/SHL-0.51. --
-- --
-- Unless required by applicable law or agreed to in writing, software, --
-- hardware and materials distributed under this License is distributed --
-- on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, --
-- either express or implied. See the License for the specific language --
-- governing permissions and limitations under the License. --
-------------------------------------------------------------------------------
-- Random Cache Replacement Algorithm using LFSR
library ieee;
use ieee.std_logic_1164.all;
use work.cpu_btb_cache_replace_lfsr_pkg.all;
entity cpu_btb_cache_replace_lfsr is
port (
clk : in std_ulogic;
rstn : in std_ulogic;
cpu_btb_cache_replace_lfsr_ctrl_in : in cpu_btb_cache_replace_lfsr_ctrl_in_type;
cpu_btb_cache_replace_lfsr_dp_in : in cpu_btb_cache_replace_lfsr_dp_in_type;
cpu_btb_cache_replace_lfsr_dp_out : out cpu_btb_cache_replace_lfsr_dp_out_type
);
end;
|
-- This -*- vhdl -*- file was generated from std_logic_1164-body.proto
-- This is an implementation of -*- vhdl -*- ieee.std_logic_1164 based only
-- on the specifications. This file is part of GHDL.
-- Copyright (C) 2015 Tristan Gingold
--
-- GHDL is free software; you can redistribute it and/or modify it under
-- the terms of the GNU General Public License as published by the Free
-- Software Foundation; either version 2, or (at your option) any later
-- version.
--
-- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY
-- WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with GCC; see the file COPYING2. If not see
-- <http://www.gnu.org/licenses/>.
-- This is a template file. To avoid errors and duplication, the python
-- script build.py generate most of the bodies.
package body std_logic_1164 is
type table_1d is array (std_ulogic) of std_ulogic;
type table_2d is array (std_ulogic, std_ulogic) of std_ulogic;
constant resolution : table_2d :=
-- UX01ZWLH-
("UUUUUUUUU", -- U
"UXXXXXXXX", -- X
"UX0X0000X", -- 0
"UXX11111X", -- 1
"UX01ZWLHX", -- Z
"UX01WWWWX", -- W
"UX01LWLWX", -- L
"UX01HWWHX", -- H
"UXXXXXXXX" -- -
);
function resolved (s : std_ulogic_vector) return std_ulogic
is
variable res : std_ulogic := 'Z';
begin
for I in s'range loop
res := resolution (res, s (I));
end loop;
return res;
end resolved;
constant and_table : table_2d :=
-- UX01ZWLH-
("UU0UUU0UU", -- U
"UX0XXX0XX", -- X
"000000000", -- 0
"UX01XX01X", -- 1
"UX0XXX0XX", -- Z
"UX0XXX0XX", -- W
"000000000", -- L
"UX01XX01X", -- H
"UX0XXX0XX" -- -
);
constant nand_table : table_2d :=
-- UX01ZWLH-
("UU1UUU1UU", -- U
"UX1XXX1XX", -- X
"111111111", -- 0
"UX10XX10X", -- 1
"UX1XXX1XX", -- Z
"UX1XXX1XX", -- W
"111111111", -- L
"UX10XX10X", -- H
"UX1XXX1XX" -- -
);
constant or_table : table_2d :=
-- UX01ZWLH-
("UUU1UUU1U", -- U
"UXX1XXX1X", -- X
"UX01XX01X", -- 0
"111111111", -- 1
"UXX1XXX1X", -- Z
"UXX1XXX1X", -- W
"UX01XX01X", -- L
"111111111", -- H
"UXX1XXX1X" -- -
);
constant nor_table : table_2d :=
-- UX01ZWLH-
("UUU0UUU0U", -- U
"UXX0XXX0X", -- X
"UX10XX10X", -- 0
"000000000", -- 1
"UXX0XXX0X", -- Z
"UXX0XXX0X", -- W
"UX10XX10X", -- L
"000000000", -- H
"UXX0XXX0X" -- -
);
constant xor_table : table_2d :=
-- UX01ZWLH-
("UUUUUUUUU", -- U
"UXXXXXXXX", -- X
"UX01XX01X", -- 0
"UX10XX10X", -- 1
"UXXXXXXXX", -- Z
"UXXXXXXXX", -- W
"UX01XX01X", -- L
"UX10XX10X", -- H
"UXXXXXXXX" -- -
);
constant xnor_table : table_2d :=
-- UX01ZWLH-
("UUUUUUUUU", -- U
"UXXXXXXXX", -- X
"UX10XX10X", -- 0
"UX01XX01X", -- 1
"UXXXXXXXX", -- Z
"UXXXXXXXX", -- W
"UX10XX10X", -- L
"UX01XX01X", -- H
"UXXXXXXXX" -- -
);
constant not_table : table_1d :=
-- UX01ZWLH-
"UX10XX10X";
function "and" (l : std_ulogic; r : std_ulogic) return UX01 is
begin
return and_table (l, r);
end "and";
function "nand" (l : std_ulogic; r : std_ulogic) return UX01 is
begin
return nand_table (l, r);
end "nand";
function "or" (l : std_ulogic; r : std_ulogic) return UX01 is
begin
return or_table (l, r);
end "or";
function "nor" (l : std_ulogic; r : std_ulogic) return UX01 is
begin
return nor_table (l, r);
end "nor";
function "xor" (l : std_ulogic; r : std_ulogic) return UX01 is
begin
return xor_table (l, r);
end "xor";
function "xnor" (l : std_ulogic; r : std_ulogic) return UX01 is
begin
return xnor_table (l, r);
end "xnor";
function "not" (l : std_ulogic) return UX01 is
begin
return not_table (l);
end "not";
function "and" (l, r : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
alias ra : std_ulogic_vector (1 to r'length) is r;
variable res : res_type;
begin
if la'length /= ra'length then
assert false
report "arguments of overloaded 'and' operator are not of the same length"
severity failure;
else
for I in res_type'range loop
res (I) := and_table (la (I), ra (I));
end loop;
end if;
return res;
end "and";
function "nand" (l, r : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
alias ra : std_ulogic_vector (1 to r'length) is r;
variable res : res_type;
begin
if la'length /= ra'length then
assert false
report "arguments of overloaded 'nand' operator are not of the same length"
severity failure;
else
for I in res_type'range loop
res (I) := nand_table (la (I), ra (I));
end loop;
end if;
return res;
end "nand";
function "or" (l, r : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
alias ra : std_ulogic_vector (1 to r'length) is r;
variable res : res_type;
begin
if la'length /= ra'length then
assert false
report "arguments of overloaded 'or' operator are not of the same length"
severity failure;
else
for I in res_type'range loop
res (I) := or_table (la (I), ra (I));
end loop;
end if;
return res;
end "or";
function "nor" (l, r : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
alias ra : std_ulogic_vector (1 to r'length) is r;
variable res : res_type;
begin
if la'length /= ra'length then
assert false
report "arguments of overloaded 'nor' operator are not of the same length"
severity failure;
else
for I in res_type'range loop
res (I) := nor_table (la (I), ra (I));
end loop;
end if;
return res;
end "nor";
function "xor" (l, r : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
alias ra : std_ulogic_vector (1 to r'length) is r;
variable res : res_type;
begin
if la'length /= ra'length then
assert false
report "arguments of overloaded 'xor' operator are not of the same length"
severity failure;
else
for I in res_type'range loop
res (I) := xor_table (la (I), ra (I));
end loop;
end if;
return res;
end "xor";
function "xnor" (l, r : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
alias ra : std_ulogic_vector (1 to r'length) is r;
variable res : res_type;
begin
if la'length /= ra'length then
assert false
report "arguments of overloaded 'xnor' operator are not of the same length"
severity failure;
else
for I in res_type'range loop
res (I) := xnor_table (la (I), ra (I));
end loop;
end if;
return res;
end "xnor";
function "not" (l : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := not_table (la (I));
end loop;
return res;
end "not";
function "and" (l : std_ulogic_vector; r : std_ulogic)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := and_table (la (I), r);
end loop;
return res;
end "and";
function "and" (l : std_ulogic; r : std_ulogic_vector)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to r'length);
alias ra : res_type is r;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := and_table (l, ra (I));
end loop;
return res;
end "and";
function "nand" (l : std_ulogic_vector; r : std_ulogic)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := nand_table (la (I), r);
end loop;
return res;
end "nand";
function "nand" (l : std_ulogic; r : std_ulogic_vector)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to r'length);
alias ra : res_type is r;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := nand_table (l, ra (I));
end loop;
return res;
end "nand";
function "or" (l : std_ulogic_vector; r : std_ulogic)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := or_table (la (I), r);
end loop;
return res;
end "or";
function "or" (l : std_ulogic; r : std_ulogic_vector)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to r'length);
alias ra : res_type is r;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := or_table (l, ra (I));
end loop;
return res;
end "or";
function "nor" (l : std_ulogic_vector; r : std_ulogic)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := nor_table (la (I), r);
end loop;
return res;
end "nor";
function "nor" (l : std_ulogic; r : std_ulogic_vector)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to r'length);
alias ra : res_type is r;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := nor_table (l, ra (I));
end loop;
return res;
end "nor";
function "xor" (l : std_ulogic_vector; r : std_ulogic)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := xor_table (la (I), r);
end loop;
return res;
end "xor";
function "xor" (l : std_ulogic; r : std_ulogic_vector)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to r'length);
alias ra : res_type is r;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := xor_table (l, ra (I));
end loop;
return res;
end "xor";
function "xnor" (l : std_ulogic_vector; r : std_ulogic)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := xnor_table (la (I), r);
end loop;
return res;
end "xnor";
function "xnor" (l : std_ulogic; r : std_ulogic_vector)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to r'length);
alias ra : res_type is r;
variable res : res_type;
begin
for I in res_type'range loop
res (I) := xnor_table (l, ra (I));
end loop;
return res;
end "xnor";
function "and" (l : std_ulogic_vector) return std_ulogic
is
variable res : std_ulogic := '1';
begin
for I in l'range loop
res := and_table (l(I), res);
end loop;
return res;
end "and";
function "nand" (l : std_ulogic_vector) return std_ulogic
is
variable res : std_ulogic := '1';
begin
for I in l'range loop
res := nand_table (l(I), res);
end loop;
return res;
end "nand";
function "or" (l : std_ulogic_vector) return std_ulogic
is
variable res : std_ulogic := '0';
begin
for I in l'range loop
res := or_table (l(I), res);
end loop;
return res;
end "or";
function "nor" (l : std_ulogic_vector) return std_ulogic
is
variable res : std_ulogic := '0';
begin
for I in l'range loop
res := nor_table (l(I), res);
end loop;
return res;
end "nor";
function "xor" (l : std_ulogic_vector) return std_ulogic
is
variable res : std_ulogic := '0';
begin
for I in l'range loop
res := xor_table (l(I), res);
end loop;
return res;
end "xor";
function "xnor" (l : std_ulogic_vector) return std_ulogic
is
variable res : std_ulogic := '0';
begin
for I in l'range loop
res := xnor_table (l(I), res);
end loop;
return res;
end "xnor";
function "sll" (l : std_ulogic_vector; r : integer)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type := (others => '0');
begin
if r >= 0 then
res (1 to l'length - r) := la (r + 1 to res'right);
else
res (1 - r to res'right) := la (1 to l'length + r);
end if;
return res;
end "sll";
function "srl" (l : std_ulogic_vector; r : integer)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type := (others => '0');
begin
if r >= 0 then
res (1 + r to res'right) := la (1 to l'length - r);
else
res (1 to l'length + r) := la (r - 1 to res'right);
end if;
return res;
end "srl";
function "rol" (l : std_ulogic_vector; r : integer)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
constant rm : integer := r mod l'length;
begin
if r >= 0 then
res (1 to res'right - rm) := la (rm + 1 to la'right);
res (res'right - rm + 1 to res'right) := la (1 to rm);
else
res (1 - rm to res'right) := la (1 to la'right + r);
res (1 to rm) := la (la'right + rm + 1 to la'right);
end if;
return res;
end "rol";
function "ror" (l : std_ulogic_vector; r : integer)
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to l'length);
alias la : res_type is l;
variable res : res_type;
constant rm : integer := r mod l'length;
begin
if r >= 0 then
res (1 + rm to res'right) := la (1 to la'right - r);
res (1 to rm) := la (la'right - rm + 1 to la'right);
else
res (1 to res'right + rm) := la (rm - 1 to la'right);
res (res'right + rm + 1 to res'right) := la (1 to rm);
end if;
return res;
end "ror";
-- Conversion functions.
-- The result range (for vectors) is S'Length - 1 downto 0.
-- XMAP is return for values not in '0', '1', 'L', 'H'.
function to_bit (s : std_ulogic; xmap : bit := '0') return bit is
begin
case s is
when '0' | 'L' =>
return '0';
when '1' | 'H' =>
return '1';
when others =>
return xmap;
end case;
end to_bit;
type bit_to_std_table is array (bit) of std_ulogic;
constant bit_to_std : bit_to_std_table := "01";
function to_bitvector (s : std_ulogic_vector; xmap : bit := '0')
return bit_vector
is
subtype res_range is natural range s'length - 1 downto 0;
alias as : std_ulogic_vector (res_range) is s;
variable res : bit_vector (res_range);
variable b : bit;
begin
for I in res_range loop
-- Inline for efficiency.
case as (I) is
when '0' | 'L' =>
b := '0';
when '1' | 'H' =>
b := '1';
when others =>
b := xmap;
end case;
res (I) := b;
end loop;
return res;
end to_bitvector;
function to_stdulogicvector (b : bit_vector) return std_ulogic_vector is
subtype res_range is natural range b'length - 1 downto 0;
alias ab : bit_vector (res_range) is b;
variable res : std_ulogic_vector (res_range);
begin
for I in res_range loop
res (I) := bit_to_std (ab (I));
end loop;
return res;
end to_stdulogicvector;
function to_stdlogicvector (b : bit_vector) return std_logic_vector is
subtype res_range is natural range b'length - 1 downto 0;
alias ab : bit_vector (res_range) is b;
variable res : std_logic_vector (res_range);
begin
for I in res_range loop
res (I) := bit_to_std (ab (I));
end loop;
return res;
end to_stdlogicvector;
function to_stdulogicvector (s : std_logic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (s'length - 1 downto 0);
begin
return res_type (s);
end to_stdulogicvector;
function to_stdlogicvector (s : std_ulogic_vector) return std_logic_vector
is
subtype res_type is std_logic_vector (s'length - 1 downto 0);
begin
return res_type (s);
end to_stdlogicvector;
function to_stdulogic (b : bit) return std_ulogic is
begin
return bit_to_std (b);
end to_stdulogic;
-- Normalization.
type table_std_x01 is array (std_ulogic) of X01;
constant std_to_x01 : table_std_x01 := ('U' | 'X' | 'Z' | 'W' | '-' => 'X',
'0' | 'L' => '0',
'1' | 'H' => '1');
type table_bit_x01 is array (bit) of X01;
constant bit_to_x01 : table_bit_x01 := ('0' => '0',
'1' => '1');
type table_std_x01z is array (std_ulogic) of X01Z;
constant std_to_x01z : table_std_x01z := ('U' | 'X' | 'W' | '-' => 'X',
'0' | 'L' => '0',
'1' | 'H' => '1',
'Z' => 'Z');
type table_std_ux01 is array (std_ulogic) of UX01;
constant std_to_ux01 : table_std_ux01 := ('U' => 'U',
'X' | 'Z' | 'W' | '-' => 'X',
'0' | 'L' => '0',
'1' | 'H' => '1');
function to_01 (s : std_ulogic_vector; xmap : std_ulogic := '0')
return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (s'length - 1 downto 0);
alias sa : res_type is s;
variable res : res_type;
begin
for i in res_type'range loop
case sa(i) is
when '0' | 'L' => res (i) := '0';
when '1' | 'H' => res (i) := '1';
when others => return res_type'(others => xmap);
end case;
end loop;
return res;
end to_01;
function to_01 (s : std_ulogic; xmap : std_ulogic := '0')
return std_ulogic is
begin
case s is
when '0' | 'L' => return '0';
when '1' | 'H' => return '1';
when others => return xmap;
end case;
end to_01;
function to_01 (s : bit_vector; xmap : std_ulogic := '0')
return std_ulogic_vector
is
alias sa : bit_vector(s'length - 1 downto 0) is s;
variable res : std_ulogic_vector (s'length - 1 downto 0);
begin
for i in sa'range loop
res (i) := bit_to_std (sa (i));
end loop;
return res;
end to_01;
function to_01 (s : bit; xmap : std_ulogic := '0')
return std_ulogic is
begin
return bit_to_std(s);
end to_01;
function to_X01 (s : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to s'length);
alias sa : res_type is s;
variable res : res_type;
begin
for i in res_type'range loop
res (i) := std_to_x01 (sa (i));
end loop;
return res;
end to_X01;
function to_X01 (s : std_ulogic) return X01 is
begin
return std_to_x01 (s);
end to_X01;
function to_X01 (b : bit_vector) return std_ulogic_vector
is
subtype res_range is natural range 1 to b'length;
alias ba : bit_vector (res_range) is b;
variable res : std_ulogic_vector (res_range);
begin
for i in res_range loop
res (i) := bit_to_x01 (ba (i));
end loop;
return res;
end to_X01;
function to_X01 (b : bit) return X01 is
begin
return bit_to_x01 (b);
end to_X01;
function to_X01Z (s : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to s'length);
alias sa : res_type is s;
variable res : res_type;
begin
for i in res_type'range loop
res (i) := std_to_x01z (sa (i));
end loop;
return res;
end to_X01Z;
function to_X01Z (s : std_ulogic) return X01Z is
begin
return std_to_x01z (s);
end to_X01Z;
function to_X01Z (b : bit_vector) return std_ulogic_vector
is
subtype res_range is natural range 1 to b'length;
alias ba : bit_vector (res_range) is b;
variable res : std_ulogic_vector (res_range);
begin
for i in res_range loop
res (i) := bit_to_x01 (ba (i));
end loop;
return res;
end to_X01Z;
function to_X01Z (b : bit) return X01Z is
begin
return bit_to_x01 (b);
end to_X01Z;
function to_UX01 (s : std_ulogic_vector) return std_ulogic_vector
is
subtype res_type is std_ulogic_vector (1 to s'length);
alias sa : res_type is s;
variable res : res_type;
begin
for i in res_type'range loop
res (i) := std_to_ux01 (sa (i));
end loop;
return res;
end to_UX01;
function to_UX01 (s : std_ulogic) return UX01 is
begin
return std_to_ux01 (s);
end to_UX01;
function to_UX01 (b : bit_vector) return std_ulogic_vector
is
subtype res_range is natural range 1 to b'length;
alias ba : bit_vector (res_range) is b;
variable res : std_ulogic_vector (res_range);
begin
for i in res_range loop
res (i) := bit_to_x01 (ba (i));
end loop;
return res;
end to_UX01;
function to_UX01 (b : bit) return UX01 is
begin
return bit_to_x01 (b);
end to_UX01;
function "??" (l : std_ulogic) return boolean is
begin
return l = '1' or l = 'H';
end "??";
function rising_edge (signal s : std_ulogic) return boolean is
begin
return s'event
and to_x01 (s'last_value) = '0'
and to_x01 (s) = '1';
end rising_edge;
function falling_edge (signal s : std_ulogic) return boolean is
begin
return s'event
and to_x01 (s'last_value) = '1'
and to_x01 (s) = '0';
end falling_edge;
type std_x_array is array (std_ulogic) of boolean;
constant std_x : std_x_array := ('U' | 'X' | 'Z' | 'W' | '-' => true,
'0' | '1' | 'L' | 'H' => false);
function is_X (s : std_ulogic_vector) return boolean is
begin
for i in s'range loop
if std_x (s (i)) then
return true;
end if;
end loop;
return false;
end is_X;
function is_X (s : std_ulogic) return boolean is
begin
return std_x (s);
end is_X;
function to_ostring (value : std_ulogic_vector) return string
is
alias avalue : std_ulogic_vector(value'length downto 1) is value;
constant len : natural := (value'length + 2) / 3;
variable padded : std_ulogic_vector (len * 3 downto 1);
variable pad : std_ulogic;
variable res : string (len downto 1);
variable c : character;
subtype res_type is string (1 to len);
begin
pad := 'Z' when value (value'left) = 'Z' else '0';
padded (avalue'range) := to_x01z (value);
padded (padded'left downto avalue'left + 1) := (others => pad);
for i in res'range loop
case padded(i * 3 downto i * 3 - 2) is
when "000" => c := '0';
when "001" => c := '1';
when "010" => c := '2';
when "011" => c := '3';
when "100" => c := '4';
when "101" => c := '5';
when "110" => c := '6';
when "111" => c := '7';
when "ZZZ" => c := 'Z';
when others => c := 'X';
end case;
res (i) := c;
end loop;
return res_type (res);
end to_ostring;
function to_hstring (value : std_ulogic_vector) return string
is
alias avalue : std_ulogic_vector(value'length downto 1) is value;
constant len : natural := (value'length + 3) / 4;
variable padded : std_ulogic_vector (len * 4 downto 1);
variable pad : std_ulogic;
variable res : string (len downto 1);
variable c : character;
subtype res_type is string (1 to len);
begin
pad := 'Z' when value (value'left) = 'Z' else '0';
padded (avalue'range) := to_x01z (value);
padded (padded'left downto avalue'left + 1) := (others => pad);
for i in res'range loop
case padded(i * 4 downto i * 4 - 3) is
when "0000" => c := '0';
when "0001" => c := '1';
when "0010" => c := '2';
when "0011" => c := '3';
when "0100" => c := '4';
when "0101" => c := '5';
when "0110" => c := '6';
when "0111" => c := '7';
when "1000" => c := '8';
when "1001" => c := '9';
when "1010" => c := 'A';
when "1011" => c := 'B';
when "1100" => c := 'C';
when "1101" => c := 'D';
when "1110" => c := 'E';
when "1111" => c := 'F';
when "ZZZZ" => c := 'Z';
when others => c := 'X';
end case;
res (i) := c;
end loop;
return res_type (res);
end to_hstring;
type sl_to_char_array is array (std_ulogic) of character;
constant sl_to_char : sl_to_char_array := "UX01ZWLH-";
procedure write (l : inout line; value : std_ulogic;
justified : side := right; field : width := 0) is
begin
write (l, sl_to_char (value), justified, field);
end write;
procedure write (l : inout line; value : std_ulogic_vector;
justified : side := right; field : width := 0) is
begin
write (l, to_string (value), justified, field);
end write;
procedure owrite (l : inout line; value : std_ulogic_vector;
justified : side := right; field : width := 0) is
begin
write (l, to_ostring (value), justified, field);
end owrite;
procedure hwrite (l : inout line; value : std_ulogic_vector;
justified : side := right; field : width := 0) is
begin
write (l, to_hstring (value), justified, field);
end hwrite;
constant nbsp : character := character'val (160);
procedure trim (l : inout line; left : natural)
is
variable nl : line;
begin
if l'ascending then
nl := new string(left to l'right);
nl.all := l(left to l'right);
else
nl := new string(left downto l'right);
nl.all := l(left downto l'right);
end if;
deallocate(l);
l := nl;
end trim;
procedure read (l: inout line; value: out std_ulogic; good: out boolean)
is
variable p : positive;
variable dir : integer;
begin
good := false;
value := 'U';
if l = null or l'length = 0 then
-- Return now for empty line.
return;
end if;
if l'ascending then
dir := 1;
else
dir := -1;
end if;
p := l'left;
loop
case l(p) is
when ' ' | NBSP | HT =>
-- Skip blanks.
null;
when 'U' => value := 'U'; exit;
when 'X' => value := 'X'; exit;
when '0' => value := '0'; exit;
when '1' => value := '1'; exit;
when 'Z' => value := 'Z'; exit;
when 'W' => value := 'W'; exit;
when 'L' => value := 'L'; exit;
when 'H' => value := 'H'; exit;
when '-' => value := '-'; exit;
when others =>
trim (l, p);
return;
end case;
if p = l'right then
-- End of string.
deallocate(l);
l := new string'("");
return;
end if;
p := p + dir;
end loop;
good := true;
trim (l, p + dir);
end read;
procedure read (l : inout line; value : out std_ulogic)
is
variable good : boolean;
begin
read (l, value, good);
assert good report "std_logic_1164.read(std_ulogic) cannot read value"
severity error;
end read;
procedure read (l : inout line;
value : out std_ulogic_vector; good : out boolean)
is
variable p : positive;
variable i : natural;
variable dir : integer;
alias av : std_ulogic_vector(1 to value'length) is value;
variable allow_underscore : boolean;
variable c : character;
variable d : std_ulogic;
begin
good := value'length = 0;
value := (value'range => 'U');
if l = null or l'length = 0 then
-- Return now for empty line.
return;
end if;
if l'ascending then
dir := 1;
else
dir := -1;
end if;
p := l'left;
-- Skip blanks.
p := l'left;
loop
case l(p) is
when ' ' | NBSP | HT =>
null;
when others =>
exit;
end case;
if p = l'right then
-- End of string.
deallocate(l);
l := new string'("");
return;
end if;
p := p + dir;
end loop;
if value'length = 0 then
-- Nothing to read.
trim (l, p);
return;
end if;
-- Extract value
i := 1;
allow_underscore := False;
good := false;
loop
c := l(p);
case c is
when 'U' => d := 'U';
when 'X' => d := 'X';
when '0' => d := '0';
when '1' => d := '1';
when 'Z' => d := 'Z';
when 'W' => d := 'W';
when 'L' => d := 'L';
when 'H' => d := 'H';
when '-' => d := '-';
when others =>
if c = '_' and allow_underscore then
allow_underscore := false;
else
-- Invalid character, double or leading '_'.
trim (l, p);
value := (value'range => 'U');
return;
end if;
end case;
if c /= '_' then
av (i) := d;
allow_underscore := true;
if i = av'right then
-- Done.
good := true;
trim (l, p + dir);
return;
end if;
i := i + 1;
end if;
if p = l'right then
-- End of string.
trim (l, p + dir);
deallocate(l);
l := new string'("");
value := (value'range => 'U');
return;
end if;
p := p + dir;
end loop;
end read;
procedure read (l : inout line; value : out std_ulogic_vector)
is
variable good : boolean;
begin
read (l, value, good);
assert good
report "std_logic_1164.read(std_ulogic_vector) cannot read value"
severity error;
end read;
procedure hread (l : inout line;
value : out std_ulogic_vector; good : out boolean)
is
variable p : positive;
variable i : natural;
variable dir : integer;
constant ndigits : natural := (value'length + 3) / 4;
variable v : std_ulogic_vector(1 to ndigits * 4);
variable allow_underscore : boolean;
variable c : character;
variable d : std_ulogic_vector (3 downto 0);
begin
good := value'length = 0;
value := (value'range => 'U');
if l = null or l'length = 0 then
-- Return now for empty line.
return;
end if;
if l'ascending then
dir := 1;
else
dir := -1;
end if;
p := l'left;
-- Skip blanks.
p := l'left;
loop
case l(p) is
when ' ' | NBSP | HT =>
null;
when others =>
exit;
end case;
if p = l'right then
-- End of string.
deallocate(l);
l := new string'("");
return;
end if;
p := p + dir;
end loop;
if value'length = 0 then
-- Nothing to read.
trim (l, p);
return;
end if;
-- Extract value
i := 0;
allow_underscore := False;
good := false;
loop
c := l(p);
case c is
when '0' => d := "0000";
when '1' => d := "0001";
when '2' => d := "0010";
when '3' => d := "0011";
when '4' => d := "0100";
when '5' => d := "0101";
when '6' => d := "0110";
when '7' => d := "0111";
when '8' => d := "1000";
when '9' => d := "1001";
when 'A' | 'a' => d := "1010";
when 'B' | 'b' => d := "1011";
when 'C' | 'c' => d := "1100";
when 'D' | 'd' => d := "1101";
when 'E' | 'e' => d := "1110";
when 'F' | 'f' => d := "1111";
when 'Z' => d := "ZZZZ";
when 'X' => d := "XXXX";
when others =>
if c = '_' and allow_underscore then
allow_underscore := false;
else
-- Invalid character, double or leading '_'.
trim (l, p);
return;
end if;
end case;
if c /= '_' then
allow_underscore := true;
v (i * 4 + 1 to i * 4 + 4) := d;
i := i + 1;
if i = ndigits then
-- Done.
if or (v(1 to ndigits * 4 - value'length)) /= '1' then
-- No truncated digit is a '1'.
value := v (ndigits * 4 - value'length + 1 to v'right);
good := true;
end if;
trim (l, p + dir);
return;
end if;
end if;
if p = l'right then
-- End of string.
trim (l, p + dir);
deallocate(l);
l := new string'("");
return;
end if;
p := p + dir;
end loop;
end hread;
procedure hread (l : inout line; value : out std_ulogic_vector)
is
variable good : boolean;
begin
hread (l, value, good);
assert good
report "std_logic_1164.hread(std_ulogic_vector) cannot read value"
severity error;
end hread;
procedure oread (l : inout line;
value : out std_ulogic_vector; good : out boolean)
is
variable p : positive;
variable i : natural;
variable dir : integer;
constant ndigits : natural := (value'length + 2) / 3;
variable v : std_ulogic_vector(1 to ndigits * 3);
variable allow_underscore : boolean;
variable c : character;
variable d : std_ulogic_vector (2 downto 0);
begin
good := value'length = 0;
value := (value'range => 'U');
if l = null or l'length = 0 then
-- Return now for empty line.
return;
end if;
if l'ascending then
dir := 1;
else
dir := -1;
end if;
p := l'left;
-- Skip blanks.
p := l'left;
loop
case l(p) is
when ' ' | NBSP | HT =>
null;
when others =>
exit;
end case;
if p = l'right then
-- End of string.
deallocate(l);
l := new string'("");
return;
end if;
p := p + dir;
end loop;
if value'length = 0 then
-- Nothing to read.
trim (l, p);
return;
end if;
-- Extract value
i := 0;
allow_underscore := False;
good := false;
loop
c := l(p);
case c is
when '0' => d := "000";
when '1' => d := "001";
when '2' => d := "010";
when '3' => d := "011";
when '4' => d := "100";
when '5' => d := "101";
when '6' => d := "110";
when '7' => d := "111";
when 'Z' => d := "ZZZ";
when 'X' => d := "XXX";
when others =>
if c = '_' and allow_underscore then
allow_underscore := false;
else
-- Invalid character, double or leading '_'.
trim (l, p);
return;
end if;
end case;
if c /= '_' then
allow_underscore := true;
v (i * 3 + 1 to i * 3 + 3) := d;
i := i + 1;
if i = ndigits then
-- Done.
if or (v(1 to ndigits * 3 - value'length)) /= '1' then
-- No truncated digit is a '1'.
value := v (ndigits * 3 - value'length + 1 to v'right);
good := true;
end if;
trim (l, p + dir);
return;
end if;
end if;
if p = l'right then
-- End of string.
trim (l, p + dir);
deallocate(l);
l := new string'("");
return;
end if;
p := p + dir;
end loop;
end oread;
procedure oread (l : inout line; value : out std_ulogic_vector)
is
variable good : boolean;
begin
oread (l, value, good);
assert good
report "std_logic_1164.oread(std_ulogic_vector) cannot read value"
severity error;
end oread;
end std_logic_1164;
|
--------------------------------------------------------------------------------
--
-- FIFO Generator Core Demo Testbench
--
--------------------------------------------------------------------------------
--
-- (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--------------------------------------------------------------------------------
--
-- Filename: k7_mBuf_128x72_dgen.vhd
--
-- Description:
-- Used for write interface stimulus generation
--
--------------------------------------------------------------------------------
-- Library Declarations
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.all;
USE IEEE.std_logic_arith.all;
USE IEEE.std_logic_misc.all;
LIBRARY work;
USE work.k7_mBuf_128x72_pkg.ALL;
ENTITY k7_mBuf_128x72_dgen IS
GENERIC (
C_DIN_WIDTH : INTEGER := 32;
C_DOUT_WIDTH : INTEGER := 32;
C_CH_TYPE : INTEGER := 0;
TB_SEED : INTEGER := 2
);
PORT (
RESET : IN STD_LOGIC;
WR_CLK : IN STD_LOGIC;
PRC_WR_EN : IN STD_LOGIC;
FULL : IN STD_LOGIC;
WR_EN : OUT STD_LOGIC;
WR_DATA : OUT STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0)
);
END ENTITY;
ARCHITECTURE fg_dg_arch OF k7_mBuf_128x72_dgen IS
CONSTANT C_DATA_WIDTH : INTEGER := if_then_else(C_DIN_WIDTH > C_DOUT_WIDTH,C_DIN_WIDTH,C_DOUT_WIDTH);
CONSTANT LOOP_COUNT : INTEGER := divroundup(C_DATA_WIDTH,8);
SIGNAL pr_w_en : STD_LOGIC := '0';
SIGNAL rand_num : STD_LOGIC_VECTOR(8*LOOP_COUNT-1 DOWNTO 0);
SIGNAL wr_data_i : STD_LOGIC_VECTOR(C_DIN_WIDTH-1 DOWNTO 0);
BEGIN
WR_EN <= PRC_WR_EN ;
WR_DATA <= wr_data_i AFTER 50 ns;
----------------------------------------------
-- Generation of DATA
----------------------------------------------
gen_stim:FOR N IN LOOP_COUNT-1 DOWNTO 0 GENERATE
rd_gen_inst1:k7_mBuf_128x72_rng
GENERIC MAP(
WIDTH => 8,
SEED => TB_SEED+N
)
PORT MAP(
CLK => WR_CLK,
RESET => RESET,
RANDOM_NUM => rand_num(8*(N+1)-1 downto 8*N),
ENABLE => pr_w_en
);
END GENERATE;
pr_w_en <= PRC_WR_EN AND NOT FULL;
wr_data_i <= rand_num(C_DIN_WIDTH-1 DOWNTO 0);
END ARCHITECTURE;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:user:ov7670_vga:1.0
-- IP Revision: 19
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
ENTITY system_ov7670_vga_1_0 IS
PORT (
clk_x2 : IN STD_LOGIC;
active : IN STD_LOGIC;
data : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rgb : OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
);
END system_ov7670_vga_1_0;
ARCHITECTURE system_ov7670_vga_1_0_arch OF system_ov7670_vga_1_0 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : STRING;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF system_ov7670_vga_1_0_arch: ARCHITECTURE IS "yes";
COMPONENT ov7670_vga IS
PORT (
clk_x2 : IN STD_LOGIC;
active : IN STD_LOGIC;
data : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rgb : OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
);
END COMPONENT ov7670_vga;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF system_ov7670_vga_1_0_arch: ARCHITECTURE IS "ov7670_vga,Vivado 2016.4";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF system_ov7670_vga_1_0_arch : ARCHITECTURE IS "system_ov7670_vga_1_0,ov7670_vga,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF system_ov7670_vga_1_0_arch: ARCHITECTURE IS "system_ov7670_vga_1_0,ov7670_vga,{x_ipProduct=Vivado 2016.4,x_ipVendor=xilinx.com,x_ipLibrary=user,x_ipName=ov7670_vga,x_ipVersion=1.0,x_ipCoreRevision=19,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF active: SIGNAL IS "xilinx.com:signal:clock:1.0 clk CLK";
BEGIN
U0 : ov7670_vga
PORT MAP (
clk_x2 => clk_x2,
active => active,
data => data,
rgb => rgb
);
END system_ov7670_vga_1_0_arch;
|
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
--
-- This file contains confidential and proprietary information
-- of Xilinx, Inc. and is protected under U.S. and
-- international copyright and other intellectual property
-- laws.
--
-- DISCLAIMER
-- This disclaimer is not a license and does not grant any
-- rights to the materials distributed herewith. Except as
-- otherwise provided in a valid license issued to you by
-- Xilinx, and to the maximum extent permitted by applicable
-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-- (2) Xilinx shall not be liable (whether in contract or tort,
-- including negligence, or under any other theory of
-- liability) for any loss or damage of any kind or nature
-- related to, arising under or in connection with these
-- materials, including for any direct, or any indirect,
-- special, incidental, or consequential loss or damage
-- (including loss of data, profits, goodwill, or any type of
-- loss or damage suffered as a result of any action brought
-- by a third party) even if such damage or loss was
-- reasonably foreseeable or Xilinx had been advised of the
-- possibility of the same.
--
-- CRITICAL APPLICATIONS
-- Xilinx products are not designed or intended to be fail-
-- safe, or for use in any application requiring fail-safe
-- performance, such as life-support or safety devices or
-- systems, Class III medical devices, nuclear facilities,
-- applications related to the deployment of airbags, or any
-- other applications that could lead to death, personal
-- injury, or severe property or environmental damage
-- (individually and collectively, "Critical
-- Applications"). Customer assumes the sole risk and
-- liability of any use of Xilinx products in Critical
-- Applications, subject only to applicable laws and
-- regulations governing limitations on product liability.
--
-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-- PART OF THIS FILE AT ALL TIMES.
--
-- DO NOT MODIFY THIS FILE.
-- IP VLNV: xilinx.com:user:ov7670_vga:1.0
-- IP Revision: 19
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
ENTITY system_ov7670_vga_1_0 IS
PORT (
clk_x2 : IN STD_LOGIC;
active : IN STD_LOGIC;
data : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rgb : OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
);
END system_ov7670_vga_1_0;
ARCHITECTURE system_ov7670_vga_1_0_arch OF system_ov7670_vga_1_0 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : STRING;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF system_ov7670_vga_1_0_arch: ARCHITECTURE IS "yes";
COMPONENT ov7670_vga IS
PORT (
clk_x2 : IN STD_LOGIC;
active : IN STD_LOGIC;
data : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rgb : OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
);
END COMPONENT ov7670_vga;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF system_ov7670_vga_1_0_arch: ARCHITECTURE IS "ov7670_vga,Vivado 2016.4";
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF system_ov7670_vga_1_0_arch : ARCHITECTURE IS "system_ov7670_vga_1_0,ov7670_vga,{}";
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF system_ov7670_vga_1_0_arch: ARCHITECTURE IS "system_ov7670_vga_1_0,ov7670_vga,{x_ipProduct=Vivado 2016.4,x_ipVendor=xilinx.com,x_ipLibrary=user,x_ipName=ov7670_vga,x_ipVersion=1.0,x_ipCoreRevision=19,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED}";
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF active: SIGNAL IS "xilinx.com:signal:clock:1.0 clk CLK";
BEGIN
U0 : ov7670_vga
PORT MAP (
clk_x2 => clk_x2,
active => active,
data => data,
rgb => rgb
);
END system_ov7670_vga_1_0_arch;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003, Gaisler Research
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: net
-- File: net.vhd
-- Author: Jiri Gaisler - Gaisler Research
-- Description: Package with component and type declarations for network cores
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
package net is
type eth_in_type is record
gtx_clk : std_ulogic;
rmii_clk : std_ulogic;
tx_clk : std_ulogic;
rx_clk : std_ulogic;
rxd : std_logic_vector(7 downto 0);
rx_dv : std_ulogic;
rx_er : std_ulogic;
rx_col : std_ulogic;
rx_crs : std_ulogic;
mdio_i : std_ulogic;
phyrstaddr : std_logic_vector(4 downto 0);
edcladdr : std_logic_vector(3 downto 0);
end record;
type eth_out_type is record
reset : std_ulogic;
txd : std_logic_vector(7 downto 0);
tx_en : std_ulogic;
tx_er : std_ulogic;
mdc : std_ulogic;
mdio_o : std_ulogic;
mdio_oe : std_ulogic;
end record;
component eth_arb
generic(
fullduplex : integer := 0;
mdiomaster : integer := 0);
port(
rst : in std_logic;
clk : in std_logic;
ethi : in eth_in_type;
etho : out eth_out_type;
methi : in eth_out_type;
metho : out eth_in_type;
dethi : in eth_out_type;
detho : out eth_in_type
);
end component;
component greth is
generic(
hindex : integer := 0;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#FFF#;
pirq : integer := 0;
memtech : integer := 0;
ifg_gap : integer := 24;
attempt_limit : integer := 16;
backoff_limit : integer := 10;
slot_time : integer := 128;
mdcscaler : integer range 0 to 255 := 25;
enable_mdio : integer range 0 to 1 := 0;
fifosize : integer range 4 to 512 := 8;
nsync : integer range 1 to 2 := 2;
edcl : integer range 0 to 2 := 0;
edclbufsz : integer range 1 to 64 := 1;
macaddrh : integer := 16#00005E#;
macaddrl : integer := 16#000000#;
ipaddrh : integer := 16#c0a8#;
ipaddrl : integer := 16#0035#;
phyrstadr : integer range 0 to 32 := 0;
rmii : integer range 0 to 1 := 0;
oepol : integer range 0 to 1 := 0;
scanen : integer range 0 to 1 := 0;
ft : integer range 0 to 1 := 0);
port(
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
ethi : in eth_in_type;
etho : out eth_out_type
);
end component;
component greth_gbit is
generic(
hindex : integer := 0;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#FFF#;
pirq : integer := 0;
memtech : integer := 0;
ifg_gap : integer := 24;
attempt_limit : integer := 16;
backoff_limit : integer := 10;
slot_time : integer := 128;
mdcscaler : integer range 0 to 255 := 25;
nsync : integer range 1 to 2 := 2;
edcl : integer range 0 to 1 := 0;
edclbufsz : integer range 1 to 64 := 1;
burstlength : integer range 4 to 128 := 32;
macaddrh : integer := 16#00005E#;
macaddrl : integer := 16#000000#;
ipaddrh : integer := 16#c0a8#;
ipaddrl : integer := 16#0035#;
phyrstadr : integer range 0 to 32 := 0;
sim : integer range 0 to 1 := 0;
oepol : integer range 0 to 1 := 0;
scanen : integer range 0 to 1 := 0);
port(
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
ethi : in eth_in_type;
etho : out eth_out_type
);
end component;
component grethm
generic(
hindex : integer := 0;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#FFF#;
pirq : integer := 0;
memtech : integer := 0;
ifg_gap : integer := 24;
attempt_limit : integer := 16;
backoff_limit : integer := 10;
slot_time : integer := 128;
mdcscaler : integer range 0 to 255 := 25;
enable_mdio : integer range 0 to 1 := 0;
fifosize : integer range 4 to 64 := 8;
nsync : integer range 1 to 2 := 2;
edcl : integer range 0 to 2 := 0;
edclbufsz : integer range 1 to 64 := 1;
burstlength : integer range 4 to 128 := 32;
macaddrh : integer := 16#00005E#;
macaddrl : integer := 16#000000#;
ipaddrh : integer := 16#c0a8#;
ipaddrl : integer := 16#0035#;
phyrstadr : integer range 0 to 32 := 0;
rmii : integer range 0 to 1 := 0;
sim : integer range 0 to 1 := 0;
giga : integer range 0 to 1 := 0;
oepol : integer range 0 to 1 := 0;
scanen : integer range 0 to 1 := 0);
port(
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
ethi : in eth_in_type;
etho : out eth_out_type
);
end component;
end;
|
------------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2003, Gaisler Research
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-----------------------------------------------------------------------------
-- Entity: net
-- File: net.vhd
-- Author: Jiri Gaisler - Gaisler Research
-- Description: Package with component and type declarations for network cores
------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
library grlib;
use grlib.amba.all;
package net is
type eth_in_type is record
gtx_clk : std_ulogic;
rmii_clk : std_ulogic;
tx_clk : std_ulogic;
rx_clk : std_ulogic;
rxd : std_logic_vector(7 downto 0);
rx_dv : std_ulogic;
rx_er : std_ulogic;
rx_col : std_ulogic;
rx_crs : std_ulogic;
mdio_i : std_ulogic;
phyrstaddr : std_logic_vector(4 downto 0);
edcladdr : std_logic_vector(3 downto 0);
end record;
type eth_out_type is record
reset : std_ulogic;
txd : std_logic_vector(7 downto 0);
tx_en : std_ulogic;
tx_er : std_ulogic;
mdc : std_ulogic;
mdio_o : std_ulogic;
mdio_oe : std_ulogic;
end record;
component eth_arb
generic(
fullduplex : integer := 0;
mdiomaster : integer := 0);
port(
rst : in std_logic;
clk : in std_logic;
ethi : in eth_in_type;
etho : out eth_out_type;
methi : in eth_out_type;
metho : out eth_in_type;
dethi : in eth_out_type;
detho : out eth_in_type
);
end component;
component greth is
generic(
hindex : integer := 0;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#FFF#;
pirq : integer := 0;
memtech : integer := 0;
ifg_gap : integer := 24;
attempt_limit : integer := 16;
backoff_limit : integer := 10;
slot_time : integer := 128;
mdcscaler : integer range 0 to 255 := 25;
enable_mdio : integer range 0 to 1 := 0;
fifosize : integer range 4 to 512 := 8;
nsync : integer range 1 to 2 := 2;
edcl : integer range 0 to 2 := 0;
edclbufsz : integer range 1 to 64 := 1;
macaddrh : integer := 16#00005E#;
macaddrl : integer := 16#000000#;
ipaddrh : integer := 16#c0a8#;
ipaddrl : integer := 16#0035#;
phyrstadr : integer range 0 to 32 := 0;
rmii : integer range 0 to 1 := 0;
oepol : integer range 0 to 1 := 0;
scanen : integer range 0 to 1 := 0;
ft : integer range 0 to 1 := 0);
port(
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
ethi : in eth_in_type;
etho : out eth_out_type
);
end component;
component greth_gbit is
generic(
hindex : integer := 0;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#FFF#;
pirq : integer := 0;
memtech : integer := 0;
ifg_gap : integer := 24;
attempt_limit : integer := 16;
backoff_limit : integer := 10;
slot_time : integer := 128;
mdcscaler : integer range 0 to 255 := 25;
nsync : integer range 1 to 2 := 2;
edcl : integer range 0 to 1 := 0;
edclbufsz : integer range 1 to 64 := 1;
burstlength : integer range 4 to 128 := 32;
macaddrh : integer := 16#00005E#;
macaddrl : integer := 16#000000#;
ipaddrh : integer := 16#c0a8#;
ipaddrl : integer := 16#0035#;
phyrstadr : integer range 0 to 32 := 0;
sim : integer range 0 to 1 := 0;
oepol : integer range 0 to 1 := 0;
scanen : integer range 0 to 1 := 0);
port(
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
ethi : in eth_in_type;
etho : out eth_out_type
);
end component;
component grethm
generic(
hindex : integer := 0;
pindex : integer := 0;
paddr : integer := 0;
pmask : integer := 16#FFF#;
pirq : integer := 0;
memtech : integer := 0;
ifg_gap : integer := 24;
attempt_limit : integer := 16;
backoff_limit : integer := 10;
slot_time : integer := 128;
mdcscaler : integer range 0 to 255 := 25;
enable_mdio : integer range 0 to 1 := 0;
fifosize : integer range 4 to 64 := 8;
nsync : integer range 1 to 2 := 2;
edcl : integer range 0 to 2 := 0;
edclbufsz : integer range 1 to 64 := 1;
burstlength : integer range 4 to 128 := 32;
macaddrh : integer := 16#00005E#;
macaddrl : integer := 16#000000#;
ipaddrh : integer := 16#c0a8#;
ipaddrl : integer := 16#0035#;
phyrstadr : integer range 0 to 32 := 0;
rmii : integer range 0 to 1 := 0;
sim : integer range 0 to 1 := 0;
giga : integer range 0 to 1 := 0;
oepol : integer range 0 to 1 := 0;
scanen : integer range 0 to 1 := 0);
port(
rst : in std_ulogic;
clk : in std_ulogic;
ahbmi : in ahb_mst_in_type;
ahbmo : out ahb_mst_out_type;
apbi : in apb_slv_in_type;
apbo : out apb_slv_out_type;
ethi : in eth_in_type;
etho : out eth_out_type
);
end component;
end;
|
-------------------------------------------------------------------------------
-- Entity: mcu
-- Author: Waj
-------------------------------------------------------------------------------
-- Top-level description of a simple von-Neumann MCU.
-- All top-level component are instantiated here. Also, tri-state buffers for
-- bi-directional GPIO pins are described here.
-------------------------------------------------------------------------------
-- Total # of FFs: 0
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.mcu_pkg.all;
entity mcu is
port(rst : in std_logic;
clk : in std_logic;
-- General-Purpose I/O ports
GPIO_0 : inout std_logic_vector(DW-1 downto 0);
GPIO_1 : inout std_logic_vector(DW-1 downto 0);
GPIO_2 : inout std_logic_vector(DW-1 downto 0);
GPIO_3 : inout std_logic_vector(DW-1 downto 0);
-- Dedicated LCD port
LCD : out std_logic_vector(LCD_PW-1 downto 0)
);
end mcu;
architecture rtl of mcu is
-- CPU signals
signal cpu2bus : t_cpu2bus;
signal bus2cpu : t_bus2cpu;
-- ROM signals
signal bus2rom : t_bus2ros;
signal rom2bus : t_ros2bus;
-- ROM signals
signal bus2ram : t_bus2rws;
signal ram2bus : t_rws2bus;
-- GPIO signals
signal bus2gpio : t_bus2rws;
signal gpio2bus : t_rws2bus;
signal gpio_in : t_gpio_pin_in;
signal gpio_out : t_gpio_pin_out;
-- LCD signals
signal bus2lcd : t_bus2rws;
signal lcd2bus : t_rws2bus;
signal lcd_out : std_logic_vector(LCD_PW-1 downto 0);
begin
-----------------------------------------------------------------------------
-- Tri-state buffers for GPIO pins
-----------------------------------------------------------------------------
gpio_in.in_0 <= GPIO_0;
gpio_in.in_1 <= GPIO_1;
gpio_in.in_2 <= GPIO_2;
gpio_in.in_3 <= GPIO_3;
gen_gpin: for k in 0 to DW-1 generate
GPIO_0(k) <= gpio_out.out_0(k) when gpio_out.enb_0(k) = '1' else 'Z';
GPIO_1(k) <= gpio_out.out_1(k) when gpio_out.enb_1(k) = '1' else 'Z';
GPIO_2(k) <= gpio_out.out_2(k) when gpio_out.enb_2(k) = '1' else 'Z';
GPIO_3(k) <= gpio_out.out_3(k) when gpio_out.enb_3(k) = '1' else 'Z';
end generate;
-----------------------------------------------------------------------------
-- LCD interface pins
-----------------------------------------------------------------------------
LCD <= lcd_out;
-----------------------------------------------------------------------------
-- Instantiation of top-level components (assumed to be in library work)
-----------------------------------------------------------------------------
-- CPU ----------------------------------------------------------------------
i_cpu: entity work.cpu
port map(
rst => rst,
clk => clk,
bus_in => bus2cpu,
bus_out => cpu2bus
);
-- BUS ----------------------------------------------------------------------
i_bus: entity work.buss
port map(
rst => rst,
clk => clk,
cpu_in => cpu2bus,
cpu_out => bus2cpu,
rom_in => rom2bus,
rom_out => bus2rom,
ram_in => ram2bus,
ram_out => bus2ram,
gpio_in => gpio2bus,
gpio_out => bus2gpio,
lcd_in => lcd2bus,
lcd_out => bus2lcd
);
-- ROM ----------------------------------------------------------------------
i_rom: entity work.rom
port map(
clk => clk,
bus_in => bus2rom,
bus_out => rom2bus
);
-- RAM ----------------------------------------------------------------------
i_ram: entity work.ram
port map(
clk => clk,
bus_in => bus2ram,
bus_out => ram2bus
);
-- GPIO ---------------------------------------------------------------------
i_gpio: entity work.gpio
port map(
rst => rst,
clk => clk,
bus_in => bus2gpio,
bus_out => gpio2bus,
pin_in => gpio_in,
pin_out => gpio_out
);
-- LCD ----------------------------------------------------------------------
i_lcd: entity work.lcd
port map(
rst => rst,
clk => clk,
bus_in => bus2lcd,
bus_out => lcd2bus,
lcd_out => lcd_out
);
end rtl;
|
-- -*- vhdl -*-
-------------------------------------------------------------------------------
-- Copyright (c) 2012, The CARPE Project, All rights reserved. --
-- See the AUTHORS file for individual contributors. --
-- --
-- Copyright and related rights are licensed under the Solderpad --
-- Hardware License, Version 0.51 (the "License"); you may not use this --
-- file except in compliance with the License. You may obtain a copy of --
-- the License at http://solderpad.org/licenses/SHL-0.51. --
-- --
-- Unless required by applicable law or agreed to in writing, software, --
-- hardware and materials distributed under this License is distributed --
-- on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, --
-- either express or implied. See the License for the specific language --
-- governing permissions and limitations under the License. --
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity add_inferred is
generic (
src_bits : natural := 32
);
port (
carryin : in std_ulogic;
src1 : in std_ulogic_vector(src_bits-1 downto 0);
src2 : in std_ulogic_vector(src_bits-1 downto 0);
result : out std_ulogic_vector(src_bits-1 downto 0);
carryout : out std_ulogic;
overflow : out std_ulogic
);
end;
|
ram_init_inst : ram_init PORT MAP (
clock => clock_sig,
init => init_sig,
dataout => dataout_sig,
init_busy => init_busy_sig,
ram_address => ram_address_sig,
ram_wren => ram_wren_sig
);
|
ram_init_inst : ram_init PORT MAP (
clock => clock_sig,
init => init_sig,
dataout => dataout_sig,
init_busy => init_busy_sig,
ram_address => ram_address_sig,
ram_wren => ram_wren_sig
);
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2738.vhd,v 1.2 2001-10-26 16:29:49 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c13s06b00x00p03n02i02738ent IS
END c13s06b00x00p03n02i02738ent;
ARCHITECTURE c13s06b00x00p03n02i02738arch OF c13s06b00x00p03n02i02738ent IS
constant c : string := ('"',' ');
constant s : string := """ ";
BEGIN
TESTING: PROCESS
BEGIN
assert NOT( c=s )
report "***PASSED TEST: c13s06b00x00p03n02i02738"
severity NOTE;
assert ( c=s )
report "***FAILED TEST: c13s06b00x00p03n02i02738 - A string literal that includes two adjacent quotation characters is interpreted as one quotation character."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s06b00x00p03n02i02738arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2738.vhd,v 1.2 2001-10-26 16:29:49 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c13s06b00x00p03n02i02738ent IS
END c13s06b00x00p03n02i02738ent;
ARCHITECTURE c13s06b00x00p03n02i02738arch OF c13s06b00x00p03n02i02738ent IS
constant c : string := ('"',' ');
constant s : string := """ ";
BEGIN
TESTING: PROCESS
BEGIN
assert NOT( c=s )
report "***PASSED TEST: c13s06b00x00p03n02i02738"
severity NOTE;
assert ( c=s )
report "***FAILED TEST: c13s06b00x00p03n02i02738 - A string literal that includes two adjacent quotation characters is interpreted as one quotation character."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s06b00x00p03n02i02738arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc2738.vhd,v 1.2 2001-10-26 16:29:49 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c13s06b00x00p03n02i02738ent IS
END c13s06b00x00p03n02i02738ent;
ARCHITECTURE c13s06b00x00p03n02i02738arch OF c13s06b00x00p03n02i02738ent IS
constant c : string := ('"',' ');
constant s : string := """ ";
BEGIN
TESTING: PROCESS
BEGIN
assert NOT( c=s )
report "***PASSED TEST: c13s06b00x00p03n02i02738"
severity NOTE;
assert ( c=s )
report "***FAILED TEST: c13s06b00x00p03n02i02738 - A string literal that includes two adjacent quotation characters is interpreted as one quotation character."
severity ERROR;
wait;
END PROCESS TESTING;
END c13s06b00x00p03n02i02738arch;
|
library verilog;
use verilog.vl_types.all;
entity altera_merlin_master_agent is
generic(
PKT_QOS_H : integer := 109;
PKT_QOS_L : integer := 106;
PKT_DATA_SIDEBAND_H: integer := 105;
PKT_DATA_SIDEBAND_L: integer := 98;
PKT_ADDR_SIDEBAND_H: integer := 97;
PKT_ADDR_SIDEBAND_L: integer := 93;
PKT_CACHE_H : integer := 92;
PKT_CACHE_L : integer := 89;
PKT_THREAD_ID_H : integer := 88;
PKT_THREAD_ID_L : integer := 87;
PKT_BEGIN_BURST : integer := 81;
PKT_PROTECTION_H: integer := 80;
PKT_PROTECTION_L: integer := 80;
PKT_BURSTWRAP_H : integer := 79;
PKT_BURSTWRAP_L : integer := 77;
PKT_BYTE_CNT_H : integer := 76;
PKT_BYTE_CNT_L : integer := 74;
PKT_ADDR_H : integer := 73;
PKT_ADDR_L : integer := 42;
PKT_BURST_SIZE_H: integer := 86;
PKT_BURST_SIZE_L: integer := 84;
PKT_BURST_TYPE_H: integer := 94;
PKT_BURST_TYPE_L: integer := 93;
PKT_TRANS_EXCLUSIVE: integer := 83;
PKT_TRANS_LOCK : integer := 82;
PKT_TRANS_COMPRESSED_READ: integer := 41;
PKT_TRANS_POSTED: integer := 40;
PKT_TRANS_WRITE : integer := 39;
PKT_TRANS_READ : integer := 38;
PKT_DATA_H : integer := 37;
PKT_DATA_L : integer := 6;
PKT_BYTEEN_H : integer := 5;
PKT_BYTEEN_L : integer := 2;
PKT_SRC_ID_H : integer := 1;
PKT_SRC_ID_L : integer := 1;
PKT_DEST_ID_H : integer := 0;
PKT_DEST_ID_L : integer := 0;
PKT_RESPONSE_STATUS_L: integer := 110;
PKT_RESPONSE_STATUS_H: integer := 111;
PKT_ORI_BURST_SIZE_L: integer := 112;
PKT_ORI_BURST_SIZE_H: integer := 114;
ST_DATA_W : integer := 115;
ST_CHANNEL_W : integer := 1;
AV_BURSTCOUNT_W : integer := 3;
ID : integer := 1;
SUPPRESS_0_BYTEEN_RSP: integer := 1;
BURSTWRAP_VALUE : integer := 4;
CACHE_VALUE : integer := 0;
SECURE_ACCESS_BIT: integer := 1;
USE_READRESPONSE: integer := 0;
USE_WRITERESPONSE: integer := 0;
PKT_BURSTWRAP_W : vl_notype;
PKT_BYTE_CNT_W : vl_notype;
PKT_PROTECTION_W: vl_notype;
PKT_ADDR_W : vl_notype;
PKT_DATA_W : vl_notype;
PKT_BYTEEN_W : vl_notype;
PKT_SRC_ID_W : vl_notype;
PKT_DEST_ID_W : vl_notype;
PKT_BURST_SIZE_W: vl_notype
);
port(
clk : in vl_logic;
reset : in vl_logic;
av_address : in vl_logic_vector;
av_write : in vl_logic;
av_read : in vl_logic;
av_writedata : in vl_logic_vector;
av_readdata : out vl_logic_vector;
av_waitrequest : out vl_logic;
av_readdatavalid: out vl_logic;
av_byteenable : in vl_logic_vector;
av_burstcount : in vl_logic_vector;
av_debugaccess : in vl_logic;
av_lock : in vl_logic;
av_response : out vl_logic_vector(1 downto 0);
av_writeresponserequest: in vl_logic;
av_writeresponsevalid: out vl_logic;
cp_valid : out vl_logic;
cp_data : out vl_logic_vector;
cp_startofpacket: out vl_logic;
cp_endofpacket : out vl_logic;
cp_ready : in vl_logic;
rp_valid : in vl_logic;
rp_data : in vl_logic_vector;
rp_channel : in vl_logic_vector;
rp_startofpacket: in vl_logic;
rp_endofpacket : in vl_logic;
rp_ready : out vl_logic
);
attribute mti_svvh_generic_type : integer;
attribute mti_svvh_generic_type of PKT_QOS_H : constant is 1;
attribute mti_svvh_generic_type of PKT_QOS_L : constant is 1;
attribute mti_svvh_generic_type of PKT_DATA_SIDEBAND_H : constant is 1;
attribute mti_svvh_generic_type of PKT_DATA_SIDEBAND_L : constant is 1;
attribute mti_svvh_generic_type of PKT_ADDR_SIDEBAND_H : constant is 1;
attribute mti_svvh_generic_type of PKT_ADDR_SIDEBAND_L : constant is 1;
attribute mti_svvh_generic_type of PKT_CACHE_H : constant is 1;
attribute mti_svvh_generic_type of PKT_CACHE_L : constant is 1;
attribute mti_svvh_generic_type of PKT_THREAD_ID_H : constant is 1;
attribute mti_svvh_generic_type of PKT_THREAD_ID_L : constant is 1;
attribute mti_svvh_generic_type of PKT_BEGIN_BURST : constant is 1;
attribute mti_svvh_generic_type of PKT_PROTECTION_H : constant is 1;
attribute mti_svvh_generic_type of PKT_PROTECTION_L : constant is 1;
attribute mti_svvh_generic_type of PKT_BURSTWRAP_H : constant is 1;
attribute mti_svvh_generic_type of PKT_BURSTWRAP_L : constant is 1;
attribute mti_svvh_generic_type of PKT_BYTE_CNT_H : constant is 1;
attribute mti_svvh_generic_type of PKT_BYTE_CNT_L : constant is 1;
attribute mti_svvh_generic_type of PKT_ADDR_H : constant is 1;
attribute mti_svvh_generic_type of PKT_ADDR_L : constant is 1;
attribute mti_svvh_generic_type of PKT_BURST_SIZE_H : constant is 1;
attribute mti_svvh_generic_type of PKT_BURST_SIZE_L : constant is 1;
attribute mti_svvh_generic_type of PKT_BURST_TYPE_H : constant is 1;
attribute mti_svvh_generic_type of PKT_BURST_TYPE_L : constant is 1;
attribute mti_svvh_generic_type of PKT_TRANS_EXCLUSIVE : constant is 1;
attribute mti_svvh_generic_type of PKT_TRANS_LOCK : constant is 1;
attribute mti_svvh_generic_type of PKT_TRANS_COMPRESSED_READ : constant is 1;
attribute mti_svvh_generic_type of PKT_TRANS_POSTED : constant is 1;
attribute mti_svvh_generic_type of PKT_TRANS_WRITE : constant is 1;
attribute mti_svvh_generic_type of PKT_TRANS_READ : constant is 1;
attribute mti_svvh_generic_type of PKT_DATA_H : constant is 1;
attribute mti_svvh_generic_type of PKT_DATA_L : constant is 1;
attribute mti_svvh_generic_type of PKT_BYTEEN_H : constant is 1;
attribute mti_svvh_generic_type of PKT_BYTEEN_L : constant is 1;
attribute mti_svvh_generic_type of PKT_SRC_ID_H : constant is 1;
attribute mti_svvh_generic_type of PKT_SRC_ID_L : constant is 1;
attribute mti_svvh_generic_type of PKT_DEST_ID_H : constant is 1;
attribute mti_svvh_generic_type of PKT_DEST_ID_L : constant is 1;
attribute mti_svvh_generic_type of PKT_RESPONSE_STATUS_L : constant is 1;
attribute mti_svvh_generic_type of PKT_RESPONSE_STATUS_H : constant is 1;
attribute mti_svvh_generic_type of PKT_ORI_BURST_SIZE_L : constant is 1;
attribute mti_svvh_generic_type of PKT_ORI_BURST_SIZE_H : constant is 1;
attribute mti_svvh_generic_type of ST_DATA_W : constant is 1;
attribute mti_svvh_generic_type of ST_CHANNEL_W : constant is 1;
attribute mti_svvh_generic_type of AV_BURSTCOUNT_W : constant is 1;
attribute mti_svvh_generic_type of ID : constant is 1;
attribute mti_svvh_generic_type of SUPPRESS_0_BYTEEN_RSP : constant is 1;
attribute mti_svvh_generic_type of BURSTWRAP_VALUE : constant is 1;
attribute mti_svvh_generic_type of CACHE_VALUE : constant is 1;
attribute mti_svvh_generic_type of SECURE_ACCESS_BIT : constant is 1;
attribute mti_svvh_generic_type of USE_READRESPONSE : constant is 1;
attribute mti_svvh_generic_type of USE_WRITERESPONSE : constant is 1;
attribute mti_svvh_generic_type of PKT_BURSTWRAP_W : constant is 3;
attribute mti_svvh_generic_type of PKT_BYTE_CNT_W : constant is 3;
attribute mti_svvh_generic_type of PKT_PROTECTION_W : constant is 3;
attribute mti_svvh_generic_type of PKT_ADDR_W : constant is 3;
attribute mti_svvh_generic_type of PKT_DATA_W : constant is 3;
attribute mti_svvh_generic_type of PKT_BYTEEN_W : constant is 3;
attribute mti_svvh_generic_type of PKT_SRC_ID_W : constant is 3;
attribute mti_svvh_generic_type of PKT_DEST_ID_W : constant is 3;
attribute mti_svvh_generic_type of PKT_BURST_SIZE_W : constant is 3;
end altera_merlin_master_agent;
|
--! @file dataLatch-syn-a.vhd
--! @brief Data latch generated architecture
-------------------------------------------------------------------------------
-- Architecture : syn
-------------------------------------------------------------------------------
--
-- (c) B&R Industrial Automation GmbH, 2014
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions
-- are met:
--
-- 1. Redistributions of source code must retain the above copyright
-- notice, this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form must reproduce the above copyright
-- notice, this list of conditions and the following disclaimer in the
-- documentation and/or other materials provided with the distribution.
--
-- 3. Neither the name of B&R nor the names of its
-- contributors may be used to endorse or promote products derived
-- from this software without prior written permission. For written
-- permission, please contact [email protected]
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
-------------------------------------------------------------------------------
--! Use standard ieee library
library ieee;
--! Use logic elements
use ieee.std_logic_1164.all;
--! Use libcommon library
library libcommon;
--! Use global package
use libcommon.global.all;
--! Use altera library
library altera;
--! Use primitive components
use altera.altera_primitives_components.dlatch;
--! @brief Altera data latch architecture
--! @details This architecture uses an Altera primitive component for the data
--! latch implementation.
architecture syn of dataLatch is
--! Low active clear
signal nClear : std_logic;
--! Low active preset
signal nPreset : std_logic;
begin
-- Generate low active signals
nClear <= not iClear;
nPreset <= cnInactivated; --unused preset
GEN_LATCH : for i in gDataWidth-1 downto 0 generate
INST_LATCH : dlatch
port map (
d => iData(i),
ena => iEnable,
clrn => nClear,
prn => nPreset,
q => oData(i)
);
end generate GEN_LATCH;
end architecture syn;
|
----------------------------------------------------------------------------------
-- Company: LARC - Escola Politecnica - University of Sao Paulo
-- Engineer: Pedro Maat C. Massolino
--
-- Create Date: 05/12/2012
-- Design Name: Stage_Polynomial_Calc_v2
-- Module Name: Stage_Polynomial_Calc_v2
-- Project Name: McEliece Goppa Decoder
-- Target Devices: Any
-- Tool versions: Xilinx ISE 13.3 WebPack
--
-- Description:
--
-- The 3rd step in Goppa Code Decoding.
--
-- This circuit is the stage for pipeline_polynomial_calc_v2. The pipeline is composed of
-- an arbitrary number of this stages.
--
-- For the computation this circuit applies the Horner scheme, where at each stage
-- an accumulator is multiplied by respective x and then added accumulated with coefficient.
-- In Horner scheme algorithm, it begin from the most significative coefficient until reaches
-- lesser significative coefficient.
--
-- To improve syndrome generation this circuit was adapted to support syndrome generation
-- in stage_polynomial_calc_v3
--
-- The circuits parameters
--
-- gf_2_m :
--
-- The size of the field used in this circuit. This parameter depends of the
-- Goppa code used.
--
-- Dependencies:
-- VHDL-93
--
-- mult_gf_2_m Rev 1.0
--
-- Revision:
-- Revision 1.0
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity stage_polynomial_calc_v2 is
Generic(gf_2_m : integer range 1 to 20 := 11);
Port (
value_x : in STD_LOGIC_VECTOR ((gf_2_m - 1) downto 0);
value_polynomial_coefficient : in STD_LOGIC_VECTOR ((gf_2_m - 1) downto 0);
value_acc : in STD_LOGIC_VECTOR ((gf_2_m - 1) downto 0);
new_value_acc : out STD_LOGIC_VECTOR ((gf_2_m - 1) downto 0)
);
end stage_polynomial_calc_v2;
architecture Behavioral of stage_polynomial_calc_v2 is
component mult_gf_2_m
Generic(gf_2_m : integer range 1 to 20 := 11);
Port(
a : in STD_LOGIC_VECTOR((gf_2_m - 1) downto 0);
b: in STD_LOGIC_VECTOR((gf_2_m - 1) downto 0);
o : out STD_LOGIC_VECTOR((gf_2_m - 1) downto 0)
);
end component;
signal mult_x_a : STD_LOGIC_VECTOR ((gf_2_m - 1) downto 0);
signal mult_x_b : STD_LOGIC_VECTOR ((gf_2_m - 1) downto 0);
signal mult_x_o : STD_LOGIC_VECTOR ((gf_2_m - 1) downto 0);
begin
mult_x : mult_gf_2_m
Generic Map (gf_2_m => gf_2_m)
Port Map (
a => mult_x_a,
b => mult_x_b,
o => mult_x_o
);
mult_x_a <= value_x;
mult_x_b <= value_acc xor value_polynomial_coefficient;
new_value_acc <= mult_x_o;
end Behavioral; |
----------------------------------------------------------------------------------
-- la.vhd
--
-- Copyright (C) 2006 Michael Poppitz
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-- General Public License for more details.
--
-- You should have received a copy of the GNU General Public License along
-- with this program; if not, write to the Free Software Foundation, Inc.,
-- 51 Franklin St, Fifth Floor, Boston, MA 02110, USA
--
----------------------------------------------------------------------------------
--
-- Details: http://www.sump.org/projects/analyzer/
--
-- Logic Analyzer top level module. It connects the core with the hardware
-- dependend IO modules and defines all inputs and outputs that represent
-- phyisical pins of the fpga.
--
-- It defines two constants FREQ and RATE. The first is the clock frequency
-- used for receiver and transmitter for generating the proper baud rate.
-- The second defines the speed at which to operate the serial port.
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
library UNISIM;
use UNISIM.VComponents.all;
entity la is
Port(
resetSwitch : in std_logic;
xtalClock : in std_logic;
exClock : in std_logic;
input : in std_logic_vector(31 downto 0);
rx : in std_logic;
tx : inout std_logic;
led : OUT std_logic_vector(7 downto 0);
switch : in std_logic_vector(1 downto 0)
);
end la;
architecture Behavioral of la is
component debounce IS
GENERIC(
counter_size : INTEGER := 19); --counter size (19 bits gives 10.5ms with 50MHz clock)
PORT(
clk : IN STD_LOGIC; --input clock
button : IN STD_LOGIC; --input signal to be debounced
result : OUT STD_LOGIC); --debounced signal
END component ;
COMPONENT clockman
PORT(
clkin : in STD_LOGIC;
clk0 : out std_logic
);
END COMPONENT;
COMPONENT eia232
generic (
FREQ : integer;
SCALE : integer;
RATE : integer
);
PORT(
clock : IN std_logic;
reset : in std_logic;
speed : IN std_logic_vector(1 downto 0);
rx : IN std_logic;
data : IN std_logic_vector(31 downto 0);
send : IN std_logic;
tx : OUT std_logic;
cmd : OUT std_logic_vector(39 downto 0);
execute : OUT std_logic;
busy : OUT std_logic
);
END COMPONENT;
COMPONENT core
PORT(
clock : IN std_logic;
extReset : IN std_logic;
cmd : IN std_logic_vector(39 downto 0);
execute : IN std_logic;
input : IN std_logic_vector(31 downto 0);
inputClock : IN std_logic;
sampleReady50 : OUT std_logic;
output : out STD_LOGIC_VECTOR (31 downto 0);
outputSend : out STD_LOGIC;
outputBusy : in STD_LOGIC;
memoryIn : IN std_logic_vector(31 downto 0);
memoryOut : OUT std_logic_vector(31 downto 0);
memoryRead : OUT std_logic;
memoryWrite : OUT std_logic
);
END COMPONENT;
COMPONENT sram_bram
PORT(
clock : IN std_logic;
input : IN std_logic_vector(31 downto 0);
output : OUT std_logic_vector(31 downto 0);
read : IN std_logic;
write : IN std_logic
);
END COMPONENT;
signal cmd : std_logic_vector (39 downto 0);
signal memoryIn, memoryOut : std_logic_vector (31 downto 0);
signal probeInput : std_logic_vector (31 downto 0);
signal output : std_logic_vector (31 downto 0);
signal clock : std_logic;
signal read, write, execute, send, busy : std_logic;
signal test_counter : std_logic_vector (40 downto 0);
signal rst_dbc : std_logic;
constant FREQ : integer := 100000000; -- limited to 100M by onboard SRAM
constant TRXSCALE : integer := 28; -- 100M / 28 / 115200 = 31 (5bit)
constant RATE : integer := 115200; -- maximum & base rate
begin
led(7 downto 0) <= exClock & resetSwitch & "0" & switch & "0" & rx & tx; --& "000";
-- test counter
process(clock)
begin
if rising_edge(clock) then
test_counter <= test_counter + 1;
end if;
end process;
--probeInput <= input;
probeInput <= test_counter(40 downto 9); -- use this to connect a counter to the inputs
Inst_clockman: clockman PORT MAP(
clkin => xtalClock,
clk0 => clock
);
inst_debounce: debounce
generic map (
counter_size => 19
)
port map (
clk => clock,
button => resetswitch,
result => rst_dbc
);
Inst_eia232: eia232
generic map (
FREQ => FREQ,
SCALE => TRXSCALE,
RATE => RATE
)
PORT MAP(
clock => clock,
--reset => resetSwitch,
reset => rst_dbc,
speed => switch,
rx => rx,
tx => tx,
cmd => cmd,
execute => execute,
data => output,
send => send,
busy => busy
);
Inst_core: core PORT MAP(
clock => clock,
--extReset => resetSwitch,
extReset => rst_dbc,
cmd => cmd,
execute => execute,
input => probeInput,
inputClock => exClock,
--sampleReady50 => ready50,
output => output,
outputSend => send,
outputBusy => busy,
memoryIn => memoryIn,
memoryOut => memoryOut,
memoryRead => read,
memoryWrite => write
);
Inst_sram: sram_bram PORT MAP(
clock => clock,
input => memoryOut,
output => memoryIn,
read => read,
write => write
);
end Behavioral;
|
----------------------------------------------------------------------------------
-- la.vhd
--
-- Copyright (C) 2006 Michael Poppitz
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-- General Public License for more details.
--
-- You should have received a copy of the GNU General Public License along
-- with this program; if not, write to the Free Software Foundation, Inc.,
-- 51 Franklin St, Fifth Floor, Boston, MA 02110, USA
--
----------------------------------------------------------------------------------
--
-- Details: http://www.sump.org/projects/analyzer/
--
-- Logic Analyzer top level module. It connects the core with the hardware
-- dependend IO modules and defines all inputs and outputs that represent
-- phyisical pins of the fpga.
--
-- It defines two constants FREQ and RATE. The first is the clock frequency
-- used for receiver and transmitter for generating the proper baud rate.
-- The second defines the speed at which to operate the serial port.
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
library UNISIM;
use UNISIM.VComponents.all;
entity la is
Port(
resetSwitch : in std_logic;
xtalClock : in std_logic;
exClock : in std_logic;
input : in std_logic_vector(31 downto 0);
rx : in std_logic;
tx : inout std_logic;
led : OUT std_logic_vector(7 downto 0);
switch : in std_logic_vector(1 downto 0)
);
end la;
architecture Behavioral of la is
component debounce IS
GENERIC(
counter_size : INTEGER := 19); --counter size (19 bits gives 10.5ms with 50MHz clock)
PORT(
clk : IN STD_LOGIC; --input clock
button : IN STD_LOGIC; --input signal to be debounced
result : OUT STD_LOGIC); --debounced signal
END component ;
COMPONENT clockman
PORT(
clkin : in STD_LOGIC;
clk0 : out std_logic
);
END COMPONENT;
COMPONENT eia232
generic (
FREQ : integer;
SCALE : integer;
RATE : integer
);
PORT(
clock : IN std_logic;
reset : in std_logic;
speed : IN std_logic_vector(1 downto 0);
rx : IN std_logic;
data : IN std_logic_vector(31 downto 0);
send : IN std_logic;
tx : OUT std_logic;
cmd : OUT std_logic_vector(39 downto 0);
execute : OUT std_logic;
busy : OUT std_logic
);
END COMPONENT;
COMPONENT core
PORT(
clock : IN std_logic;
extReset : IN std_logic;
cmd : IN std_logic_vector(39 downto 0);
execute : IN std_logic;
input : IN std_logic_vector(31 downto 0);
inputClock : IN std_logic;
sampleReady50 : OUT std_logic;
output : out STD_LOGIC_VECTOR (31 downto 0);
outputSend : out STD_LOGIC;
outputBusy : in STD_LOGIC;
memoryIn : IN std_logic_vector(31 downto 0);
memoryOut : OUT std_logic_vector(31 downto 0);
memoryRead : OUT std_logic;
memoryWrite : OUT std_logic
);
END COMPONENT;
COMPONENT sram_bram
PORT(
clock : IN std_logic;
input : IN std_logic_vector(31 downto 0);
output : OUT std_logic_vector(31 downto 0);
read : IN std_logic;
write : IN std_logic
);
END COMPONENT;
signal cmd : std_logic_vector (39 downto 0);
signal memoryIn, memoryOut : std_logic_vector (31 downto 0);
signal probeInput : std_logic_vector (31 downto 0);
signal output : std_logic_vector (31 downto 0);
signal clock : std_logic;
signal read, write, execute, send, busy : std_logic;
signal test_counter : std_logic_vector (40 downto 0);
signal rst_dbc : std_logic;
constant FREQ : integer := 100000000; -- limited to 100M by onboard SRAM
constant TRXSCALE : integer := 28; -- 100M / 28 / 115200 = 31 (5bit)
constant RATE : integer := 115200; -- maximum & base rate
begin
led(7 downto 0) <= exClock & resetSwitch & "0" & switch & "0" & rx & tx; --& "000";
-- test counter
process(clock)
begin
if rising_edge(clock) then
test_counter <= test_counter + 1;
end if;
end process;
--probeInput <= input;
probeInput <= test_counter(40 downto 9); -- use this to connect a counter to the inputs
Inst_clockman: clockman PORT MAP(
clkin => xtalClock,
clk0 => clock
);
inst_debounce: debounce
generic map (
counter_size => 19
)
port map (
clk => clock,
button => resetswitch,
result => rst_dbc
);
Inst_eia232: eia232
generic map (
FREQ => FREQ,
SCALE => TRXSCALE,
RATE => RATE
)
PORT MAP(
clock => clock,
--reset => resetSwitch,
reset => rst_dbc,
speed => switch,
rx => rx,
tx => tx,
cmd => cmd,
execute => execute,
data => output,
send => send,
busy => busy
);
Inst_core: core PORT MAP(
clock => clock,
--extReset => resetSwitch,
extReset => rst_dbc,
cmd => cmd,
execute => execute,
input => probeInput,
inputClock => exClock,
--sampleReady50 => ready50,
output => output,
outputSend => send,
outputBusy => busy,
memoryIn => memoryIn,
memoryOut => memoryOut,
memoryRead => read,
memoryWrite => write
);
Inst_sram: sram_bram PORT MAP(
clock => clock,
input => memoryOut,
output => memoryIn,
read => read,
write => write
);
end Behavioral;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
library work;
use work.BusMasters.all;
entity ADT7310_tb is
end ADT7310_tb;
architecture behavior of ADT7310_tb is
component ADT7310
port (
Reset_n_i : in std_logic;
Clk_i : in std_logic;
Enable_i : in std_logic;
CpuIntr_o : out std_logic;
ADT7310CS_n_o : out std_logic;
SPI_Data_i : in std_logic_vector(7 downto 0);
SPI_Write_o : out std_logic;
SPI_ReadNext_o : out std_logic;
SPI_Data_o : out std_logic_vector(7 downto 0);
SPI_FIFOFull_i : in std_logic;
SPI_FIFOEmpty_i : in std_logic;
SPI_Transmission_i : in std_logic;
SPICounterPresetH_i : in std_logic_vector(15 downto 0);
SPICounterPresetL_i : in std_logic_vector(15 downto 0);
Threshold_i : in std_logic_vector(15 downto 0);
PeriodCounterPreset_i : in std_logic_vector(15 downto 0);
SensorValue_o : out std_logic_vector(15 downto 0);
SPI_CPOL_o : out std_logic;
SPI_CPHA_o : out std_logic;
SPI_LSBFE_o : out std_logic
);
end component;
component adt7310_model
port (
SCLK_i : in std_logic;
DOUT_o : out std_logic;
DIN_i : in std_logic;
CS_n_i : in std_logic;
CT_n_o : out std_logic;
INT_n_o : out std_logic;
Temp_i : in real);
end component;
component ExtNames
port (
SPIFSM_Done : out std_logic
);
end component;
-- component generics
constant DataWidth : integer := 8;
-- Reset
signal Reset_n_i : std_logic := '0';
-- Clock
signal Clk_i : std_logic := '1';
signal Enable_i : std_logic;
signal CpuIntr_o : std_logic;
signal ADT7310CS_n_o : std_logic;
signal SPI_Data_i : std_logic_vector(7 downto 0);
signal SPI_Write_o : std_logic;
signal SPI_ReadNext_o : std_logic;
signal SPI_Data_o : std_logic_vector(7 downto 0);
signal SPI_FIFOFull_i : std_logic;
signal SPI_FIFOEmpty_i : std_logic;
signal SPI_Transmission_i : std_logic;
signal SPICounterPresetH_i : std_logic_vector(15 downto 0);
signal SPICounterPresetL_i : std_logic_vector(15 downto 0);
signal Threshold_i : std_logic_vector(15 downto 0);
signal PeriodCounterPreset_i : std_logic_vector(15 downto 0);
signal SensorValue_o : std_logic_vector(15 downto 0);
signal SensorValue_real : real;
signal SPI_CPOL_o : std_logic;
signal SPI_CPHA_o : std_logic;
signal SPI_LSBFE_o : std_logic;
signal SPI_SPPR_SPR_o : std_logic_vector(7 downto 0);
-- look into the ADT7310 app
-- alias SPIFSM_Done_i is << signal .adt7310_tb.DUT.SPIFSM_Done_s : std_logic >>;
-- ModelSim complains here, that the references signal is not a VHDL object.
-- True, this is a Verilog object. As a workaround the module ExtNames is created
-- which uses Verilog hierarchical names to reference the wire and assigns it to
-- an output. This module is instantiated (and it seems ModelSim only adds
-- Verilog<->VHDL signal converters on instance boundaries) and this output is
-- connected with the SPIFSM_Done_i signal.
signal SPIFSM_Done_i : std_logic; -- directly from inside SPI_FSM
-- Using the extracted Yosys FSM we get delta cycles and a glitch on
-- SPIFSM_Done_i. Therefore we generate a slightly delayed version and wait
-- on the ANDed value.
signal SPIFSM_Done_d : std_logic; -- sightly delayed
signal SPIFSM_Done_a : std_logic; -- SPIFSM_Done_i and SPIFSM_Done_d
-- ADT7310 component ports
signal SCLK_s : std_logic := '1';
signal DOUT_s : std_logic;
signal DIN_s : std_logic := '0';
signal CT_n_s : std_logic;
signal INT_n_s : std_logic;
signal Temp_s : real := 23.7;
-- SPI Master generics
constant SPPRWidth : integer := 4;
constant SPRWidth : integer := 4;
constant SPIFIFOReadWidth : integer := 4;
constant SPIFIFOWriteWidth : integer := 4;
-- SPI Master component ports
signal SPI_ScanEnable_s : std_logic := '0';
signal SPI_ScanClk_s : std_logic := '0';
signal SPI_ScanDataIn_s : std_logic := '0';
signal SPI_ScanDataOut_s : std_logic := '0';
-- The timer has to wait for 240ms. With a 16 bit resolution, the maximumn
-- counting periode is 3.66us. Here we set the clock signal to 10us = 100kHz.
-- The timer is preset to 24000.
constant ClkPeriode : time := 10 us;
begin
DUT: ADT7310
port map (
Reset_n_i => Reset_n_i,
Clk_i => Clk_i,
Enable_i => Enable_i,
CpuIntr_o => CpuIntr_o,
ADT7310CS_n_o => ADT7310CS_n_o,
SPI_Data_i => SPI_Data_i,
SPI_Write_o => SPI_Write_o,
SPI_ReadNext_o => SPI_ReadNext_o,
SPI_Data_o => SPI_Data_o,
SPI_FIFOFull_i => SPI_FIFOFull_i,
SPI_FIFOEmpty_i => SPI_FIFOEmpty_i,
SPI_Transmission_i => SPI_Transmission_i,
SPICounterPresetH_i => SPICounterPresetH_i,
SPICounterPresetL_i => SPICounterPresetL_i,
Threshold_i => Threshold_i,
PeriodCounterPreset_i => PeriodCounterPreset_i,
SensorValue_o => SensorValue_o,
SPI_CPOL_o => SPI_CPOL_o,
SPI_CPHA_o => SPI_CPHA_o,
SPI_LSBFE_o => SPI_LSBFE_o
);
SensorValue_real <= real(to_integer(unsigned(SensorValue_o)))/128.0;
ExtNames_1: ExtNames
port map (
SPIFSM_Done => SPIFSM_Done_i
);
SPIFSM_Done_d <= SPIFSM_Done_i after 1.0 ns;
SPIFSM_Done_a <= SPIFSM_Done_i and SPIFSM_Done_d;
spi_master_1: spi_master
generic map (
DataWidth => DataWidth,
SPPRWidth => SPPRWidth,
SPRWidth => SPRWidth,
FIFOReadWidth => SPIFIFOReadWidth,
FIFOWriteWidth => SPIFIFOWriteWidth
)
port map (
Reset_n => Reset_n_i,
Clk => Clk_i,
-- IO
SCK_o => SCLK_s,
MOSI_o => DIN_s,
MISO_i => DOUT_s,
-- control signals
CPOL_i => SPI_CPOL_o,
CPHA_i => SPI_CPHA_o,
LSBFE_i => SPI_LSBFE_o,
SPPR_i => SPI_SPPR_SPR_o(7 downto 4),
SPR_i => SPI_SPPR_SPR_o(3 downto 0),
Transmission_o => SPI_Transmission_i,
Write_i => SPI_Write_o,
ReadNext_i => SPI_ReadNext_o,
Data_i => SPI_Data_o,
Data_o => SPI_Data_i,
FIFOFull_o => SPI_FIFOFull_i,
FIFOEmpty_o => SPI_FIFOEmpty_i,
ScanEnable_i => SPI_ScanEnable_s,
ScanClk_i => SPI_ScanClk_s,
ScanDataIn_i => SPI_ScanDataIn_s,
ScanDataOut_o => SPI_ScanDataOut_s
);
adt7310_1: adt7310_model
port map (
SCLK_i => SCLK_s,
DOUT_o => DOUT_s,
DIN_i => DIN_s,
CS_n_i => ADT7310CS_n_o,
CT_n_o => CT_n_s,
INT_n_o => INT_n_s,
Temp_i => Temp_s);
-- constant value for reconfig signal
SPI_SPPR_SPR_o <= "00000000";
-- Generate clock signal
Clk_i <= not Clk_i after ClkPeriode*0.5;
StimulusProc: process
begin
Enable_i <= '0';
SPICounterPresetH_i <= "0000000000000000";
SPICounterPresetL_i <= "0101110111000000";
Threshold_i <= "0000000000011110";
PeriodCounterPreset_i <= "0000000000001010";
wait for 2.3*ClkPeriode;
assert SPI_CPOL_o = '1'
report "Dynamic signal SPI_CPOL_o should have constant value '1'" severity failure;
assert SPI_CPHA_o = '1'
report "Dynamic signal SPI_CPHA_o should have constant value '1'" severity failure;
assert SPI_LSBFE_o = '0'
report "Dynamic signal SPI_LSBFE_o should have constant value '0'" severity failure;
-- deassert Reset
Reset_n_i <= '1';
wait for 1.3*ClkPeriode; -- wait until spi_master's SCK_o goes '1' to conform to CPOL_i = '1'
Temp_s <= 23.7; -- degree C
-- three cycles with disabled SensorFSM
wait for 3*ClkPeriode;
-- enable SensorFSM
Enable_i <= '1';
wait until SPIFSM_Done_d = '1';
assert ADT7310CS_n_o = '1' report "CS_n should be '1' when SPIFSM is done" severity error;
assert CpuIntr_o = '0' report "CpuIntr should be '0' directly after SPIFSM is done" severity error;
wait until rising_edge(Clk_i); wait for 0.1*ClkPeriode; -- 1 cycle
assert CpuIntr_o = '1' report "CpuIntr should be '1' one cycle after SPIFSM is done" severity error;
assert abs(SensorValue_real - Temp_s) <= 1.0/16.0/2.0
report "Invalid temperature value: " & real'image(SensorValue_real) & "°C, should be " & real'image(Temp_s) & "°C"
severity error;
wait for 1*ClkPeriode; -- 1 cycle
-- The digital value is 128*Temp_s (plus/minus rounding to nearest
-- modulo 8). The threshold for too large changes is 30 (see
-- sensorfsm.vhd).
-- 23.7°C --> 3032
-- 25.7°C --> 3288 (delta: | 256| > 30)
-- 25.6°C --> 3280 (delta: | -8| < 30)
-- 25.5°C --> 3264 (delta: | -24| < 30)
-- 25.4°C --> 3248 (delta: | -40| >= 30)
-- new sensor value with large difference -> notify required
wait for 3*ClkPeriode; -- 3 cycle
Temp_s <= 25.7;
wait until SPIFSM_Done_d = '1';
assert ADT7310CS_n_o = '1' report "CS_n should be '1' when SPIFSM is done" severity error;
assert CpuIntr_o = '0' report "CpuIntr should be '0' directly after SPIFSM is done" severity error;
wait until rising_edge(Clk_i); wait for 0.1*ClkPeriode; -- 1 cycle
assert CpuIntr_o = '1' report "CpuIntr should be '1' one cycle after SPIFSM is done" severity error;
assert abs(SensorValue_real - Temp_s) <= 1.0/16.0/2.0
report "Invalid temperature value: " & real'image(SensorValue_real) & "°C, should be " & real'image(Temp_s) & "°C"
severity error;
wait for 1*ClkPeriode; -- 1 cycle
-- new sensor value with small difference -> no notification
wait for 3*ClkPeriode; -- 3 cycle
Temp_s <= 25.6;
wait until SPIFSM_Done_d = '1';
assert ADT7310CS_n_o = '1' report "CS_n should be '1' when SPIFSM is done" severity error;
assert CpuIntr_o = '0' report "CpuIntr should be '0' directly after SPIFSM is done" severity error;
wait until rising_edge(Clk_i); wait for 0.1*ClkPeriode; -- 1 cycle
assert CpuIntr_o = '0' report "CpuIntr should still be '0' one cycle after SPIFSM is done for small value change" severity error;
assert abs(SensorValue_real - 25.7) <= 1.0/16.0/2.0
report "Invalid temperature value: " & real'image(SensorValue_real) & "°C, should be old value " & real'image(25.7) & "°C"
severity error;
wait for 1*ClkPeriode; -- 1 cycle
-- new sensor value with small difference -> no notification
wait for 3*ClkPeriode; -- 3 cycle
Temp_s <= 25.5;
wait until SPIFSM_Done_d = '1';
assert ADT7310CS_n_o = '1' report "CS_n should be '1' when SPIFSM is done" severity error;
assert CpuIntr_o = '0' report "CpuIntr should be '0' directly after SPIFSM is done" severity error;
wait until rising_edge(Clk_i); wait for 0.1*ClkPeriode; -- 1 cycle
assert CpuIntr_o = '0' report "CpuIntr should still be '0' one cycle after SPIFSM is done for small value change" severity error;
assert abs(SensorValue_real - 25.7) <= 1.0/16.0/2.0
report "Invalid temperature value: " & real'image(SensorValue_real) & "°C, should be old value " & real'image(25.7) & "°C"
severity error;
wait for 1*ClkPeriode; -- 1 cycle
-- new sensor value with large difference -> notify required
wait for 3*ClkPeriode; -- 3 cycle
Temp_s <= 25.4;
wait until SPIFSM_Done_d = '1';
assert ADT7310CS_n_o = '1' report "CS_n should be '1' when SPIFSM is done" severity error;
assert CpuIntr_o = '0' report "CpuIntr should be '0' directly after SPIFSM is done" severity error;
wait until rising_edge(Clk_i); wait for 0.1*ClkPeriode; -- 1 cycle
assert CpuIntr_o = '1' report "CpuIntr should be '1' one cycle after SPIFSM is done" severity error;
assert abs(SensorValue_real - Temp_s) <= 1.0/16.0/2.0
report "Invalid temperature value: " & real'image(SensorValue_real) & "°C, should be " & real'image(Temp_s) & "°C"
severity error;
wait for 1*ClkPeriode; -- 1 cycle
wait for 100 ms;
-- End of simulation
report "### Simulation Finished ###" severity failure;
wait;
end process StimulusProc;
end behavior;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc634.vhd,v 1.3 2001-10-29 02:12:45 paw Exp $
-- $Revision: 1.3 $
--
-- ---------------------------------------------------------------------
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Tue Nov 5 16:37:48 1996 --
-- **************************** --
ENTITY c03s04b01x00p01n01i00634ent IS
END c03s04b01x00p01n01i00634ent;
ARCHITECTURE c03s04b01x00p01n01i00634arch OF c03s04b01x00p01n01i00634ent IS
type four_value is ('Z','0','1','X');
subtype binary is four_value range '0' to '1';
subtype word is bit_vector(0 to 15);
constant size : integer := 7;
type primary_memory is array(0 to size) of word;
type primary_memory_module is
record
enable : binary;
memory_number : primary_memory;
end record;
type primary_memory_module_file is file of primary_memory_module;
constant C38 : word := (others => '1');
constant C44 : primary_memory := (others => C38);
constant C45 : primary_memory_module := ('1',C44);
BEGIN
TESTING: PROCESS
file filein : primary_memory_module_file open write_mode is "iofile.43";
BEGIN
for i in 1 to 100 loop
write(filein, C45);
end loop;
assert FALSE
report "***PASSED TEST: c03s04b01x00p01n01i00634 - The output file will be verified by test s010288.vhd."
severity NOTE;
wait;
END PROCESS TESTING;
END c03s04b01x00p01n01i00634arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc634.vhd,v 1.3 2001-10-29 02:12:45 paw Exp $
-- $Revision: 1.3 $
--
-- ---------------------------------------------------------------------
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Tue Nov 5 16:37:48 1996 --
-- **************************** --
ENTITY c03s04b01x00p01n01i00634ent IS
END c03s04b01x00p01n01i00634ent;
ARCHITECTURE c03s04b01x00p01n01i00634arch OF c03s04b01x00p01n01i00634ent IS
type four_value is ('Z','0','1','X');
subtype binary is four_value range '0' to '1';
subtype word is bit_vector(0 to 15);
constant size : integer := 7;
type primary_memory is array(0 to size) of word;
type primary_memory_module is
record
enable : binary;
memory_number : primary_memory;
end record;
type primary_memory_module_file is file of primary_memory_module;
constant C38 : word := (others => '1');
constant C44 : primary_memory := (others => C38);
constant C45 : primary_memory_module := ('1',C44);
BEGIN
TESTING: PROCESS
file filein : primary_memory_module_file open write_mode is "iofile.43";
BEGIN
for i in 1 to 100 loop
write(filein, C45);
end loop;
assert FALSE
report "***PASSED TEST: c03s04b01x00p01n01i00634 - The output file will be verified by test s010288.vhd."
severity NOTE;
wait;
END PROCESS TESTING;
END c03s04b01x00p01n01i00634arch;
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc634.vhd,v 1.3 2001-10-29 02:12:45 paw Exp $
-- $Revision: 1.3 $
--
-- ---------------------------------------------------------------------
-- **************************** --
-- Ported to VHDL 93 by port93.pl - Tue Nov 5 16:37:48 1996 --
-- **************************** --
ENTITY c03s04b01x00p01n01i00634ent IS
END c03s04b01x00p01n01i00634ent;
ARCHITECTURE c03s04b01x00p01n01i00634arch OF c03s04b01x00p01n01i00634ent IS
type four_value is ('Z','0','1','X');
subtype binary is four_value range '0' to '1';
subtype word is bit_vector(0 to 15);
constant size : integer := 7;
type primary_memory is array(0 to size) of word;
type primary_memory_module is
record
enable : binary;
memory_number : primary_memory;
end record;
type primary_memory_module_file is file of primary_memory_module;
constant C38 : word := (others => '1');
constant C44 : primary_memory := (others => C38);
constant C45 : primary_memory_module := ('1',C44);
BEGIN
TESTING: PROCESS
file filein : primary_memory_module_file open write_mode is "iofile.43";
BEGIN
for i in 1 to 100 loop
write(filein, C45);
end loop;
assert FALSE
report "***PASSED TEST: c03s04b01x00p01n01i00634 - The output file will be verified by test s010288.vhd."
severity NOTE;
wait;
END PROCESS TESTING;
END c03s04b01x00p01n01i00634arch;
|
--------------------------------------------------------------------------------
-- company:
-- engineer:
--
-- vhdl test bench created by ise for module: random_number
--
-- dependencies:
--
-- revision:
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.Display_Management_pkg.all;
entity tb_Display_Management_entity is
end tb_Display_Management_entity;
architecture arch_tb_Display_Management_entity of tb_Display_Management_entity is
-- clock period definitions
constant clk_period : time := 10 ns; -- 100 MHz
constant enable_debug : boolean := true;
--------------------------------------------------------------
-- Display_Management
--------------------------------------------------------------
component Display_Management is
generic(
enable_debug : boolean := true;
resolution : string := "1920x1080@60Hz"
);
port(
------globally routed signals-------
Pixel_Clock : in std_logic;
Reset_n : in std_logic;
--=========== Inputs ==============
cross_position : in pixel_type;
--=== Memory for write pixel colors
-- *Clock Port A
clk_write_drawing_mem : in std_logic;
-- *Addresse of writing (Port A)
pixel_x : in std_logic_vector(8 downto 0);
pixel_y : in std_logic_vector(8 downto 0);
-- *Data to write in Port A
en_write_drawing_mem_in : in std_logic;
data_in_write_drawing_mem : in std_logic_vector(11 downto 0);
--=========== Outputs ==============
--------------- VGA ----------------
vga : out vga_type
);
end component Display_Management;
--------------------------------------------------------------
-- Signals
--------------------------------------------------------------
signal vga_from_vga_to_video_memory : internal_video_type;
signal vga_from_video_memory_to_osd_cross : internal_video_type;
signal vga_from_osd_cross_to_osb_border : internal_video_type;
signal vga_from_osd_border_to_shaping_vga : internal_video_type;
signal Clk : std_logic ;
signal reset_n : std_logic ;
signal color : color_type;
signal cross_position : pixel_type;
signal xpos : std_logic_vector(11 downto 0);
signal ypos : std_logic_vector(11 downto 0);
-- Memory for write pixel colors
signal en_drawing_mem : std_logic; --Enable Port A
signal en_write_drawing_mem : std_logic_vector(0 downto 0); -- Enable Write Port A
signal addr_write_drawing_mem : std_logic_vector(16 downto 0); -- Addresse of writing Port A
signal data_in_write_drawing_mem : std_logic_vector(11 downto 0); -- Data to write in Port A
signal vga_to_outputs : vga_type;
begin
--------------------------------------------------------------
-- UUT
--------------------------------------------------------------
Display_Management_inst : component Display_Management
generic map(
enable_debug => true,
resolution => "1600x900@60Hz"
)
port map(
------globally routed signals-------
Pixel_Clock => clk,
Reset_n => Reset_n,
--=========== Inputs ==============
cross_position => cross_position,
-- Memoyr for write pixel colors
-- *Clock Port A
clk_write_drawing_mem => clk,
-- *Addresse of writing (Port A)
pixel_x => xpos(10 downto 2),
pixel_y => ypos(10 downto 2),
-- *Data to write in Port A
en_write_drawing_mem_in => '1',
data_in_write_drawing_mem => data_in_write_drawing_mem,
--=========== Outputs ==============
vga => vga_to_outputs
);
--------------------------------------------------------------
-- Stimulus
--------------------------------------------------------------
-- clock process definitions
clk_process : process
begin
clk <= '0';
wait for clk_period;
clk <= '1';
wait for clk_period;
end process;
-- reset process
reset_proc: process
begin
reset_n <= '0';
wait for 6*clk_period;
reset_n <= '1';
wait;
end process;
-- reset process
cross_proc: process
begin
for Yc in 0 to 224 loop
for Xc in 1 to 399 loop
cross_position.x <= to_unsigned(4*Xc,cross_position.x'length);
cross_position.y <= to_unsigned(4*Yc,cross_position.y'length);
data_in_write_drawing_mem <= std_logic_vector(to_unsigned(Yc, data_in_write_drawing_mem'length));
wait for clk_period*2;
end loop;
end loop;
wait;
end process;
xpos <= std_logic_vector(cross_position.x);
ypos <= std_logic_vector(cross_position.y);
-- Read/write process
readn_write_proc: process
begin
--No action
color.red <= "1010";
color.green <= "0101";
color.blue <= "1001";
wait for 100us;
wait;
end process;
write_memory_pixel_proc: process
begin
--No action
en_drawing_mem <= '0';
en_write_drawing_mem <= (others => '0');
addr_write_drawing_mem <= (others => '0');
wait;
end process;
end arch_tb_Display_Management_entity;
|
-- File: bin2gray.vhd
-- Generated by MyHDL 1.0dev
-- Date: Mon May 23 16:09:27 2016
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use std.textio.all;
use work.pck_myhdl_10.all;
entity bin2gray is
port (
B: in unsigned(7 downto 0);
G: out unsigned(7 downto 0)
);
end entity bin2gray;
-- Gray encoder.
--
-- B -- binary input
-- G -- Gray encoded output
architecture MyHDL of bin2gray is
begin
G <= (shift_right(B, 1) xor B);
end architecture MyHDL;
|
-- File: bin2gray.vhd
-- Generated by MyHDL 1.0dev
-- Date: Mon May 23 16:09:27 2016
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use std.textio.all;
use work.pck_myhdl_10.all;
entity bin2gray is
port (
B: in unsigned(7 downto 0);
G: out unsigned(7 downto 0)
);
end entity bin2gray;
-- Gray encoder.
--
-- B -- binary input
-- G -- Gray encoded output
architecture MyHDL of bin2gray is
begin
G <= (shift_right(B, 1) xor B);
end architecture MyHDL;
|
-- File: bin2gray.vhd
-- Generated by MyHDL 1.0dev
-- Date: Mon May 23 16:09:27 2016
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use std.textio.all;
use work.pck_myhdl_10.all;
entity bin2gray is
port (
B: in unsigned(7 downto 0);
G: out unsigned(7 downto 0)
);
end entity bin2gray;
-- Gray encoder.
--
-- B -- binary input
-- G -- Gray encoded output
architecture MyHDL of bin2gray is
begin
G <= (shift_right(B, 1) xor B);
end architecture MyHDL;
|
-- File: bin2gray.vhd
-- Generated by MyHDL 1.0dev
-- Date: Mon May 23 16:09:27 2016
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use std.textio.all;
use work.pck_myhdl_10.all;
entity bin2gray is
port (
B: in unsigned(7 downto 0);
G: out unsigned(7 downto 0)
);
end entity bin2gray;
-- Gray encoder.
--
-- B -- binary input
-- G -- Gray encoded output
architecture MyHDL of bin2gray is
begin
G <= (shift_right(B, 1) xor B);
end architecture MyHDL;
|
-- File: bin2gray.vhd
-- Generated by MyHDL 1.0dev
-- Date: Mon May 23 16:09:27 2016
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use std.textio.all;
use work.pck_myhdl_10.all;
entity bin2gray is
port (
B: in unsigned(7 downto 0);
G: out unsigned(7 downto 0)
);
end entity bin2gray;
-- Gray encoder.
--
-- B -- binary input
-- G -- Gray encoded output
architecture MyHDL of bin2gray is
begin
G <= (shift_right(B, 1) xor B);
end architecture MyHDL;
|
-- File: bin2gray.vhd
-- Generated by MyHDL 1.0dev
-- Date: Mon May 23 16:09:27 2016
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use std.textio.all;
use work.pck_myhdl_10.all;
entity bin2gray is
port (
B: in unsigned(7 downto 0);
G: out unsigned(7 downto 0)
);
end entity bin2gray;
-- Gray encoder.
--
-- B -- binary input
-- G -- Gray encoded output
architecture MyHDL of bin2gray is
begin
G <= (shift_right(B, 1) xor B);
end architecture MyHDL;
|
--Copyright (C) 2016 Siavoosh Payandeh Azad
library ieee;
use ieee.std_logic_1164.all;
--use IEEE.STD_LOGIC_ARITH.ALL;
--use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity router_credit_based_PD_C is --fault classifier plus packet-dropping
generic (
DATA_WIDTH: integer := 32;
current_address : integer := 0;
Cx_rst : integer := 10;
healthy_counter_threshold : integer := 8;
faulty_counter_threshold: integer := 2;
counter_depth: integer := 4;
NoC_size: integer := 4
);
port (
reset, clk: in std_logic;
Rxy_reconf: in std_logic_vector(7 downto 0);
Reconfig : in std_logic;
RX_N, RX_E, RX_W, RX_S, RX_L : in std_logic_vector (DATA_WIDTH-1 downto 0);
credit_in_N, credit_in_E, credit_in_W, credit_in_S, credit_in_L: in std_logic;
valid_in_N, valid_in_E, valid_in_W, valid_in_S, valid_in_L : in std_logic;
valid_out_N, valid_out_E, valid_out_W, valid_out_S, valid_out_L : out std_logic;
credit_out_N, credit_out_E, credit_out_W, credit_out_S, credit_out_L: out std_logic;
TX_N, TX_E, TX_W, TX_S, TX_L: out std_logic_vector (DATA_WIDTH-1 downto 0);
Faulty_N_in, Faulty_E_in, Faulty_W_in, Faulty_S_in: in std_logic;
Faulty_N_out, Faulty_E_out, Faulty_W_out, Faulty_S_out: out std_logic
);
end router_credit_based_PD_C;
architecture behavior of router_credit_based_PD_C is
COMPONENT FIFO_credit_based is
generic (
DATA_WIDTH: integer := 32
);
port (reset: in std_logic;
clk: in std_logic;
RX: in std_logic_vector(DATA_WIDTH-1 downto 0);
valid_in: in std_logic;
read_en_N : in std_logic;
read_en_E : in std_logic;
read_en_W : in std_logic;
read_en_S : in std_logic;
read_en_L : in std_logic;
credit_out: out std_logic;
empty_out: out std_logic;
Data_out: out std_logic_vector(DATA_WIDTH-1 downto 0);
fault_info, health_info: out std_logic;
-- Checker outputs
-- Functional checkers
err_empty_full, err_empty_read_en, err_full_write_en, err_state_in_onehot, err_read_pointer_in_onehot, err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer, err_not_write_en_write_pointer, err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty, err_read_pointer_write_pointer_not_full, err_read_pointer_write_pointer_full,
err_read_pointer_increment, err_read_pointer_not_increment, err_write_en, err_not_write_en,
err_not_write_en1, err_not_write_en2, err_read_en_mismatch, err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : out std_logic
);
end COMPONENT;
COMPONENT counter_threshold_classifier is
generic (
counter_depth: integer := 8;
healthy_counter_threshold: integer := 4;
faulty_counter_threshold: integer := 4
);
port ( reset: in std_logic;
clk: in std_logic;
faulty_packet, Healthy_packet: in std_logic;
Healthy, intermittent, Faulty:out std_logic
);
end COMPONENT;
COMPONENT allocator is
port ( reset: in std_logic;
clk: in std_logic;
-- flow control
credit_in_N, credit_in_E, credit_in_W, credit_in_S, credit_in_L: in std_logic;
req_N_N, req_N_E, req_N_W, req_N_S, req_N_L: in std_logic;
req_E_N, req_E_E, req_E_W, req_E_S, req_E_L: in std_logic;
req_W_N, req_W_E, req_W_W, req_W_S, req_W_L: in std_logic;
req_S_N, req_S_E, req_S_W, req_S_S, req_S_L: in std_logic;
req_L_N, req_L_E, req_L_W, req_L_S, req_L_L: in std_logic;
empty_N, empty_E, empty_W, empty_S, empty_L: in std_logic;
-- grant_X_Y means the grant for X output port towards Y input port
-- this means for any X in [N, E, W, S, L] then set grant_X_Y is one hot!
valid_N, valid_E, valid_W, valid_S, valid_L : out std_logic;
grant_N_N, grant_N_E, grant_N_W, grant_N_S, grant_N_L: out std_logic;
grant_E_N, grant_E_E, grant_E_W, grant_E_S, grant_E_L: out std_logic;
grant_W_N, grant_W_E, grant_W_W, grant_W_S, grant_W_L: out std_logic;
grant_S_N, grant_S_E, grant_S_W, grant_S_S, grant_S_L: out std_logic;
grant_L_N, grant_L_E, grant_L_W, grant_L_S, grant_L_L: out std_logic;
-- Allocator logic checker outputs
err_grant_N_N_sig_not_empty_N_grant_N_N,
err_not_grant_N_N_sig_or_empty_N_not_grant_N_N,
err_grant_N_E_sig_not_empty_E_grant_N_E,
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E,
err_grant_N_W_sig_not_empty_W_grant_N_W,
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W,
err_grant_N_S_sig_not_empty_S_grant_N_S,
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S,
err_grant_N_L_sig_not_empty_L_grant_N_L,
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L,
err_grant_E_N_sig_not_empty_N_grant_E_N,
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N,
err_grant_E_E_sig_not_empty_E_grant_E_E,
err_not_grant_E_E_sig_or_empty_E_not_grant_E_E,
err_grant_E_W_sig_not_empty_W_grant_E_W,
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W,
err_grant_E_S_sig_not_empty_S_grant_E_S,
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S,
err_grant_E_L_sig_not_empty_L_grant_E_L,
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L,
err_grant_W_N_sig_not_empty_N_grant_W_N,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N,
err_grant_W_E_sig_not_empty_E_grant_W_E,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E,
err_grant_W_W_sig_not_empty_W_grant_W_W,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W,
err_grant_W_S_sig_not_empty_S_grant_W_S,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S,
err_grant_W_L_sig_not_empty_L_grant_W_L,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L,
err_grant_S_N_sig_not_empty_N_grant_S_N,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N,
err_grant_S_E_sig_not_empty_E_grant_S_E,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E,
err_grant_S_W_sig_not_empty_W_grant_S_W,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W,
err_grant_S_S_sig_not_empty_S_grant_S_S,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S,
err_grant_S_L_sig_not_empty_L_grant_S_L,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L,
err_grant_L_N_sig_not_empty_N_grant_L_N,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N,
err_grant_L_E_sig_not_empty_E_grant_L_E,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E,
err_grant_L_W_sig_not_empty_W_grant_L_W,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W,
err_grant_L_S_sig_not_empty_S_grant_L_S,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S,
err_grant_L_L_sig_not_empty_L_grant_L_L,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L,
err_grant_signals_not_empty_grant_N,
err_not_grant_signals_empty_not_grant_N,
err_grant_signals_not_empty_grant_E,
err_not_grant_signals_empty_not_grant_E,
err_grant_signals_not_empty_grant_W,
err_not_grant_signals_empty_not_grant_W,
err_grant_signals_not_empty_grant_S,
err_not_grant_signals_empty_not_grant_S,
err_grant_signals_not_empty_grant_L,
err_not_grant_signals_empty_not_grant_L,
err_grants_valid_not_match,
-- Allocator credit counter logic checker outputs
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_N_credit_counter_N_out_increment,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change,
err_grant_N_credit_counter_N_out_decrement,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_E_credit_counter_E_out_increment,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change,
err_grant_E_credit_counter_E_out_decrement,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_W_credit_counter_W_out_increment,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change,
err_grant_W_credit_counter_W_out_decrement,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_S_credit_counter_S_out_increment,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change,
err_grant_S_credit_counter_S_out_decrement,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
err_credit_in_L_credit_counter_L_out_increment,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change,
err_grant_L_credit_counter_L_out_decrement,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
-- Arbiter_in checker outputs
-- North Arbiter_in checker outputs
N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N, N_err_IDLE_grant_N,N_err_North_Req_N, N_err_North_grant_N, N_err_East_Req_E, N_err_East_grant_E,
N_err_West_Req_W, N_err_West_grant_W, N_err_South_Req_S,N_err_South_grant_S,N_err_Local_Req_L, N_err_Local_grant_L,
N_err_IDLE_Req_E, N_err_IDLE_grant_E, N_err_North_Req_E, N_err_North_grant_E, N_err_East_Req_W, N_err_East_grant_W,
N_err_West_Req_S, N_err_West_grant_S, N_err_South_Req_L, N_err_South_grant_L, N_err_Local_Req_N, N_err_Local_grant_N,
N_err_IDLE_Req_W, N_err_IDLE_grant_W, N_err_North_Req_W, N_err_North_grant_W, N_err_East_Req_S, N_err_East_grant_S,
N_err_West_Req_L, N_err_West_grant_L, N_err_South_Req_N, N_err_South_grant_N, N_err_Local_Req_E, N_err_Local_grant_E,
N_err_IDLE_Req_S, N_err_IDLE_grant_S, N_err_North_Req_S, N_err_North_grant_S, N_err_East_Req_L, N_err_East_grant_L,
N_err_West_Req_N, N_err_West_grant_N, N_err_South_Req_E, N_err_South_grant_E, N_err_Local_Req_W, N_err_Local_grant_W,
N_err_IDLE_Req_L, N_err_IDLE_grant_L, N_err_North_Req_L, N_err_North_grant_L, N_err_East_Req_N, N_err_East_grant_N,
N_err_West_Req_E, N_err_West_grant_E, N_err_South_Req_W, N_err_South_grant_W, N_err_Local_Req_S, N_err_Local_grant_S,
N_err_state_in_onehot, N_err_no_request_grants, N_err_request_no_grants,
N_err_no_Req_N_grant_N, N_err_no_Req_E_grant_E, N_err_no_Req_W_grant_W, N_err_no_Req_S_grant_S, N_err_no_Req_L_grant_L,
-- East Arbiter_in checker outputs
E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N, E_err_IDLE_grant_N,E_err_North_Req_N, E_err_North_grant_N, E_err_East_Req_E, E_err_East_grant_E,
E_err_West_Req_W, E_err_West_grant_W, E_err_South_Req_S,E_err_South_grant_S,E_err_Local_Req_L, E_err_Local_grant_L,
E_err_IDLE_Req_E, E_err_IDLE_grant_E, E_err_North_Req_E, E_err_North_grant_E, E_err_East_Req_W, E_err_East_grant_W,
E_err_West_Req_S, E_err_West_grant_S, E_err_South_Req_L, E_err_South_grant_L, E_err_Local_Req_N, E_err_Local_grant_N,
E_err_IDLE_Req_W, E_err_IDLE_grant_W, E_err_North_Req_W, E_err_North_grant_W, E_err_East_Req_S, E_err_East_grant_S,
E_err_West_Req_L, E_err_West_grant_L, E_err_South_Req_N, E_err_South_grant_N, E_err_Local_Req_E, E_err_Local_grant_E,
E_err_IDLE_Req_S, E_err_IDLE_grant_S, E_err_North_Req_S, E_err_North_grant_S, E_err_East_Req_L, E_err_East_grant_L,
E_err_West_Req_N, E_err_West_grant_N, E_err_South_Req_E, E_err_South_grant_E, E_err_Local_Req_W, E_err_Local_grant_W,
E_err_IDLE_Req_L, E_err_IDLE_grant_L, E_err_North_Req_L, E_err_North_grant_L, E_err_East_Req_N, E_err_East_grant_N,
E_err_West_Req_E, E_err_West_grant_E, E_err_South_Req_W, E_err_South_grant_W, E_err_Local_Req_S, E_err_Local_grant_S,
E_err_state_in_onehot, E_err_no_request_grants, E_err_request_no_grants,
E_err_no_Req_N_grant_N, E_err_no_Req_E_grant_E, E_err_no_Req_W_grant_W, E_err_no_Req_S_grant_S, E_err_no_Req_L_grant_L,
-- West Arbiter_in checker outputs
W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N, W_err_IDLE_grant_N,W_err_North_Req_N, W_err_North_grant_N, W_err_East_Req_E, W_err_East_grant_E,
W_err_West_Req_W, W_err_West_grant_W, W_err_South_Req_S,W_err_South_grant_S,W_err_Local_Req_L, W_err_Local_grant_L,
W_err_IDLE_Req_E, W_err_IDLE_grant_E, W_err_North_Req_E, W_err_North_grant_E, W_err_East_Req_W, W_err_East_grant_W,
W_err_West_Req_S, W_err_West_grant_S, W_err_South_Req_L, W_err_South_grant_L, W_err_Local_Req_N, W_err_Local_grant_N,
W_err_IDLE_Req_W, W_err_IDLE_grant_W, W_err_North_Req_W, W_err_North_grant_W, W_err_East_Req_S, W_err_East_grant_S,
W_err_West_Req_L, W_err_West_grant_L, W_err_South_Req_N, W_err_South_grant_N, W_err_Local_Req_E, W_err_Local_grant_E,
W_err_IDLE_Req_S, W_err_IDLE_grant_S, W_err_North_Req_S, W_err_North_grant_S, W_err_East_Req_L, W_err_East_grant_L,
W_err_West_Req_N, W_err_West_grant_N, W_err_South_Req_E, W_err_South_grant_E, W_err_Local_Req_W, W_err_Local_grant_W,
W_err_IDLE_Req_L, W_err_IDLE_grant_L, W_err_North_Req_L, W_err_North_grant_L, W_err_East_Req_N, W_err_East_grant_N,
W_err_West_Req_E, W_err_West_grant_E, W_err_South_Req_W, W_err_South_grant_W, W_err_Local_Req_S, W_err_Local_grant_S,
W_err_state_in_onehot, W_err_no_request_grants, W_err_request_no_grants,
W_err_no_Req_N_grant_N, W_err_no_Req_E_grant_E, W_err_no_Req_W_grant_W, W_err_no_Req_S_grant_S, W_err_no_Req_L_grant_L,
-- South Arbiter_in checker outputs
S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N, S_err_IDLE_grant_N,S_err_North_Req_N, S_err_North_grant_N, S_err_East_Req_E, S_err_East_grant_E,
S_err_West_Req_W, S_err_West_grant_W, S_err_South_Req_S,S_err_South_grant_S,S_err_Local_Req_L, S_err_Local_grant_L,
S_err_IDLE_Req_E, S_err_IDLE_grant_E, S_err_North_Req_E, S_err_North_grant_E, S_err_East_Req_W, S_err_East_grant_W,
S_err_West_Req_S, S_err_West_grant_S, S_err_South_Req_L, S_err_South_grant_L, S_err_Local_Req_N, S_err_Local_grant_N,
S_err_IDLE_Req_W, S_err_IDLE_grant_W, S_err_North_Req_W, S_err_North_grant_W, S_err_East_Req_S, S_err_East_grant_S,
S_err_West_Req_L, S_err_West_grant_L, S_err_South_Req_N, S_err_South_grant_N, S_err_Local_Req_E, S_err_Local_grant_E,
S_err_IDLE_Req_S, S_err_IDLE_grant_S, S_err_North_Req_S, S_err_North_grant_S, S_err_East_Req_L, S_err_East_grant_L,
S_err_West_Req_N, S_err_West_grant_N, S_err_South_Req_E, S_err_South_grant_E, S_err_Local_Req_W, S_err_Local_grant_W,
S_err_IDLE_Req_L, S_err_IDLE_grant_L, S_err_North_Req_L, S_err_North_grant_L, S_err_East_Req_N, S_err_East_grant_N,
S_err_West_Req_E, S_err_West_grant_E, S_err_South_Req_W, S_err_South_grant_W, S_err_Local_Req_S, S_err_Local_grant_S,
S_err_state_in_onehot, S_err_no_request_grants, S_err_request_no_grants,
S_err_no_Req_N_grant_N, S_err_no_Req_E_grant_E, S_err_no_Req_W_grant_W, S_err_no_Req_S_grant_S, S_err_no_Req_L_grant_L,
-- Local Arbiter_in checker outputs
L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N, L_err_IDLE_grant_N,L_err_North_Req_N, L_err_North_grant_N, L_err_East_Req_E, L_err_East_grant_E,
L_err_West_Req_W, L_err_West_grant_W, L_err_South_Req_S,L_err_South_grant_S,L_err_Local_Req_L, L_err_Local_grant_L,
L_err_IDLE_Req_E, L_err_IDLE_grant_E, L_err_North_Req_E, L_err_North_grant_E, L_err_East_Req_W, L_err_East_grant_W,
L_err_West_Req_S, L_err_West_grant_S, L_err_South_Req_L, L_err_South_grant_L, L_err_Local_Req_N, L_err_Local_grant_N,
L_err_IDLE_Req_W, L_err_IDLE_grant_W, L_err_North_Req_W, L_err_North_grant_W, L_err_East_Req_S, L_err_East_grant_S,
L_err_West_Req_L, L_err_West_grant_L, L_err_South_Req_N, L_err_South_grant_N, L_err_Local_Req_E, L_err_Local_grant_E,
L_err_IDLE_Req_S, L_err_IDLE_grant_S, L_err_North_Req_S, L_err_North_grant_S, L_err_East_Req_L, L_err_East_grant_L,
L_err_West_Req_N, L_err_West_grant_N, L_err_South_Req_E, L_err_South_grant_E, L_err_Local_Req_W, L_err_Local_grant_W,
L_err_IDLE_Req_L, L_err_IDLE_grant_L, L_err_North_Req_L, L_err_North_grant_L, L_err_East_Req_N, L_err_East_grant_N,
L_err_West_Req_E, L_err_West_grant_E, L_err_South_Req_W, L_err_South_grant_W, L_err_Local_Req_S, L_err_Local_grant_S,
L_err_state_in_onehot, L_err_no_request_grants, L_err_request_no_grants,
L_err_no_Req_N_grant_N, L_err_no_Req_E_grant_E, L_err_no_Req_W_grant_W, L_err_no_Req_S_grant_S, L_err_no_Req_L_grant_L,
-- Arbiter_out checker outputs
-- North Arbiter_out checker outputs
N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N,
N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E, N_err_North_req_X_E, N_err_East_req_X_W, N_err_West_req_X_S, N_err_South_req_X_L, N_err_Local_req_X_N,
N_err_IDLE_req_X_W, N_err_North_req_X_W, N_err_East_req_X_S, N_err_West_req_X_L, N_err_South_req_X_N, N_err_Local_req_X_E,
N_err_IDLE_req_X_S, N_err_North_req_X_S, N_err_East_req_X_L, N_err_West_req_X_N, N_err_South_req_X_E, N_err_Local_req_X_W,
N_err_IDLE_req_X_L, N_err_North_req_X_L, N_err_East_req_X_N, N_err_West_req_X_E, N_err_South_req_X_W, N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants, N_err_state_North_Invalid_Grant,N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant, N_err_state_South_Invalid_Grant,N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N,
E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E, E_err_North_req_X_E, E_err_East_req_X_W, E_err_West_req_X_S, E_err_South_req_X_L, E_err_Local_req_X_N,
E_err_IDLE_req_X_W, E_err_North_req_X_W, E_err_East_req_X_S, E_err_West_req_X_L, E_err_South_req_X_N, E_err_Local_req_X_E,
E_err_IDLE_req_X_S, E_err_North_req_X_S, E_err_East_req_X_L, E_err_West_req_X_N, E_err_South_req_X_E, E_err_Local_req_X_W,
E_err_IDLE_req_X_L, E_err_North_req_X_L, E_err_East_req_X_N, E_err_West_req_X_E, E_err_South_req_X_W, E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot, E_arbiter_out_err_no_request_grants, E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants, E_err_state_North_Invalid_Grant, E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant, E_err_state_South_Invalid_Grant, E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N,
W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E, W_err_North_req_X_E, W_err_East_req_X_W, W_err_West_req_X_S, W_err_South_req_X_L, W_err_Local_req_X_N,
W_err_IDLE_req_X_W, W_err_North_req_X_W, W_err_East_req_X_S, W_err_West_req_X_L, W_err_South_req_X_N, W_err_Local_req_X_E,
W_err_IDLE_req_X_S, W_err_North_req_X_S, W_err_East_req_X_L, W_err_West_req_X_N, W_err_South_req_X_E, W_err_Local_req_X_W,
W_err_IDLE_req_X_L, W_err_North_req_X_L, W_err_East_req_X_N, W_err_West_req_X_E, W_err_South_req_X_W, W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot, W_arbiter_out_err_no_request_grants, W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants, W_err_state_North_Invalid_Grant,W_err_state_East_Invalid_Grant, W_err_state_West_Invalid_Grant,
W_err_state_South_Invalid_Grant,W_err_state_Local_Invalid_Grant,W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N,
S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E, S_err_North_req_X_E, S_err_East_req_X_W, S_err_West_req_X_S, S_err_South_req_X_L, S_err_Local_req_X_N,
S_err_IDLE_req_X_W, S_err_North_req_X_W, S_err_East_req_X_S, S_err_West_req_X_L, S_err_South_req_X_N, S_err_Local_req_X_E,
S_err_IDLE_req_X_S, S_err_North_req_X_S, S_err_East_req_X_L, S_err_West_req_X_N, S_err_South_req_X_E, S_err_Local_req_X_W,
S_err_IDLE_req_X_L, S_err_North_req_X_L, S_err_East_req_X_N, S_err_West_req_X_E, S_err_South_req_X_W, S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot, S_arbiter_out_err_no_request_grants, S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants, S_err_state_North_Invalid_Grant,S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant, S_err_state_South_Invalid_Grant,S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N,
L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E, L_err_North_req_X_E, L_err_East_req_X_W, L_err_West_req_X_S, L_err_South_req_X_L, L_err_Local_req_X_N,
L_err_IDLE_req_X_W, L_err_North_req_X_W, L_err_East_req_X_S, L_err_West_req_X_L, L_err_South_req_X_N, L_err_Local_req_X_E,
L_err_IDLE_req_X_S, L_err_North_req_X_S, L_err_East_req_X_L, L_err_West_req_X_N, L_err_South_req_X_E, L_err_Local_req_X_W,
L_err_IDLE_req_X_L, L_err_North_req_X_L, L_err_East_req_X_N, L_err_West_req_X_E, L_err_South_req_X_W, L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot, L_arbiter_out_err_no_request_grants, L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants,
L_err_state_North_Invalid_Grant,
L_err_state_East_Invalid_Grant,
L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant,
L_err_state_Local_Invalid_Grant,
L_err_Grants_onehot_or_all_zero : out std_logic
);
end COMPONENT;
COMPONENT LBDR_packet_drop is
generic (
cur_addr_rst: integer := 8;
Cx_rst: integer := 8;
NoC_size: integer := 4
);
port ( reset: in std_logic;
clk: in std_logic;
Rxy_reconf: in std_logic_vector(7 downto 0);
Reconfig : in std_logic;
Faulty_C_N, Faulty_C_E, Faulty_C_W, Faulty_C_S: in std_logic;
empty: in std_logic;
flit_type: in std_logic_vector(2 downto 0);
dst_addr: in std_logic_vector(NoC_size-1 downto 0);
packet_drop_order: out std_logic;
grant_N, grant_E, grant_W, grant_S, grant_L: in std_logic;
Req_N, Req_E, Req_W, Req_S, Req_L:out std_logic;
-- Checker outputs
-- Routing part checkers
err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot,
err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order,
-- Cx_Reconf checkers
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
-- Rxy_Reconf checkers
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal : out std_logic
);
end COMPONENT;
COMPONENT XBAR is
generic (
DATA_WIDTH: integer := 32
);
port (
North_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
East_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
West_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
South_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
Local_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
sel: in std_logic_vector (4 downto 0);
Data_out: out std_logic_vector(DATA_WIDTH-1 downto 0)
);
end COMPONENT;
signal FIFO_D_out_N, FIFO_D_out_E, FIFO_D_out_W, FIFO_D_out_S, FIFO_D_out_L: std_logic_vector(DATA_WIDTH-1 downto 0);
-- Grant_XY : Grant signal generated from Arbiter for output X connected to FIFO of input Y
signal Grant_NN, Grant_NE, Grant_NW, Grant_NS, Grant_NL: std_logic;
signal Grant_EN, Grant_EE, Grant_EW, Grant_ES, Grant_EL: std_logic;
signal Grant_WN, Grant_WE, Grant_WW, Grant_WS, Grant_WL: std_logic;
signal Grant_SN, Grant_SE, Grant_SW, Grant_SS, Grant_SL: std_logic;
signal Grant_LN, Grant_LE, Grant_LW, Grant_LS, Grant_LL: std_logic;
signal Req_NN, Req_EN, Req_WN, Req_SN, Req_LN: std_logic;
signal Req_NE, Req_EE, Req_WE, Req_SE, Req_LE: std_logic;
signal Req_NW, Req_EW, Req_WW, Req_SW, Req_LW: std_logic;
signal Req_NS, Req_ES, Req_WS, Req_SS, Req_LS: std_logic;
signal Req_NL, Req_EL, Req_WL, Req_SL, Req_LL: std_logic;
signal empty_N, empty_E, empty_W, empty_S, empty_L: std_logic;
signal Xbar_sel: array (4 downto 0) of std_logic_vector(4 downto 0);
signal Xbar_sel_N, Xbar_sel_E, Xbar_sel_W, Xbar_sel_S, Xbar_sel_L: std_logic_vector(4 downto 0);
signal faulty_packet_N, faulty_packet_E, faulty_packet_W, faulty_packet_S, faulty_packet_L: std_logic;
signal healthy_packet_N, healthy_packet_E, healthy_packet_W, healthy_packet_S, healthy_packet_L: std_logic;
signal packet_drop_order_N, packet_drop_order_E, packet_drop_order_W, packet_drop_order_S, packet_drop_order_L: std_logic;
signal healthy_link_N, healthy_link_E, healthy_link_W, healthy_link_S, healthy_link_L: std_logic;
signal sig_Faulty_N_out, sig_Faulty_E_out, sig_Faulty_W_out, sig_Faulty_S_out, faulty_link_L: std_logic;
signal intermittent_link_N, intermittent_link_E, intermittent_link_W, intermittent_link_S, intermittent_link_L: std_logic;
-- Signals needed for control part checkers
-- Signals needed for LBDR packet drop checkers
-- North
signal N_err_header_empty_Requests_FF_Requests_in,
N_err_tail_Requests_in_all_zero,
N_err_tail_empty_Requests_FF_Requests_in,
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
N_err_grants_onehot,
N_err_grants_mismatch,
N_err_header_tail_Requests_FF_Requests_in,
N_err_dst_addr_cur_addr_N1,
N_err_dst_addr_cur_addr_not_N1,
N_err_dst_addr_cur_addr_E1,
N_err_dst_addr_cur_addr_not_E1,
N_err_dst_addr_cur_addr_W1,
N_err_dst_addr_cur_addr_not_W1,
N_err_dst_addr_cur_addr_S1,
N_err_dst_addr_cur_addr_not_S1,
N_err_dst_addr_cur_addr_not_Req_L_in,
N_err_dst_addr_cur_addr_Req_L_in,
N_err_header_not_empty_Req_N_in,
N_err_header_not_empty_Req_E_in,
N_err_header_not_empty_Req_W_in,
N_err_header_not_empty_Req_S_in,
N_err_header_not_empty_packet_drop_in,
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
N_err_header_empty_packet_drop_in_packet_drop_equal,
N_err_tail_not_empty_packet_drop_not_packet_drop_in,
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
N_err_packet_drop_order,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- East
signal E_err_header_empty_Requests_FF_Requests_in,
E_err_tail_Requests_in_all_zero,
E_err_tail_empty_Requests_FF_Requests_in,
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
E_err_grants_onehot,
E_err_grants_mismatch,
E_err_header_tail_Requests_FF_Requests_in,
E_err_dst_addr_cur_addr_N1,
E_err_dst_addr_cur_addr_not_N1,
E_err_dst_addr_cur_addr_E1,
E_err_dst_addr_cur_addr_not_E1,
E_err_dst_addr_cur_addr_W1,
E_err_dst_addr_cur_addr_not_W1,
E_err_dst_addr_cur_addr_S1,
E_err_dst_addr_cur_addr_not_S1,
E_err_dst_addr_cur_addr_not_Req_L_in,
E_err_dst_addr_cur_addr_Req_L_in,
E_err_header_not_empty_Req_N_in,
E_err_header_not_empty_Req_E_in,
E_err_header_not_empty_Req_W_in,
E_err_header_not_empty_Req_S_in,
E_err_header_not_empty_packet_drop_in,
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
E_err_header_empty_packet_drop_in_packet_drop_equal,
E_err_tail_not_empty_packet_drop_not_packet_drop_in,
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
E_err_packet_drop_order,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- West
signal W_err_header_empty_Requests_FF_Requests_in,
W_err_tail_Requests_in_all_zero,
W_err_tail_empty_Requests_FF_Requests_in,
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
W_err_grants_onehot,
W_err_grants_mismatch,
W_err_header_tail_Requests_FF_Requests_in,
W_err_dst_addr_cur_addr_N1,
W_err_dst_addr_cur_addr_not_N1,
W_err_dst_addr_cur_addr_E1,
W_err_dst_addr_cur_addr_not_E1,
W_err_dst_addr_cur_addr_W1,
W_err_dst_addr_cur_addr_not_W1,
W_err_dst_addr_cur_addr_S1,
W_err_dst_addr_cur_addr_not_S1,
W_err_dst_addr_cur_addr_not_Req_L_in,
W_err_dst_addr_cur_addr_Req_L_in,
W_err_header_not_empty_Req_N_in,
W_err_header_not_empty_Req_E_in,
W_err_header_not_empty_Req_W_in,
W_err_header_not_empty_Req_S_in,
W_err_header_not_empty_packet_drop_in,
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
W_err_header_empty_packet_drop_in_packet_drop_equal,
W_err_tail_not_empty_packet_drop_not_packet_drop_in,
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
W_err_packet_drop_order,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- South
signal S_err_header_empty_Requests_FF_Requests_in,
S_err_tail_Requests_in_all_zero,
S_err_tail_empty_Requests_FF_Requests_in,
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
S_err_grants_onehot,
S_err_grants_mismatch,
S_err_header_tail_Requests_FF_Requests_in,
S_err_dst_addr_cur_addr_N1,
S_err_dst_addr_cur_addr_not_N1,
S_err_dst_addr_cur_addr_E1,
S_err_dst_addr_cur_addr_not_E1,
S_err_dst_addr_cur_addr_W1,
S_err_dst_addr_cur_addr_not_W1,
S_err_dst_addr_cur_addr_S1,
S_err_dst_addr_cur_addr_not_S1,
S_err_dst_addr_cur_addr_not_Req_L_in,
S_err_dst_addr_cur_addr_Req_L_in,
S_err_header_not_empty_Req_N_in,
S_err_header_not_empty_Req_E_in,
S_err_header_not_empty_Req_W_in,
S_err_header_not_empty_Req_S_in,
S_err_header_not_empty_packet_drop_in,
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
S_err_header_empty_packet_drop_in_packet_drop_equal,
S_err_tail_not_empty_packet_drop_not_packet_drop_in,
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
S_err_packet_drop_order,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- Local
signal L_err_header_empty_Requests_FF_Requests_in,
L_err_tail_Requests_in_all_zero,
L_err_tail_empty_Requests_FF_Requests_in,
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
L_err_grants_onehot,
L_err_grants_mismatch,
L_err_header_tail_Requests_FF_Requests_in,
L_err_dst_addr_cur_addr_N1,
L_err_dst_addr_cur_addr_not_N1,
L_err_dst_addr_cur_addr_E1,
L_err_dst_addr_cur_addr_not_E1,
L_err_dst_addr_cur_addr_W1,
L_err_dst_addr_cur_addr_not_W1,
L_err_dst_addr_cur_addr_S1,
L_err_dst_addr_cur_addr_not_S1,
L_err_dst_addr_cur_addr_not_Req_L_in,
L_err_dst_addr_cur_addr_Req_L_in,
L_err_header_not_empty_Req_N_in,
L_err_header_not_empty_Req_E_in,
L_err_header_not_empty_Req_W_in,
L_err_header_not_empty_Req_S_in,
L_err_header_not_empty_packet_drop_in,
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
L_err_header_empty_packet_drop_in_packet_drop_equal,
L_err_tail_not_empty_packet_drop_not_packet_drop_in,
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
L_err_packet_drop_order,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------
-- Signals needed for FIFO packet drop with fault classifier support checkers
-- North
-- Functional checkers
signal N_err_empty_full,
N_err_empty_read_en,
N_err_full_write_en,
N_err_state_in_onehot,
N_err_read_pointer_in_onehot,
N_err_write_pointer_in_onehot,
-- Structural checkers
N_err_write_en_write_pointer,
N_err_not_write_en_write_pointer,
N_err_read_pointer_write_pointer_not_empty,
N_err_read_pointer_write_pointer_empty,
N_err_read_pointer_write_pointer_not_full,
N_err_read_pointer_write_pointer_full,
N_err_read_pointer_increment,
N_err_read_pointer_not_increment,
N_err_write_en,
N_err_not_write_en,
N_err_not_write_en1,
N_err_not_write_en2,
N_err_read_en_mismatch,
N_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
N_err_fake_credit_read_en_fake_credit_counter_in_increment,
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
N_err_fake_credit_read_en_credit_out,
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
N_err_state_out_Idle_not_fault_out_not_fake_credit,
N_err_state_out_Idle_not_fault_out_not_fault_info,
N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
N_err_state_out_Idle_fault_out_fake_credit,
N_err_state_out_Idle_fault_out_state_in_Packet_drop,
N_err_state_out_Idle_fault_out_fault_info,
N_err_state_out_Idle_fault_out_faulty_packet_in,
N_err_state_out_Idle_not_health_info,
N_err_state_out_Idle_not_write_fake_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Header_flit_valid_in_fault_out_fault_info,
N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Header_flit_not_valid_in_not_fault_info,
N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
N_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
N_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Body_flit_valid_in_fault_out_fault_info,
N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Body_flit_not_valid_in_not_fault_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
N_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
N_err_state_out_Body_flit_valid_in_not_health_info,
N_err_state_out_Body_flit_not_fake_credit,
N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
N_err_state_out_Tail_flit_not_valid_in_not_fault_info,
N_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
N_err_state_out_Tail_flit_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Packet_drop_not_fault_info,
N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- East
-- Functional checkers
signal E_err_empty_full,
E_err_empty_read_en,
E_err_full_write_en,
E_err_state_in_onehot,
E_err_read_pointer_in_onehot,
E_err_write_pointer_in_onehot,
-- Structural checkers
E_err_write_en_write_pointer,
E_err_not_write_en_write_pointer,
E_err_read_pointer_write_pointer_not_empty,
E_err_read_pointer_write_pointer_empty,
E_err_read_pointer_write_pointer_not_full,
E_err_read_pointer_write_pointer_full,
E_err_read_pointer_increment,
E_err_read_pointer_not_increment,
E_err_write_en,
E_err_not_write_en,
E_err_not_write_en1,
E_err_not_write_en2,
E_err_read_en_mismatch,
E_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
E_err_fake_credit_read_en_fake_credit_counter_in_increment,
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
E_err_fake_credit_read_en_credit_out,
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
E_err_state_out_Idle_not_fault_out_not_fake_credit,
E_err_state_out_Idle_not_fault_out_not_fault_info,
E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
E_err_state_out_Idle_fault_out_fake_credit,
E_err_state_out_Idle_fault_out_state_in_Packet_drop,
E_err_state_out_Idle_fault_out_fault_info,
E_err_state_out_Idle_fault_out_faulty_packet_in,
E_err_state_out_Idle_not_health_info,
E_err_state_out_Idle_not_write_fake_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Header_flit_valid_in_fault_out_fault_info,
E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Header_flit_not_valid_in_not_fault_info,
E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
E_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
E_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Body_flit_valid_in_fault_out_fault_info,
E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Body_flit_not_valid_in_not_fault_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
E_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
E_err_state_out_Body_flit_valid_in_not_health_info,
E_err_state_out_Body_flit_not_fake_credit,
E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
E_err_state_out_Tail_flit_not_valid_in_not_fault_info,
E_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
E_err_state_out_Tail_flit_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Packet_drop_not_fault_info,
E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- West
-- Functional checkers
signal W_err_empty_full, W_err_empty_read_en, W_err_full_write_en, W_err_state_in_onehot,
W_err_read_pointer_in_onehot, W_err_write_pointer_in_onehot,
-- Structural checkers
W_err_write_en_write_pointer,
W_err_not_write_en_write_pointer,
W_err_read_pointer_write_pointer_not_empty,
W_err_read_pointer_write_pointer_empty,
W_err_read_pointer_write_pointer_not_full,
W_err_read_pointer_write_pointer_full,
W_err_read_pointer_increment,
W_err_read_pointer_not_increment,
W_err_write_en,
W_err_not_write_en,
W_err_not_write_en1,
W_err_not_write_en2,
W_err_read_en_mismatch,
W_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
W_err_fake_credit_read_en_fake_credit_counter_in_increment,
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
W_err_fake_credit_read_en_credit_out,
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
W_err_state_out_Idle_not_fault_out_not_fake_credit,
W_err_state_out_Idle_not_fault_out_not_fault_info,
W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
W_err_state_out_Idle_fault_out_fake_credit,
W_err_state_out_Idle_fault_out_state_in_Packet_drop,
W_err_state_out_Idle_fault_out_fault_info,
W_err_state_out_Idle_fault_out_faulty_packet_in,
W_err_state_out_Idle_not_health_info,
W_err_state_out_Idle_not_write_fake_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Header_flit_valid_in_fault_out_fault_info,
W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Header_flit_not_valid_in_not_fault_info,
W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
W_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
W_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Body_flit_valid_in_fault_out_fault_info,
W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Body_flit_not_valid_in_not_fault_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
W_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
W_err_state_out_Body_flit_valid_in_not_health_info,
W_err_state_out_Body_flit_not_fake_credit,
W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
W_err_state_out_Tail_flit_not_valid_in_not_fault_info,
W_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
W_err_state_out_Tail_flit_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Packet_drop_not_fault_info,
W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- South
-- Functional checkers
signal S_err_empty_full, S_err_empty_read_en, S_err_full_write_en,
S_err_state_in_onehot, S_err_read_pointer_in_onehot, S_err_write_pointer_in_onehot,
-- Structural checkers
S_err_write_en_write_pointer,
S_err_not_write_en_write_pointer,
S_err_read_pointer_write_pointer_not_empty,
S_err_read_pointer_write_pointer_empty,
S_err_read_pointer_write_pointer_not_full,
S_err_read_pointer_write_pointer_full,
S_err_read_pointer_increment,
S_err_read_pointer_not_increment,
S_err_write_en,
S_err_not_write_en,
S_err_not_write_en1,
S_err_not_write_en2,
S_err_read_en_mismatch,
S_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
S_err_fake_credit_read_en_fake_credit_counter_in_increment,
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
S_err_fake_credit_read_en_credit_out,
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
S_err_state_out_Idle_not_fault_out_not_fake_credit,
S_err_state_out_Idle_not_fault_out_not_fault_info,
S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
S_err_state_out_Idle_fault_out_fake_credit,
S_err_state_out_Idle_fault_out_state_in_Packet_drop,
S_err_state_out_Idle_fault_out_fault_info,
S_err_state_out_Idle_fault_out_faulty_packet_in,
S_err_state_out_Idle_not_health_info,
S_err_state_out_Idle_not_write_fake_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Header_flit_valid_in_fault_out_fault_info,
S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Header_flit_not_valid_in_not_fault_info,
S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
S_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
S_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Body_flit_valid_in_fault_out_fault_info,
S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Body_flit_not_valid_in_not_fault_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
S_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
S_err_state_out_Body_flit_valid_in_not_health_info,
S_err_state_out_Body_flit_not_fake_credit,
S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
S_err_state_out_Tail_flit_not_valid_in_not_fault_info,
S_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
S_err_state_out_Tail_flit_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Packet_drop_not_fault_info,
S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- Local
-- Functional checkers
signal L_err_empty_full,
L_err_empty_read_en,
L_err_full_write_en,
L_err_state_in_onehot,
L_err_read_pointer_in_onehot,
L_err_write_pointer_in_onehot,
-- Structural checkers
L_err_write_en_write_pointer,
L_err_not_write_en_write_pointer,
L_err_read_pointer_write_pointer_not_empty,
L_err_read_pointer_write_pointer_empty,
L_err_read_pointer_write_pointer_not_full,
L_err_read_pointer_write_pointer_full,
L_err_read_pointer_increment,
L_err_read_pointer_not_increment,
L_err_write_en,
L_err_not_write_en,
L_err_not_write_en1,
L_err_not_write_en2,
L_err_read_en_mismatch,
L_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
L_err_fake_credit_read_en_fake_credit_counter_in_increment,
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
L_err_fake_credit_read_en_credit_out,
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
L_err_state_out_Idle_not_fault_out_not_fake_credit,
L_err_state_out_Idle_not_fault_out_not_fault_info,
L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
L_err_state_out_Idle_fault_out_fake_credit,
L_err_state_out_Idle_fault_out_state_in_Packet_drop,
L_err_state_out_Idle_fault_out_fault_info,
L_err_state_out_Idle_fault_out_faulty_packet_in,
L_err_state_out_Idle_not_health_info,
L_err_state_out_Idle_not_write_fake_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Header_flit_valid_in_fault_out_fault_info,
L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Header_flit_not_valid_in_not_fault_info,
L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
L_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
L_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Body_flit_valid_in_fault_out_fault_info,
L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Body_flit_not_valid_in_not_fault_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
L_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
L_err_state_out_Body_flit_valid_in_not_health_info,
L_err_state_out_Body_flit_not_fake_credit,
L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
L_err_state_out_Tail_flit_not_valid_in_not_fault_info,
L_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
L_err_state_out_Tail_flit_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Packet_drop_not_fault_info,
L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
------------------------------------------------------------------------------------------------------------------------
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-- Signals needed for Allocator unit
-- Allocator logic checker outputs
signal err_grant_N_N_sig_not_empty_N_grant_N_N, err_not_grant_N_N_sig_or_empty_N_not_grant_N_N,
err_grant_N_E_sig_not_empty_E_grant_N_E, err_not_grant_N_E_sig_or_empty_E_not_grant_N_E,
err_grant_N_W_sig_not_empty_W_grant_N_W, err_not_grant_N_W_sig_or_empty_W_not_grant_N_W,
err_grant_N_S_sig_not_empty_S_grant_N_S, err_not_grant_N_S_sig_or_empty_S_not_grant_N_S,
err_grant_N_L_sig_not_empty_L_grant_N_L, err_not_grant_N_L_sig_or_empty_L_not_grant_N_L,
err_grant_E_N_sig_not_empty_N_grant_E_N, err_not_grant_E_N_sig_or_empty_N_not_grant_E_N,
err_grant_E_E_sig_not_empty_E_grant_E_E, err_not_grant_E_E_sig_or_empty_E_not_grant_E_E,
err_grant_E_W_sig_not_empty_W_grant_E_W, err_not_grant_E_W_sig_or_empty_W_not_grant_E_W,
err_grant_E_S_sig_not_empty_S_grant_E_S, err_not_grant_E_S_sig_or_empty_S_not_grant_E_S,
err_grant_E_L_sig_not_empty_L_grant_E_L, err_not_grant_E_L_sig_or_empty_L_not_grant_E_L,
err_grant_W_N_sig_not_empty_N_grant_W_N,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N,
err_grant_W_E_sig_not_empty_E_grant_W_E,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E,
err_grant_W_W_sig_not_empty_W_grant_W_W,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W,
err_grant_W_S_sig_not_empty_S_grant_W_S,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S,
err_grant_W_L_sig_not_empty_L_grant_W_L,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L,
err_grant_S_N_sig_not_empty_N_grant_S_N,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N,
err_grant_S_E_sig_not_empty_E_grant_S_E,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E,
err_grant_S_W_sig_not_empty_W_grant_S_W,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W,
err_grant_S_S_sig_not_empty_S_grant_S_S,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S,
err_grant_S_L_sig_not_empty_L_grant_S_L,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L,
err_grant_L_N_sig_not_empty_N_grant_L_N,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N,
err_grant_L_E_sig_not_empty_E_grant_L_E,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E,
err_grant_L_W_sig_not_empty_W_grant_L_W,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W,
err_grant_L_S_sig_not_empty_S_grant_L_S,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S,
err_grant_L_L_sig_not_empty_L_grant_L_L,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L,
err_grant_signals_not_empty_grant_N,
err_not_grant_signals_empty_not_grant_N,
err_grant_signals_not_empty_grant_E,
err_not_grant_signals_empty_not_grant_E,
err_grant_signals_not_empty_grant_W,
err_not_grant_signals_empty_not_grant_W,
err_grant_signals_not_empty_grant_S,
err_not_grant_signals_empty_not_grant_S,
err_grant_signals_not_empty_grant_L,
err_not_grant_signals_empty_not_grant_L,
err_grants_valid_not_match: std_logic;
-- Allocator credit_counter logic checker outputs
signal err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_N_credit_counter_N_out_increment,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change,
err_grant_N_credit_counter_N_out_decrement,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_E_credit_counter_E_out_increment,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change,
err_grant_E_credit_counter_E_out_decrement,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_W_credit_counter_W_out_increment,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change,
err_grant_W_credit_counter_W_out_decrement,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_S_credit_counter_S_out_increment,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change,
err_grant_S_credit_counter_S_out_decrement,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
err_credit_in_L_credit_counter_L_out_increment,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change,
err_grant_L_credit_counter_L_out_decrement,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal : std_logic;
---------------------------------------------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------
-- Arbiter_in Checker signals (part of allocator unit)
-- North Arbiter_in checker outputs
signal N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N, N_err_IDLE_grant_N,N_err_North_Req_N, N_err_North_grant_N, N_err_East_Req_E, N_err_East_grant_E,
N_err_West_Req_W, N_err_West_grant_W, N_err_South_Req_S,N_err_South_grant_S,N_err_Local_Req_L, N_err_Local_grant_L,
N_err_IDLE_Req_E, N_err_IDLE_grant_E, N_err_North_Req_E, N_err_North_grant_E, N_err_East_Req_W, N_err_East_grant_W,
N_err_West_Req_S, N_err_West_grant_S, N_err_South_Req_L, N_err_South_grant_L, N_err_Local_Req_N, N_err_Local_grant_N,
N_err_IDLE_Req_W, N_err_IDLE_grant_W, N_err_North_Req_W, N_err_North_grant_W, N_err_East_Req_S, N_err_East_grant_S,
N_err_West_Req_L, N_err_West_grant_L, N_err_South_Req_N, N_err_South_grant_N, N_err_Local_Req_E, N_err_Local_grant_E,
N_err_IDLE_Req_S, N_err_IDLE_grant_S, N_err_North_Req_S, N_err_North_grant_S, N_err_East_Req_L, N_err_East_grant_L,
N_err_West_Req_N, N_err_West_grant_N, N_err_South_Req_E, N_err_South_grant_E, N_err_Local_Req_W, N_err_Local_grant_W,
N_err_IDLE_Req_L, N_err_IDLE_grant_L, N_err_North_Req_L, N_err_North_grant_L, N_err_East_Req_N, N_err_East_grant_N,
N_err_West_Req_E, N_err_West_grant_E, N_err_South_Req_W, N_err_South_grant_W, N_err_Local_Req_S, N_err_Local_grant_S,
N_err_arbiter_state_in_onehot, N_err_no_request_grants, N_err_request_no_grants,
N_err_no_Req_N_grant_N, N_err_no_Req_E_grant_E, N_err_no_Req_W_grant_W, N_err_no_Req_S_grant_S, N_err_no_Req_L_grant_L,
-- East Arbiter_in checker outputs
E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N, E_err_IDLE_grant_N,E_err_North_Req_N, E_err_North_grant_N, E_err_East_Req_E, E_err_East_grant_E,
E_err_West_Req_W, E_err_West_grant_W, E_err_South_Req_S,E_err_South_grant_S,E_err_Local_Req_L, E_err_Local_grant_L,
E_err_IDLE_Req_E, E_err_IDLE_grant_E, E_err_North_Req_E, E_err_North_grant_E, E_err_East_Req_W, E_err_East_grant_W,
E_err_West_Req_S, E_err_West_grant_S, E_err_South_Req_L, E_err_South_grant_L, E_err_Local_Req_N, E_err_Local_grant_N,
E_err_IDLE_Req_W, E_err_IDLE_grant_W, E_err_North_Req_W, E_err_North_grant_W, E_err_East_Req_S, E_err_East_grant_S,
E_err_West_Req_L, E_err_West_grant_L, E_err_South_Req_N, E_err_South_grant_N, E_err_Local_Req_E, E_err_Local_grant_E,
E_err_IDLE_Req_S, E_err_IDLE_grant_S, E_err_North_Req_S, E_err_North_grant_S, E_err_East_Req_L, E_err_East_grant_L,
E_err_West_Req_N, E_err_West_grant_N, E_err_South_Req_E, E_err_South_grant_E, E_err_Local_Req_W, E_err_Local_grant_W,
E_err_IDLE_Req_L, E_err_IDLE_grant_L, E_err_North_Req_L, E_err_North_grant_L, E_err_East_Req_N, E_err_East_grant_N,
E_err_West_Req_E, E_err_West_grant_E, E_err_South_Req_W, E_err_South_grant_W, E_err_Local_Req_S, E_err_Local_grant_S,
E_err_arbiter_state_in_onehot, E_err_no_request_grants, E_err_request_no_grants,
E_err_no_Req_N_grant_N,E_err_no_Req_E_grant_E, E_err_no_Req_W_grant_W, E_err_no_Req_S_grant_S, E_err_no_Req_L_grant_L,
-- West Arbiter_in checker outputs
W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N, W_err_IDLE_grant_N,W_err_North_Req_N, W_err_North_grant_N, W_err_East_Req_E, W_err_East_grant_E,
W_err_West_Req_W, W_err_West_grant_W, W_err_South_Req_S,W_err_South_grant_S,W_err_Local_Req_L, W_err_Local_grant_L,
W_err_IDLE_Req_E, W_err_IDLE_grant_E, W_err_North_Req_E, W_err_North_grant_E, W_err_East_Req_W, W_err_East_grant_W,
W_err_West_Req_S, W_err_West_grant_S, W_err_South_Req_L, W_err_South_grant_L, W_err_Local_Req_N, W_err_Local_grant_N,
W_err_IDLE_Req_W, W_err_IDLE_grant_W, W_err_North_Req_W, W_err_North_grant_W, W_err_East_Req_S, W_err_East_grant_S,
W_err_West_Req_L, W_err_West_grant_L, W_err_South_Req_N, W_err_South_grant_N, W_err_Local_Req_E, W_err_Local_grant_E,
W_err_IDLE_Req_S, W_err_IDLE_grant_S, W_err_North_Req_S, W_err_North_grant_S, W_err_East_Req_L, W_err_East_grant_L,
W_err_West_Req_N, W_err_West_grant_N, W_err_South_Req_E, W_err_South_grant_E, W_err_Local_Req_W, W_err_Local_grant_W,
W_err_IDLE_Req_L, W_err_IDLE_grant_L, W_err_North_Req_L, W_err_North_grant_L, W_err_East_Req_N, W_err_East_grant_N,
W_err_West_Req_E, W_err_West_grant_E, W_err_South_Req_W, W_err_South_grant_W, W_err_Local_Req_S, W_err_Local_grant_S,
W_err_arbiter_state_in_onehot, W_err_no_request_grants, W_err_request_no_grants,
W_err_no_Req_N_grant_N, W_err_no_Req_E_grant_E, W_err_no_Req_W_grant_W, W_err_no_Req_S_grant_S, W_err_no_Req_L_grant_L,
-- South Arbiter_in checker outputs
S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N, S_err_IDLE_grant_N,S_err_North_Req_N, S_err_North_grant_N, S_err_East_Req_E, S_err_East_grant_E,
S_err_West_Req_W, S_err_West_grant_W, S_err_South_Req_S,S_err_South_grant_S,S_err_Local_Req_L, S_err_Local_grant_L,
S_err_IDLE_Req_E, S_err_IDLE_grant_E, S_err_North_Req_E, S_err_North_grant_E, S_err_East_Req_W, S_err_East_grant_W,
S_err_West_Req_S, S_err_West_grant_S, S_err_South_Req_L, S_err_South_grant_L, S_err_Local_Req_N, S_err_Local_grant_N,
S_err_IDLE_Req_W, S_err_IDLE_grant_W, S_err_North_Req_W, S_err_North_grant_W, S_err_East_Req_S, S_err_East_grant_S,
S_err_West_Req_L, S_err_West_grant_L, S_err_South_Req_N, S_err_South_grant_N, S_err_Local_Req_E, S_err_Local_grant_E,
S_err_IDLE_Req_S, S_err_IDLE_grant_S, S_err_North_Req_S, S_err_North_grant_S, S_err_East_Req_L, S_err_East_grant_L,
S_err_West_Req_N, S_err_West_grant_N, S_err_South_Req_E, S_err_South_grant_E, S_err_Local_Req_W, S_err_Local_grant_W,
S_err_IDLE_Req_L, S_err_IDLE_grant_L, S_err_North_Req_L, S_err_North_grant_L, S_err_East_Req_N, S_err_East_grant_N,
S_err_West_Req_E, S_err_West_grant_E, S_err_South_Req_W, S_err_South_grant_W, S_err_Local_Req_S, S_err_Local_grant_S,
S_err_arbiter_state_in_onehot, S_err_no_request_grants, S_err_request_no_grants,
S_err_no_Req_N_grant_N, S_err_no_Req_E_grant_E, S_err_no_Req_W_grant_W, S_err_no_Req_S_grant_S, S_err_no_Req_L_grant_L,
-- Local Arbiter_in checker outputs
L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N, L_err_IDLE_grant_N,L_err_North_Req_N, L_err_North_grant_N, L_err_East_Req_E, L_err_East_grant_E,
L_err_West_Req_W, L_err_West_grant_W, L_err_South_Req_S,L_err_South_grant_S,L_err_Local_Req_L, L_err_Local_grant_L,
L_err_IDLE_Req_E, L_err_IDLE_grant_E, L_err_North_Req_E, L_err_North_grant_E, L_err_East_Req_W, L_err_East_grant_W,
L_err_West_Req_S, L_err_West_grant_S, L_err_South_Req_L, L_err_South_grant_L, L_err_Local_Req_N, L_err_Local_grant_N,
L_err_IDLE_Req_W, L_err_IDLE_grant_W, L_err_North_Req_W, L_err_North_grant_W, L_err_East_Req_S, L_err_East_grant_S,
L_err_West_Req_L, L_err_West_grant_L, L_err_South_Req_N, L_err_South_grant_N, L_err_Local_Req_E, L_err_Local_grant_E,
L_err_IDLE_Req_S, L_err_IDLE_grant_S, L_err_North_Req_S, L_err_North_grant_S, L_err_East_Req_L, L_err_East_grant_L,
L_err_West_Req_N, L_err_West_grant_N, L_err_South_Req_E, L_err_South_grant_E, L_err_Local_Req_W, L_err_Local_grant_W,
L_err_IDLE_Req_L, L_err_IDLE_grant_L, L_err_North_Req_L, L_err_North_grant_L, L_err_East_Req_N, L_err_East_grant_N,
L_err_West_Req_E, L_err_West_grant_E, L_err_South_Req_W, L_err_South_grant_W, L_err_Local_Req_S, L_err_Local_grant_S,
L_err_arbiter_state_in_onehot,
L_err_no_request_grants,
L_err_request_no_grants,
L_err_no_Req_N_grant_N,
L_err_no_Req_E_grant_E,
L_err_no_Req_W_grant_W,
L_err_no_Req_S_grant_S,
L_err_no_Req_L_grant_L : std_logic;
---------------------------------------------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------
-- Arbiter_out Checker signals (part of allocator unit)
-- North Arbiter_out checker outputs
signal N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N,
N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E, N_err_North_req_X_E, N_err_East_req_X_W, N_err_West_req_X_S, N_err_South_req_X_L, N_err_Local_req_X_N,
N_err_IDLE_req_X_W, N_err_North_req_X_W, N_err_East_req_X_S, N_err_West_req_X_L, N_err_South_req_X_N, N_err_Local_req_X_E,
N_err_IDLE_req_X_S, N_err_North_req_X_S, N_err_East_req_X_L, N_err_West_req_X_N, N_err_South_req_X_E, N_err_Local_req_X_W,
N_err_IDLE_req_X_L, N_err_North_req_X_L, N_err_East_req_X_N, N_err_West_req_X_E, N_err_South_req_X_W, N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants, N_err_state_North_Invalid_Grant,N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant, N_err_state_South_Invalid_Grant,N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N,
E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E, E_err_North_req_X_E, E_err_East_req_X_W, E_err_West_req_X_S, E_err_South_req_X_L, E_err_Local_req_X_N,
E_err_IDLE_req_X_W, E_err_North_req_X_W, E_err_East_req_X_S, E_err_West_req_X_L, E_err_South_req_X_N, E_err_Local_req_X_E,
E_err_IDLE_req_X_S, E_err_North_req_X_S, E_err_East_req_X_L, E_err_West_req_X_N, E_err_South_req_X_E, E_err_Local_req_X_W,
E_err_IDLE_req_X_L, E_err_North_req_X_L, E_err_East_req_X_N, E_err_West_req_X_E, E_err_South_req_X_W, E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot, E_arbiter_out_err_no_request_grants, E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants, E_err_state_North_Invalid_Grant,E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant, E_err_state_South_Invalid_Grant,E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N,
W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E, W_err_North_req_X_E, W_err_East_req_X_W, W_err_West_req_X_S, W_err_South_req_X_L, W_err_Local_req_X_N,
W_err_IDLE_req_X_W, W_err_North_req_X_W, W_err_East_req_X_S, W_err_West_req_X_L, W_err_South_req_X_N, W_err_Local_req_X_E,
W_err_IDLE_req_X_S, W_err_North_req_X_S, W_err_East_req_X_L, W_err_West_req_X_N, W_err_South_req_X_E, W_err_Local_req_X_W,
W_err_IDLE_req_X_L, W_err_North_req_X_L, W_err_East_req_X_N, W_err_West_req_X_E, W_err_South_req_X_W, W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot, W_arbiter_out_err_no_request_grants, W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants, W_err_state_North_Invalid_Grant,W_err_state_East_Invalid_Grant, W_err_state_West_Invalid_Grant, W_err_state_South_Invalid_Grant,W_err_state_Local_Invalid_Grant,W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N,
S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E, S_err_North_req_X_E, S_err_East_req_X_W, S_err_West_req_X_S, S_err_South_req_X_L, S_err_Local_req_X_N,
S_err_IDLE_req_X_W, S_err_North_req_X_W, S_err_East_req_X_S, S_err_West_req_X_L, S_err_South_req_X_N, S_err_Local_req_X_E,
S_err_IDLE_req_X_S, S_err_North_req_X_S, S_err_East_req_X_L, S_err_West_req_X_N, S_err_South_req_X_E, S_err_Local_req_X_W,
S_err_IDLE_req_X_L, S_err_North_req_X_L, S_err_East_req_X_N, S_err_West_req_X_E, S_err_South_req_X_W, S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot,
S_arbiter_out_err_no_request_grants,
S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants,
S_err_state_North_Invalid_Grant,
S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant,
S_err_state_South_Invalid_Grant,
S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N,
L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E, L_err_North_req_X_E, L_err_East_req_X_W, L_err_West_req_X_S, L_err_South_req_X_L, L_err_Local_req_X_N,
L_err_IDLE_req_X_W, L_err_North_req_X_W, L_err_East_req_X_S, L_err_West_req_X_L, L_err_South_req_X_N, L_err_Local_req_X_E,
L_err_IDLE_req_X_S, L_err_North_req_X_S, L_err_East_req_X_L, L_err_West_req_X_N, L_err_South_req_X_E, L_err_Local_req_X_W,
L_err_IDLE_req_X_L, L_err_North_req_X_L, L_err_East_req_X_N, L_err_West_req_X_E, L_err_South_req_X_W, L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot, L_arbiter_out_err_no_request_grants, L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants, L_err_state_North_Invalid_Grant,L_err_state_East_Invalid_Grant, L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant,L_err_state_Local_Invalid_Grant,L_err_Grants_onehot_or_all_zero : std_logic;
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-- Signals needed for grouping checkers to model turn/path faults
signal N_FIFO_checkers_ORed, E_FIFO_checkers_ORed, W_FIFO_checkers_ORed, S_FIFO_checkers_ORed, L_FIFO_checkers_ORed : std_logic;
signal N2E_turn_fault, N2W_turn_fault, E2N_turn_fault, E2S_turn_fault, W2N_turn_fault, W2S_turn_fault, S2E_turn_fault, S2W_turn_fault : std_logic;
signal N2S_path_fault, S2N_path_fault, E2W_path_fault, W2E_path_fault : std_logic;
signal L2N_fault, L2E_fault, L2W_fault, L2S_fault, N2L_fault, E2L_fault, W2L_fault, S2L_fault : std_logic;
begin
-- FIFO contributes to all turns and paths, therefore, for each turn or path (for the input direction), all the outputs of FIFO checkers
-- corresponding to that input are ORed together.
-- Functional checkers
N_FIFO_checkers_ORed <= N_err_empty_full or
N_err_empty_read_en or
N_err_full_write_en or
N_err_state_in_onehot or
N_err_read_pointer_in_onehot or
N_err_write_pointer_in_onehot or
-- Structural checkers
N_err_write_en_write_pointer or
N_err_not_write_en_write_pointer or
N_err_read_pointer_write_pointer_not_empty or
N_err_read_pointer_write_pointer_empty or
N_err_read_pointer_write_pointer_not_full or
N_err_read_pointer_write_pointer_full or
N_err_read_pointer_increment or
N_err_read_pointer_not_increment or
N_err_write_en or
N_err_not_write_en or
N_err_not_write_en1 or
N_err_not_write_en2 or
N_err_read_en_mismatch or
N_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
N_err_fake_credit_read_en_fake_credit_counter_in_increment or
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
N_err_fake_credit_read_en_credit_out or
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
N_err_state_out_Idle_not_fault_out_not_fake_credit or
N_err_state_out_Idle_not_fault_out_not_fault_info or
N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
N_err_state_out_Idle_fault_out_fake_credit or
N_err_state_out_Idle_fault_out_state_in_Packet_drop or
N_err_state_out_Idle_fault_out_fault_info or
N_err_state_out_Idle_fault_out_faulty_packet_in or
N_err_state_out_Idle_not_health_info or
N_err_state_out_Idle_not_write_fake_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Header_flit_valid_in_fault_out_fault_info or
N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Header_flit_not_valid_in_not_fault_info or
N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
N_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
N_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Body_flit_valid_in_fault_out_fault_info or
N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Body_flit_not_valid_in_not_fault_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
N_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
N_err_state_out_Body_flit_valid_in_not_health_info or
N_err_state_out_Body_flit_not_fake_credit or
N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
N_err_state_out_Tail_flit_not_valid_in_not_fault_info or
N_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
N_err_state_out_Tail_flit_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Packet_drop_not_fault_info or
N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
E_FIFO_checkers_ORed <= E_err_empty_full or
E_err_empty_read_en or
E_err_full_write_en or
E_err_state_in_onehot or
E_err_read_pointer_in_onehot or
E_err_write_pointer_in_onehot or
-- Structural checkers
E_err_write_en_write_pointer or
E_err_not_write_en_write_pointer or
E_err_read_pointer_write_pointer_not_empty or
E_err_read_pointer_write_pointer_empty or
E_err_read_pointer_write_pointer_not_full or
E_err_read_pointer_write_pointer_full or
E_err_read_pointer_increment or
E_err_read_pointer_not_increment or
E_err_write_en or
E_err_not_write_en or
E_err_not_write_en1 or
E_err_not_write_en2 or
E_err_read_en_mismatch or
E_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
E_err_fake_credit_read_en_fake_credit_counter_in_increment or
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
E_err_fake_credit_read_en_credit_out or
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
E_err_state_out_Idle_not_fault_out_not_fake_credit or
E_err_state_out_Idle_not_fault_out_not_fault_info or
E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
E_err_state_out_Idle_fault_out_fake_credit or
E_err_state_out_Idle_fault_out_state_in_Packet_drop or
E_err_state_out_Idle_fault_out_fault_info or
E_err_state_out_Idle_fault_out_faulty_packet_in or
E_err_state_out_Idle_not_health_info or
E_err_state_out_Idle_not_write_fake_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Header_flit_valid_in_fault_out_fault_info or
E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Header_flit_not_valid_in_not_fault_info or
E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
E_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
E_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Body_flit_valid_in_fault_out_fault_info or
E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Body_flit_not_valid_in_not_fault_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
E_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
E_err_state_out_Body_flit_valid_in_not_health_info or
E_err_state_out_Body_flit_not_fake_credit or
E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
E_err_state_out_Tail_flit_not_valid_in_not_fault_info or
E_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
E_err_state_out_Tail_flit_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Packet_drop_not_fault_info or
E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
W_FIFO_checkers_ORed <= W_err_empty_full or
W_err_empty_read_en or
W_err_full_write_en or
W_err_state_in_onehot or
W_err_read_pointer_in_onehot or
W_err_write_pointer_in_onehot or
-- Structural checkers
W_err_write_en_write_pointer or
W_err_not_write_en_write_pointer or
W_err_read_pointer_write_pointer_not_empty or
W_err_read_pointer_write_pointer_empty or
W_err_read_pointer_write_pointer_not_full or
W_err_read_pointer_write_pointer_full or
W_err_read_pointer_increment or
W_err_read_pointer_not_increment or
W_err_write_en or
W_err_not_write_en or
W_err_not_write_en1 or
W_err_not_write_en2 or
W_err_read_en_mismatch or
W_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
W_err_fake_credit_read_en_fake_credit_counter_in_increment or
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
W_err_fake_credit_read_en_credit_out or
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
W_err_state_out_Idle_not_fault_out_not_fake_credit or
W_err_state_out_Idle_not_fault_out_not_fault_info or
W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
W_err_state_out_Idle_fault_out_fake_credit or
W_err_state_out_Idle_fault_out_state_in_Packet_drop or
W_err_state_out_Idle_fault_out_fault_info or
W_err_state_out_Idle_fault_out_faulty_packet_in or
W_err_state_out_Idle_not_health_info or
W_err_state_out_Idle_not_write_fake_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Header_flit_valid_in_fault_out_fault_info or
W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Header_flit_not_valid_in_not_fault_info or
W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
W_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
W_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Body_flit_valid_in_fault_out_fault_info or
W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Body_flit_not_valid_in_not_fault_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
W_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
W_err_state_out_Body_flit_valid_in_not_health_info or
W_err_state_out_Body_flit_not_fake_credit or
W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
W_err_state_out_Tail_flit_not_valid_in_not_fault_info or
W_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
W_err_state_out_Tail_flit_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Packet_drop_not_fault_info or
W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
S_FIFO_checkers_ORed <= S_err_empty_full or
S_err_empty_read_en or
S_err_full_write_en or
S_err_state_in_onehot or
S_err_read_pointer_in_onehot or
S_err_write_pointer_in_onehot or
-- Structural checkers
S_err_write_en_write_pointer or
S_err_not_write_en_write_pointer or
S_err_read_pointer_write_pointer_not_empty or
S_err_read_pointer_write_pointer_empty or
S_err_read_pointer_write_pointer_not_full or
S_err_read_pointer_write_pointer_full or
S_err_read_pointer_increment or
S_err_read_pointer_not_increment or
S_err_write_en or
S_err_not_write_en or
S_err_not_write_en1 or
S_err_not_write_en2 or
S_err_read_en_mismatch or
S_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
S_err_fake_credit_read_en_fake_credit_counter_in_increment or
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
S_err_fake_credit_read_en_credit_out or
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
S_err_state_out_Idle_not_fault_out_not_fake_credit or
S_err_state_out_Idle_not_fault_out_not_fault_info or
S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
S_err_state_out_Idle_fault_out_fake_credit or
S_err_state_out_Idle_fault_out_state_in_Packet_drop or
S_err_state_out_Idle_fault_out_fault_info or
S_err_state_out_Idle_fault_out_faulty_packet_in or
S_err_state_out_Idle_not_health_info or
S_err_state_out_Idle_not_write_fake_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Header_flit_valid_in_fault_out_fault_info or
S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Header_flit_not_valid_in_not_fault_info or
S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
S_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
S_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Body_flit_valid_in_fault_out_fault_info or
S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Body_flit_not_valid_in_not_fault_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
S_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
S_err_state_out_Body_flit_valid_in_not_health_info or
S_err_state_out_Body_flit_not_fake_credit or
S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
S_err_state_out_Tail_flit_not_valid_in_not_fault_info or
S_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
S_err_state_out_Tail_flit_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Packet_drop_not_fault_info or
S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
L_FIFO_checkers_ORed <= L_err_empty_full or
L_err_empty_read_en or
L_err_full_write_en or
L_err_state_in_onehot or
L_err_read_pointer_in_onehot or
L_err_write_pointer_in_onehot or
-- Structural checkers
L_err_write_en_write_pointer or
L_err_not_write_en_write_pointer or
L_err_read_pointer_write_pointer_not_empty or
L_err_read_pointer_write_pointer_empty or
L_err_read_pointer_write_pointer_not_full or
L_err_read_pointer_write_pointer_full or
L_err_read_pointer_increment or
L_err_read_pointer_not_increment or
L_err_write_en or
L_err_not_write_en or
L_err_not_write_en1 or
L_err_not_write_en2 or
L_err_read_en_mismatch or
L_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
L_err_fake_credit_read_en_fake_credit_counter_in_increment or
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
L_err_fake_credit_read_en_credit_out or
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
L_err_state_out_Idle_not_fault_out_not_fake_credit or
L_err_state_out_Idle_not_fault_out_not_fault_info or
L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
L_err_state_out_Idle_fault_out_fake_credit or
L_err_state_out_Idle_fault_out_state_in_Packet_drop or
L_err_state_out_Idle_fault_out_fault_info or
L_err_state_out_Idle_fault_out_faulty_packet_in or
L_err_state_out_Idle_not_health_info or
L_err_state_out_Idle_not_write_fake_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Header_flit_valid_in_fault_out_fault_info or
L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Header_flit_not_valid_in_not_fault_info or
L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
L_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
L_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Body_flit_valid_in_fault_out_fault_info or
L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Body_flit_not_valid_in_not_fault_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
L_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
L_err_state_out_Body_flit_valid_in_not_health_info or
L_err_state_out_Body_flit_not_fake_credit or
L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
L_err_state_out_Tail_flit_not_valid_in_not_fault_info or
L_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
L_err_state_out_Tail_flit_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Packet_drop_not_fault_info or
L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Turn fault checkers
-- FIFO
N2E_turn_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_E1 or
N_err_dst_addr_cur_addr_not_E1 or
N_err_header_not_empty_Req_E_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_East_Req_E or
N_err_East_grant_E or
N_err_IDLE_Req_E or
N_err_IDLE_grant_E or
N_err_North_Req_E or
N_err_North_grant_E or
N_err_Local_Req_E or
N_err_Local_grant_E or
N_err_South_Req_E or
N_err_South_grant_E or
N_err_West_Req_E or
N_err_West_grant_E or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_IDLE_req_X_N or
E_err_North_req_X_N or
E_err_North_credit_not_zero_req_X_N_grant_N or
E_err_North_credit_zero_or_not_req_X_N_not_grant_N or
E_err_Local_req_X_N or
E_err_South_req_X_N or
E_err_West_req_X_N or
E_err_East_req_X_N or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
W_err_South_req_X_N or
W_err_West_req_X_N or
W_err_East_req_X_N or
err_grant_E_N_sig_not_empty_N_grant_E_N or
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
N2W_turn_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_W1 or
N_err_dst_addr_cur_addr_not_W1 or
N_err_header_not_empty_Req_W_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_West_Req_W or
N_err_West_grant_W or
N_err_East_Req_W or
N_err_East_grant_W or
N_err_IDLE_Req_W or
N_err_IDLE_grant_W or
N_err_North_Req_W or
N_err_North_grant_W or
N_err_Local_Req_W or
N_err_Local_grant_W or
N_err_South_Req_W or
N_err_South_grant_W or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_IDLE_req_X_N or
W_err_North_req_X_N or
W_err_North_credit_not_zero_req_X_N_grant_N or
W_err_North_credit_zero_or_not_req_X_N_not_grant_N or
W_err_Local_req_X_N or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_N_sig_not_empty_N_grant_W_N or
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
E2N_turn_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_N1 or
E_err_dst_addr_cur_addr_not_N1 or
E_err_header_not_empty_Req_N_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_IDLE_Req_N or
E_err_IDLE_grant_N or
E_err_North_Req_N or
E_err_North_grant_N or
E_err_Local_Req_N or
E_err_Local_grant_N or
E_err_South_Req_N or
E_err_South_grant_N or
E_err_West_Req_N or
E_err_West_grant_N or
E_err_East_Req_N or
E_err_East_grant_N or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_East_req_X_E or
N_err_East_credit_not_zero_req_X_E_grant_E or
N_err_East_credit_zero_or_not_req_X_E_not_grant_E or
N_err_IDLE_req_X_E or
N_err_North_req_X_E or
N_err_Local_req_X_E or
N_err_South_req_X_E or
N_err_West_req_X_E or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_Grants_onehot_or_all_zero or
err_grant_N_E_sig_not_empty_E_grant_N_E or
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
E2S_turn_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_S1 or
E_err_dst_addr_cur_addr_not_S1 or
E_err_header_not_empty_Req_S_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_South_Req_S or
E_err_South_grant_S or
E_err_West_Req_S or
E_err_West_grant_S or
E_err_East_Req_S or
E_err_East_grant_S or
E_err_IDLE_Req_S or
E_err_IDLE_grant_S or
E_err_North_Req_S or
E_err_North_grant_S or
E_err_Local_Req_S or
E_err_Local_grant_S or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_East_req_X_E or
S_err_East_credit_not_zero_req_X_E_grant_E or
S_err_East_credit_zero_or_not_req_X_E_not_grant_E or
S_err_IDLE_req_X_E or
S_err_North_req_X_E or
S_err_Local_req_X_E or
S_err_South_req_X_E or
S_err_West_req_X_E or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_E_sig_not_empty_E_grant_S_E or
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
W2N_turn_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_N1 or
W_err_dst_addr_cur_addr_not_N1 or
W_err_header_not_empty_Req_N_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_IDLE_Req_N or
W_err_IDLE_grant_N or
W_err_North_Req_N or
W_err_North_grant_N or
W_err_Local_Req_N or
W_err_Local_grant_N or
W_err_South_Req_N or
W_err_South_grant_N or
W_err_West_Req_N or
W_err_West_grant_N or
W_err_East_Req_N or
W_err_East_grant_N or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_West_req_X_W or
N_err_West_credit_not_zero_req_X_W_grant_W or
N_err_West_credit_zero_or_not_req_X_W_not_grant_W or
N_err_East_req_X_W or
N_err_IDLE_req_X_W or
N_err_North_req_X_W or
N_err_Local_req_X_W or
N_err_South_req_X_W or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_W_sig_not_empty_W_grant_N_W or
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
W2S_turn_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_S1 or
W_err_dst_addr_cur_addr_not_S1 or
W_err_header_not_empty_Req_S_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_South_Req_S or
W_err_South_grant_S or
W_err_West_Req_S or
W_err_West_grant_S or
W_err_East_Req_S or
W_err_East_grant_S or
W_err_IDLE_Req_S or
W_err_IDLE_grant_S or
W_err_North_Req_S or
W_err_North_grant_S or
W_err_Local_Req_S or
W_err_Local_grant_S or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_West_req_X_W or
S_err_West_credit_not_zero_req_X_W_grant_W or
S_err_West_credit_zero_or_not_req_X_W_not_grant_W or
S_err_East_req_X_W or
S_err_IDLE_req_X_W or
S_err_North_req_X_W or
S_err_Local_req_X_W or
S_err_South_req_X_W or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_W_sig_not_empty_W_grant_S_W or
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
S2E_turn_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_E1 or
S_err_dst_addr_cur_addr_not_E1 or
S_err_header_not_empty_Req_E_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_East_Req_E or
S_err_East_grant_E or
S_err_IDLE_Req_E or
S_err_IDLE_grant_E or
S_err_North_Req_E or
S_err_North_grant_E or
S_err_Local_Req_E or
S_err_Local_grant_E or
S_err_South_Req_E or
S_err_South_grant_E or
S_err_West_Req_E or
S_err_West_grant_E or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_South_req_X_S or
E_err_South_credit_not_zero_req_X_S_grant_S or
E_err_South_credit_zero_or_not_req_X_S_not_grant_S or
E_err_West_req_X_S or
E_err_East_req_X_S or
E_err_IDLE_req_X_S or
E_err_North_req_X_S or
E_err_Local_req_X_S or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_S_sig_not_empty_S_grant_E_S or
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_grants_valid_not_match or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
S2W_turn_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_W1 or
S_err_dst_addr_cur_addr_not_W1 or
S_err_header_not_empty_Req_W_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_West_Req_W or
S_err_West_grant_W or
S_err_East_Req_W or
S_err_East_grant_W or
S_err_IDLE_Req_W or
S_err_IDLE_grant_W or
S_err_North_Req_W or
S_err_North_grant_W or
S_err_Local_Req_W or
S_err_Local_grant_W or
S_err_South_Req_W or
S_err_South_grant_W or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_South_req_X_S or
W_err_South_credit_not_zero_req_X_S_grant_S or
W_err_South_credit_zero_or_not_req_X_S_not_grant_S or
W_err_West_req_X_S or
W_err_East_req_X_S or
W_err_IDLE_req_X_S or
W_err_North_req_X_S or
W_err_Local_req_X_S or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_S_sig_not_empty_S_grant_W_S or
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- Path faults
-- FIFO
N2S_path_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_S1 or
N_err_dst_addr_cur_addr_not_S1 or
N_err_header_not_empty_Req_S_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_South_Req_S or
N_err_South_grant_S or
N_err_West_Req_S or
N_err_West_grant_S or
N_err_East_Req_S or
N_err_East_grant_S or
N_err_IDLE_Req_S or
N_err_IDLE_grant_S or
N_err_North_Req_S or
N_err_North_grant_S or
N_err_Local_Req_S or
N_err_Local_grant_S or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_IDLE_req_X_N or
S_err_North_req_X_N or
S_err_North_credit_not_zero_req_X_N_grant_N or
S_err_North_credit_zero_or_not_req_X_N_not_grant_N or
S_err_Local_req_X_N or
S_err_South_req_X_N or
S_err_West_req_X_N or
S_err_East_req_X_N or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_N_sig_not_empty_N_grant_S_N or
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
S2N_path_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_N1 or
S_err_dst_addr_cur_addr_not_N1 or
S_err_header_not_empty_Req_N_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_IDLE_Req_N or
S_err_IDLE_grant_N or
S_err_North_Req_N or
S_err_North_grant_N or
S_err_Local_Req_N or
S_err_Local_grant_N or
S_err_South_Req_N or
S_err_South_grant_N or
S_err_West_Req_N or
S_err_West_grant_N or
S_err_East_Req_N or
S_err_East_grant_N or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_South_req_X_S or
N_err_South_credit_not_zero_req_X_S_grant_S or
N_err_South_credit_zero_or_not_req_X_S_not_grant_S or
N_err_West_req_X_S or
N_err_East_req_X_S or
N_err_IDLE_req_X_S or
N_err_North_req_X_S or
N_err_Local_req_X_S or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_S_sig_not_empty_S_grant_N_S or
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
E2W_path_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_W1 or
E_err_dst_addr_cur_addr_not_W1 or
E_err_header_not_empty_Req_W_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_West_Req_W or
E_err_West_grant_W or
E_err_East_Req_W or
E_err_East_grant_W or
E_err_IDLE_Req_W or
E_err_IDLE_grant_W or
E_err_North_Req_W or
E_err_North_grant_W or
E_err_Local_Req_W or
E_err_Local_grant_W or
E_err_South_Req_W or
E_err_South_grant_W or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_East_req_X_E or
W_err_East_credit_not_zero_req_X_E_grant_E or
W_err_East_credit_zero_or_not_req_X_E_not_grant_E or
W_err_IDLE_req_X_E or
W_err_North_req_X_E or
W_err_Local_req_X_E or
W_err_South_req_X_E or
W_err_West_req_X_E or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_E_sig_not_empty_E_grant_W_E or
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
W2E_path_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_E1 or
W_err_dst_addr_cur_addr_not_E1 or
W_err_header_not_empty_Req_E_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_East_Req_E or
W_err_East_grant_E or
W_err_IDLE_Req_E or
W_err_IDLE_grant_E or
W_err_North_Req_E or
W_err_North_grant_E or
W_err_Local_Req_E or
W_err_Local_grant_E or
W_err_South_Req_E or
W_err_South_grant_E or
W_err_West_Req_E or
W_err_West_grant_E or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_West_req_X_W or
E_err_West_credit_not_zero_req_X_W_grant_W or
E_err_West_credit_zero_or_not_req_X_W_not_grant_W or
E_err_East_req_X_W or
E_err_IDLE_req_X_W or
E_err_North_req_X_W or
E_err_Local_req_X_W or
E_err_South_req_X_W or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_W_sig_not_empty_W_grant_E_W or
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- Paths/turns from/to Local
-- FIFO
L2N_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_N1 or
L_err_dst_addr_cur_addr_not_N1 or
L_err_header_not_empty_Req_N_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_IDLE_Req_N or
L_err_IDLE_grant_N or
L_err_North_Req_N or
L_err_North_grant_N or
L_err_Local_Req_N or
L_err_Local_grant_N or
L_err_South_Req_N or
L_err_South_grant_N or
L_err_West_Req_N or
L_err_West_grant_N or
L_err_East_Req_N or
L_err_East_grant_N or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_Local_req_X_L or
N_err_Local_credit_not_zero_req_X_L_grant_L or
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
N_err_South_req_X_L or
N_err_West_req_X_L or
N_err_East_req_X_L or
N_err_IDLE_req_X_L or
N_err_North_req_X_L or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_L_sig_not_empty_L_grant_N_L or
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
L2E_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_E1 or
L_err_dst_addr_cur_addr_not_E1 or
L_err_header_not_empty_Req_E_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_East_Req_E or
L_err_East_grant_E or
L_err_IDLE_Req_E or
L_err_IDLE_grant_E or
L_err_North_Req_E or
L_err_North_grant_E or
L_err_Local_Req_E or
L_err_Local_grant_E or
L_err_South_Req_E or
L_err_South_grant_E or
L_err_West_Req_E or
L_err_West_grant_E or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_Local_req_X_L or
E_err_Local_credit_not_zero_req_X_L_grant_L or
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
E_err_South_req_X_L or
E_err_West_req_X_L or
E_err_East_req_X_L or
E_err_IDLE_req_X_L or
E_err_North_req_X_L or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_L_sig_not_empty_L_grant_E_L or
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_grants_valid_not_match or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
L2W_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_W1 or
L_err_dst_addr_cur_addr_not_W1 or
L_err_header_not_empty_Req_W_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_West_Req_W or
L_err_West_grant_W or
L_err_East_Req_W or
L_err_East_grant_W or
L_err_IDLE_Req_W or
L_err_IDLE_grant_W or
L_err_North_Req_W or
L_err_North_grant_W or
L_err_Local_Req_W or
L_err_Local_grant_W or
L_err_South_Req_W or
L_err_South_grant_W or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_Local_req_X_L or
W_err_Local_credit_not_zero_req_X_L_grant_L or
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
W_err_South_req_X_L or
W_err_West_req_X_L or
W_err_East_req_X_L or
W_err_IDLE_req_X_L or
W_err_North_req_X_L or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_L_sig_not_empty_L_grant_W_L or
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
L2S_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_S1 or
L_err_dst_addr_cur_addr_not_S1 or
L_err_header_not_empty_Req_S_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_South_Req_S or
L_err_South_grant_S or
L_err_West_Req_S or
L_err_West_grant_S or
L_err_East_Req_S or
L_err_East_grant_S or
L_err_IDLE_Req_S or
L_err_IDLE_grant_S or
L_err_North_Req_S or
L_err_North_grant_S or
L_err_Local_Req_S or
L_err_Local_grant_S or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_Local_req_X_L or
S_err_Local_credit_not_zero_req_X_L_grant_L or
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
S_err_South_req_X_L or
S_err_West_req_X_L or
S_err_East_req_X_L or
S_err_IDLE_req_X_L or
S_err_North_req_X_L or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_L_sig_not_empty_L_grant_S_L or
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
N2L_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_not_Req_L_in or
N_err_dst_addr_cur_addr_Req_L_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_Local_Req_L or
N_err_Local_grant_L or
N_err_South_Req_L or
N_err_South_grant_L or
N_err_West_Req_L or
N_err_West_grant_L or
N_err_East_Req_L or
N_err_East_grant_L or
N_err_IDLE_Req_L or
N_err_IDLE_grant_L or
N_err_North_Req_L or
N_err_North_grant_L or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_IDLE_req_X_N or
L_err_North_req_X_N or
L_err_North_credit_not_zero_req_X_N_grant_N or
L_err_North_credit_zero_or_not_req_X_N_not_grant_N or
L_err_Local_req_X_N or
L_err_South_req_X_N or
L_err_West_req_X_N or
L_err_East_req_X_N or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_N_sig_not_empty_N_grant_L_N or
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
E2L_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_not_Req_L_in or
E_err_dst_addr_cur_addr_Req_L_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_Local_Req_L or
E_err_Local_grant_L or
E_err_South_Req_L or
E_err_South_grant_L or
E_err_West_Req_L or
E_err_West_grant_L or
E_err_East_Req_L or
E_err_East_grant_L or
E_err_IDLE_Req_L or
E_err_IDLE_grant_L or
E_err_North_Req_L or
E_err_North_grant_L or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_East_req_X_E or
L_err_East_credit_not_zero_req_X_E_grant_E or
L_err_East_credit_zero_or_not_req_X_E_not_grant_E or
L_err_IDLE_req_X_E or
L_err_North_req_X_E or
L_err_Local_req_X_E or
L_err_South_req_X_E or
L_err_West_req_X_E or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_E_sig_not_empty_E_grant_L_E or
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
W2L_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_not_Req_L_in or
W_err_dst_addr_cur_addr_Req_L_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_Local_Req_L or
W_err_Local_grant_L or
W_err_South_Req_L or
W_err_South_grant_L or
W_err_West_Req_L or
W_err_West_grant_L or
W_err_East_Req_L or
W_err_East_grant_L or
W_err_IDLE_Req_L or
W_err_IDLE_grant_L or
W_err_North_Req_L or
W_err_North_grant_L or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_West_req_X_W or
L_err_West_credit_not_zero_req_X_W_grant_W or
L_err_West_credit_zero_or_not_req_X_W_not_grant_W or
L_err_East_req_X_W or
L_err_IDLE_req_X_W or
L_err_North_req_X_W or
L_err_Local_req_X_W or
L_err_South_req_X_W or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_W_sig_not_empty_W_grant_L_W or
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
S2L_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_not_Req_L_in or
S_err_dst_addr_cur_addr_Req_L_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_Local_Req_L or
S_err_Local_grant_L or
S_err_South_Req_L or
S_err_South_grant_L or
S_err_West_Req_L or
S_err_West_grant_L or
S_err_East_Req_L or
S_err_East_grant_L or
S_err_IDLE_Req_L or
S_err_IDLE_grant_L or
S_err_North_Req_L or
S_err_North_grant_L or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_South_req_X_S or
L_err_South_credit_not_zero_req_X_S_grant_S or
L_err_South_credit_zero_or_not_req_X_S_not_grant_S or
L_err_West_req_X_S or
L_err_East_req_X_S or
L_err_IDLE_req_X_S or
L_err_North_req_X_S or
L_err_Local_req_X_S or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_S_sig_not_empty_S_grant_L_S or
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
Faulty_N_out <= sig_Faulty_N_out;
Faulty_E_out <= sig_Faulty_E_out;
Faulty_W_out <= sig_Faulty_W_out;
Faulty_S_out <= sig_Faulty_S_out;
-- all the counter_threshold modules
CT_N: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_N, Healthy_packet => healthy_packet_N,
Healthy => healthy_link_N, intermittent=> intermittent_link_N, Faulty => sig_Faulty_N_out);
CT_E: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_E, Healthy_packet => healthy_packet_E,
Healthy => healthy_link_E, intermittent=> intermittent_link_E, Faulty => sig_Faulty_E_out);
CT_W: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_W, Healthy_packet => healthy_packet_W,
Healthy => healthy_link_W, intermittent=> intermittent_link_W, Faulty => sig_Faulty_W_out);
CT_S: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_S, Healthy_packet => healthy_packet_S,
Healthy => healthy_link_S, intermittent=> intermittent_link_S, Faulty => sig_Faulty_S_out);
CT_L: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_L, Healthy_packet => healthy_packet_L,
Healthy => healthy_link_L, intermittent=> intermittent_link_L, Faulty => faulty_link_L);
-- All the FIFOs
FIFO_N: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_N, valid_in => valid_in_N,
read_en_N => packet_drop_order_N, read_en_E =>Grant_EN, read_en_W =>Grant_WN, read_en_S =>Grant_SN, read_en_L =>Grant_LN,
credit_out => credit_out_N, empty_out => empty_N, Data_out => FIFO_D_out_N, fault_info=> faulty_packet_N, health_info=>healthy_packet_N,
-- Checker outputs
-- Functional checkers
err_empty_full => N_err_empty_full,
err_empty_read_en => N_err_empty_read_en,
err_full_write_en => N_err_full_write_en,
err_state_in_onehot => N_err_state_in_onehot,
err_read_pointer_in_onehot => N_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => N_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => N_err_write_en_write_pointer,
err_not_write_en_write_pointer => N_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => N_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => N_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => N_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => N_err_read_pointer_write_pointer_full,
err_read_pointer_increment => N_err_read_pointer_increment,
err_read_pointer_not_increment => N_err_read_pointer_not_increment,
err_write_en => N_err_write_en,
err_not_write_en => N_err_not_write_en,
err_not_write_en1 => N_err_not_write_en1,
err_not_write_en2 => N_err_not_write_en2,
err_read_en_mismatch => N_err_read_en_mismatch,
err_read_en_mismatch1 => N_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => N_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => N_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => N_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => N_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => N_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => N_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => N_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => N_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => N_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => N_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => N_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => N_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => N_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => N_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => N_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => N_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => N_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => N_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => N_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => N_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => N_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => N_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => N_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => N_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => N_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_E: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_E, valid_in => valid_in_E,
read_en_N => Grant_NE, read_en_E =>packet_drop_order_E, read_en_W =>Grant_WE, read_en_S =>Grant_SE, read_en_L =>Grant_LE,
credit_out => credit_out_E, empty_out => empty_E, Data_out => FIFO_D_out_E, fault_info=> faulty_packet_E, health_info=>healthy_packet_E,
-- Functional checkers
err_empty_full => E_err_empty_full,
err_empty_read_en => E_err_empty_read_en,
err_full_write_en => E_err_full_write_en,
err_state_in_onehot => E_err_state_in_onehot,
err_read_pointer_in_onehot => E_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => E_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => E_err_write_en_write_pointer,
err_not_write_en_write_pointer => E_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => E_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => E_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => E_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => E_err_read_pointer_write_pointer_full,
err_read_pointer_increment => E_err_read_pointer_increment,
err_read_pointer_not_increment => E_err_read_pointer_not_increment,
err_write_en => E_err_write_en,
err_not_write_en => E_err_not_write_en,
err_not_write_en1 => E_err_not_write_en1,
err_not_write_en2 => E_err_not_write_en2,
err_read_en_mismatch => E_err_read_en_mismatch,
err_read_en_mismatch1 => E_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => E_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => E_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => E_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => E_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => E_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => E_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => E_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => E_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => E_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => E_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => E_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => E_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => E_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => E_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => E_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => E_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => E_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => E_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => E_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => E_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => E_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => E_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => E_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => E_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => E_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_W: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_W, valid_in => valid_in_W,
read_en_N => Grant_NW, read_en_E =>Grant_EW, read_en_W =>packet_drop_order_W, read_en_S =>Grant_SW, read_en_L =>Grant_LW,
credit_out => credit_out_W, empty_out => empty_W, Data_out => FIFO_D_out_W, fault_info=> faulty_packet_W, health_info=>healthy_packet_W,
-- Functional checkers
err_empty_full => W_err_empty_full,
err_empty_read_en => W_err_empty_read_en,
err_full_write_en => W_err_full_write_en,
err_state_in_onehot => W_err_state_in_onehot,
err_read_pointer_in_onehot => W_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => W_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => W_err_write_en_write_pointer,
err_not_write_en_write_pointer => W_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => W_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => W_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => W_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => W_err_read_pointer_write_pointer_full,
err_read_pointer_increment => W_err_read_pointer_increment,
err_read_pointer_not_increment => W_err_read_pointer_not_increment,
err_write_en => W_err_write_en,
err_not_write_en => W_err_not_write_en,
err_not_write_en1 => W_err_not_write_en1,
err_not_write_en2 => W_err_not_write_en2,
err_read_en_mismatch => W_err_read_en_mismatch,
err_read_en_mismatch1 => W_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => W_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => W_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => W_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => W_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => W_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => W_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => W_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => W_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => W_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => W_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => W_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => W_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => W_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => W_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => W_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => W_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => W_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => W_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => W_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => W_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => W_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => W_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => W_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => W_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => W_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_S: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_S, valid_in => valid_in_S,
read_en_N => Grant_NS, read_en_E =>Grant_ES, read_en_W =>Grant_WS, read_en_S =>packet_drop_order_S, read_en_L =>Grant_LS,
credit_out => credit_out_S, empty_out => empty_S, Data_out => FIFO_D_out_S, fault_info=> faulty_packet_S, health_info=>healthy_packet_S,
-- Functional checkers
err_empty_full => S_err_empty_full,
err_empty_read_en => S_err_empty_read_en,
err_full_write_en => S_err_full_write_en,
err_state_in_onehot => S_err_state_in_onehot,
err_read_pointer_in_onehot => S_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => S_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => S_err_write_en_write_pointer,
err_not_write_en_write_pointer => S_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => S_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => S_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => S_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => S_err_read_pointer_write_pointer_full,
err_read_pointer_increment => S_err_read_pointer_increment,
err_read_pointer_not_increment => S_err_read_pointer_not_increment,
err_write_en => S_err_write_en,
err_not_write_en => S_err_not_write_en,
err_not_write_en1 => S_err_not_write_en1,
err_not_write_en2 => S_err_not_write_en2,
err_read_en_mismatch => S_err_read_en_mismatch,
err_read_en_mismatch1 => S_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => S_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => S_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => S_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => S_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => S_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => S_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => S_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => S_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => S_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => S_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => S_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => S_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => S_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => S_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => S_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => S_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => S_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => S_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => S_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => S_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => S_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => S_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => S_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => S_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => S_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_L: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_L, valid_in => valid_in_L,
read_en_N => Grant_NL, read_en_E =>Grant_EL, read_en_W =>Grant_WL, read_en_S => Grant_SL, read_en_L =>packet_drop_order_L,
credit_out => credit_out_L, empty_out => empty_L, Data_out => FIFO_D_out_L, fault_info=> faulty_packet_L, health_info=>healthy_packet_L,
-- Functional checkers
err_empty_full => L_err_empty_full,
err_empty_read_en => L_err_empty_read_en,
err_full_write_en => L_err_full_write_en,
err_state_in_onehot => L_err_state_in_onehot,
err_read_pointer_in_onehot => L_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => L_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => L_err_write_en_write_pointer,
err_not_write_en_write_pointer => L_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => L_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => L_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => L_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => L_err_read_pointer_write_pointer_full,
err_read_pointer_increment => L_err_read_pointer_increment,
err_read_pointer_not_increment => L_err_read_pointer_not_increment,
err_write_en => L_err_write_en,
err_not_write_en => L_err_not_write_en,
err_not_write_en1 => L_err_not_write_en1,
err_not_write_en2 => L_err_not_write_en2,
err_read_en_mismatch => L_err_read_en_mismatch,
err_read_en_mismatch1 => L_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => L_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => L_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => L_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => L_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => L_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => L_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => L_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => L_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => L_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => L_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => L_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => L_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => L_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => L_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => L_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => L_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => L_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => L_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => L_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => L_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => L_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => L_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => L_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => L_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => L_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
--- all the LBDRs
LBDR_N: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_N, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_N(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_N(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_N,
grant_N => '0', grant_E =>Grant_EN, grant_W => Grant_WN, grant_S=>Grant_SN, grant_L =>Grant_LN,
Req_N=> Req_NN, Req_E=>Req_NE, Req_W=>Req_NW, Req_S=>Req_NS, Req_L=>Req_NL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => N_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => N_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => N_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => N_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => N_err_grants_onehot,
err_grants_mismatch => N_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => N_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => N_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => N_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => N_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => N_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => N_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => N_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => N_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => N_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => N_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => N_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => N_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => N_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => N_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => N_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => N_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => N_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => N_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => N_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_E: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_E, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_E(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_E(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_E,
grant_N => Grant_NE, grant_E =>'0', grant_W => Grant_WE, grant_S=>Grant_SE, grant_L =>Grant_LE,
Req_N=> Req_EN, Req_E=>Req_EE, Req_W=>Req_EW, Req_S=>Req_ES, Req_L=>Req_EL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => E_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => E_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => E_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => E_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => E_err_grants_onehot,
err_grants_mismatch => E_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => E_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => E_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => E_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => E_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => E_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => E_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => E_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => E_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => E_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => E_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => E_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => E_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => E_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => E_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => E_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => E_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => E_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => E_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => E_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_W: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_W, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_W(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_W(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_W,
grant_N => Grant_NW, grant_E =>Grant_EW, grant_W =>'0' ,grant_S=>Grant_SW, grant_L =>Grant_LW,
Req_N=> Req_WN, Req_E=>Req_WE, Req_W=>Req_WW, Req_S=>Req_WS, Req_L=>Req_WL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => W_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => W_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => W_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => W_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => W_err_grants_onehot,
err_grants_mismatch => W_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => W_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => W_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => W_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => W_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => W_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => W_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => W_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => W_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => W_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => W_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => W_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => W_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => W_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => W_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => W_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => W_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => W_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => W_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => W_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_S: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_S, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_S(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_S(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_S,
grant_N => Grant_NS, grant_E =>Grant_ES, grant_W =>Grant_WS ,grant_S=>'0', grant_L =>Grant_LS,
Req_N=> Req_SN, Req_E=>Req_SE, Req_W=>Req_SW, Req_S=>Req_SS, Req_L=>Req_SL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => S_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => S_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => S_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => S_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => S_err_grants_onehot,
err_grants_mismatch => S_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => S_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => S_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => S_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => S_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => S_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => S_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => S_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => S_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => S_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => S_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => S_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => S_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => S_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => S_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => S_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => S_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => S_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => S_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => S_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_L: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_L, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_L(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_L(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_L,
grant_N => Grant_NL, grant_E =>Grant_EL, grant_W => Grant_WL,grant_S=>Grant_SL, grant_L =>'0',
Req_N=> Req_LN, Req_E=>Req_LE, Req_W=>Req_LW, Req_S=>Req_LS, Req_L=>Req_LL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => L_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => L_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => L_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => L_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => L_err_grants_onehot,
err_grants_mismatch => L_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => L_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => L_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => L_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => L_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => L_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => L_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => L_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => L_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => L_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => L_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => L_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => L_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => L_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => L_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => L_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => L_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => L_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => L_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => L_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
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-- switch allocator
allocator_unit: allocator port map ( reset => reset, clk => clk,
-- flow control
credit_in_N => credit_in_N, credit_in_E => credit_in_E, credit_in_W => credit_in_W, credit_in_S => credit_in_S, credit_in_L => credit_in_L,
-- requests from the LBDRS
req_N_N => '0', req_N_E => Req_NE, req_N_W => Req_NW, req_N_S => Req_NS, req_N_L => Req_NL,
req_E_N => Req_EN, req_E_E => '0', req_E_W => Req_EW, req_E_S => Req_ES, req_E_L => Req_EL,
req_W_N => Req_WN, req_W_E => Req_WE, req_W_W => '0', req_W_S => Req_WS, req_W_L => Req_WL,
req_S_N => Req_SN, req_S_E => Req_SE, req_S_W => Req_SW, req_S_S => '0', req_S_L => Req_SL,
req_L_N => Req_LN, req_L_E => Req_LE, req_L_W => Req_LW, req_L_S => Req_LS, req_L_L => '0',
empty_N => empty_N, empty_E => empty_E, empty_w => empty_W, empty_S => empty_S, empty_L => empty_L,
valid_N => valid_out_N, valid_E => valid_out_E, valid_W => valid_out_W, valid_S => valid_out_S, valid_L => valid_out_L,
-- grant_X_Y means the grant for X output port towards Y input port
-- this means for any X in [N, E, W, S, L] then set grant_X_Y is one hot!
grant_N_N => Grant_NN, grant_N_E => Grant_NE, grant_N_W => Grant_NW, grant_N_S => Grant_NS, grant_N_L => Grant_NL,
grant_E_N => Grant_EN, grant_E_E => Grant_EE, grant_E_W => Grant_EW, grant_E_S => Grant_ES, grant_E_L => Grant_EL,
grant_W_N => Grant_WN, grant_W_E => Grant_WE, grant_W_W => Grant_WW, grant_W_S => Grant_WS, grant_W_L => Grant_WL,
grant_S_N => Grant_SN, grant_S_E => Grant_SE, grant_S_W => Grant_SW, grant_S_S => Grant_SS, grant_S_L => Grant_SL,
grant_L_N => Grant_LN, grant_L_E => Grant_LE, grant_L_W => Grant_LW, grant_L_S => Grant_LS, grant_L_L => Grant_LL,
-- Checker outputs
-- Allocator logic checker outputs
err_grant_N_N_sig_not_empty_N_grant_N_N => err_grant_N_N_sig_not_empty_N_grant_N_N ,
err_not_grant_N_N_sig_or_empty_N_not_grant_N_N => err_not_grant_N_N_sig_or_empty_N_not_grant_N_N ,
err_grant_N_E_sig_not_empty_E_grant_N_E => err_grant_N_E_sig_not_empty_E_grant_N_E ,
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E => err_not_grant_N_E_sig_or_empty_E_not_grant_N_E ,
err_grant_N_W_sig_not_empty_W_grant_N_W => err_grant_N_W_sig_not_empty_W_grant_N_W ,
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W => err_not_grant_N_W_sig_or_empty_W_not_grant_N_W ,
err_grant_N_S_sig_not_empty_S_grant_N_S => err_grant_N_S_sig_not_empty_S_grant_N_S ,
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S => err_not_grant_N_S_sig_or_empty_S_not_grant_N_S ,
err_grant_N_L_sig_not_empty_L_grant_N_L => err_grant_N_L_sig_not_empty_L_grant_N_L ,
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L => err_not_grant_N_L_sig_or_empty_L_not_grant_N_L ,
err_grant_E_N_sig_not_empty_N_grant_E_N => err_grant_E_N_sig_not_empty_N_grant_E_N ,
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N => err_not_grant_E_N_sig_or_empty_N_not_grant_E_N ,
err_grant_E_E_sig_not_empty_E_grant_E_E => err_grant_E_E_sig_not_empty_E_grant_E_E ,
err_not_grant_E_E_sig_or_empty_E_not_grant_E_E => err_not_grant_E_E_sig_or_empty_E_not_grant_E_E ,
err_grant_E_W_sig_not_empty_W_grant_E_W => err_grant_E_W_sig_not_empty_W_grant_E_W ,
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W => err_not_grant_E_W_sig_or_empty_W_not_grant_E_W ,
err_grant_E_S_sig_not_empty_S_grant_E_S => err_grant_E_S_sig_not_empty_S_grant_E_S ,
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S => err_not_grant_E_S_sig_or_empty_S_not_grant_E_S ,
err_grant_E_L_sig_not_empty_L_grant_E_L => err_grant_E_L_sig_not_empty_L_grant_E_L ,
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L => err_not_grant_E_L_sig_or_empty_L_not_grant_E_L ,
err_grant_W_N_sig_not_empty_N_grant_W_N => err_grant_W_N_sig_not_empty_N_grant_W_N ,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N => err_not_grant_W_N_sig_or_empty_N_not_grant_W_N ,
err_grant_W_E_sig_not_empty_E_grant_W_E => err_grant_W_E_sig_not_empty_E_grant_W_E ,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E => err_not_grant_W_E_sig_or_empty_E_not_grant_W_E ,
err_grant_W_W_sig_not_empty_W_grant_W_W => err_grant_W_W_sig_not_empty_W_grant_W_W ,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W => err_not_grant_W_W_sig_or_empty_W_not_grant_W_W ,
err_grant_W_S_sig_not_empty_S_grant_W_S => err_grant_W_S_sig_not_empty_S_grant_W_S ,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S => err_not_grant_W_S_sig_or_empty_S_not_grant_W_S ,
err_grant_W_L_sig_not_empty_L_grant_W_L => err_grant_W_L_sig_not_empty_L_grant_W_L ,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L => err_not_grant_W_L_sig_or_empty_L_not_grant_W_L ,
err_grant_S_N_sig_not_empty_N_grant_S_N => err_grant_S_N_sig_not_empty_N_grant_S_N ,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N => err_not_grant_S_N_sig_or_empty_N_not_grant_S_N ,
err_grant_S_E_sig_not_empty_E_grant_S_E => err_grant_S_E_sig_not_empty_E_grant_S_E ,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E => err_not_grant_S_E_sig_or_empty_E_not_grant_S_E ,
err_grant_S_W_sig_not_empty_W_grant_S_W => err_grant_S_W_sig_not_empty_W_grant_S_W ,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W => err_not_grant_S_W_sig_or_empty_W_not_grant_S_W ,
err_grant_S_S_sig_not_empty_S_grant_S_S => err_grant_S_S_sig_not_empty_S_grant_S_S ,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S => err_not_grant_S_S_sig_or_empty_S_not_grant_S_S ,
err_grant_S_L_sig_not_empty_L_grant_S_L => err_grant_S_L_sig_not_empty_L_grant_S_L ,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L => err_not_grant_S_L_sig_or_empty_L_not_grant_S_L ,
err_grant_L_N_sig_not_empty_N_grant_L_N => err_grant_L_N_sig_not_empty_N_grant_L_N ,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N => err_not_grant_L_N_sig_or_empty_N_not_grant_L_N ,
err_grant_L_E_sig_not_empty_E_grant_L_E => err_grant_L_E_sig_not_empty_E_grant_L_E ,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E => err_not_grant_L_E_sig_or_empty_E_not_grant_L_E ,
err_grant_L_W_sig_not_empty_W_grant_L_W => err_grant_L_W_sig_not_empty_W_grant_L_W ,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W => err_not_grant_L_W_sig_or_empty_W_not_grant_L_W ,
err_grant_L_S_sig_not_empty_S_grant_L_S => err_grant_L_S_sig_not_empty_S_grant_L_S ,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S => err_not_grant_L_S_sig_or_empty_S_not_grant_L_S ,
err_grant_L_L_sig_not_empty_L_grant_L_L => err_grant_L_L_sig_not_empty_L_grant_L_L ,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L => err_not_grant_L_L_sig_or_empty_L_not_grant_L_L ,
err_grant_signals_not_empty_grant_N => err_grant_signals_not_empty_grant_N ,
err_not_grant_signals_empty_not_grant_N => err_not_grant_signals_empty_not_grant_N ,
err_grant_signals_not_empty_grant_E => err_grant_signals_not_empty_grant_E ,
err_not_grant_signals_empty_not_grant_E => err_not_grant_signals_empty_not_grant_E ,
err_grant_signals_not_empty_grant_W => err_grant_signals_not_empty_grant_W ,
err_not_grant_signals_empty_not_grant_W => err_not_grant_signals_empty_not_grant_W ,
err_grant_signals_not_empty_grant_S => err_grant_signals_not_empty_grant_S ,
err_not_grant_signals_empty_not_grant_S => err_not_grant_signals_empty_not_grant_S ,
err_grant_signals_not_empty_grant_L => err_grant_signals_not_empty_grant_L ,
err_not_grant_signals_empty_not_grant_L => err_not_grant_signals_empty_not_grant_L ,
err_grants_valid_not_match => err_grants_valid_not_match ,
-- Allocator credit counter logic checker outputs
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal => err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal ,
err_credit_in_N_credit_counter_N_out_increment => err_credit_in_N_credit_counter_N_out_increment ,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change => err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change ,
err_grant_N_credit_counter_N_out_decrement => err_grant_N_credit_counter_N_out_decrement ,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change => err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change ,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal => err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal ,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal => err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal ,
err_credit_in_E_credit_counter_E_out_increment => err_credit_in_E_credit_counter_E_out_increment ,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change => err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change ,
err_grant_E_credit_counter_E_out_decrement => err_grant_E_credit_counter_E_out_decrement ,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change => err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change ,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal => err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal ,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal => err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal ,
err_credit_in_W_credit_counter_W_out_increment => err_credit_in_W_credit_counter_W_out_increment ,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change => err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change ,
err_grant_W_credit_counter_W_out_decrement => err_grant_W_credit_counter_W_out_decrement ,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change => err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change ,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal => err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal ,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal => err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal ,
err_credit_in_S_credit_counter_S_out_increment => err_credit_in_S_credit_counter_S_out_increment ,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change => err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change ,
err_grant_S_credit_counter_S_out_decrement => err_grant_S_credit_counter_S_out_decrement ,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change => err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change ,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal => err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal ,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal => err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal ,
err_credit_in_L_credit_counter_L_out_increment => err_credit_in_L_credit_counter_L_out_increment ,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change => err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change ,
err_grant_L_credit_counter_L_out_decrement => err_grant_L_credit_counter_L_out_decrement ,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change => err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change ,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal => err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal ,
-- North Arbiter_in Checker outputs
N_err_Requests_state_in_state_not_equal => N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N => N_err_IDLE_Req_N,
N_err_IDLE_grant_N => N_err_IDLE_grant_N,
N_err_North_Req_N => N_err_North_Req_N,
N_err_North_grant_N => N_err_North_grant_N,
N_err_East_Req_E => N_err_East_Req_E,
N_err_East_grant_E => N_err_East_grant_E,
N_err_West_Req_W => N_err_West_Req_W,
N_err_West_grant_W => N_err_West_grant_W,
N_err_South_Req_S => N_err_South_Req_S,
N_err_South_grant_S => N_err_South_grant_S,
N_err_Local_Req_L => N_err_Local_Req_L,
N_err_Local_grant_L => N_err_Local_grant_L,
N_err_IDLE_Req_E => N_err_IDLE_Req_E,
N_err_IDLE_grant_E => N_err_IDLE_grant_E,
N_err_North_Req_E => N_err_North_Req_E,
N_err_North_grant_E => N_err_North_grant_E,
N_err_East_Req_W => N_err_East_Req_W,
N_err_East_grant_W => N_err_East_grant_W,
N_err_West_Req_S => N_err_West_Req_S,
N_err_West_grant_S => N_err_West_grant_S,
N_err_South_Req_L => N_err_South_Req_L,
N_err_South_grant_L => N_err_South_grant_L,
N_err_Local_Req_N => N_err_Local_Req_N,
N_err_Local_grant_N => N_err_Local_grant_N,
N_err_IDLE_Req_W => N_err_IDLE_Req_W,
N_err_IDLE_grant_W => N_err_IDLE_grant_W,
N_err_North_Req_W => N_err_North_Req_W,
N_err_North_grant_W => N_err_North_grant_W,
N_err_East_Req_S => N_err_East_Req_S,
N_err_East_grant_S => N_err_East_grant_S,
N_err_West_Req_L => N_err_West_Req_L,
N_err_West_grant_L => N_err_West_grant_L,
N_err_South_Req_N => N_err_South_Req_N,
N_err_South_grant_N => N_err_South_grant_N,
N_err_Local_Req_E => N_err_Local_Req_E,
N_err_Local_grant_E => N_err_Local_grant_E,
N_err_IDLE_Req_S => N_err_IDLE_Req_S,
N_err_IDLE_grant_S => N_err_IDLE_grant_S,
N_err_North_Req_S => N_err_North_Req_S,
N_err_North_grant_S => N_err_North_grant_S,
N_err_East_Req_L => N_err_East_Req_L,
N_err_East_grant_L => N_err_East_grant_L,
N_err_West_Req_N => N_err_West_Req_N,
N_err_West_grant_N => N_err_West_grant_N,
N_err_South_Req_E => N_err_South_Req_E,
N_err_South_grant_E => N_err_South_grant_E,
N_err_Local_Req_W => N_err_Local_Req_W,
N_err_Local_grant_W => N_err_Local_grant_W,
N_err_IDLE_Req_L => N_err_IDLE_Req_L,
N_err_IDLE_grant_L => N_err_IDLE_grant_L,
N_err_North_Req_L => N_err_North_Req_L,
N_err_North_grant_L => N_err_North_grant_L,
N_err_East_Req_N => N_err_East_Req_N,
N_err_East_grant_N => N_err_East_grant_N,
N_err_West_Req_E => N_err_West_Req_E,
N_err_West_grant_E => N_err_West_grant_E,
N_err_South_Req_W => N_err_South_Req_W,
N_err_South_grant_W => N_err_South_grant_W,
N_err_Local_Req_S => N_err_Local_Req_S,
N_err_Local_grant_S => N_err_Local_grant_S,
N_err_state_in_onehot => N_err_arbiter_state_in_onehot,
N_err_no_request_grants => N_err_no_request_grants,
N_err_request_no_grants => N_err_request_no_grants,
N_err_no_Req_N_grant_N => N_err_no_Req_N_grant_N,
N_err_no_Req_E_grant_E => N_err_no_Req_E_grant_E,
N_err_no_Req_W_grant_W => N_err_no_Req_W_grant_W,
N_err_no_Req_S_grant_S => N_err_no_Req_S_grant_S,
N_err_no_Req_L_grant_L => N_err_no_Req_L_grant_L,
-- East Arbiter_in Checker outputs
E_err_Requests_state_in_state_not_equal => E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N => E_err_IDLE_Req_N,
E_err_IDLE_grant_N => E_err_IDLE_grant_N,
E_err_North_Req_N => E_err_North_Req_N,
E_err_North_grant_N => E_err_North_grant_N,
E_err_East_Req_E => E_err_East_Req_E,
E_err_East_grant_E => E_err_East_grant_E,
E_err_West_Req_W => E_err_West_Req_W,
E_err_West_grant_W => E_err_West_grant_W,
E_err_South_Req_S => E_err_South_Req_S,
E_err_South_grant_S => E_err_South_grant_S,
E_err_Local_Req_L => E_err_Local_Req_L,
E_err_Local_grant_L => E_err_Local_grant_L,
E_err_IDLE_Req_E => E_err_IDLE_Req_E,
E_err_IDLE_grant_E => E_err_IDLE_grant_E,
E_err_North_Req_E => E_err_North_Req_E,
E_err_North_grant_E => E_err_North_grant_E,
E_err_East_Req_W => E_err_East_Req_W,
E_err_East_grant_W => E_err_East_grant_W,
E_err_West_Req_S => E_err_West_Req_S,
E_err_West_grant_S => E_err_West_grant_S,
E_err_South_Req_L => E_err_South_Req_L,
E_err_South_grant_L => E_err_South_grant_L,
E_err_Local_Req_N => E_err_Local_Req_N,
E_err_Local_grant_N => E_err_Local_grant_N,
E_err_IDLE_Req_W => E_err_IDLE_Req_W,
E_err_IDLE_grant_W => E_err_IDLE_grant_W,
E_err_North_Req_W => E_err_North_Req_W,
E_err_North_grant_W => E_err_North_grant_W,
E_err_East_Req_S => E_err_East_Req_S,
E_err_East_grant_S => E_err_East_grant_S,
E_err_West_Req_L => E_err_West_Req_L,
E_err_West_grant_L => E_err_West_grant_L,
E_err_South_Req_N => E_err_South_Req_N,
E_err_South_grant_N => E_err_South_grant_N,
E_err_Local_Req_E => E_err_Local_Req_E,
E_err_Local_grant_E => E_err_Local_grant_E,
E_err_IDLE_Req_S => E_err_IDLE_Req_S,
E_err_IDLE_grant_S => E_err_IDLE_grant_S,
E_err_North_Req_S => E_err_North_Req_S,
E_err_North_grant_S => E_err_North_grant_S,
E_err_East_Req_L => E_err_East_Req_L,
E_err_East_grant_L => E_err_East_grant_L,
E_err_West_Req_N => E_err_West_Req_N,
E_err_West_grant_N => E_err_West_grant_N,
E_err_South_Req_E => E_err_South_Req_E,
E_err_South_grant_E => E_err_South_grant_E,
E_err_Local_Req_W => E_err_Local_Req_W,
E_err_Local_grant_W => E_err_Local_grant_W,
E_err_IDLE_Req_L => E_err_IDLE_Req_L,
E_err_IDLE_grant_L => E_err_IDLE_grant_L,
E_err_North_Req_L => E_err_North_Req_L,
E_err_North_grant_L => E_err_North_grant_L,
E_err_East_Req_N => E_err_East_Req_N,
E_err_East_grant_N => E_err_East_grant_N,
E_err_West_Req_E => E_err_West_Req_E,
E_err_West_grant_E => E_err_West_grant_E,
E_err_South_Req_W => E_err_South_Req_W,
E_err_South_grant_W => E_err_South_grant_W,
E_err_Local_Req_S => E_err_Local_Req_S,
E_err_Local_grant_S => E_err_Local_grant_S,
E_err_state_in_onehot => E_err_arbiter_state_in_onehot,
E_err_no_request_grants => E_err_no_request_grants,
E_err_request_no_grants => E_err_request_no_grants,
E_err_no_Req_N_grant_N => E_err_no_Req_N_grant_N,
E_err_no_Req_E_grant_E => E_err_no_Req_E_grant_E,
E_err_no_Req_W_grant_W => E_err_no_Req_W_grant_W,
E_err_no_Req_S_grant_S => E_err_no_Req_S_grant_S,
E_err_no_Req_L_grant_L => E_err_no_Req_L_grant_L,
-- West Arbiter_in Checker outputs
W_err_Requests_state_in_state_not_equal => W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N => W_err_IDLE_Req_N,
W_err_IDLE_grant_N => W_err_IDLE_grant_N,
W_err_North_Req_N => W_err_North_Req_N,
W_err_North_grant_N => W_err_North_grant_N,
W_err_East_Req_E => W_err_East_Req_E,
W_err_East_grant_E => W_err_East_grant_E,
W_err_West_Req_W => W_err_West_Req_W,
W_err_West_grant_W => W_err_West_grant_W,
W_err_South_Req_S => W_err_South_Req_S,
W_err_South_grant_S => W_err_South_grant_S,
W_err_Local_Req_L => W_err_Local_Req_L,
W_err_Local_grant_L => W_err_Local_grant_L,
W_err_IDLE_Req_E => W_err_IDLE_Req_E,
W_err_IDLE_grant_E => W_err_IDLE_grant_E,
W_err_North_Req_E => W_err_North_Req_E,
W_err_North_grant_E => W_err_North_grant_E,
W_err_East_Req_W => W_err_East_Req_W,
W_err_East_grant_W => W_err_East_grant_W,
W_err_West_Req_S => W_err_West_Req_S,
W_err_West_grant_S => W_err_West_grant_S,
W_err_South_Req_L => W_err_South_Req_L,
W_err_South_grant_L => W_err_South_grant_L,
W_err_Local_Req_N => W_err_Local_Req_N,
W_err_Local_grant_N => W_err_Local_grant_N,
W_err_IDLE_Req_W => W_err_IDLE_Req_W,
W_err_IDLE_grant_W => W_err_IDLE_grant_W,
W_err_North_Req_W => W_err_North_Req_W,
W_err_North_grant_W => W_err_North_grant_W,
W_err_East_Req_S => W_err_East_Req_S,
W_err_East_grant_S => W_err_East_grant_S,
W_err_West_Req_L => W_err_West_Req_L,
W_err_West_grant_L => W_err_West_grant_L,
W_err_South_Req_N => W_err_South_Req_N,
W_err_South_grant_N => W_err_South_grant_N,
W_err_Local_Req_E => W_err_Local_Req_E,
W_err_Local_grant_E => W_err_Local_grant_E,
W_err_IDLE_Req_S => W_err_IDLE_Req_S,
W_err_IDLE_grant_S => W_err_IDLE_grant_S,
W_err_North_Req_S => W_err_North_Req_S,
W_err_North_grant_S => W_err_North_grant_S,
W_err_East_Req_L => W_err_East_Req_L,
W_err_East_grant_L => W_err_East_grant_L,
W_err_West_Req_N => W_err_West_Req_N,
W_err_West_grant_N => W_err_West_grant_N,
W_err_South_Req_E => W_err_South_Req_E,
W_err_South_grant_E => W_err_South_grant_E,
W_err_Local_Req_W => W_err_Local_Req_W,
W_err_Local_grant_W => W_err_Local_grant_W,
W_err_IDLE_Req_L => W_err_IDLE_Req_L,
W_err_IDLE_grant_L => W_err_IDLE_grant_L,
W_err_North_Req_L => W_err_North_Req_L,
W_err_North_grant_L => W_err_North_grant_L,
W_err_East_Req_N => W_err_East_Req_N,
W_err_East_grant_N => W_err_East_grant_N,
W_err_West_Req_E => W_err_West_Req_E,
W_err_West_grant_E => W_err_West_grant_E,
W_err_South_Req_W => W_err_South_Req_W,
W_err_South_grant_W => W_err_South_grant_W,
W_err_Local_Req_S => W_err_Local_Req_S,
W_err_Local_grant_S => W_err_Local_grant_S,
W_err_state_in_onehot => W_err_arbiter_state_in_onehot,
W_err_no_request_grants => W_err_no_request_grants,
W_err_request_no_grants => W_err_request_no_grants,
W_err_no_Req_N_grant_N => W_err_no_Req_N_grant_N,
W_err_no_Req_E_grant_E => W_err_no_Req_E_grant_E,
W_err_no_Req_W_grant_W => W_err_no_Req_W_grant_W,
W_err_no_Req_S_grant_S => W_err_no_Req_S_grant_S,
W_err_no_Req_L_grant_L => W_err_no_Req_L_grant_L,
-- South Arbiter_in Checker outputs
S_err_Requests_state_in_state_not_equal => S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N => S_err_IDLE_Req_N,
S_err_IDLE_grant_N => S_err_IDLE_grant_N,
S_err_North_Req_N => S_err_North_Req_N,
S_err_North_grant_N => S_err_North_grant_N,
S_err_East_Req_E => S_err_East_Req_E,
S_err_East_grant_E => S_err_East_grant_E,
S_err_West_Req_W => S_err_West_Req_W,
S_err_West_grant_W => S_err_West_grant_W,
S_err_South_Req_S => S_err_South_Req_S,
S_err_South_grant_S => S_err_South_grant_S,
S_err_Local_Req_L => S_err_Local_Req_L,
S_err_Local_grant_L => S_err_Local_grant_L,
S_err_IDLE_Req_E => S_err_IDLE_Req_E,
S_err_IDLE_grant_E => S_err_IDLE_grant_E,
S_err_North_Req_E => S_err_North_Req_E,
S_err_North_grant_E => S_err_North_grant_E,
S_err_East_Req_W => S_err_East_Req_W,
S_err_East_grant_W => S_err_East_grant_W,
S_err_West_Req_S => S_err_West_Req_S,
S_err_West_grant_S => S_err_West_grant_S,
S_err_South_Req_L => S_err_South_Req_L,
S_err_South_grant_L => S_err_South_grant_L,
S_err_Local_Req_N => S_err_Local_Req_N,
S_err_Local_grant_N => S_err_Local_grant_N,
S_err_IDLE_Req_W => S_err_IDLE_Req_W,
S_err_IDLE_grant_W => S_err_IDLE_grant_W,
S_err_North_Req_W => S_err_North_Req_W,
S_err_North_grant_W => S_err_North_grant_W,
S_err_East_Req_S => S_err_East_Req_S,
S_err_East_grant_S => S_err_East_grant_S,
S_err_West_Req_L => S_err_West_Req_L,
S_err_West_grant_L => S_err_West_grant_L,
S_err_South_Req_N => S_err_South_Req_N,
S_err_South_grant_N => S_err_South_grant_N,
S_err_Local_Req_E => S_err_Local_Req_E,
S_err_Local_grant_E => S_err_Local_grant_E,
S_err_IDLE_Req_S => S_err_IDLE_Req_S,
S_err_IDLE_grant_S => S_err_IDLE_grant_S,
S_err_North_Req_S => S_err_North_Req_S,
S_err_North_grant_S => S_err_North_grant_S,
S_err_East_Req_L => S_err_East_Req_L,
S_err_East_grant_L => S_err_East_grant_L,
S_err_West_Req_N => S_err_West_Req_N,
S_err_West_grant_N => S_err_West_grant_N,
S_err_South_Req_E => S_err_South_Req_E,
S_err_South_grant_E => S_err_South_grant_E,
S_err_Local_Req_W => S_err_Local_Req_W,
S_err_Local_grant_W => S_err_Local_grant_W,
S_err_IDLE_Req_L => S_err_IDLE_Req_L,
S_err_IDLE_grant_L => S_err_IDLE_grant_L,
S_err_North_Req_L => S_err_North_Req_L,
S_err_North_grant_L => S_err_North_grant_L,
S_err_East_Req_N => S_err_East_Req_N,
S_err_East_grant_N => S_err_East_grant_N,
S_err_West_Req_E => S_err_West_Req_E,
S_err_West_grant_E => S_err_West_grant_E,
S_err_South_Req_W => S_err_South_Req_W,
S_err_South_grant_W => S_err_South_grant_W,
S_err_Local_Req_S => S_err_Local_Req_S,
S_err_Local_grant_S => S_err_Local_grant_S,
S_err_state_in_onehot => S_err_arbiter_state_in_onehot,
S_err_no_request_grants => S_err_no_request_grants,
S_err_request_no_grants => S_err_request_no_grants,
S_err_no_Req_N_grant_N => S_err_no_Req_N_grant_N,
S_err_no_Req_E_grant_E => S_err_no_Req_E_grant_E,
S_err_no_Req_W_grant_W => S_err_no_Req_W_grant_W,
S_err_no_Req_S_grant_S => S_err_no_Req_S_grant_S,
S_err_no_Req_L_grant_L => S_err_no_Req_L_grant_L,
-- Local Arbiter_in Checker outputs
L_err_Requests_state_in_state_not_equal => L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N => L_err_IDLE_Req_N,
L_err_IDLE_grant_N => L_err_IDLE_grant_N,
L_err_North_Req_N => L_err_North_Req_N,
L_err_North_grant_N => L_err_North_grant_N,
L_err_East_Req_E => L_err_East_Req_E,
L_err_East_grant_E => L_err_East_grant_E,
L_err_West_Req_W => L_err_West_Req_W,
L_err_West_grant_W => L_err_West_grant_W,
L_err_South_Req_S => L_err_South_Req_S,
L_err_South_grant_S => L_err_South_grant_S,
L_err_Local_Req_L => L_err_Local_Req_L,
L_err_Local_grant_L => L_err_Local_grant_L,
L_err_IDLE_Req_E => L_err_IDLE_Req_E,
L_err_IDLE_grant_E => L_err_IDLE_grant_E,
L_err_North_Req_E => L_err_North_Req_E,
L_err_North_grant_E => L_err_North_grant_E,
L_err_East_Req_W => L_err_East_Req_W,
L_err_East_grant_W => L_err_East_grant_W,
L_err_West_Req_S => L_err_West_Req_S,
L_err_West_grant_S => L_err_West_grant_S,
L_err_South_Req_L => L_err_South_Req_L,
L_err_South_grant_L => L_err_South_grant_L,
L_err_Local_Req_N => L_err_Local_Req_N,
L_err_Local_grant_N => L_err_Local_grant_N,
L_err_IDLE_Req_W => L_err_IDLE_Req_W,
L_err_IDLE_grant_W => L_err_IDLE_grant_W,
L_err_North_Req_W => L_err_North_Req_W,
L_err_North_grant_W => L_err_North_grant_W,
L_err_East_Req_S => L_err_East_Req_S,
L_err_East_grant_S => L_err_East_grant_S,
L_err_West_Req_L => L_err_West_Req_L,
L_err_West_grant_L => L_err_West_grant_L,
L_err_South_Req_N => L_err_South_Req_N,
L_err_South_grant_N => L_err_South_grant_N,
L_err_Local_Req_E => L_err_Local_Req_E,
L_err_Local_grant_E => L_err_Local_grant_E,
L_err_IDLE_Req_S => L_err_IDLE_Req_S,
L_err_IDLE_grant_S => L_err_IDLE_grant_S,
L_err_North_Req_S => L_err_North_Req_S,
L_err_North_grant_S => L_err_North_grant_S,
L_err_East_Req_L => L_err_East_Req_L,
L_err_East_grant_L => L_err_East_grant_L,
L_err_West_Req_N => L_err_West_Req_N,
L_err_West_grant_N => L_err_West_grant_N,
L_err_South_Req_E => L_err_South_Req_E,
L_err_South_grant_E => L_err_South_grant_E,
L_err_Local_Req_W => L_err_Local_Req_W,
L_err_Local_grant_W => L_err_Local_grant_W,
L_err_IDLE_Req_L => L_err_IDLE_Req_L,
L_err_IDLE_grant_L => L_err_IDLE_grant_L,
L_err_North_Req_L => L_err_North_Req_L,
L_err_North_grant_L => L_err_North_grant_L,
L_err_East_Req_N => L_err_East_Req_N,
L_err_East_grant_N => L_err_East_grant_N,
L_err_West_Req_E => L_err_West_Req_E,
L_err_West_grant_E => L_err_West_grant_E,
L_err_South_Req_W => L_err_South_Req_W,
L_err_South_grant_W => L_err_South_grant_W,
L_err_Local_Req_S => L_err_Local_Req_S,
L_err_Local_grant_S => L_err_Local_grant_S,
L_err_state_in_onehot => L_err_arbiter_state_in_onehot,
L_err_no_request_grants => L_err_no_request_grants,
L_err_request_no_grants => L_err_request_no_grants,
L_err_no_Req_N_grant_N => L_err_no_Req_N_grant_N,
L_err_no_Req_E_grant_E => L_err_no_Req_E_grant_E,
L_err_no_Req_W_grant_W => L_err_no_Req_W_grant_W,
L_err_no_Req_S_grant_S => L_err_no_Req_S_grant_S,
L_err_no_Req_L_grant_L => L_err_no_Req_L_grant_L,
-- Arbiter_out checker outputs
-- North Arbiter_out checker outputs
N_arbiter_out_err_Requests_state_in_state_not_equal => N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N => N_err_IDLE_req_X_N,
N_err_North_req_X_N => N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N => N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N => N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E => N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E => N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E => N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W => N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W => N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W => N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S => N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S => N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S => N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L => N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L => N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L => N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E => N_err_IDLE_req_X_E,
N_err_North_req_X_E => N_err_North_req_X_E,
N_err_East_req_X_W => N_err_East_req_X_W,
N_err_West_req_X_S => N_err_West_req_X_S,
N_err_South_req_X_L => N_err_South_req_X_L,
N_err_Local_req_X_N => N_err_Local_req_X_N,
N_err_IDLE_req_X_W => N_err_IDLE_req_X_W,
N_err_North_req_X_W => N_err_North_req_X_W,
N_err_East_req_X_S => N_err_East_req_X_S,
N_err_West_req_X_L => N_err_West_req_X_L,
N_err_South_req_X_N => N_err_South_req_X_N,
N_err_Local_req_X_E => N_err_Local_req_X_E,
N_err_IDLE_req_X_S => N_err_IDLE_req_X_S,
N_err_North_req_X_S => N_err_North_req_X_S,
N_err_East_req_X_L => N_err_East_req_X_L,
N_err_West_req_X_N => N_err_West_req_X_N,
N_err_South_req_X_E => N_err_South_req_X_E,
N_err_Local_req_X_W => N_err_Local_req_X_W,
N_err_IDLE_req_X_L => N_err_IDLE_req_X_L,
N_err_North_req_X_L => N_err_North_req_X_L,
N_err_East_req_X_N => N_err_East_req_X_N,
N_err_West_req_X_E => N_err_West_req_X_E,
N_err_South_req_X_W => N_err_South_req_X_W,
N_err_Local_req_X_S => N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot => N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants => N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state => N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants => N_err_request_IDLE_not_Grants,
N_err_state_North_Invalid_Grant => N_err_state_North_Invalid_Grant,
N_err_state_East_Invalid_Grant => N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant => N_err_state_West_Invalid_Grant,
N_err_state_South_Invalid_Grant => N_err_state_South_Invalid_Grant,
N_err_state_Local_Invalid_Grant => N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero => N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal => E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N => E_err_IDLE_req_X_N,
E_err_North_req_X_N => E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N => E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N => E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E => E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E => E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E => E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W => E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W => E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W => E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S => E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S => E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S => E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L => E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L => E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L => E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E => E_err_IDLE_req_X_E,
E_err_North_req_X_E => E_err_North_req_X_E,
E_err_East_req_X_W => E_err_East_req_X_W,
E_err_West_req_X_S => E_err_West_req_X_S,
E_err_South_req_X_L => E_err_South_req_X_L,
E_err_Local_req_X_N => E_err_Local_req_X_N,
E_err_IDLE_req_X_W => E_err_IDLE_req_X_W,
E_err_North_req_X_W => E_err_North_req_X_W,
E_err_East_req_X_S => E_err_East_req_X_S,
E_err_West_req_X_L => E_err_West_req_X_L,
E_err_South_req_X_N => E_err_South_req_X_N,
E_err_Local_req_X_E => E_err_Local_req_X_E,
E_err_IDLE_req_X_S => E_err_IDLE_req_X_S,
E_err_North_req_X_S => E_err_North_req_X_S,
E_err_East_req_X_L => E_err_East_req_X_L,
E_err_West_req_X_N => E_err_West_req_X_N,
E_err_South_req_X_E => E_err_South_req_X_E,
E_err_Local_req_X_W => E_err_Local_req_X_W,
E_err_IDLE_req_X_L => E_err_IDLE_req_X_L,
E_err_North_req_X_L => E_err_North_req_X_L,
E_err_East_req_X_N => E_err_East_req_X_N,
E_err_West_req_X_E => E_err_West_req_X_E,
E_err_South_req_X_W => E_err_South_req_X_W,
E_err_Local_req_X_S => E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot => E_arbiter_out_err_state_in_onehot,
E_arbiter_out_err_no_request_grants => E_arbiter_out_err_no_request_grants,
E_err_request_IDLE_state => E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants => E_err_request_IDLE_not_Grants,
E_err_state_North_Invalid_Grant => E_err_state_North_Invalid_Grant,
E_err_state_East_Invalid_Grant => E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant => E_err_state_West_Invalid_Grant,
E_err_state_South_Invalid_Grant => E_err_state_South_Invalid_Grant,
E_err_state_Local_Invalid_Grant => E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero => E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal => W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N => W_err_IDLE_req_X_N,
W_err_North_req_X_N => W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N => W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N => W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E => W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E => W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E => W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W => W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W => W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W => W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S => W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S => W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S => W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L => W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L => W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L => W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E => W_err_IDLE_req_X_E,
W_err_North_req_X_E => W_err_North_req_X_E,
W_err_East_req_X_W => W_err_East_req_X_W,
W_err_West_req_X_S => W_err_West_req_X_S,
W_err_South_req_X_L => W_err_South_req_X_L,
W_err_Local_req_X_N => W_err_Local_req_X_N,
W_err_IDLE_req_X_W => W_err_IDLE_req_X_W,
W_err_North_req_X_W => W_err_North_req_X_W,
W_err_East_req_X_S => W_err_East_req_X_S,
W_err_West_req_X_L => W_err_West_req_X_L,
W_err_South_req_X_N => W_err_South_req_X_N,
W_err_Local_req_X_E => W_err_Local_req_X_E,
W_err_IDLE_req_X_S => W_err_IDLE_req_X_S,
W_err_North_req_X_S => W_err_North_req_X_S,
W_err_East_req_X_L => W_err_East_req_X_L,
W_err_West_req_X_N => W_err_West_req_X_N,
W_err_South_req_X_E => W_err_South_req_X_E,
W_err_Local_req_X_W => W_err_Local_req_X_W,
W_err_IDLE_req_X_L => W_err_IDLE_req_X_L,
W_err_North_req_X_L => W_err_North_req_X_L,
W_err_East_req_X_N => W_err_East_req_X_N,
W_err_West_req_X_E => W_err_West_req_X_E,
W_err_South_req_X_W => W_err_South_req_X_W,
W_err_Local_req_X_S => W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot => W_arbiter_out_err_state_in_onehot,
W_arbiter_out_err_no_request_grants => W_arbiter_out_err_no_request_grants,
W_err_request_IDLE_state => W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants => W_err_request_IDLE_not_Grants,
W_err_state_North_Invalid_Grant => W_err_state_North_Invalid_Grant,
W_err_state_East_Invalid_Grant => W_err_state_East_Invalid_Grant,
W_err_state_West_Invalid_Grant => W_err_state_West_Invalid_Grant,
W_err_state_South_Invalid_Grant => W_err_state_South_Invalid_Grant,
W_err_state_Local_Invalid_Grant => W_err_state_Local_Invalid_Grant,
W_err_Grants_onehot_or_all_zero => W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal => S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N => S_err_IDLE_req_X_N,
S_err_North_req_X_N => S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N => S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N => S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E => S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E => S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E => S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W => S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W => S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W => S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S => S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S => S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S => S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L => S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L => S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L => S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E => S_err_IDLE_req_X_E,
S_err_North_req_X_E => S_err_North_req_X_E,
S_err_East_req_X_W => S_err_East_req_X_W,
S_err_West_req_X_S => S_err_West_req_X_S,
S_err_South_req_X_L => S_err_South_req_X_L,
S_err_Local_req_X_N => S_err_Local_req_X_N,
S_err_IDLE_req_X_W => S_err_IDLE_req_X_W,
S_err_North_req_X_W => S_err_North_req_X_W,
S_err_East_req_X_S => S_err_East_req_X_S,
S_err_West_req_X_L => S_err_West_req_X_L,
S_err_South_req_X_N => S_err_South_req_X_N,
S_err_Local_req_X_E => S_err_Local_req_X_E,
S_err_IDLE_req_X_S => S_err_IDLE_req_X_S,
S_err_North_req_X_S => S_err_North_req_X_S,
S_err_East_req_X_L => S_err_East_req_X_L,
S_err_West_req_X_N => S_err_West_req_X_N,
S_err_South_req_X_E => S_err_South_req_X_E,
S_err_Local_req_X_W => S_err_Local_req_X_W,
S_err_IDLE_req_X_L => S_err_IDLE_req_X_L,
S_err_North_req_X_L => S_err_North_req_X_L,
S_err_East_req_X_N => S_err_East_req_X_N,
S_err_West_req_X_E => S_err_West_req_X_E,
S_err_South_req_X_W => S_err_South_req_X_W,
S_err_Local_req_X_S => S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot => S_arbiter_out_err_state_in_onehot,
S_arbiter_out_err_no_request_grants => S_arbiter_out_err_no_request_grants,
S_err_request_IDLE_state => S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants => S_err_request_IDLE_not_Grants,
S_err_state_North_Invalid_Grant => S_err_state_North_Invalid_Grant,
S_err_state_East_Invalid_Grant => S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant => S_err_state_West_Invalid_Grant,
S_err_state_South_Invalid_Grant => S_err_state_South_Invalid_Grant,
S_err_state_Local_Invalid_Grant => S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero => S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal => L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N => L_err_IDLE_req_X_N,
L_err_North_req_X_N => L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N => L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N => L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E => L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E => L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E => L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W => L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W => L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W => L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S => L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S => L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S => L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L => L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L => L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L => L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E => L_err_IDLE_req_X_E,
L_err_North_req_X_E => L_err_North_req_X_E,
L_err_East_req_X_W => L_err_East_req_X_W,
L_err_West_req_X_S => L_err_West_req_X_S,
L_err_South_req_X_L => L_err_South_req_X_L,
L_err_Local_req_X_N => L_err_Local_req_X_N,
L_err_IDLE_req_X_W => L_err_IDLE_req_X_W,
L_err_North_req_X_W => L_err_North_req_X_W,
L_err_East_req_X_S => L_err_East_req_X_S,
L_err_West_req_X_L => L_err_West_req_X_L,
L_err_South_req_X_N => L_err_South_req_X_N,
L_err_Local_req_X_E => L_err_Local_req_X_E,
L_err_IDLE_req_X_S => L_err_IDLE_req_X_S,
L_err_North_req_X_S => L_err_North_req_X_S,
L_err_East_req_X_L => L_err_East_req_X_L,
L_err_West_req_X_N => L_err_West_req_X_N,
L_err_South_req_X_E => L_err_South_req_X_E,
L_err_Local_req_X_W => L_err_Local_req_X_W,
L_err_IDLE_req_X_L => L_err_IDLE_req_X_L,
L_err_North_req_X_L => L_err_North_req_X_L,
L_err_East_req_X_N => L_err_East_req_X_N,
L_err_West_req_X_E => L_err_West_req_X_E,
L_err_South_req_X_W => L_err_South_req_X_W,
L_err_Local_req_X_S => L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot => L_arbiter_out_err_state_in_onehot,
L_arbiter_out_err_no_request_grants => L_arbiter_out_err_no_request_grants,
L_err_request_IDLE_state => L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants => L_err_request_IDLE_not_Grants,
L_err_state_North_Invalid_Grant => L_err_state_North_Invalid_Grant,
L_err_state_East_Invalid_Grant => L_err_state_East_Invalid_Grant,
L_err_state_West_Invalid_Grant => L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant => L_err_state_South_Invalid_Grant,
L_err_state_Local_Invalid_Grant => L_err_state_Local_Invalid_Grant,
L_err_Grants_onehot_or_all_zero => L_err_Grants_onehot_or_all_zero
);
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
-- all the Xbar select_signals
Xbar_sel_N <= '0' & Grant_NE & Grant_NW & Grant_NS & Grant_NL;
Xbar_sel_E <= Grant_EN & '0' & Grant_EW & Grant_ES & Grant_EL;
Xbar_sel_W <= Grant_WN & Grant_WE & '0' & Grant_WS & Grant_WL;
Xbar_sel_S <= Grant_SN & Grant_SE & Grant_SW & '0' & Grant_SL;
Xbar_sel_L <= Grant_LN & Grant_LE & Grant_LW & Grant_LS & '0';
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
-- all the Xbars
GEN_XABR: for i in range (0 to ) generate
XBAR_X: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_N, Data_out=> TX_N);
end generate GEN_XABR;
XBAR_N: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_N, Data_out=> TX_N);
XBAR_E: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_E, Data_out=> TX_E);
XBAR_W: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_W, Data_out=> TX_W);
XBAR_S: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_S, Data_out=> TX_S);
XBAR_L: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_L, Data_out=> TX_L);
end;
|
--Copyright (C) 2016 Siavoosh Payandeh Azad
library ieee;
use ieee.std_logic_1164.all;
--use IEEE.STD_LOGIC_ARITH.ALL;
--use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity router_credit_based_PD_C is --fault classifier plus packet-dropping
generic (
DATA_WIDTH: integer := 32;
current_address : integer := 0;
Cx_rst : integer := 10;
healthy_counter_threshold : integer := 8;
faulty_counter_threshold: integer := 2;
counter_depth: integer := 4;
NoC_size: integer := 4
);
port (
reset, clk: in std_logic;
Rxy_reconf: in std_logic_vector(7 downto 0);
Reconfig : in std_logic;
RX_N, RX_E, RX_W, RX_S, RX_L : in std_logic_vector (DATA_WIDTH-1 downto 0);
credit_in_N, credit_in_E, credit_in_W, credit_in_S, credit_in_L: in std_logic;
valid_in_N, valid_in_E, valid_in_W, valid_in_S, valid_in_L : in std_logic;
valid_out_N, valid_out_E, valid_out_W, valid_out_S, valid_out_L : out std_logic;
credit_out_N, credit_out_E, credit_out_W, credit_out_S, credit_out_L: out std_logic;
TX_N, TX_E, TX_W, TX_S, TX_L: out std_logic_vector (DATA_WIDTH-1 downto 0);
Faulty_N_in, Faulty_E_in, Faulty_W_in, Faulty_S_in: in std_logic;
Faulty_N_out, Faulty_E_out, Faulty_W_out, Faulty_S_out: out std_logic
);
end router_credit_based_PD_C;
architecture behavior of router_credit_based_PD_C is
COMPONENT FIFO_credit_based is
generic (
DATA_WIDTH: integer := 32
);
port (reset: in std_logic;
clk: in std_logic;
RX: in std_logic_vector(DATA_WIDTH-1 downto 0);
valid_in: in std_logic;
read_en_N : in std_logic;
read_en_E : in std_logic;
read_en_W : in std_logic;
read_en_S : in std_logic;
read_en_L : in std_logic;
credit_out: out std_logic;
empty_out: out std_logic;
Data_out: out std_logic_vector(DATA_WIDTH-1 downto 0);
fault_info, health_info: out std_logic;
-- Checker outputs
-- Functional checkers
err_empty_full, err_empty_read_en, err_full_write_en, err_state_in_onehot, err_read_pointer_in_onehot, err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer, err_not_write_en_write_pointer, err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty, err_read_pointer_write_pointer_not_full, err_read_pointer_write_pointer_full,
err_read_pointer_increment, err_read_pointer_not_increment, err_write_en, err_not_write_en,
err_not_write_en1, err_not_write_en2, err_read_en_mismatch, err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : out std_logic
);
end COMPONENT;
COMPONENT counter_threshold_classifier is
generic (
counter_depth: integer := 8;
healthy_counter_threshold: integer := 4;
faulty_counter_threshold: integer := 4
);
port ( reset: in std_logic;
clk: in std_logic;
faulty_packet, Healthy_packet: in std_logic;
Healthy, intermittent, Faulty:out std_logic
);
end COMPONENT;
COMPONENT allocator is
port ( reset: in std_logic;
clk: in std_logic;
-- flow control
credit_in_N, credit_in_E, credit_in_W, credit_in_S, credit_in_L: in std_logic;
req_N_N, req_N_E, req_N_W, req_N_S, req_N_L: in std_logic;
req_E_N, req_E_E, req_E_W, req_E_S, req_E_L: in std_logic;
req_W_N, req_W_E, req_W_W, req_W_S, req_W_L: in std_logic;
req_S_N, req_S_E, req_S_W, req_S_S, req_S_L: in std_logic;
req_L_N, req_L_E, req_L_W, req_L_S, req_L_L: in std_logic;
empty_N, empty_E, empty_W, empty_S, empty_L: in std_logic;
-- grant_X_Y means the grant for X output port towards Y input port
-- this means for any X in [N, E, W, S, L] then set grant_X_Y is one hot!
valid_N, valid_E, valid_W, valid_S, valid_L : out std_logic;
grant_N_N, grant_N_E, grant_N_W, grant_N_S, grant_N_L: out std_logic;
grant_E_N, grant_E_E, grant_E_W, grant_E_S, grant_E_L: out std_logic;
grant_W_N, grant_W_E, grant_W_W, grant_W_S, grant_W_L: out std_logic;
grant_S_N, grant_S_E, grant_S_W, grant_S_S, grant_S_L: out std_logic;
grant_L_N, grant_L_E, grant_L_W, grant_L_S, grant_L_L: out std_logic;
-- Allocator logic checker outputs
err_grant_N_N_sig_not_empty_N_grant_N_N,
err_not_grant_N_N_sig_or_empty_N_not_grant_N_N,
err_grant_N_E_sig_not_empty_E_grant_N_E,
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E,
err_grant_N_W_sig_not_empty_W_grant_N_W,
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W,
err_grant_N_S_sig_not_empty_S_grant_N_S,
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S,
err_grant_N_L_sig_not_empty_L_grant_N_L,
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L,
err_grant_E_N_sig_not_empty_N_grant_E_N,
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N,
err_grant_E_E_sig_not_empty_E_grant_E_E,
err_not_grant_E_E_sig_or_empty_E_not_grant_E_E,
err_grant_E_W_sig_not_empty_W_grant_E_W,
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W,
err_grant_E_S_sig_not_empty_S_grant_E_S,
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S,
err_grant_E_L_sig_not_empty_L_grant_E_L,
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L,
err_grant_W_N_sig_not_empty_N_grant_W_N,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N,
err_grant_W_E_sig_not_empty_E_grant_W_E,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E,
err_grant_W_W_sig_not_empty_W_grant_W_W,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W,
err_grant_W_S_sig_not_empty_S_grant_W_S,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S,
err_grant_W_L_sig_not_empty_L_grant_W_L,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L,
err_grant_S_N_sig_not_empty_N_grant_S_N,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N,
err_grant_S_E_sig_not_empty_E_grant_S_E,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E,
err_grant_S_W_sig_not_empty_W_grant_S_W,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W,
err_grant_S_S_sig_not_empty_S_grant_S_S,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S,
err_grant_S_L_sig_not_empty_L_grant_S_L,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L,
err_grant_L_N_sig_not_empty_N_grant_L_N,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N,
err_grant_L_E_sig_not_empty_E_grant_L_E,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E,
err_grant_L_W_sig_not_empty_W_grant_L_W,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W,
err_grant_L_S_sig_not_empty_S_grant_L_S,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S,
err_grant_L_L_sig_not_empty_L_grant_L_L,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L,
err_grant_signals_not_empty_grant_N,
err_not_grant_signals_empty_not_grant_N,
err_grant_signals_not_empty_grant_E,
err_not_grant_signals_empty_not_grant_E,
err_grant_signals_not_empty_grant_W,
err_not_grant_signals_empty_not_grant_W,
err_grant_signals_not_empty_grant_S,
err_not_grant_signals_empty_not_grant_S,
err_grant_signals_not_empty_grant_L,
err_not_grant_signals_empty_not_grant_L,
err_grants_valid_not_match,
-- Allocator credit counter logic checker outputs
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_N_credit_counter_N_out_increment,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change,
err_grant_N_credit_counter_N_out_decrement,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_E_credit_counter_E_out_increment,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change,
err_grant_E_credit_counter_E_out_decrement,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_W_credit_counter_W_out_increment,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change,
err_grant_W_credit_counter_W_out_decrement,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_S_credit_counter_S_out_increment,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change,
err_grant_S_credit_counter_S_out_decrement,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
err_credit_in_L_credit_counter_L_out_increment,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change,
err_grant_L_credit_counter_L_out_decrement,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
-- Arbiter_in checker outputs
-- North Arbiter_in checker outputs
N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N, N_err_IDLE_grant_N,N_err_North_Req_N, N_err_North_grant_N, N_err_East_Req_E, N_err_East_grant_E,
N_err_West_Req_W, N_err_West_grant_W, N_err_South_Req_S,N_err_South_grant_S,N_err_Local_Req_L, N_err_Local_grant_L,
N_err_IDLE_Req_E, N_err_IDLE_grant_E, N_err_North_Req_E, N_err_North_grant_E, N_err_East_Req_W, N_err_East_grant_W,
N_err_West_Req_S, N_err_West_grant_S, N_err_South_Req_L, N_err_South_grant_L, N_err_Local_Req_N, N_err_Local_grant_N,
N_err_IDLE_Req_W, N_err_IDLE_grant_W, N_err_North_Req_W, N_err_North_grant_W, N_err_East_Req_S, N_err_East_grant_S,
N_err_West_Req_L, N_err_West_grant_L, N_err_South_Req_N, N_err_South_grant_N, N_err_Local_Req_E, N_err_Local_grant_E,
N_err_IDLE_Req_S, N_err_IDLE_grant_S, N_err_North_Req_S, N_err_North_grant_S, N_err_East_Req_L, N_err_East_grant_L,
N_err_West_Req_N, N_err_West_grant_N, N_err_South_Req_E, N_err_South_grant_E, N_err_Local_Req_W, N_err_Local_grant_W,
N_err_IDLE_Req_L, N_err_IDLE_grant_L, N_err_North_Req_L, N_err_North_grant_L, N_err_East_Req_N, N_err_East_grant_N,
N_err_West_Req_E, N_err_West_grant_E, N_err_South_Req_W, N_err_South_grant_W, N_err_Local_Req_S, N_err_Local_grant_S,
N_err_state_in_onehot, N_err_no_request_grants, N_err_request_no_grants,
N_err_no_Req_N_grant_N, N_err_no_Req_E_grant_E, N_err_no_Req_W_grant_W, N_err_no_Req_S_grant_S, N_err_no_Req_L_grant_L,
-- East Arbiter_in checker outputs
E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N, E_err_IDLE_grant_N,E_err_North_Req_N, E_err_North_grant_N, E_err_East_Req_E, E_err_East_grant_E,
E_err_West_Req_W, E_err_West_grant_W, E_err_South_Req_S,E_err_South_grant_S,E_err_Local_Req_L, E_err_Local_grant_L,
E_err_IDLE_Req_E, E_err_IDLE_grant_E, E_err_North_Req_E, E_err_North_grant_E, E_err_East_Req_W, E_err_East_grant_W,
E_err_West_Req_S, E_err_West_grant_S, E_err_South_Req_L, E_err_South_grant_L, E_err_Local_Req_N, E_err_Local_grant_N,
E_err_IDLE_Req_W, E_err_IDLE_grant_W, E_err_North_Req_W, E_err_North_grant_W, E_err_East_Req_S, E_err_East_grant_S,
E_err_West_Req_L, E_err_West_grant_L, E_err_South_Req_N, E_err_South_grant_N, E_err_Local_Req_E, E_err_Local_grant_E,
E_err_IDLE_Req_S, E_err_IDLE_grant_S, E_err_North_Req_S, E_err_North_grant_S, E_err_East_Req_L, E_err_East_grant_L,
E_err_West_Req_N, E_err_West_grant_N, E_err_South_Req_E, E_err_South_grant_E, E_err_Local_Req_W, E_err_Local_grant_W,
E_err_IDLE_Req_L, E_err_IDLE_grant_L, E_err_North_Req_L, E_err_North_grant_L, E_err_East_Req_N, E_err_East_grant_N,
E_err_West_Req_E, E_err_West_grant_E, E_err_South_Req_W, E_err_South_grant_W, E_err_Local_Req_S, E_err_Local_grant_S,
E_err_state_in_onehot, E_err_no_request_grants, E_err_request_no_grants,
E_err_no_Req_N_grant_N, E_err_no_Req_E_grant_E, E_err_no_Req_W_grant_W, E_err_no_Req_S_grant_S, E_err_no_Req_L_grant_L,
-- West Arbiter_in checker outputs
W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N, W_err_IDLE_grant_N,W_err_North_Req_N, W_err_North_grant_N, W_err_East_Req_E, W_err_East_grant_E,
W_err_West_Req_W, W_err_West_grant_W, W_err_South_Req_S,W_err_South_grant_S,W_err_Local_Req_L, W_err_Local_grant_L,
W_err_IDLE_Req_E, W_err_IDLE_grant_E, W_err_North_Req_E, W_err_North_grant_E, W_err_East_Req_W, W_err_East_grant_W,
W_err_West_Req_S, W_err_West_grant_S, W_err_South_Req_L, W_err_South_grant_L, W_err_Local_Req_N, W_err_Local_grant_N,
W_err_IDLE_Req_W, W_err_IDLE_grant_W, W_err_North_Req_W, W_err_North_grant_W, W_err_East_Req_S, W_err_East_grant_S,
W_err_West_Req_L, W_err_West_grant_L, W_err_South_Req_N, W_err_South_grant_N, W_err_Local_Req_E, W_err_Local_grant_E,
W_err_IDLE_Req_S, W_err_IDLE_grant_S, W_err_North_Req_S, W_err_North_grant_S, W_err_East_Req_L, W_err_East_grant_L,
W_err_West_Req_N, W_err_West_grant_N, W_err_South_Req_E, W_err_South_grant_E, W_err_Local_Req_W, W_err_Local_grant_W,
W_err_IDLE_Req_L, W_err_IDLE_grant_L, W_err_North_Req_L, W_err_North_grant_L, W_err_East_Req_N, W_err_East_grant_N,
W_err_West_Req_E, W_err_West_grant_E, W_err_South_Req_W, W_err_South_grant_W, W_err_Local_Req_S, W_err_Local_grant_S,
W_err_state_in_onehot, W_err_no_request_grants, W_err_request_no_grants,
W_err_no_Req_N_grant_N, W_err_no_Req_E_grant_E, W_err_no_Req_W_grant_W, W_err_no_Req_S_grant_S, W_err_no_Req_L_grant_L,
-- South Arbiter_in checker outputs
S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N, S_err_IDLE_grant_N,S_err_North_Req_N, S_err_North_grant_N, S_err_East_Req_E, S_err_East_grant_E,
S_err_West_Req_W, S_err_West_grant_W, S_err_South_Req_S,S_err_South_grant_S,S_err_Local_Req_L, S_err_Local_grant_L,
S_err_IDLE_Req_E, S_err_IDLE_grant_E, S_err_North_Req_E, S_err_North_grant_E, S_err_East_Req_W, S_err_East_grant_W,
S_err_West_Req_S, S_err_West_grant_S, S_err_South_Req_L, S_err_South_grant_L, S_err_Local_Req_N, S_err_Local_grant_N,
S_err_IDLE_Req_W, S_err_IDLE_grant_W, S_err_North_Req_W, S_err_North_grant_W, S_err_East_Req_S, S_err_East_grant_S,
S_err_West_Req_L, S_err_West_grant_L, S_err_South_Req_N, S_err_South_grant_N, S_err_Local_Req_E, S_err_Local_grant_E,
S_err_IDLE_Req_S, S_err_IDLE_grant_S, S_err_North_Req_S, S_err_North_grant_S, S_err_East_Req_L, S_err_East_grant_L,
S_err_West_Req_N, S_err_West_grant_N, S_err_South_Req_E, S_err_South_grant_E, S_err_Local_Req_W, S_err_Local_grant_W,
S_err_IDLE_Req_L, S_err_IDLE_grant_L, S_err_North_Req_L, S_err_North_grant_L, S_err_East_Req_N, S_err_East_grant_N,
S_err_West_Req_E, S_err_West_grant_E, S_err_South_Req_W, S_err_South_grant_W, S_err_Local_Req_S, S_err_Local_grant_S,
S_err_state_in_onehot, S_err_no_request_grants, S_err_request_no_grants,
S_err_no_Req_N_grant_N, S_err_no_Req_E_grant_E, S_err_no_Req_W_grant_W, S_err_no_Req_S_grant_S, S_err_no_Req_L_grant_L,
-- Local Arbiter_in checker outputs
L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N, L_err_IDLE_grant_N,L_err_North_Req_N, L_err_North_grant_N, L_err_East_Req_E, L_err_East_grant_E,
L_err_West_Req_W, L_err_West_grant_W, L_err_South_Req_S,L_err_South_grant_S,L_err_Local_Req_L, L_err_Local_grant_L,
L_err_IDLE_Req_E, L_err_IDLE_grant_E, L_err_North_Req_E, L_err_North_grant_E, L_err_East_Req_W, L_err_East_grant_W,
L_err_West_Req_S, L_err_West_grant_S, L_err_South_Req_L, L_err_South_grant_L, L_err_Local_Req_N, L_err_Local_grant_N,
L_err_IDLE_Req_W, L_err_IDLE_grant_W, L_err_North_Req_W, L_err_North_grant_W, L_err_East_Req_S, L_err_East_grant_S,
L_err_West_Req_L, L_err_West_grant_L, L_err_South_Req_N, L_err_South_grant_N, L_err_Local_Req_E, L_err_Local_grant_E,
L_err_IDLE_Req_S, L_err_IDLE_grant_S, L_err_North_Req_S, L_err_North_grant_S, L_err_East_Req_L, L_err_East_grant_L,
L_err_West_Req_N, L_err_West_grant_N, L_err_South_Req_E, L_err_South_grant_E, L_err_Local_Req_W, L_err_Local_grant_W,
L_err_IDLE_Req_L, L_err_IDLE_grant_L, L_err_North_Req_L, L_err_North_grant_L, L_err_East_Req_N, L_err_East_grant_N,
L_err_West_Req_E, L_err_West_grant_E, L_err_South_Req_W, L_err_South_grant_W, L_err_Local_Req_S, L_err_Local_grant_S,
L_err_state_in_onehot, L_err_no_request_grants, L_err_request_no_grants,
L_err_no_Req_N_grant_N, L_err_no_Req_E_grant_E, L_err_no_Req_W_grant_W, L_err_no_Req_S_grant_S, L_err_no_Req_L_grant_L,
-- Arbiter_out checker outputs
-- North Arbiter_out checker outputs
N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N,
N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E, N_err_North_req_X_E, N_err_East_req_X_W, N_err_West_req_X_S, N_err_South_req_X_L, N_err_Local_req_X_N,
N_err_IDLE_req_X_W, N_err_North_req_X_W, N_err_East_req_X_S, N_err_West_req_X_L, N_err_South_req_X_N, N_err_Local_req_X_E,
N_err_IDLE_req_X_S, N_err_North_req_X_S, N_err_East_req_X_L, N_err_West_req_X_N, N_err_South_req_X_E, N_err_Local_req_X_W,
N_err_IDLE_req_X_L, N_err_North_req_X_L, N_err_East_req_X_N, N_err_West_req_X_E, N_err_South_req_X_W, N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants, N_err_state_North_Invalid_Grant,N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant, N_err_state_South_Invalid_Grant,N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N,
E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E, E_err_North_req_X_E, E_err_East_req_X_W, E_err_West_req_X_S, E_err_South_req_X_L, E_err_Local_req_X_N,
E_err_IDLE_req_X_W, E_err_North_req_X_W, E_err_East_req_X_S, E_err_West_req_X_L, E_err_South_req_X_N, E_err_Local_req_X_E,
E_err_IDLE_req_X_S, E_err_North_req_X_S, E_err_East_req_X_L, E_err_West_req_X_N, E_err_South_req_X_E, E_err_Local_req_X_W,
E_err_IDLE_req_X_L, E_err_North_req_X_L, E_err_East_req_X_N, E_err_West_req_X_E, E_err_South_req_X_W, E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot, E_arbiter_out_err_no_request_grants, E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants, E_err_state_North_Invalid_Grant, E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant, E_err_state_South_Invalid_Grant, E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N,
W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E, W_err_North_req_X_E, W_err_East_req_X_W, W_err_West_req_X_S, W_err_South_req_X_L, W_err_Local_req_X_N,
W_err_IDLE_req_X_W, W_err_North_req_X_W, W_err_East_req_X_S, W_err_West_req_X_L, W_err_South_req_X_N, W_err_Local_req_X_E,
W_err_IDLE_req_X_S, W_err_North_req_X_S, W_err_East_req_X_L, W_err_West_req_X_N, W_err_South_req_X_E, W_err_Local_req_X_W,
W_err_IDLE_req_X_L, W_err_North_req_X_L, W_err_East_req_X_N, W_err_West_req_X_E, W_err_South_req_X_W, W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot, W_arbiter_out_err_no_request_grants, W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants, W_err_state_North_Invalid_Grant,W_err_state_East_Invalid_Grant, W_err_state_West_Invalid_Grant,
W_err_state_South_Invalid_Grant,W_err_state_Local_Invalid_Grant,W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N,
S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E, S_err_North_req_X_E, S_err_East_req_X_W, S_err_West_req_X_S, S_err_South_req_X_L, S_err_Local_req_X_N,
S_err_IDLE_req_X_W, S_err_North_req_X_W, S_err_East_req_X_S, S_err_West_req_X_L, S_err_South_req_X_N, S_err_Local_req_X_E,
S_err_IDLE_req_X_S, S_err_North_req_X_S, S_err_East_req_X_L, S_err_West_req_X_N, S_err_South_req_X_E, S_err_Local_req_X_W,
S_err_IDLE_req_X_L, S_err_North_req_X_L, S_err_East_req_X_N, S_err_West_req_X_E, S_err_South_req_X_W, S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot, S_arbiter_out_err_no_request_grants, S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants, S_err_state_North_Invalid_Grant,S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant, S_err_state_South_Invalid_Grant,S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N,
L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E, L_err_North_req_X_E, L_err_East_req_X_W, L_err_West_req_X_S, L_err_South_req_X_L, L_err_Local_req_X_N,
L_err_IDLE_req_X_W, L_err_North_req_X_W, L_err_East_req_X_S, L_err_West_req_X_L, L_err_South_req_X_N, L_err_Local_req_X_E,
L_err_IDLE_req_X_S, L_err_North_req_X_S, L_err_East_req_X_L, L_err_West_req_X_N, L_err_South_req_X_E, L_err_Local_req_X_W,
L_err_IDLE_req_X_L, L_err_North_req_X_L, L_err_East_req_X_N, L_err_West_req_X_E, L_err_South_req_X_W, L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot, L_arbiter_out_err_no_request_grants, L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants,
L_err_state_North_Invalid_Grant,
L_err_state_East_Invalid_Grant,
L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant,
L_err_state_Local_Invalid_Grant,
L_err_Grants_onehot_or_all_zero : out std_logic
);
end COMPONENT;
COMPONENT LBDR_packet_drop is
generic (
cur_addr_rst: integer := 8;
Cx_rst: integer := 8;
NoC_size: integer := 4
);
port ( reset: in std_logic;
clk: in std_logic;
Rxy_reconf: in std_logic_vector(7 downto 0);
Reconfig : in std_logic;
Faulty_C_N, Faulty_C_E, Faulty_C_W, Faulty_C_S: in std_logic;
empty: in std_logic;
flit_type: in std_logic_vector(2 downto 0);
dst_addr: in std_logic_vector(NoC_size-1 downto 0);
packet_drop_order: out std_logic;
grant_N, grant_E, grant_W, grant_S, grant_L: in std_logic;
Req_N, Req_E, Req_W, Req_S, Req_L:out std_logic;
-- Checker outputs
-- Routing part checkers
err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot,
err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order,
-- Cx_Reconf checkers
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
-- Rxy_Reconf checkers
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal : out std_logic
);
end COMPONENT;
COMPONENT XBAR is
generic (
DATA_WIDTH: integer := 32
);
port (
North_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
East_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
West_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
South_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
Local_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
sel: in std_logic_vector (4 downto 0);
Data_out: out std_logic_vector(DATA_WIDTH-1 downto 0)
);
end COMPONENT;
signal FIFO_D_out_N, FIFO_D_out_E, FIFO_D_out_W, FIFO_D_out_S, FIFO_D_out_L: std_logic_vector(DATA_WIDTH-1 downto 0);
-- Grant_XY : Grant signal generated from Arbiter for output X connected to FIFO of input Y
signal Grant_NN, Grant_NE, Grant_NW, Grant_NS, Grant_NL: std_logic;
signal Grant_EN, Grant_EE, Grant_EW, Grant_ES, Grant_EL: std_logic;
signal Grant_WN, Grant_WE, Grant_WW, Grant_WS, Grant_WL: std_logic;
signal Grant_SN, Grant_SE, Grant_SW, Grant_SS, Grant_SL: std_logic;
signal Grant_LN, Grant_LE, Grant_LW, Grant_LS, Grant_LL: std_logic;
signal Req_NN, Req_EN, Req_WN, Req_SN, Req_LN: std_logic;
signal Req_NE, Req_EE, Req_WE, Req_SE, Req_LE: std_logic;
signal Req_NW, Req_EW, Req_WW, Req_SW, Req_LW: std_logic;
signal Req_NS, Req_ES, Req_WS, Req_SS, Req_LS: std_logic;
signal Req_NL, Req_EL, Req_WL, Req_SL, Req_LL: std_logic;
signal empty_N, empty_E, empty_W, empty_S, empty_L: std_logic;
signal Xbar_sel: array (4 downto 0) of std_logic_vector(4 downto 0);
signal Xbar_sel_N, Xbar_sel_E, Xbar_sel_W, Xbar_sel_S, Xbar_sel_L: std_logic_vector(4 downto 0);
signal faulty_packet_N, faulty_packet_E, faulty_packet_W, faulty_packet_S, faulty_packet_L: std_logic;
signal healthy_packet_N, healthy_packet_E, healthy_packet_W, healthy_packet_S, healthy_packet_L: std_logic;
signal packet_drop_order_N, packet_drop_order_E, packet_drop_order_W, packet_drop_order_S, packet_drop_order_L: std_logic;
signal healthy_link_N, healthy_link_E, healthy_link_W, healthy_link_S, healthy_link_L: std_logic;
signal sig_Faulty_N_out, sig_Faulty_E_out, sig_Faulty_W_out, sig_Faulty_S_out, faulty_link_L: std_logic;
signal intermittent_link_N, intermittent_link_E, intermittent_link_W, intermittent_link_S, intermittent_link_L: std_logic;
-- Signals needed for control part checkers
-- Signals needed for LBDR packet drop checkers
-- North
signal N_err_header_empty_Requests_FF_Requests_in,
N_err_tail_Requests_in_all_zero,
N_err_tail_empty_Requests_FF_Requests_in,
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
N_err_grants_onehot,
N_err_grants_mismatch,
N_err_header_tail_Requests_FF_Requests_in,
N_err_dst_addr_cur_addr_N1,
N_err_dst_addr_cur_addr_not_N1,
N_err_dst_addr_cur_addr_E1,
N_err_dst_addr_cur_addr_not_E1,
N_err_dst_addr_cur_addr_W1,
N_err_dst_addr_cur_addr_not_W1,
N_err_dst_addr_cur_addr_S1,
N_err_dst_addr_cur_addr_not_S1,
N_err_dst_addr_cur_addr_not_Req_L_in,
N_err_dst_addr_cur_addr_Req_L_in,
N_err_header_not_empty_Req_N_in,
N_err_header_not_empty_Req_E_in,
N_err_header_not_empty_Req_W_in,
N_err_header_not_empty_Req_S_in,
N_err_header_not_empty_packet_drop_in,
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
N_err_header_empty_packet_drop_in_packet_drop_equal,
N_err_tail_not_empty_packet_drop_not_packet_drop_in,
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
N_err_packet_drop_order,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- East
signal E_err_header_empty_Requests_FF_Requests_in,
E_err_tail_Requests_in_all_zero,
E_err_tail_empty_Requests_FF_Requests_in,
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
E_err_grants_onehot,
E_err_grants_mismatch,
E_err_header_tail_Requests_FF_Requests_in,
E_err_dst_addr_cur_addr_N1,
E_err_dst_addr_cur_addr_not_N1,
E_err_dst_addr_cur_addr_E1,
E_err_dst_addr_cur_addr_not_E1,
E_err_dst_addr_cur_addr_W1,
E_err_dst_addr_cur_addr_not_W1,
E_err_dst_addr_cur_addr_S1,
E_err_dst_addr_cur_addr_not_S1,
E_err_dst_addr_cur_addr_not_Req_L_in,
E_err_dst_addr_cur_addr_Req_L_in,
E_err_header_not_empty_Req_N_in,
E_err_header_not_empty_Req_E_in,
E_err_header_not_empty_Req_W_in,
E_err_header_not_empty_Req_S_in,
E_err_header_not_empty_packet_drop_in,
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
E_err_header_empty_packet_drop_in_packet_drop_equal,
E_err_tail_not_empty_packet_drop_not_packet_drop_in,
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
E_err_packet_drop_order,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- West
signal W_err_header_empty_Requests_FF_Requests_in,
W_err_tail_Requests_in_all_zero,
W_err_tail_empty_Requests_FF_Requests_in,
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
W_err_grants_onehot,
W_err_grants_mismatch,
W_err_header_tail_Requests_FF_Requests_in,
W_err_dst_addr_cur_addr_N1,
W_err_dst_addr_cur_addr_not_N1,
W_err_dst_addr_cur_addr_E1,
W_err_dst_addr_cur_addr_not_E1,
W_err_dst_addr_cur_addr_W1,
W_err_dst_addr_cur_addr_not_W1,
W_err_dst_addr_cur_addr_S1,
W_err_dst_addr_cur_addr_not_S1,
W_err_dst_addr_cur_addr_not_Req_L_in,
W_err_dst_addr_cur_addr_Req_L_in,
W_err_header_not_empty_Req_N_in,
W_err_header_not_empty_Req_E_in,
W_err_header_not_empty_Req_W_in,
W_err_header_not_empty_Req_S_in,
W_err_header_not_empty_packet_drop_in,
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
W_err_header_empty_packet_drop_in_packet_drop_equal,
W_err_tail_not_empty_packet_drop_not_packet_drop_in,
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
W_err_packet_drop_order,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- South
signal S_err_header_empty_Requests_FF_Requests_in,
S_err_tail_Requests_in_all_zero,
S_err_tail_empty_Requests_FF_Requests_in,
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
S_err_grants_onehot,
S_err_grants_mismatch,
S_err_header_tail_Requests_FF_Requests_in,
S_err_dst_addr_cur_addr_N1,
S_err_dst_addr_cur_addr_not_N1,
S_err_dst_addr_cur_addr_E1,
S_err_dst_addr_cur_addr_not_E1,
S_err_dst_addr_cur_addr_W1,
S_err_dst_addr_cur_addr_not_W1,
S_err_dst_addr_cur_addr_S1,
S_err_dst_addr_cur_addr_not_S1,
S_err_dst_addr_cur_addr_not_Req_L_in,
S_err_dst_addr_cur_addr_Req_L_in,
S_err_header_not_empty_Req_N_in,
S_err_header_not_empty_Req_E_in,
S_err_header_not_empty_Req_W_in,
S_err_header_not_empty_Req_S_in,
S_err_header_not_empty_packet_drop_in,
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
S_err_header_empty_packet_drop_in_packet_drop_equal,
S_err_tail_not_empty_packet_drop_not_packet_drop_in,
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
S_err_packet_drop_order,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- Local
signal L_err_header_empty_Requests_FF_Requests_in,
L_err_tail_Requests_in_all_zero,
L_err_tail_empty_Requests_FF_Requests_in,
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
L_err_grants_onehot,
L_err_grants_mismatch,
L_err_header_tail_Requests_FF_Requests_in,
L_err_dst_addr_cur_addr_N1,
L_err_dst_addr_cur_addr_not_N1,
L_err_dst_addr_cur_addr_E1,
L_err_dst_addr_cur_addr_not_E1,
L_err_dst_addr_cur_addr_W1,
L_err_dst_addr_cur_addr_not_W1,
L_err_dst_addr_cur_addr_S1,
L_err_dst_addr_cur_addr_not_S1,
L_err_dst_addr_cur_addr_not_Req_L_in,
L_err_dst_addr_cur_addr_Req_L_in,
L_err_header_not_empty_Req_N_in,
L_err_header_not_empty_Req_E_in,
L_err_header_not_empty_Req_W_in,
L_err_header_not_empty_Req_S_in,
L_err_header_not_empty_packet_drop_in,
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
L_err_header_empty_packet_drop_in_packet_drop_equal,
L_err_tail_not_empty_packet_drop_not_packet_drop_in,
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
L_err_packet_drop_order,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------
-- Signals needed for FIFO packet drop with fault classifier support checkers
-- North
-- Functional checkers
signal N_err_empty_full,
N_err_empty_read_en,
N_err_full_write_en,
N_err_state_in_onehot,
N_err_read_pointer_in_onehot,
N_err_write_pointer_in_onehot,
-- Structural checkers
N_err_write_en_write_pointer,
N_err_not_write_en_write_pointer,
N_err_read_pointer_write_pointer_not_empty,
N_err_read_pointer_write_pointer_empty,
N_err_read_pointer_write_pointer_not_full,
N_err_read_pointer_write_pointer_full,
N_err_read_pointer_increment,
N_err_read_pointer_not_increment,
N_err_write_en,
N_err_not_write_en,
N_err_not_write_en1,
N_err_not_write_en2,
N_err_read_en_mismatch,
N_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
N_err_fake_credit_read_en_fake_credit_counter_in_increment,
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
N_err_fake_credit_read_en_credit_out,
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
N_err_state_out_Idle_not_fault_out_not_fake_credit,
N_err_state_out_Idle_not_fault_out_not_fault_info,
N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
N_err_state_out_Idle_fault_out_fake_credit,
N_err_state_out_Idle_fault_out_state_in_Packet_drop,
N_err_state_out_Idle_fault_out_fault_info,
N_err_state_out_Idle_fault_out_faulty_packet_in,
N_err_state_out_Idle_not_health_info,
N_err_state_out_Idle_not_write_fake_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Header_flit_valid_in_fault_out_fault_info,
N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Header_flit_not_valid_in_not_fault_info,
N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
N_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
N_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Body_flit_valid_in_fault_out_fault_info,
N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Body_flit_not_valid_in_not_fault_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
N_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
N_err_state_out_Body_flit_valid_in_not_health_info,
N_err_state_out_Body_flit_not_fake_credit,
N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
N_err_state_out_Tail_flit_not_valid_in_not_fault_info,
N_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
N_err_state_out_Tail_flit_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Packet_drop_not_fault_info,
N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- East
-- Functional checkers
signal E_err_empty_full,
E_err_empty_read_en,
E_err_full_write_en,
E_err_state_in_onehot,
E_err_read_pointer_in_onehot,
E_err_write_pointer_in_onehot,
-- Structural checkers
E_err_write_en_write_pointer,
E_err_not_write_en_write_pointer,
E_err_read_pointer_write_pointer_not_empty,
E_err_read_pointer_write_pointer_empty,
E_err_read_pointer_write_pointer_not_full,
E_err_read_pointer_write_pointer_full,
E_err_read_pointer_increment,
E_err_read_pointer_not_increment,
E_err_write_en,
E_err_not_write_en,
E_err_not_write_en1,
E_err_not_write_en2,
E_err_read_en_mismatch,
E_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
E_err_fake_credit_read_en_fake_credit_counter_in_increment,
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
E_err_fake_credit_read_en_credit_out,
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
E_err_state_out_Idle_not_fault_out_not_fake_credit,
E_err_state_out_Idle_not_fault_out_not_fault_info,
E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
E_err_state_out_Idle_fault_out_fake_credit,
E_err_state_out_Idle_fault_out_state_in_Packet_drop,
E_err_state_out_Idle_fault_out_fault_info,
E_err_state_out_Idle_fault_out_faulty_packet_in,
E_err_state_out_Idle_not_health_info,
E_err_state_out_Idle_not_write_fake_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Header_flit_valid_in_fault_out_fault_info,
E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Header_flit_not_valid_in_not_fault_info,
E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
E_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
E_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Body_flit_valid_in_fault_out_fault_info,
E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Body_flit_not_valid_in_not_fault_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
E_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
E_err_state_out_Body_flit_valid_in_not_health_info,
E_err_state_out_Body_flit_not_fake_credit,
E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
E_err_state_out_Tail_flit_not_valid_in_not_fault_info,
E_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
E_err_state_out_Tail_flit_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Packet_drop_not_fault_info,
E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- West
-- Functional checkers
signal W_err_empty_full, W_err_empty_read_en, W_err_full_write_en, W_err_state_in_onehot,
W_err_read_pointer_in_onehot, W_err_write_pointer_in_onehot,
-- Structural checkers
W_err_write_en_write_pointer,
W_err_not_write_en_write_pointer,
W_err_read_pointer_write_pointer_not_empty,
W_err_read_pointer_write_pointer_empty,
W_err_read_pointer_write_pointer_not_full,
W_err_read_pointer_write_pointer_full,
W_err_read_pointer_increment,
W_err_read_pointer_not_increment,
W_err_write_en,
W_err_not_write_en,
W_err_not_write_en1,
W_err_not_write_en2,
W_err_read_en_mismatch,
W_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
W_err_fake_credit_read_en_fake_credit_counter_in_increment,
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
W_err_fake_credit_read_en_credit_out,
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
W_err_state_out_Idle_not_fault_out_not_fake_credit,
W_err_state_out_Idle_not_fault_out_not_fault_info,
W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
W_err_state_out_Idle_fault_out_fake_credit,
W_err_state_out_Idle_fault_out_state_in_Packet_drop,
W_err_state_out_Idle_fault_out_fault_info,
W_err_state_out_Idle_fault_out_faulty_packet_in,
W_err_state_out_Idle_not_health_info,
W_err_state_out_Idle_not_write_fake_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Header_flit_valid_in_fault_out_fault_info,
W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Header_flit_not_valid_in_not_fault_info,
W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
W_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
W_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Body_flit_valid_in_fault_out_fault_info,
W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Body_flit_not_valid_in_not_fault_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
W_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
W_err_state_out_Body_flit_valid_in_not_health_info,
W_err_state_out_Body_flit_not_fake_credit,
W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
W_err_state_out_Tail_flit_not_valid_in_not_fault_info,
W_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
W_err_state_out_Tail_flit_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Packet_drop_not_fault_info,
W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- South
-- Functional checkers
signal S_err_empty_full, S_err_empty_read_en, S_err_full_write_en,
S_err_state_in_onehot, S_err_read_pointer_in_onehot, S_err_write_pointer_in_onehot,
-- Structural checkers
S_err_write_en_write_pointer,
S_err_not_write_en_write_pointer,
S_err_read_pointer_write_pointer_not_empty,
S_err_read_pointer_write_pointer_empty,
S_err_read_pointer_write_pointer_not_full,
S_err_read_pointer_write_pointer_full,
S_err_read_pointer_increment,
S_err_read_pointer_not_increment,
S_err_write_en,
S_err_not_write_en,
S_err_not_write_en1,
S_err_not_write_en2,
S_err_read_en_mismatch,
S_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
S_err_fake_credit_read_en_fake_credit_counter_in_increment,
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
S_err_fake_credit_read_en_credit_out,
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
S_err_state_out_Idle_not_fault_out_not_fake_credit,
S_err_state_out_Idle_not_fault_out_not_fault_info,
S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
S_err_state_out_Idle_fault_out_fake_credit,
S_err_state_out_Idle_fault_out_state_in_Packet_drop,
S_err_state_out_Idle_fault_out_fault_info,
S_err_state_out_Idle_fault_out_faulty_packet_in,
S_err_state_out_Idle_not_health_info,
S_err_state_out_Idle_not_write_fake_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Header_flit_valid_in_fault_out_fault_info,
S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Header_flit_not_valid_in_not_fault_info,
S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
S_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
S_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Body_flit_valid_in_fault_out_fault_info,
S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Body_flit_not_valid_in_not_fault_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
S_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
S_err_state_out_Body_flit_valid_in_not_health_info,
S_err_state_out_Body_flit_not_fake_credit,
S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
S_err_state_out_Tail_flit_not_valid_in_not_fault_info,
S_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
S_err_state_out_Tail_flit_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Packet_drop_not_fault_info,
S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- Local
-- Functional checkers
signal L_err_empty_full,
L_err_empty_read_en,
L_err_full_write_en,
L_err_state_in_onehot,
L_err_read_pointer_in_onehot,
L_err_write_pointer_in_onehot,
-- Structural checkers
L_err_write_en_write_pointer,
L_err_not_write_en_write_pointer,
L_err_read_pointer_write_pointer_not_empty,
L_err_read_pointer_write_pointer_empty,
L_err_read_pointer_write_pointer_not_full,
L_err_read_pointer_write_pointer_full,
L_err_read_pointer_increment,
L_err_read_pointer_not_increment,
L_err_write_en,
L_err_not_write_en,
L_err_not_write_en1,
L_err_not_write_en2,
L_err_read_en_mismatch,
L_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
L_err_fake_credit_read_en_fake_credit_counter_in_increment,
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
L_err_fake_credit_read_en_credit_out,
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
L_err_state_out_Idle_not_fault_out_not_fake_credit,
L_err_state_out_Idle_not_fault_out_not_fault_info,
L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
L_err_state_out_Idle_fault_out_fake_credit,
L_err_state_out_Idle_fault_out_state_in_Packet_drop,
L_err_state_out_Idle_fault_out_fault_info,
L_err_state_out_Idle_fault_out_faulty_packet_in,
L_err_state_out_Idle_not_health_info,
L_err_state_out_Idle_not_write_fake_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Header_flit_valid_in_fault_out_fault_info,
L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Header_flit_not_valid_in_not_fault_info,
L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
L_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
L_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Body_flit_valid_in_fault_out_fault_info,
L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Body_flit_not_valid_in_not_fault_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
L_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
L_err_state_out_Body_flit_valid_in_not_health_info,
L_err_state_out_Body_flit_not_fake_credit,
L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
L_err_state_out_Tail_flit_not_valid_in_not_fault_info,
L_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
L_err_state_out_Tail_flit_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Packet_drop_not_fault_info,
L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
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-- Signals needed for Allocator unit
-- Allocator logic checker outputs
signal err_grant_N_N_sig_not_empty_N_grant_N_N, err_not_grant_N_N_sig_or_empty_N_not_grant_N_N,
err_grant_N_E_sig_not_empty_E_grant_N_E, err_not_grant_N_E_sig_or_empty_E_not_grant_N_E,
err_grant_N_W_sig_not_empty_W_grant_N_W, err_not_grant_N_W_sig_or_empty_W_not_grant_N_W,
err_grant_N_S_sig_not_empty_S_grant_N_S, err_not_grant_N_S_sig_or_empty_S_not_grant_N_S,
err_grant_N_L_sig_not_empty_L_grant_N_L, err_not_grant_N_L_sig_or_empty_L_not_grant_N_L,
err_grant_E_N_sig_not_empty_N_grant_E_N, err_not_grant_E_N_sig_or_empty_N_not_grant_E_N,
err_grant_E_E_sig_not_empty_E_grant_E_E, err_not_grant_E_E_sig_or_empty_E_not_grant_E_E,
err_grant_E_W_sig_not_empty_W_grant_E_W, err_not_grant_E_W_sig_or_empty_W_not_grant_E_W,
err_grant_E_S_sig_not_empty_S_grant_E_S, err_not_grant_E_S_sig_or_empty_S_not_grant_E_S,
err_grant_E_L_sig_not_empty_L_grant_E_L, err_not_grant_E_L_sig_or_empty_L_not_grant_E_L,
err_grant_W_N_sig_not_empty_N_grant_W_N,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N,
err_grant_W_E_sig_not_empty_E_grant_W_E,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E,
err_grant_W_W_sig_not_empty_W_grant_W_W,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W,
err_grant_W_S_sig_not_empty_S_grant_W_S,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S,
err_grant_W_L_sig_not_empty_L_grant_W_L,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L,
err_grant_S_N_sig_not_empty_N_grant_S_N,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N,
err_grant_S_E_sig_not_empty_E_grant_S_E,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E,
err_grant_S_W_sig_not_empty_W_grant_S_W,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W,
err_grant_S_S_sig_not_empty_S_grant_S_S,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S,
err_grant_S_L_sig_not_empty_L_grant_S_L,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L,
err_grant_L_N_sig_not_empty_N_grant_L_N,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N,
err_grant_L_E_sig_not_empty_E_grant_L_E,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E,
err_grant_L_W_sig_not_empty_W_grant_L_W,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W,
err_grant_L_S_sig_not_empty_S_grant_L_S,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S,
err_grant_L_L_sig_not_empty_L_grant_L_L,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L,
err_grant_signals_not_empty_grant_N,
err_not_grant_signals_empty_not_grant_N,
err_grant_signals_not_empty_grant_E,
err_not_grant_signals_empty_not_grant_E,
err_grant_signals_not_empty_grant_W,
err_not_grant_signals_empty_not_grant_W,
err_grant_signals_not_empty_grant_S,
err_not_grant_signals_empty_not_grant_S,
err_grant_signals_not_empty_grant_L,
err_not_grant_signals_empty_not_grant_L,
err_grants_valid_not_match: std_logic;
-- Allocator credit_counter logic checker outputs
signal err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_N_credit_counter_N_out_increment,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change,
err_grant_N_credit_counter_N_out_decrement,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_E_credit_counter_E_out_increment,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change,
err_grant_E_credit_counter_E_out_decrement,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_W_credit_counter_W_out_increment,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change,
err_grant_W_credit_counter_W_out_decrement,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_S_credit_counter_S_out_increment,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change,
err_grant_S_credit_counter_S_out_decrement,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
err_credit_in_L_credit_counter_L_out_increment,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change,
err_grant_L_credit_counter_L_out_decrement,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal : std_logic;
---------------------------------------------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------
-- Arbiter_in Checker signals (part of allocator unit)
-- North Arbiter_in checker outputs
signal N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N, N_err_IDLE_grant_N,N_err_North_Req_N, N_err_North_grant_N, N_err_East_Req_E, N_err_East_grant_E,
N_err_West_Req_W, N_err_West_grant_W, N_err_South_Req_S,N_err_South_grant_S,N_err_Local_Req_L, N_err_Local_grant_L,
N_err_IDLE_Req_E, N_err_IDLE_grant_E, N_err_North_Req_E, N_err_North_grant_E, N_err_East_Req_W, N_err_East_grant_W,
N_err_West_Req_S, N_err_West_grant_S, N_err_South_Req_L, N_err_South_grant_L, N_err_Local_Req_N, N_err_Local_grant_N,
N_err_IDLE_Req_W, N_err_IDLE_grant_W, N_err_North_Req_W, N_err_North_grant_W, N_err_East_Req_S, N_err_East_grant_S,
N_err_West_Req_L, N_err_West_grant_L, N_err_South_Req_N, N_err_South_grant_N, N_err_Local_Req_E, N_err_Local_grant_E,
N_err_IDLE_Req_S, N_err_IDLE_grant_S, N_err_North_Req_S, N_err_North_grant_S, N_err_East_Req_L, N_err_East_grant_L,
N_err_West_Req_N, N_err_West_grant_N, N_err_South_Req_E, N_err_South_grant_E, N_err_Local_Req_W, N_err_Local_grant_W,
N_err_IDLE_Req_L, N_err_IDLE_grant_L, N_err_North_Req_L, N_err_North_grant_L, N_err_East_Req_N, N_err_East_grant_N,
N_err_West_Req_E, N_err_West_grant_E, N_err_South_Req_W, N_err_South_grant_W, N_err_Local_Req_S, N_err_Local_grant_S,
N_err_arbiter_state_in_onehot, N_err_no_request_grants, N_err_request_no_grants,
N_err_no_Req_N_grant_N, N_err_no_Req_E_grant_E, N_err_no_Req_W_grant_W, N_err_no_Req_S_grant_S, N_err_no_Req_L_grant_L,
-- East Arbiter_in checker outputs
E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N, E_err_IDLE_grant_N,E_err_North_Req_N, E_err_North_grant_N, E_err_East_Req_E, E_err_East_grant_E,
E_err_West_Req_W, E_err_West_grant_W, E_err_South_Req_S,E_err_South_grant_S,E_err_Local_Req_L, E_err_Local_grant_L,
E_err_IDLE_Req_E, E_err_IDLE_grant_E, E_err_North_Req_E, E_err_North_grant_E, E_err_East_Req_W, E_err_East_grant_W,
E_err_West_Req_S, E_err_West_grant_S, E_err_South_Req_L, E_err_South_grant_L, E_err_Local_Req_N, E_err_Local_grant_N,
E_err_IDLE_Req_W, E_err_IDLE_grant_W, E_err_North_Req_W, E_err_North_grant_W, E_err_East_Req_S, E_err_East_grant_S,
E_err_West_Req_L, E_err_West_grant_L, E_err_South_Req_N, E_err_South_grant_N, E_err_Local_Req_E, E_err_Local_grant_E,
E_err_IDLE_Req_S, E_err_IDLE_grant_S, E_err_North_Req_S, E_err_North_grant_S, E_err_East_Req_L, E_err_East_grant_L,
E_err_West_Req_N, E_err_West_grant_N, E_err_South_Req_E, E_err_South_grant_E, E_err_Local_Req_W, E_err_Local_grant_W,
E_err_IDLE_Req_L, E_err_IDLE_grant_L, E_err_North_Req_L, E_err_North_grant_L, E_err_East_Req_N, E_err_East_grant_N,
E_err_West_Req_E, E_err_West_grant_E, E_err_South_Req_W, E_err_South_grant_W, E_err_Local_Req_S, E_err_Local_grant_S,
E_err_arbiter_state_in_onehot, E_err_no_request_grants, E_err_request_no_grants,
E_err_no_Req_N_grant_N,E_err_no_Req_E_grant_E, E_err_no_Req_W_grant_W, E_err_no_Req_S_grant_S, E_err_no_Req_L_grant_L,
-- West Arbiter_in checker outputs
W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N, W_err_IDLE_grant_N,W_err_North_Req_N, W_err_North_grant_N, W_err_East_Req_E, W_err_East_grant_E,
W_err_West_Req_W, W_err_West_grant_W, W_err_South_Req_S,W_err_South_grant_S,W_err_Local_Req_L, W_err_Local_grant_L,
W_err_IDLE_Req_E, W_err_IDLE_grant_E, W_err_North_Req_E, W_err_North_grant_E, W_err_East_Req_W, W_err_East_grant_W,
W_err_West_Req_S, W_err_West_grant_S, W_err_South_Req_L, W_err_South_grant_L, W_err_Local_Req_N, W_err_Local_grant_N,
W_err_IDLE_Req_W, W_err_IDLE_grant_W, W_err_North_Req_W, W_err_North_grant_W, W_err_East_Req_S, W_err_East_grant_S,
W_err_West_Req_L, W_err_West_grant_L, W_err_South_Req_N, W_err_South_grant_N, W_err_Local_Req_E, W_err_Local_grant_E,
W_err_IDLE_Req_S, W_err_IDLE_grant_S, W_err_North_Req_S, W_err_North_grant_S, W_err_East_Req_L, W_err_East_grant_L,
W_err_West_Req_N, W_err_West_grant_N, W_err_South_Req_E, W_err_South_grant_E, W_err_Local_Req_W, W_err_Local_grant_W,
W_err_IDLE_Req_L, W_err_IDLE_grant_L, W_err_North_Req_L, W_err_North_grant_L, W_err_East_Req_N, W_err_East_grant_N,
W_err_West_Req_E, W_err_West_grant_E, W_err_South_Req_W, W_err_South_grant_W, W_err_Local_Req_S, W_err_Local_grant_S,
W_err_arbiter_state_in_onehot, W_err_no_request_grants, W_err_request_no_grants,
W_err_no_Req_N_grant_N, W_err_no_Req_E_grant_E, W_err_no_Req_W_grant_W, W_err_no_Req_S_grant_S, W_err_no_Req_L_grant_L,
-- South Arbiter_in checker outputs
S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N, S_err_IDLE_grant_N,S_err_North_Req_N, S_err_North_grant_N, S_err_East_Req_E, S_err_East_grant_E,
S_err_West_Req_W, S_err_West_grant_W, S_err_South_Req_S,S_err_South_grant_S,S_err_Local_Req_L, S_err_Local_grant_L,
S_err_IDLE_Req_E, S_err_IDLE_grant_E, S_err_North_Req_E, S_err_North_grant_E, S_err_East_Req_W, S_err_East_grant_W,
S_err_West_Req_S, S_err_West_grant_S, S_err_South_Req_L, S_err_South_grant_L, S_err_Local_Req_N, S_err_Local_grant_N,
S_err_IDLE_Req_W, S_err_IDLE_grant_W, S_err_North_Req_W, S_err_North_grant_W, S_err_East_Req_S, S_err_East_grant_S,
S_err_West_Req_L, S_err_West_grant_L, S_err_South_Req_N, S_err_South_grant_N, S_err_Local_Req_E, S_err_Local_grant_E,
S_err_IDLE_Req_S, S_err_IDLE_grant_S, S_err_North_Req_S, S_err_North_grant_S, S_err_East_Req_L, S_err_East_grant_L,
S_err_West_Req_N, S_err_West_grant_N, S_err_South_Req_E, S_err_South_grant_E, S_err_Local_Req_W, S_err_Local_grant_W,
S_err_IDLE_Req_L, S_err_IDLE_grant_L, S_err_North_Req_L, S_err_North_grant_L, S_err_East_Req_N, S_err_East_grant_N,
S_err_West_Req_E, S_err_West_grant_E, S_err_South_Req_W, S_err_South_grant_W, S_err_Local_Req_S, S_err_Local_grant_S,
S_err_arbiter_state_in_onehot, S_err_no_request_grants, S_err_request_no_grants,
S_err_no_Req_N_grant_N, S_err_no_Req_E_grant_E, S_err_no_Req_W_grant_W, S_err_no_Req_S_grant_S, S_err_no_Req_L_grant_L,
-- Local Arbiter_in checker outputs
L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N, L_err_IDLE_grant_N,L_err_North_Req_N, L_err_North_grant_N, L_err_East_Req_E, L_err_East_grant_E,
L_err_West_Req_W, L_err_West_grant_W, L_err_South_Req_S,L_err_South_grant_S,L_err_Local_Req_L, L_err_Local_grant_L,
L_err_IDLE_Req_E, L_err_IDLE_grant_E, L_err_North_Req_E, L_err_North_grant_E, L_err_East_Req_W, L_err_East_grant_W,
L_err_West_Req_S, L_err_West_grant_S, L_err_South_Req_L, L_err_South_grant_L, L_err_Local_Req_N, L_err_Local_grant_N,
L_err_IDLE_Req_W, L_err_IDLE_grant_W, L_err_North_Req_W, L_err_North_grant_W, L_err_East_Req_S, L_err_East_grant_S,
L_err_West_Req_L, L_err_West_grant_L, L_err_South_Req_N, L_err_South_grant_N, L_err_Local_Req_E, L_err_Local_grant_E,
L_err_IDLE_Req_S, L_err_IDLE_grant_S, L_err_North_Req_S, L_err_North_grant_S, L_err_East_Req_L, L_err_East_grant_L,
L_err_West_Req_N, L_err_West_grant_N, L_err_South_Req_E, L_err_South_grant_E, L_err_Local_Req_W, L_err_Local_grant_W,
L_err_IDLE_Req_L, L_err_IDLE_grant_L, L_err_North_Req_L, L_err_North_grant_L, L_err_East_Req_N, L_err_East_grant_N,
L_err_West_Req_E, L_err_West_grant_E, L_err_South_Req_W, L_err_South_grant_W, L_err_Local_Req_S, L_err_Local_grant_S,
L_err_arbiter_state_in_onehot,
L_err_no_request_grants,
L_err_request_no_grants,
L_err_no_Req_N_grant_N,
L_err_no_Req_E_grant_E,
L_err_no_Req_W_grant_W,
L_err_no_Req_S_grant_S,
L_err_no_Req_L_grant_L : std_logic;
---------------------------------------------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------
-- Arbiter_out Checker signals (part of allocator unit)
-- North Arbiter_out checker outputs
signal N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N,
N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E, N_err_North_req_X_E, N_err_East_req_X_W, N_err_West_req_X_S, N_err_South_req_X_L, N_err_Local_req_X_N,
N_err_IDLE_req_X_W, N_err_North_req_X_W, N_err_East_req_X_S, N_err_West_req_X_L, N_err_South_req_X_N, N_err_Local_req_X_E,
N_err_IDLE_req_X_S, N_err_North_req_X_S, N_err_East_req_X_L, N_err_West_req_X_N, N_err_South_req_X_E, N_err_Local_req_X_W,
N_err_IDLE_req_X_L, N_err_North_req_X_L, N_err_East_req_X_N, N_err_West_req_X_E, N_err_South_req_X_W, N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants, N_err_state_North_Invalid_Grant,N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant, N_err_state_South_Invalid_Grant,N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N,
E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E, E_err_North_req_X_E, E_err_East_req_X_W, E_err_West_req_X_S, E_err_South_req_X_L, E_err_Local_req_X_N,
E_err_IDLE_req_X_W, E_err_North_req_X_W, E_err_East_req_X_S, E_err_West_req_X_L, E_err_South_req_X_N, E_err_Local_req_X_E,
E_err_IDLE_req_X_S, E_err_North_req_X_S, E_err_East_req_X_L, E_err_West_req_X_N, E_err_South_req_X_E, E_err_Local_req_X_W,
E_err_IDLE_req_X_L, E_err_North_req_X_L, E_err_East_req_X_N, E_err_West_req_X_E, E_err_South_req_X_W, E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot, E_arbiter_out_err_no_request_grants, E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants, E_err_state_North_Invalid_Grant,E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant, E_err_state_South_Invalid_Grant,E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N,
W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E, W_err_North_req_X_E, W_err_East_req_X_W, W_err_West_req_X_S, W_err_South_req_X_L, W_err_Local_req_X_N,
W_err_IDLE_req_X_W, W_err_North_req_X_W, W_err_East_req_X_S, W_err_West_req_X_L, W_err_South_req_X_N, W_err_Local_req_X_E,
W_err_IDLE_req_X_S, W_err_North_req_X_S, W_err_East_req_X_L, W_err_West_req_X_N, W_err_South_req_X_E, W_err_Local_req_X_W,
W_err_IDLE_req_X_L, W_err_North_req_X_L, W_err_East_req_X_N, W_err_West_req_X_E, W_err_South_req_X_W, W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot, W_arbiter_out_err_no_request_grants, W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants, W_err_state_North_Invalid_Grant,W_err_state_East_Invalid_Grant, W_err_state_West_Invalid_Grant, W_err_state_South_Invalid_Grant,W_err_state_Local_Invalid_Grant,W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N,
S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E, S_err_North_req_X_E, S_err_East_req_X_W, S_err_West_req_X_S, S_err_South_req_X_L, S_err_Local_req_X_N,
S_err_IDLE_req_X_W, S_err_North_req_X_W, S_err_East_req_X_S, S_err_West_req_X_L, S_err_South_req_X_N, S_err_Local_req_X_E,
S_err_IDLE_req_X_S, S_err_North_req_X_S, S_err_East_req_X_L, S_err_West_req_X_N, S_err_South_req_X_E, S_err_Local_req_X_W,
S_err_IDLE_req_X_L, S_err_North_req_X_L, S_err_East_req_X_N, S_err_West_req_X_E, S_err_South_req_X_W, S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot,
S_arbiter_out_err_no_request_grants,
S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants,
S_err_state_North_Invalid_Grant,
S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant,
S_err_state_South_Invalid_Grant,
S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N,
L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E, L_err_North_req_X_E, L_err_East_req_X_W, L_err_West_req_X_S, L_err_South_req_X_L, L_err_Local_req_X_N,
L_err_IDLE_req_X_W, L_err_North_req_X_W, L_err_East_req_X_S, L_err_West_req_X_L, L_err_South_req_X_N, L_err_Local_req_X_E,
L_err_IDLE_req_X_S, L_err_North_req_X_S, L_err_East_req_X_L, L_err_West_req_X_N, L_err_South_req_X_E, L_err_Local_req_X_W,
L_err_IDLE_req_X_L, L_err_North_req_X_L, L_err_East_req_X_N, L_err_West_req_X_E, L_err_South_req_X_W, L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot, L_arbiter_out_err_no_request_grants, L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants, L_err_state_North_Invalid_Grant,L_err_state_East_Invalid_Grant, L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant,L_err_state_Local_Invalid_Grant,L_err_Grants_onehot_or_all_zero : std_logic;
---------------------------------------------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------
-- Signals needed for grouping checkers to model turn/path faults
signal N_FIFO_checkers_ORed, E_FIFO_checkers_ORed, W_FIFO_checkers_ORed, S_FIFO_checkers_ORed, L_FIFO_checkers_ORed : std_logic;
signal N2E_turn_fault, N2W_turn_fault, E2N_turn_fault, E2S_turn_fault, W2N_turn_fault, W2S_turn_fault, S2E_turn_fault, S2W_turn_fault : std_logic;
signal N2S_path_fault, S2N_path_fault, E2W_path_fault, W2E_path_fault : std_logic;
signal L2N_fault, L2E_fault, L2W_fault, L2S_fault, N2L_fault, E2L_fault, W2L_fault, S2L_fault : std_logic;
begin
-- FIFO contributes to all turns and paths, therefore, for each turn or path (for the input direction), all the outputs of FIFO checkers
-- corresponding to that input are ORed together.
-- Functional checkers
N_FIFO_checkers_ORed <= N_err_empty_full or
N_err_empty_read_en or
N_err_full_write_en or
N_err_state_in_onehot or
N_err_read_pointer_in_onehot or
N_err_write_pointer_in_onehot or
-- Structural checkers
N_err_write_en_write_pointer or
N_err_not_write_en_write_pointer or
N_err_read_pointer_write_pointer_not_empty or
N_err_read_pointer_write_pointer_empty or
N_err_read_pointer_write_pointer_not_full or
N_err_read_pointer_write_pointer_full or
N_err_read_pointer_increment or
N_err_read_pointer_not_increment or
N_err_write_en or
N_err_not_write_en or
N_err_not_write_en1 or
N_err_not_write_en2 or
N_err_read_en_mismatch or
N_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
N_err_fake_credit_read_en_fake_credit_counter_in_increment or
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
N_err_fake_credit_read_en_credit_out or
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
N_err_state_out_Idle_not_fault_out_not_fake_credit or
N_err_state_out_Idle_not_fault_out_not_fault_info or
N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
N_err_state_out_Idle_fault_out_fake_credit or
N_err_state_out_Idle_fault_out_state_in_Packet_drop or
N_err_state_out_Idle_fault_out_fault_info or
N_err_state_out_Idle_fault_out_faulty_packet_in or
N_err_state_out_Idle_not_health_info or
N_err_state_out_Idle_not_write_fake_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Header_flit_valid_in_fault_out_fault_info or
N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Header_flit_not_valid_in_not_fault_info or
N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
N_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
N_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Body_flit_valid_in_fault_out_fault_info or
N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Body_flit_not_valid_in_not_fault_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
N_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
N_err_state_out_Body_flit_valid_in_not_health_info or
N_err_state_out_Body_flit_not_fake_credit or
N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
N_err_state_out_Tail_flit_not_valid_in_not_fault_info or
N_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
N_err_state_out_Tail_flit_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Packet_drop_not_fault_info or
N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
E_FIFO_checkers_ORed <= E_err_empty_full or
E_err_empty_read_en or
E_err_full_write_en or
E_err_state_in_onehot or
E_err_read_pointer_in_onehot or
E_err_write_pointer_in_onehot or
-- Structural checkers
E_err_write_en_write_pointer or
E_err_not_write_en_write_pointer or
E_err_read_pointer_write_pointer_not_empty or
E_err_read_pointer_write_pointer_empty or
E_err_read_pointer_write_pointer_not_full or
E_err_read_pointer_write_pointer_full or
E_err_read_pointer_increment or
E_err_read_pointer_not_increment or
E_err_write_en or
E_err_not_write_en or
E_err_not_write_en1 or
E_err_not_write_en2 or
E_err_read_en_mismatch or
E_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
E_err_fake_credit_read_en_fake_credit_counter_in_increment or
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
E_err_fake_credit_read_en_credit_out or
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
E_err_state_out_Idle_not_fault_out_not_fake_credit or
E_err_state_out_Idle_not_fault_out_not_fault_info or
E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
E_err_state_out_Idle_fault_out_fake_credit or
E_err_state_out_Idle_fault_out_state_in_Packet_drop or
E_err_state_out_Idle_fault_out_fault_info or
E_err_state_out_Idle_fault_out_faulty_packet_in or
E_err_state_out_Idle_not_health_info or
E_err_state_out_Idle_not_write_fake_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Header_flit_valid_in_fault_out_fault_info or
E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Header_flit_not_valid_in_not_fault_info or
E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
E_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
E_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Body_flit_valid_in_fault_out_fault_info or
E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Body_flit_not_valid_in_not_fault_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
E_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
E_err_state_out_Body_flit_valid_in_not_health_info or
E_err_state_out_Body_flit_not_fake_credit or
E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
E_err_state_out_Tail_flit_not_valid_in_not_fault_info or
E_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
E_err_state_out_Tail_flit_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Packet_drop_not_fault_info or
E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
W_FIFO_checkers_ORed <= W_err_empty_full or
W_err_empty_read_en or
W_err_full_write_en or
W_err_state_in_onehot or
W_err_read_pointer_in_onehot or
W_err_write_pointer_in_onehot or
-- Structural checkers
W_err_write_en_write_pointer or
W_err_not_write_en_write_pointer or
W_err_read_pointer_write_pointer_not_empty or
W_err_read_pointer_write_pointer_empty or
W_err_read_pointer_write_pointer_not_full or
W_err_read_pointer_write_pointer_full or
W_err_read_pointer_increment or
W_err_read_pointer_not_increment or
W_err_write_en or
W_err_not_write_en or
W_err_not_write_en1 or
W_err_not_write_en2 or
W_err_read_en_mismatch or
W_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
W_err_fake_credit_read_en_fake_credit_counter_in_increment or
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
W_err_fake_credit_read_en_credit_out or
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
W_err_state_out_Idle_not_fault_out_not_fake_credit or
W_err_state_out_Idle_not_fault_out_not_fault_info or
W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
W_err_state_out_Idle_fault_out_fake_credit or
W_err_state_out_Idle_fault_out_state_in_Packet_drop or
W_err_state_out_Idle_fault_out_fault_info or
W_err_state_out_Idle_fault_out_faulty_packet_in or
W_err_state_out_Idle_not_health_info or
W_err_state_out_Idle_not_write_fake_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Header_flit_valid_in_fault_out_fault_info or
W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Header_flit_not_valid_in_not_fault_info or
W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
W_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
W_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Body_flit_valid_in_fault_out_fault_info or
W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Body_flit_not_valid_in_not_fault_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
W_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
W_err_state_out_Body_flit_valid_in_not_health_info or
W_err_state_out_Body_flit_not_fake_credit or
W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
W_err_state_out_Tail_flit_not_valid_in_not_fault_info or
W_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
W_err_state_out_Tail_flit_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Packet_drop_not_fault_info or
W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
S_FIFO_checkers_ORed <= S_err_empty_full or
S_err_empty_read_en or
S_err_full_write_en or
S_err_state_in_onehot or
S_err_read_pointer_in_onehot or
S_err_write_pointer_in_onehot or
-- Structural checkers
S_err_write_en_write_pointer or
S_err_not_write_en_write_pointer or
S_err_read_pointer_write_pointer_not_empty or
S_err_read_pointer_write_pointer_empty or
S_err_read_pointer_write_pointer_not_full or
S_err_read_pointer_write_pointer_full or
S_err_read_pointer_increment or
S_err_read_pointer_not_increment or
S_err_write_en or
S_err_not_write_en or
S_err_not_write_en1 or
S_err_not_write_en2 or
S_err_read_en_mismatch or
S_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
S_err_fake_credit_read_en_fake_credit_counter_in_increment or
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
S_err_fake_credit_read_en_credit_out or
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
S_err_state_out_Idle_not_fault_out_not_fake_credit or
S_err_state_out_Idle_not_fault_out_not_fault_info or
S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
S_err_state_out_Idle_fault_out_fake_credit or
S_err_state_out_Idle_fault_out_state_in_Packet_drop or
S_err_state_out_Idle_fault_out_fault_info or
S_err_state_out_Idle_fault_out_faulty_packet_in or
S_err_state_out_Idle_not_health_info or
S_err_state_out_Idle_not_write_fake_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Header_flit_valid_in_fault_out_fault_info or
S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Header_flit_not_valid_in_not_fault_info or
S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
S_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
S_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Body_flit_valid_in_fault_out_fault_info or
S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Body_flit_not_valid_in_not_fault_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
S_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
S_err_state_out_Body_flit_valid_in_not_health_info or
S_err_state_out_Body_flit_not_fake_credit or
S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
S_err_state_out_Tail_flit_not_valid_in_not_fault_info or
S_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
S_err_state_out_Tail_flit_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Packet_drop_not_fault_info or
S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
L_FIFO_checkers_ORed <= L_err_empty_full or
L_err_empty_read_en or
L_err_full_write_en or
L_err_state_in_onehot or
L_err_read_pointer_in_onehot or
L_err_write_pointer_in_onehot or
-- Structural checkers
L_err_write_en_write_pointer or
L_err_not_write_en_write_pointer or
L_err_read_pointer_write_pointer_not_empty or
L_err_read_pointer_write_pointer_empty or
L_err_read_pointer_write_pointer_not_full or
L_err_read_pointer_write_pointer_full or
L_err_read_pointer_increment or
L_err_read_pointer_not_increment or
L_err_write_en or
L_err_not_write_en or
L_err_not_write_en1 or
L_err_not_write_en2 or
L_err_read_en_mismatch or
L_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
L_err_fake_credit_read_en_fake_credit_counter_in_increment or
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
L_err_fake_credit_read_en_credit_out or
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
L_err_state_out_Idle_not_fault_out_not_fake_credit or
L_err_state_out_Idle_not_fault_out_not_fault_info or
L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
L_err_state_out_Idle_fault_out_fake_credit or
L_err_state_out_Idle_fault_out_state_in_Packet_drop or
L_err_state_out_Idle_fault_out_fault_info or
L_err_state_out_Idle_fault_out_faulty_packet_in or
L_err_state_out_Idle_not_health_info or
L_err_state_out_Idle_not_write_fake_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Header_flit_valid_in_fault_out_fault_info or
L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Header_flit_not_valid_in_not_fault_info or
L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
L_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
L_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Body_flit_valid_in_fault_out_fault_info or
L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Body_flit_not_valid_in_not_fault_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
L_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
L_err_state_out_Body_flit_valid_in_not_health_info or
L_err_state_out_Body_flit_not_fake_credit or
L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
L_err_state_out_Tail_flit_not_valid_in_not_fault_info or
L_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
L_err_state_out_Tail_flit_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Packet_drop_not_fault_info or
L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Turn fault checkers
-- FIFO
N2E_turn_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_E1 or
N_err_dst_addr_cur_addr_not_E1 or
N_err_header_not_empty_Req_E_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_East_Req_E or
N_err_East_grant_E or
N_err_IDLE_Req_E or
N_err_IDLE_grant_E or
N_err_North_Req_E or
N_err_North_grant_E or
N_err_Local_Req_E or
N_err_Local_grant_E or
N_err_South_Req_E or
N_err_South_grant_E or
N_err_West_Req_E or
N_err_West_grant_E or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_IDLE_req_X_N or
E_err_North_req_X_N or
E_err_North_credit_not_zero_req_X_N_grant_N or
E_err_North_credit_zero_or_not_req_X_N_not_grant_N or
E_err_Local_req_X_N or
E_err_South_req_X_N or
E_err_West_req_X_N or
E_err_East_req_X_N or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
W_err_South_req_X_N or
W_err_West_req_X_N or
W_err_East_req_X_N or
err_grant_E_N_sig_not_empty_N_grant_E_N or
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
N2W_turn_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_W1 or
N_err_dst_addr_cur_addr_not_W1 or
N_err_header_not_empty_Req_W_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_West_Req_W or
N_err_West_grant_W or
N_err_East_Req_W or
N_err_East_grant_W or
N_err_IDLE_Req_W or
N_err_IDLE_grant_W or
N_err_North_Req_W or
N_err_North_grant_W or
N_err_Local_Req_W or
N_err_Local_grant_W or
N_err_South_Req_W or
N_err_South_grant_W or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_IDLE_req_X_N or
W_err_North_req_X_N or
W_err_North_credit_not_zero_req_X_N_grant_N or
W_err_North_credit_zero_or_not_req_X_N_not_grant_N or
W_err_Local_req_X_N or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_N_sig_not_empty_N_grant_W_N or
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
E2N_turn_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_N1 or
E_err_dst_addr_cur_addr_not_N1 or
E_err_header_not_empty_Req_N_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_IDLE_Req_N or
E_err_IDLE_grant_N or
E_err_North_Req_N or
E_err_North_grant_N or
E_err_Local_Req_N or
E_err_Local_grant_N or
E_err_South_Req_N or
E_err_South_grant_N or
E_err_West_Req_N or
E_err_West_grant_N or
E_err_East_Req_N or
E_err_East_grant_N or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_East_req_X_E or
N_err_East_credit_not_zero_req_X_E_grant_E or
N_err_East_credit_zero_or_not_req_X_E_not_grant_E or
N_err_IDLE_req_X_E or
N_err_North_req_X_E or
N_err_Local_req_X_E or
N_err_South_req_X_E or
N_err_West_req_X_E or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_Grants_onehot_or_all_zero or
err_grant_N_E_sig_not_empty_E_grant_N_E or
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
E2S_turn_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_S1 or
E_err_dst_addr_cur_addr_not_S1 or
E_err_header_not_empty_Req_S_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_South_Req_S or
E_err_South_grant_S or
E_err_West_Req_S or
E_err_West_grant_S or
E_err_East_Req_S or
E_err_East_grant_S or
E_err_IDLE_Req_S or
E_err_IDLE_grant_S or
E_err_North_Req_S or
E_err_North_grant_S or
E_err_Local_Req_S or
E_err_Local_grant_S or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_East_req_X_E or
S_err_East_credit_not_zero_req_X_E_grant_E or
S_err_East_credit_zero_or_not_req_X_E_not_grant_E or
S_err_IDLE_req_X_E or
S_err_North_req_X_E or
S_err_Local_req_X_E or
S_err_South_req_X_E or
S_err_West_req_X_E or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_E_sig_not_empty_E_grant_S_E or
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
W2N_turn_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_N1 or
W_err_dst_addr_cur_addr_not_N1 or
W_err_header_not_empty_Req_N_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_IDLE_Req_N or
W_err_IDLE_grant_N or
W_err_North_Req_N or
W_err_North_grant_N or
W_err_Local_Req_N or
W_err_Local_grant_N or
W_err_South_Req_N or
W_err_South_grant_N or
W_err_West_Req_N or
W_err_West_grant_N or
W_err_East_Req_N or
W_err_East_grant_N or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_West_req_X_W or
N_err_West_credit_not_zero_req_X_W_grant_W or
N_err_West_credit_zero_or_not_req_X_W_not_grant_W or
N_err_East_req_X_W or
N_err_IDLE_req_X_W or
N_err_North_req_X_W or
N_err_Local_req_X_W or
N_err_South_req_X_W or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_W_sig_not_empty_W_grant_N_W or
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
W2S_turn_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_S1 or
W_err_dst_addr_cur_addr_not_S1 or
W_err_header_not_empty_Req_S_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_South_Req_S or
W_err_South_grant_S or
W_err_West_Req_S or
W_err_West_grant_S or
W_err_East_Req_S or
W_err_East_grant_S or
W_err_IDLE_Req_S or
W_err_IDLE_grant_S or
W_err_North_Req_S or
W_err_North_grant_S or
W_err_Local_Req_S or
W_err_Local_grant_S or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_West_req_X_W or
S_err_West_credit_not_zero_req_X_W_grant_W or
S_err_West_credit_zero_or_not_req_X_W_not_grant_W or
S_err_East_req_X_W or
S_err_IDLE_req_X_W or
S_err_North_req_X_W or
S_err_Local_req_X_W or
S_err_South_req_X_W or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_W_sig_not_empty_W_grant_S_W or
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
S2E_turn_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_E1 or
S_err_dst_addr_cur_addr_not_E1 or
S_err_header_not_empty_Req_E_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_East_Req_E or
S_err_East_grant_E or
S_err_IDLE_Req_E or
S_err_IDLE_grant_E or
S_err_North_Req_E or
S_err_North_grant_E or
S_err_Local_Req_E or
S_err_Local_grant_E or
S_err_South_Req_E or
S_err_South_grant_E or
S_err_West_Req_E or
S_err_West_grant_E or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_South_req_X_S or
E_err_South_credit_not_zero_req_X_S_grant_S or
E_err_South_credit_zero_or_not_req_X_S_not_grant_S or
E_err_West_req_X_S or
E_err_East_req_X_S or
E_err_IDLE_req_X_S or
E_err_North_req_X_S or
E_err_Local_req_X_S or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_S_sig_not_empty_S_grant_E_S or
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_grants_valid_not_match or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
S2W_turn_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_W1 or
S_err_dst_addr_cur_addr_not_W1 or
S_err_header_not_empty_Req_W_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_West_Req_W or
S_err_West_grant_W or
S_err_East_Req_W or
S_err_East_grant_W or
S_err_IDLE_Req_W or
S_err_IDLE_grant_W or
S_err_North_Req_W or
S_err_North_grant_W or
S_err_Local_Req_W or
S_err_Local_grant_W or
S_err_South_Req_W or
S_err_South_grant_W or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_South_req_X_S or
W_err_South_credit_not_zero_req_X_S_grant_S or
W_err_South_credit_zero_or_not_req_X_S_not_grant_S or
W_err_West_req_X_S or
W_err_East_req_X_S or
W_err_IDLE_req_X_S or
W_err_North_req_X_S or
W_err_Local_req_X_S or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_S_sig_not_empty_S_grant_W_S or
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- Path faults
-- FIFO
N2S_path_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_S1 or
N_err_dst_addr_cur_addr_not_S1 or
N_err_header_not_empty_Req_S_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_South_Req_S or
N_err_South_grant_S or
N_err_West_Req_S or
N_err_West_grant_S or
N_err_East_Req_S or
N_err_East_grant_S or
N_err_IDLE_Req_S or
N_err_IDLE_grant_S or
N_err_North_Req_S or
N_err_North_grant_S or
N_err_Local_Req_S or
N_err_Local_grant_S or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_IDLE_req_X_N or
S_err_North_req_X_N or
S_err_North_credit_not_zero_req_X_N_grant_N or
S_err_North_credit_zero_or_not_req_X_N_not_grant_N or
S_err_Local_req_X_N or
S_err_South_req_X_N or
S_err_West_req_X_N or
S_err_East_req_X_N or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_N_sig_not_empty_N_grant_S_N or
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
S2N_path_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_N1 or
S_err_dst_addr_cur_addr_not_N1 or
S_err_header_not_empty_Req_N_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_IDLE_Req_N or
S_err_IDLE_grant_N or
S_err_North_Req_N or
S_err_North_grant_N or
S_err_Local_Req_N or
S_err_Local_grant_N or
S_err_South_Req_N or
S_err_South_grant_N or
S_err_West_Req_N or
S_err_West_grant_N or
S_err_East_Req_N or
S_err_East_grant_N or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_South_req_X_S or
N_err_South_credit_not_zero_req_X_S_grant_S or
N_err_South_credit_zero_or_not_req_X_S_not_grant_S or
N_err_West_req_X_S or
N_err_East_req_X_S or
N_err_IDLE_req_X_S or
N_err_North_req_X_S or
N_err_Local_req_X_S or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_S_sig_not_empty_S_grant_N_S or
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
E2W_path_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_W1 or
E_err_dst_addr_cur_addr_not_W1 or
E_err_header_not_empty_Req_W_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_West_Req_W or
E_err_West_grant_W or
E_err_East_Req_W or
E_err_East_grant_W or
E_err_IDLE_Req_W or
E_err_IDLE_grant_W or
E_err_North_Req_W or
E_err_North_grant_W or
E_err_Local_Req_W or
E_err_Local_grant_W or
E_err_South_Req_W or
E_err_South_grant_W or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_East_req_X_E or
W_err_East_credit_not_zero_req_X_E_grant_E or
W_err_East_credit_zero_or_not_req_X_E_not_grant_E or
W_err_IDLE_req_X_E or
W_err_North_req_X_E or
W_err_Local_req_X_E or
W_err_South_req_X_E or
W_err_West_req_X_E or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_E_sig_not_empty_E_grant_W_E or
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
W2E_path_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_E1 or
W_err_dst_addr_cur_addr_not_E1 or
W_err_header_not_empty_Req_E_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_East_Req_E or
W_err_East_grant_E or
W_err_IDLE_Req_E or
W_err_IDLE_grant_E or
W_err_North_Req_E or
W_err_North_grant_E or
W_err_Local_Req_E or
W_err_Local_grant_E or
W_err_South_Req_E or
W_err_South_grant_E or
W_err_West_Req_E or
W_err_West_grant_E or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_West_req_X_W or
E_err_West_credit_not_zero_req_X_W_grant_W or
E_err_West_credit_zero_or_not_req_X_W_not_grant_W or
E_err_East_req_X_W or
E_err_IDLE_req_X_W or
E_err_North_req_X_W or
E_err_Local_req_X_W or
E_err_South_req_X_W or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_W_sig_not_empty_W_grant_E_W or
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- Paths/turns from/to Local
-- FIFO
L2N_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_N1 or
L_err_dst_addr_cur_addr_not_N1 or
L_err_header_not_empty_Req_N_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_IDLE_Req_N or
L_err_IDLE_grant_N or
L_err_North_Req_N or
L_err_North_grant_N or
L_err_Local_Req_N or
L_err_Local_grant_N or
L_err_South_Req_N or
L_err_South_grant_N or
L_err_West_Req_N or
L_err_West_grant_N or
L_err_East_Req_N or
L_err_East_grant_N or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_Local_req_X_L or
N_err_Local_credit_not_zero_req_X_L_grant_L or
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
N_err_South_req_X_L or
N_err_West_req_X_L or
N_err_East_req_X_L or
N_err_IDLE_req_X_L or
N_err_North_req_X_L or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_L_sig_not_empty_L_grant_N_L or
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
L2E_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_E1 or
L_err_dst_addr_cur_addr_not_E1 or
L_err_header_not_empty_Req_E_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_East_Req_E or
L_err_East_grant_E or
L_err_IDLE_Req_E or
L_err_IDLE_grant_E or
L_err_North_Req_E or
L_err_North_grant_E or
L_err_Local_Req_E or
L_err_Local_grant_E or
L_err_South_Req_E or
L_err_South_grant_E or
L_err_West_Req_E or
L_err_West_grant_E or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_Local_req_X_L or
E_err_Local_credit_not_zero_req_X_L_grant_L or
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
E_err_South_req_X_L or
E_err_West_req_X_L or
E_err_East_req_X_L or
E_err_IDLE_req_X_L or
E_err_North_req_X_L or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_L_sig_not_empty_L_grant_E_L or
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_grants_valid_not_match or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
L2W_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_W1 or
L_err_dst_addr_cur_addr_not_W1 or
L_err_header_not_empty_Req_W_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_West_Req_W or
L_err_West_grant_W or
L_err_East_Req_W or
L_err_East_grant_W or
L_err_IDLE_Req_W or
L_err_IDLE_grant_W or
L_err_North_Req_W or
L_err_North_grant_W or
L_err_Local_Req_W or
L_err_Local_grant_W or
L_err_South_Req_W or
L_err_South_grant_W or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_Local_req_X_L or
W_err_Local_credit_not_zero_req_X_L_grant_L or
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
W_err_South_req_X_L or
W_err_West_req_X_L or
W_err_East_req_X_L or
W_err_IDLE_req_X_L or
W_err_North_req_X_L or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_L_sig_not_empty_L_grant_W_L or
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
L2S_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_S1 or
L_err_dst_addr_cur_addr_not_S1 or
L_err_header_not_empty_Req_S_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_South_Req_S or
L_err_South_grant_S or
L_err_West_Req_S or
L_err_West_grant_S or
L_err_East_Req_S or
L_err_East_grant_S or
L_err_IDLE_Req_S or
L_err_IDLE_grant_S or
L_err_North_Req_S or
L_err_North_grant_S or
L_err_Local_Req_S or
L_err_Local_grant_S or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_Local_req_X_L or
S_err_Local_credit_not_zero_req_X_L_grant_L or
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
S_err_South_req_X_L or
S_err_West_req_X_L or
S_err_East_req_X_L or
S_err_IDLE_req_X_L or
S_err_North_req_X_L or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_L_sig_not_empty_L_grant_S_L or
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
N2L_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_not_Req_L_in or
N_err_dst_addr_cur_addr_Req_L_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_Local_Req_L or
N_err_Local_grant_L or
N_err_South_Req_L or
N_err_South_grant_L or
N_err_West_Req_L or
N_err_West_grant_L or
N_err_East_Req_L or
N_err_East_grant_L or
N_err_IDLE_Req_L or
N_err_IDLE_grant_L or
N_err_North_Req_L or
N_err_North_grant_L or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_IDLE_req_X_N or
L_err_North_req_X_N or
L_err_North_credit_not_zero_req_X_N_grant_N or
L_err_North_credit_zero_or_not_req_X_N_not_grant_N or
L_err_Local_req_X_N or
L_err_South_req_X_N or
L_err_West_req_X_N or
L_err_East_req_X_N or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_N_sig_not_empty_N_grant_L_N or
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
E2L_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_not_Req_L_in or
E_err_dst_addr_cur_addr_Req_L_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_Local_Req_L or
E_err_Local_grant_L or
E_err_South_Req_L or
E_err_South_grant_L or
E_err_West_Req_L or
E_err_West_grant_L or
E_err_East_Req_L or
E_err_East_grant_L or
E_err_IDLE_Req_L or
E_err_IDLE_grant_L or
E_err_North_Req_L or
E_err_North_grant_L or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_East_req_X_E or
L_err_East_credit_not_zero_req_X_E_grant_E or
L_err_East_credit_zero_or_not_req_X_E_not_grant_E or
L_err_IDLE_req_X_E or
L_err_North_req_X_E or
L_err_Local_req_X_E or
L_err_South_req_X_E or
L_err_West_req_X_E or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_E_sig_not_empty_E_grant_L_E or
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
W2L_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_not_Req_L_in or
W_err_dst_addr_cur_addr_Req_L_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_Local_Req_L or
W_err_Local_grant_L or
W_err_South_Req_L or
W_err_South_grant_L or
W_err_West_Req_L or
W_err_West_grant_L or
W_err_East_Req_L or
W_err_East_grant_L or
W_err_IDLE_Req_L or
W_err_IDLE_grant_L or
W_err_North_Req_L or
W_err_North_grant_L or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_West_req_X_W or
L_err_West_credit_not_zero_req_X_W_grant_W or
L_err_West_credit_zero_or_not_req_X_W_not_grant_W or
L_err_East_req_X_W or
L_err_IDLE_req_X_W or
L_err_North_req_X_W or
L_err_Local_req_X_W or
L_err_South_req_X_W or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_W_sig_not_empty_W_grant_L_W or
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
S2L_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_not_Req_L_in or
S_err_dst_addr_cur_addr_Req_L_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_Local_Req_L or
S_err_Local_grant_L or
S_err_South_Req_L or
S_err_South_grant_L or
S_err_West_Req_L or
S_err_West_grant_L or
S_err_East_Req_L or
S_err_East_grant_L or
S_err_IDLE_Req_L or
S_err_IDLE_grant_L or
S_err_North_Req_L or
S_err_North_grant_L or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_South_req_X_S or
L_err_South_credit_not_zero_req_X_S_grant_S or
L_err_South_credit_zero_or_not_req_X_S_not_grant_S or
L_err_West_req_X_S or
L_err_East_req_X_S or
L_err_IDLE_req_X_S or
L_err_North_req_X_S or
L_err_Local_req_X_S or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_S_sig_not_empty_S_grant_L_S or
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
Faulty_N_out <= sig_Faulty_N_out;
Faulty_E_out <= sig_Faulty_E_out;
Faulty_W_out <= sig_Faulty_W_out;
Faulty_S_out <= sig_Faulty_S_out;
-- all the counter_threshold modules
CT_N: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_N, Healthy_packet => healthy_packet_N,
Healthy => healthy_link_N, intermittent=> intermittent_link_N, Faulty => sig_Faulty_N_out);
CT_E: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_E, Healthy_packet => healthy_packet_E,
Healthy => healthy_link_E, intermittent=> intermittent_link_E, Faulty => sig_Faulty_E_out);
CT_W: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_W, Healthy_packet => healthy_packet_W,
Healthy => healthy_link_W, intermittent=> intermittent_link_W, Faulty => sig_Faulty_W_out);
CT_S: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_S, Healthy_packet => healthy_packet_S,
Healthy => healthy_link_S, intermittent=> intermittent_link_S, Faulty => sig_Faulty_S_out);
CT_L: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_L, Healthy_packet => healthy_packet_L,
Healthy => healthy_link_L, intermittent=> intermittent_link_L, Faulty => faulty_link_L);
-- All the FIFOs
FIFO_N: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_N, valid_in => valid_in_N,
read_en_N => packet_drop_order_N, read_en_E =>Grant_EN, read_en_W =>Grant_WN, read_en_S =>Grant_SN, read_en_L =>Grant_LN,
credit_out => credit_out_N, empty_out => empty_N, Data_out => FIFO_D_out_N, fault_info=> faulty_packet_N, health_info=>healthy_packet_N,
-- Checker outputs
-- Functional checkers
err_empty_full => N_err_empty_full,
err_empty_read_en => N_err_empty_read_en,
err_full_write_en => N_err_full_write_en,
err_state_in_onehot => N_err_state_in_onehot,
err_read_pointer_in_onehot => N_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => N_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => N_err_write_en_write_pointer,
err_not_write_en_write_pointer => N_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => N_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => N_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => N_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => N_err_read_pointer_write_pointer_full,
err_read_pointer_increment => N_err_read_pointer_increment,
err_read_pointer_not_increment => N_err_read_pointer_not_increment,
err_write_en => N_err_write_en,
err_not_write_en => N_err_not_write_en,
err_not_write_en1 => N_err_not_write_en1,
err_not_write_en2 => N_err_not_write_en2,
err_read_en_mismatch => N_err_read_en_mismatch,
err_read_en_mismatch1 => N_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => N_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => N_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => N_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => N_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => N_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => N_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => N_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => N_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => N_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => N_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => N_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => N_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => N_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => N_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => N_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => N_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => N_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => N_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => N_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => N_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => N_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => N_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => N_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => N_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => N_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_E: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_E, valid_in => valid_in_E,
read_en_N => Grant_NE, read_en_E =>packet_drop_order_E, read_en_W =>Grant_WE, read_en_S =>Grant_SE, read_en_L =>Grant_LE,
credit_out => credit_out_E, empty_out => empty_E, Data_out => FIFO_D_out_E, fault_info=> faulty_packet_E, health_info=>healthy_packet_E,
-- Functional checkers
err_empty_full => E_err_empty_full,
err_empty_read_en => E_err_empty_read_en,
err_full_write_en => E_err_full_write_en,
err_state_in_onehot => E_err_state_in_onehot,
err_read_pointer_in_onehot => E_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => E_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => E_err_write_en_write_pointer,
err_not_write_en_write_pointer => E_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => E_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => E_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => E_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => E_err_read_pointer_write_pointer_full,
err_read_pointer_increment => E_err_read_pointer_increment,
err_read_pointer_not_increment => E_err_read_pointer_not_increment,
err_write_en => E_err_write_en,
err_not_write_en => E_err_not_write_en,
err_not_write_en1 => E_err_not_write_en1,
err_not_write_en2 => E_err_not_write_en2,
err_read_en_mismatch => E_err_read_en_mismatch,
err_read_en_mismatch1 => E_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => E_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => E_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => E_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => E_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => E_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => E_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => E_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => E_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => E_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => E_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => E_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => E_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => E_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => E_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => E_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => E_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => E_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => E_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => E_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => E_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => E_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => E_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => E_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => E_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => E_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_W: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_W, valid_in => valid_in_W,
read_en_N => Grant_NW, read_en_E =>Grant_EW, read_en_W =>packet_drop_order_W, read_en_S =>Grant_SW, read_en_L =>Grant_LW,
credit_out => credit_out_W, empty_out => empty_W, Data_out => FIFO_D_out_W, fault_info=> faulty_packet_W, health_info=>healthy_packet_W,
-- Functional checkers
err_empty_full => W_err_empty_full,
err_empty_read_en => W_err_empty_read_en,
err_full_write_en => W_err_full_write_en,
err_state_in_onehot => W_err_state_in_onehot,
err_read_pointer_in_onehot => W_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => W_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => W_err_write_en_write_pointer,
err_not_write_en_write_pointer => W_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => W_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => W_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => W_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => W_err_read_pointer_write_pointer_full,
err_read_pointer_increment => W_err_read_pointer_increment,
err_read_pointer_not_increment => W_err_read_pointer_not_increment,
err_write_en => W_err_write_en,
err_not_write_en => W_err_not_write_en,
err_not_write_en1 => W_err_not_write_en1,
err_not_write_en2 => W_err_not_write_en2,
err_read_en_mismatch => W_err_read_en_mismatch,
err_read_en_mismatch1 => W_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => W_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => W_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => W_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => W_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => W_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => W_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => W_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => W_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => W_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => W_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => W_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => W_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => W_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => W_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => W_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => W_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => W_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => W_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => W_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => W_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => W_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => W_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => W_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => W_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => W_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_S: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_S, valid_in => valid_in_S,
read_en_N => Grant_NS, read_en_E =>Grant_ES, read_en_W =>Grant_WS, read_en_S =>packet_drop_order_S, read_en_L =>Grant_LS,
credit_out => credit_out_S, empty_out => empty_S, Data_out => FIFO_D_out_S, fault_info=> faulty_packet_S, health_info=>healthy_packet_S,
-- Functional checkers
err_empty_full => S_err_empty_full,
err_empty_read_en => S_err_empty_read_en,
err_full_write_en => S_err_full_write_en,
err_state_in_onehot => S_err_state_in_onehot,
err_read_pointer_in_onehot => S_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => S_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => S_err_write_en_write_pointer,
err_not_write_en_write_pointer => S_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => S_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => S_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => S_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => S_err_read_pointer_write_pointer_full,
err_read_pointer_increment => S_err_read_pointer_increment,
err_read_pointer_not_increment => S_err_read_pointer_not_increment,
err_write_en => S_err_write_en,
err_not_write_en => S_err_not_write_en,
err_not_write_en1 => S_err_not_write_en1,
err_not_write_en2 => S_err_not_write_en2,
err_read_en_mismatch => S_err_read_en_mismatch,
err_read_en_mismatch1 => S_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => S_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => S_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => S_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => S_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => S_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => S_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => S_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => S_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => S_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => S_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => S_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => S_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => S_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => S_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => S_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => S_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => S_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => S_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => S_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => S_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => S_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => S_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => S_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => S_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => S_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_L: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_L, valid_in => valid_in_L,
read_en_N => Grant_NL, read_en_E =>Grant_EL, read_en_W =>Grant_WL, read_en_S => Grant_SL, read_en_L =>packet_drop_order_L,
credit_out => credit_out_L, empty_out => empty_L, Data_out => FIFO_D_out_L, fault_info=> faulty_packet_L, health_info=>healthy_packet_L,
-- Functional checkers
err_empty_full => L_err_empty_full,
err_empty_read_en => L_err_empty_read_en,
err_full_write_en => L_err_full_write_en,
err_state_in_onehot => L_err_state_in_onehot,
err_read_pointer_in_onehot => L_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => L_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => L_err_write_en_write_pointer,
err_not_write_en_write_pointer => L_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => L_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => L_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => L_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => L_err_read_pointer_write_pointer_full,
err_read_pointer_increment => L_err_read_pointer_increment,
err_read_pointer_not_increment => L_err_read_pointer_not_increment,
err_write_en => L_err_write_en,
err_not_write_en => L_err_not_write_en,
err_not_write_en1 => L_err_not_write_en1,
err_not_write_en2 => L_err_not_write_en2,
err_read_en_mismatch => L_err_read_en_mismatch,
err_read_en_mismatch1 => L_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => L_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => L_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => L_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => L_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => L_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => L_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => L_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => L_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => L_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => L_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => L_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => L_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => L_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => L_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => L_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => L_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => L_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => L_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => L_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => L_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => L_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => L_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => L_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => L_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => L_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
------------------------------------------------------------------------------------------------------------------------------
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------------------------------------------------------------------------------------------------------------------------------
--- all the LBDRs
LBDR_N: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_N, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_N(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_N(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_N,
grant_N => '0', grant_E =>Grant_EN, grant_W => Grant_WN, grant_S=>Grant_SN, grant_L =>Grant_LN,
Req_N=> Req_NN, Req_E=>Req_NE, Req_W=>Req_NW, Req_S=>Req_NS, Req_L=>Req_NL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => N_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => N_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => N_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => N_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => N_err_grants_onehot,
err_grants_mismatch => N_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => N_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => N_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => N_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => N_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => N_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => N_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => N_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => N_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => N_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => N_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => N_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => N_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => N_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => N_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => N_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => N_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => N_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => N_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => N_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_E: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_E, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_E(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_E(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_E,
grant_N => Grant_NE, grant_E =>'0', grant_W => Grant_WE, grant_S=>Grant_SE, grant_L =>Grant_LE,
Req_N=> Req_EN, Req_E=>Req_EE, Req_W=>Req_EW, Req_S=>Req_ES, Req_L=>Req_EL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => E_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => E_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => E_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => E_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => E_err_grants_onehot,
err_grants_mismatch => E_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => E_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => E_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => E_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => E_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => E_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => E_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => E_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => E_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => E_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => E_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => E_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => E_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => E_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => E_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => E_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => E_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => E_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => E_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => E_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_W: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_W, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_W(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_W(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_W,
grant_N => Grant_NW, grant_E =>Grant_EW, grant_W =>'0' ,grant_S=>Grant_SW, grant_L =>Grant_LW,
Req_N=> Req_WN, Req_E=>Req_WE, Req_W=>Req_WW, Req_S=>Req_WS, Req_L=>Req_WL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => W_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => W_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => W_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => W_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => W_err_grants_onehot,
err_grants_mismatch => W_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => W_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => W_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => W_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => W_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => W_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => W_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => W_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => W_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => W_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => W_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => W_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => W_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => W_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => W_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => W_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => W_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => W_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => W_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => W_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_S: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_S, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_S(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_S(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_S,
grant_N => Grant_NS, grant_E =>Grant_ES, grant_W =>Grant_WS ,grant_S=>'0', grant_L =>Grant_LS,
Req_N=> Req_SN, Req_E=>Req_SE, Req_W=>Req_SW, Req_S=>Req_SS, Req_L=>Req_SL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => S_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => S_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => S_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => S_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => S_err_grants_onehot,
err_grants_mismatch => S_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => S_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => S_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => S_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => S_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => S_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => S_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => S_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => S_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => S_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => S_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => S_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => S_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => S_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => S_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => S_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => S_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => S_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => S_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => S_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_L: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_L, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_L(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_L(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_L,
grant_N => Grant_NL, grant_E =>Grant_EL, grant_W => Grant_WL,grant_S=>Grant_SL, grant_L =>'0',
Req_N=> Req_LN, Req_E=>Req_LE, Req_W=>Req_LW, Req_S=>Req_LS, Req_L=>Req_LL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => L_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => L_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => L_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => L_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => L_err_grants_onehot,
err_grants_mismatch => L_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => L_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => L_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => L_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => L_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => L_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => L_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => L_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => L_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => L_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => L_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => L_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => L_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => L_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => L_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => L_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => L_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => L_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => L_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => L_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
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-- switch allocator
allocator_unit: allocator port map ( reset => reset, clk => clk,
-- flow control
credit_in_N => credit_in_N, credit_in_E => credit_in_E, credit_in_W => credit_in_W, credit_in_S => credit_in_S, credit_in_L => credit_in_L,
-- requests from the LBDRS
req_N_N => '0', req_N_E => Req_NE, req_N_W => Req_NW, req_N_S => Req_NS, req_N_L => Req_NL,
req_E_N => Req_EN, req_E_E => '0', req_E_W => Req_EW, req_E_S => Req_ES, req_E_L => Req_EL,
req_W_N => Req_WN, req_W_E => Req_WE, req_W_W => '0', req_W_S => Req_WS, req_W_L => Req_WL,
req_S_N => Req_SN, req_S_E => Req_SE, req_S_W => Req_SW, req_S_S => '0', req_S_L => Req_SL,
req_L_N => Req_LN, req_L_E => Req_LE, req_L_W => Req_LW, req_L_S => Req_LS, req_L_L => '0',
empty_N => empty_N, empty_E => empty_E, empty_w => empty_W, empty_S => empty_S, empty_L => empty_L,
valid_N => valid_out_N, valid_E => valid_out_E, valid_W => valid_out_W, valid_S => valid_out_S, valid_L => valid_out_L,
-- grant_X_Y means the grant for X output port towards Y input port
-- this means for any X in [N, E, W, S, L] then set grant_X_Y is one hot!
grant_N_N => Grant_NN, grant_N_E => Grant_NE, grant_N_W => Grant_NW, grant_N_S => Grant_NS, grant_N_L => Grant_NL,
grant_E_N => Grant_EN, grant_E_E => Grant_EE, grant_E_W => Grant_EW, grant_E_S => Grant_ES, grant_E_L => Grant_EL,
grant_W_N => Grant_WN, grant_W_E => Grant_WE, grant_W_W => Grant_WW, grant_W_S => Grant_WS, grant_W_L => Grant_WL,
grant_S_N => Grant_SN, grant_S_E => Grant_SE, grant_S_W => Grant_SW, grant_S_S => Grant_SS, grant_S_L => Grant_SL,
grant_L_N => Grant_LN, grant_L_E => Grant_LE, grant_L_W => Grant_LW, grant_L_S => Grant_LS, grant_L_L => Grant_LL,
-- Checker outputs
-- Allocator logic checker outputs
err_grant_N_N_sig_not_empty_N_grant_N_N => err_grant_N_N_sig_not_empty_N_grant_N_N ,
err_not_grant_N_N_sig_or_empty_N_not_grant_N_N => err_not_grant_N_N_sig_or_empty_N_not_grant_N_N ,
err_grant_N_E_sig_not_empty_E_grant_N_E => err_grant_N_E_sig_not_empty_E_grant_N_E ,
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E => err_not_grant_N_E_sig_or_empty_E_not_grant_N_E ,
err_grant_N_W_sig_not_empty_W_grant_N_W => err_grant_N_W_sig_not_empty_W_grant_N_W ,
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W => err_not_grant_N_W_sig_or_empty_W_not_grant_N_W ,
err_grant_N_S_sig_not_empty_S_grant_N_S => err_grant_N_S_sig_not_empty_S_grant_N_S ,
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S => err_not_grant_N_S_sig_or_empty_S_not_grant_N_S ,
err_grant_N_L_sig_not_empty_L_grant_N_L => err_grant_N_L_sig_not_empty_L_grant_N_L ,
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L => err_not_grant_N_L_sig_or_empty_L_not_grant_N_L ,
err_grant_E_N_sig_not_empty_N_grant_E_N => err_grant_E_N_sig_not_empty_N_grant_E_N ,
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N => err_not_grant_E_N_sig_or_empty_N_not_grant_E_N ,
err_grant_E_E_sig_not_empty_E_grant_E_E => err_grant_E_E_sig_not_empty_E_grant_E_E ,
err_not_grant_E_E_sig_or_empty_E_not_grant_E_E => err_not_grant_E_E_sig_or_empty_E_not_grant_E_E ,
err_grant_E_W_sig_not_empty_W_grant_E_W => err_grant_E_W_sig_not_empty_W_grant_E_W ,
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W => err_not_grant_E_W_sig_or_empty_W_not_grant_E_W ,
err_grant_E_S_sig_not_empty_S_grant_E_S => err_grant_E_S_sig_not_empty_S_grant_E_S ,
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S => err_not_grant_E_S_sig_or_empty_S_not_grant_E_S ,
err_grant_E_L_sig_not_empty_L_grant_E_L => err_grant_E_L_sig_not_empty_L_grant_E_L ,
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L => err_not_grant_E_L_sig_or_empty_L_not_grant_E_L ,
err_grant_W_N_sig_not_empty_N_grant_W_N => err_grant_W_N_sig_not_empty_N_grant_W_N ,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N => err_not_grant_W_N_sig_or_empty_N_not_grant_W_N ,
err_grant_W_E_sig_not_empty_E_grant_W_E => err_grant_W_E_sig_not_empty_E_grant_W_E ,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E => err_not_grant_W_E_sig_or_empty_E_not_grant_W_E ,
err_grant_W_W_sig_not_empty_W_grant_W_W => err_grant_W_W_sig_not_empty_W_grant_W_W ,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W => err_not_grant_W_W_sig_or_empty_W_not_grant_W_W ,
err_grant_W_S_sig_not_empty_S_grant_W_S => err_grant_W_S_sig_not_empty_S_grant_W_S ,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S => err_not_grant_W_S_sig_or_empty_S_not_grant_W_S ,
err_grant_W_L_sig_not_empty_L_grant_W_L => err_grant_W_L_sig_not_empty_L_grant_W_L ,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L => err_not_grant_W_L_sig_or_empty_L_not_grant_W_L ,
err_grant_S_N_sig_not_empty_N_grant_S_N => err_grant_S_N_sig_not_empty_N_grant_S_N ,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N => err_not_grant_S_N_sig_or_empty_N_not_grant_S_N ,
err_grant_S_E_sig_not_empty_E_grant_S_E => err_grant_S_E_sig_not_empty_E_grant_S_E ,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E => err_not_grant_S_E_sig_or_empty_E_not_grant_S_E ,
err_grant_S_W_sig_not_empty_W_grant_S_W => err_grant_S_W_sig_not_empty_W_grant_S_W ,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W => err_not_grant_S_W_sig_or_empty_W_not_grant_S_W ,
err_grant_S_S_sig_not_empty_S_grant_S_S => err_grant_S_S_sig_not_empty_S_grant_S_S ,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S => err_not_grant_S_S_sig_or_empty_S_not_grant_S_S ,
err_grant_S_L_sig_not_empty_L_grant_S_L => err_grant_S_L_sig_not_empty_L_grant_S_L ,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L => err_not_grant_S_L_sig_or_empty_L_not_grant_S_L ,
err_grant_L_N_sig_not_empty_N_grant_L_N => err_grant_L_N_sig_not_empty_N_grant_L_N ,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N => err_not_grant_L_N_sig_or_empty_N_not_grant_L_N ,
err_grant_L_E_sig_not_empty_E_grant_L_E => err_grant_L_E_sig_not_empty_E_grant_L_E ,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E => err_not_grant_L_E_sig_or_empty_E_not_grant_L_E ,
err_grant_L_W_sig_not_empty_W_grant_L_W => err_grant_L_W_sig_not_empty_W_grant_L_W ,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W => err_not_grant_L_W_sig_or_empty_W_not_grant_L_W ,
err_grant_L_S_sig_not_empty_S_grant_L_S => err_grant_L_S_sig_not_empty_S_grant_L_S ,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S => err_not_grant_L_S_sig_or_empty_S_not_grant_L_S ,
err_grant_L_L_sig_not_empty_L_grant_L_L => err_grant_L_L_sig_not_empty_L_grant_L_L ,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L => err_not_grant_L_L_sig_or_empty_L_not_grant_L_L ,
err_grant_signals_not_empty_grant_N => err_grant_signals_not_empty_grant_N ,
err_not_grant_signals_empty_not_grant_N => err_not_grant_signals_empty_not_grant_N ,
err_grant_signals_not_empty_grant_E => err_grant_signals_not_empty_grant_E ,
err_not_grant_signals_empty_not_grant_E => err_not_grant_signals_empty_not_grant_E ,
err_grant_signals_not_empty_grant_W => err_grant_signals_not_empty_grant_W ,
err_not_grant_signals_empty_not_grant_W => err_not_grant_signals_empty_not_grant_W ,
err_grant_signals_not_empty_grant_S => err_grant_signals_not_empty_grant_S ,
err_not_grant_signals_empty_not_grant_S => err_not_grant_signals_empty_not_grant_S ,
err_grant_signals_not_empty_grant_L => err_grant_signals_not_empty_grant_L ,
err_not_grant_signals_empty_not_grant_L => err_not_grant_signals_empty_not_grant_L ,
err_grants_valid_not_match => err_grants_valid_not_match ,
-- Allocator credit counter logic checker outputs
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal => err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal ,
err_credit_in_N_credit_counter_N_out_increment => err_credit_in_N_credit_counter_N_out_increment ,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change => err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change ,
err_grant_N_credit_counter_N_out_decrement => err_grant_N_credit_counter_N_out_decrement ,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change => err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change ,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal => err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal ,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal => err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal ,
err_credit_in_E_credit_counter_E_out_increment => err_credit_in_E_credit_counter_E_out_increment ,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change => err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change ,
err_grant_E_credit_counter_E_out_decrement => err_grant_E_credit_counter_E_out_decrement ,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change => err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change ,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal => err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal ,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal => err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal ,
err_credit_in_W_credit_counter_W_out_increment => err_credit_in_W_credit_counter_W_out_increment ,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change => err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change ,
err_grant_W_credit_counter_W_out_decrement => err_grant_W_credit_counter_W_out_decrement ,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change => err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change ,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal => err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal ,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal => err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal ,
err_credit_in_S_credit_counter_S_out_increment => err_credit_in_S_credit_counter_S_out_increment ,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change => err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change ,
err_grant_S_credit_counter_S_out_decrement => err_grant_S_credit_counter_S_out_decrement ,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change => err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change ,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal => err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal ,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal => err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal ,
err_credit_in_L_credit_counter_L_out_increment => err_credit_in_L_credit_counter_L_out_increment ,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change => err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change ,
err_grant_L_credit_counter_L_out_decrement => err_grant_L_credit_counter_L_out_decrement ,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change => err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change ,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal => err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal ,
-- North Arbiter_in Checker outputs
N_err_Requests_state_in_state_not_equal => N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N => N_err_IDLE_Req_N,
N_err_IDLE_grant_N => N_err_IDLE_grant_N,
N_err_North_Req_N => N_err_North_Req_N,
N_err_North_grant_N => N_err_North_grant_N,
N_err_East_Req_E => N_err_East_Req_E,
N_err_East_grant_E => N_err_East_grant_E,
N_err_West_Req_W => N_err_West_Req_W,
N_err_West_grant_W => N_err_West_grant_W,
N_err_South_Req_S => N_err_South_Req_S,
N_err_South_grant_S => N_err_South_grant_S,
N_err_Local_Req_L => N_err_Local_Req_L,
N_err_Local_grant_L => N_err_Local_grant_L,
N_err_IDLE_Req_E => N_err_IDLE_Req_E,
N_err_IDLE_grant_E => N_err_IDLE_grant_E,
N_err_North_Req_E => N_err_North_Req_E,
N_err_North_grant_E => N_err_North_grant_E,
N_err_East_Req_W => N_err_East_Req_W,
N_err_East_grant_W => N_err_East_grant_W,
N_err_West_Req_S => N_err_West_Req_S,
N_err_West_grant_S => N_err_West_grant_S,
N_err_South_Req_L => N_err_South_Req_L,
N_err_South_grant_L => N_err_South_grant_L,
N_err_Local_Req_N => N_err_Local_Req_N,
N_err_Local_grant_N => N_err_Local_grant_N,
N_err_IDLE_Req_W => N_err_IDLE_Req_W,
N_err_IDLE_grant_W => N_err_IDLE_grant_W,
N_err_North_Req_W => N_err_North_Req_W,
N_err_North_grant_W => N_err_North_grant_W,
N_err_East_Req_S => N_err_East_Req_S,
N_err_East_grant_S => N_err_East_grant_S,
N_err_West_Req_L => N_err_West_Req_L,
N_err_West_grant_L => N_err_West_grant_L,
N_err_South_Req_N => N_err_South_Req_N,
N_err_South_grant_N => N_err_South_grant_N,
N_err_Local_Req_E => N_err_Local_Req_E,
N_err_Local_grant_E => N_err_Local_grant_E,
N_err_IDLE_Req_S => N_err_IDLE_Req_S,
N_err_IDLE_grant_S => N_err_IDLE_grant_S,
N_err_North_Req_S => N_err_North_Req_S,
N_err_North_grant_S => N_err_North_grant_S,
N_err_East_Req_L => N_err_East_Req_L,
N_err_East_grant_L => N_err_East_grant_L,
N_err_West_Req_N => N_err_West_Req_N,
N_err_West_grant_N => N_err_West_grant_N,
N_err_South_Req_E => N_err_South_Req_E,
N_err_South_grant_E => N_err_South_grant_E,
N_err_Local_Req_W => N_err_Local_Req_W,
N_err_Local_grant_W => N_err_Local_grant_W,
N_err_IDLE_Req_L => N_err_IDLE_Req_L,
N_err_IDLE_grant_L => N_err_IDLE_grant_L,
N_err_North_Req_L => N_err_North_Req_L,
N_err_North_grant_L => N_err_North_grant_L,
N_err_East_Req_N => N_err_East_Req_N,
N_err_East_grant_N => N_err_East_grant_N,
N_err_West_Req_E => N_err_West_Req_E,
N_err_West_grant_E => N_err_West_grant_E,
N_err_South_Req_W => N_err_South_Req_W,
N_err_South_grant_W => N_err_South_grant_W,
N_err_Local_Req_S => N_err_Local_Req_S,
N_err_Local_grant_S => N_err_Local_grant_S,
N_err_state_in_onehot => N_err_arbiter_state_in_onehot,
N_err_no_request_grants => N_err_no_request_grants,
N_err_request_no_grants => N_err_request_no_grants,
N_err_no_Req_N_grant_N => N_err_no_Req_N_grant_N,
N_err_no_Req_E_grant_E => N_err_no_Req_E_grant_E,
N_err_no_Req_W_grant_W => N_err_no_Req_W_grant_W,
N_err_no_Req_S_grant_S => N_err_no_Req_S_grant_S,
N_err_no_Req_L_grant_L => N_err_no_Req_L_grant_L,
-- East Arbiter_in Checker outputs
E_err_Requests_state_in_state_not_equal => E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N => E_err_IDLE_Req_N,
E_err_IDLE_grant_N => E_err_IDLE_grant_N,
E_err_North_Req_N => E_err_North_Req_N,
E_err_North_grant_N => E_err_North_grant_N,
E_err_East_Req_E => E_err_East_Req_E,
E_err_East_grant_E => E_err_East_grant_E,
E_err_West_Req_W => E_err_West_Req_W,
E_err_West_grant_W => E_err_West_grant_W,
E_err_South_Req_S => E_err_South_Req_S,
E_err_South_grant_S => E_err_South_grant_S,
E_err_Local_Req_L => E_err_Local_Req_L,
E_err_Local_grant_L => E_err_Local_grant_L,
E_err_IDLE_Req_E => E_err_IDLE_Req_E,
E_err_IDLE_grant_E => E_err_IDLE_grant_E,
E_err_North_Req_E => E_err_North_Req_E,
E_err_North_grant_E => E_err_North_grant_E,
E_err_East_Req_W => E_err_East_Req_W,
E_err_East_grant_W => E_err_East_grant_W,
E_err_West_Req_S => E_err_West_Req_S,
E_err_West_grant_S => E_err_West_grant_S,
E_err_South_Req_L => E_err_South_Req_L,
E_err_South_grant_L => E_err_South_grant_L,
E_err_Local_Req_N => E_err_Local_Req_N,
E_err_Local_grant_N => E_err_Local_grant_N,
E_err_IDLE_Req_W => E_err_IDLE_Req_W,
E_err_IDLE_grant_W => E_err_IDLE_grant_W,
E_err_North_Req_W => E_err_North_Req_W,
E_err_North_grant_W => E_err_North_grant_W,
E_err_East_Req_S => E_err_East_Req_S,
E_err_East_grant_S => E_err_East_grant_S,
E_err_West_Req_L => E_err_West_Req_L,
E_err_West_grant_L => E_err_West_grant_L,
E_err_South_Req_N => E_err_South_Req_N,
E_err_South_grant_N => E_err_South_grant_N,
E_err_Local_Req_E => E_err_Local_Req_E,
E_err_Local_grant_E => E_err_Local_grant_E,
E_err_IDLE_Req_S => E_err_IDLE_Req_S,
E_err_IDLE_grant_S => E_err_IDLE_grant_S,
E_err_North_Req_S => E_err_North_Req_S,
E_err_North_grant_S => E_err_North_grant_S,
E_err_East_Req_L => E_err_East_Req_L,
E_err_East_grant_L => E_err_East_grant_L,
E_err_West_Req_N => E_err_West_Req_N,
E_err_West_grant_N => E_err_West_grant_N,
E_err_South_Req_E => E_err_South_Req_E,
E_err_South_grant_E => E_err_South_grant_E,
E_err_Local_Req_W => E_err_Local_Req_W,
E_err_Local_grant_W => E_err_Local_grant_W,
E_err_IDLE_Req_L => E_err_IDLE_Req_L,
E_err_IDLE_grant_L => E_err_IDLE_grant_L,
E_err_North_Req_L => E_err_North_Req_L,
E_err_North_grant_L => E_err_North_grant_L,
E_err_East_Req_N => E_err_East_Req_N,
E_err_East_grant_N => E_err_East_grant_N,
E_err_West_Req_E => E_err_West_Req_E,
E_err_West_grant_E => E_err_West_grant_E,
E_err_South_Req_W => E_err_South_Req_W,
E_err_South_grant_W => E_err_South_grant_W,
E_err_Local_Req_S => E_err_Local_Req_S,
E_err_Local_grant_S => E_err_Local_grant_S,
E_err_state_in_onehot => E_err_arbiter_state_in_onehot,
E_err_no_request_grants => E_err_no_request_grants,
E_err_request_no_grants => E_err_request_no_grants,
E_err_no_Req_N_grant_N => E_err_no_Req_N_grant_N,
E_err_no_Req_E_grant_E => E_err_no_Req_E_grant_E,
E_err_no_Req_W_grant_W => E_err_no_Req_W_grant_W,
E_err_no_Req_S_grant_S => E_err_no_Req_S_grant_S,
E_err_no_Req_L_grant_L => E_err_no_Req_L_grant_L,
-- West Arbiter_in Checker outputs
W_err_Requests_state_in_state_not_equal => W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N => W_err_IDLE_Req_N,
W_err_IDLE_grant_N => W_err_IDLE_grant_N,
W_err_North_Req_N => W_err_North_Req_N,
W_err_North_grant_N => W_err_North_grant_N,
W_err_East_Req_E => W_err_East_Req_E,
W_err_East_grant_E => W_err_East_grant_E,
W_err_West_Req_W => W_err_West_Req_W,
W_err_West_grant_W => W_err_West_grant_W,
W_err_South_Req_S => W_err_South_Req_S,
W_err_South_grant_S => W_err_South_grant_S,
W_err_Local_Req_L => W_err_Local_Req_L,
W_err_Local_grant_L => W_err_Local_grant_L,
W_err_IDLE_Req_E => W_err_IDLE_Req_E,
W_err_IDLE_grant_E => W_err_IDLE_grant_E,
W_err_North_Req_E => W_err_North_Req_E,
W_err_North_grant_E => W_err_North_grant_E,
W_err_East_Req_W => W_err_East_Req_W,
W_err_East_grant_W => W_err_East_grant_W,
W_err_West_Req_S => W_err_West_Req_S,
W_err_West_grant_S => W_err_West_grant_S,
W_err_South_Req_L => W_err_South_Req_L,
W_err_South_grant_L => W_err_South_grant_L,
W_err_Local_Req_N => W_err_Local_Req_N,
W_err_Local_grant_N => W_err_Local_grant_N,
W_err_IDLE_Req_W => W_err_IDLE_Req_W,
W_err_IDLE_grant_W => W_err_IDLE_grant_W,
W_err_North_Req_W => W_err_North_Req_W,
W_err_North_grant_W => W_err_North_grant_W,
W_err_East_Req_S => W_err_East_Req_S,
W_err_East_grant_S => W_err_East_grant_S,
W_err_West_Req_L => W_err_West_Req_L,
W_err_West_grant_L => W_err_West_grant_L,
W_err_South_Req_N => W_err_South_Req_N,
W_err_South_grant_N => W_err_South_grant_N,
W_err_Local_Req_E => W_err_Local_Req_E,
W_err_Local_grant_E => W_err_Local_grant_E,
W_err_IDLE_Req_S => W_err_IDLE_Req_S,
W_err_IDLE_grant_S => W_err_IDLE_grant_S,
W_err_North_Req_S => W_err_North_Req_S,
W_err_North_grant_S => W_err_North_grant_S,
W_err_East_Req_L => W_err_East_Req_L,
W_err_East_grant_L => W_err_East_grant_L,
W_err_West_Req_N => W_err_West_Req_N,
W_err_West_grant_N => W_err_West_grant_N,
W_err_South_Req_E => W_err_South_Req_E,
W_err_South_grant_E => W_err_South_grant_E,
W_err_Local_Req_W => W_err_Local_Req_W,
W_err_Local_grant_W => W_err_Local_grant_W,
W_err_IDLE_Req_L => W_err_IDLE_Req_L,
W_err_IDLE_grant_L => W_err_IDLE_grant_L,
W_err_North_Req_L => W_err_North_Req_L,
W_err_North_grant_L => W_err_North_grant_L,
W_err_East_Req_N => W_err_East_Req_N,
W_err_East_grant_N => W_err_East_grant_N,
W_err_West_Req_E => W_err_West_Req_E,
W_err_West_grant_E => W_err_West_grant_E,
W_err_South_Req_W => W_err_South_Req_W,
W_err_South_grant_W => W_err_South_grant_W,
W_err_Local_Req_S => W_err_Local_Req_S,
W_err_Local_grant_S => W_err_Local_grant_S,
W_err_state_in_onehot => W_err_arbiter_state_in_onehot,
W_err_no_request_grants => W_err_no_request_grants,
W_err_request_no_grants => W_err_request_no_grants,
W_err_no_Req_N_grant_N => W_err_no_Req_N_grant_N,
W_err_no_Req_E_grant_E => W_err_no_Req_E_grant_E,
W_err_no_Req_W_grant_W => W_err_no_Req_W_grant_W,
W_err_no_Req_S_grant_S => W_err_no_Req_S_grant_S,
W_err_no_Req_L_grant_L => W_err_no_Req_L_grant_L,
-- South Arbiter_in Checker outputs
S_err_Requests_state_in_state_not_equal => S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N => S_err_IDLE_Req_N,
S_err_IDLE_grant_N => S_err_IDLE_grant_N,
S_err_North_Req_N => S_err_North_Req_N,
S_err_North_grant_N => S_err_North_grant_N,
S_err_East_Req_E => S_err_East_Req_E,
S_err_East_grant_E => S_err_East_grant_E,
S_err_West_Req_W => S_err_West_Req_W,
S_err_West_grant_W => S_err_West_grant_W,
S_err_South_Req_S => S_err_South_Req_S,
S_err_South_grant_S => S_err_South_grant_S,
S_err_Local_Req_L => S_err_Local_Req_L,
S_err_Local_grant_L => S_err_Local_grant_L,
S_err_IDLE_Req_E => S_err_IDLE_Req_E,
S_err_IDLE_grant_E => S_err_IDLE_grant_E,
S_err_North_Req_E => S_err_North_Req_E,
S_err_North_grant_E => S_err_North_grant_E,
S_err_East_Req_W => S_err_East_Req_W,
S_err_East_grant_W => S_err_East_grant_W,
S_err_West_Req_S => S_err_West_Req_S,
S_err_West_grant_S => S_err_West_grant_S,
S_err_South_Req_L => S_err_South_Req_L,
S_err_South_grant_L => S_err_South_grant_L,
S_err_Local_Req_N => S_err_Local_Req_N,
S_err_Local_grant_N => S_err_Local_grant_N,
S_err_IDLE_Req_W => S_err_IDLE_Req_W,
S_err_IDLE_grant_W => S_err_IDLE_grant_W,
S_err_North_Req_W => S_err_North_Req_W,
S_err_North_grant_W => S_err_North_grant_W,
S_err_East_Req_S => S_err_East_Req_S,
S_err_East_grant_S => S_err_East_grant_S,
S_err_West_Req_L => S_err_West_Req_L,
S_err_West_grant_L => S_err_West_grant_L,
S_err_South_Req_N => S_err_South_Req_N,
S_err_South_grant_N => S_err_South_grant_N,
S_err_Local_Req_E => S_err_Local_Req_E,
S_err_Local_grant_E => S_err_Local_grant_E,
S_err_IDLE_Req_S => S_err_IDLE_Req_S,
S_err_IDLE_grant_S => S_err_IDLE_grant_S,
S_err_North_Req_S => S_err_North_Req_S,
S_err_North_grant_S => S_err_North_grant_S,
S_err_East_Req_L => S_err_East_Req_L,
S_err_East_grant_L => S_err_East_grant_L,
S_err_West_Req_N => S_err_West_Req_N,
S_err_West_grant_N => S_err_West_grant_N,
S_err_South_Req_E => S_err_South_Req_E,
S_err_South_grant_E => S_err_South_grant_E,
S_err_Local_Req_W => S_err_Local_Req_W,
S_err_Local_grant_W => S_err_Local_grant_W,
S_err_IDLE_Req_L => S_err_IDLE_Req_L,
S_err_IDLE_grant_L => S_err_IDLE_grant_L,
S_err_North_Req_L => S_err_North_Req_L,
S_err_North_grant_L => S_err_North_grant_L,
S_err_East_Req_N => S_err_East_Req_N,
S_err_East_grant_N => S_err_East_grant_N,
S_err_West_Req_E => S_err_West_Req_E,
S_err_West_grant_E => S_err_West_grant_E,
S_err_South_Req_W => S_err_South_Req_W,
S_err_South_grant_W => S_err_South_grant_W,
S_err_Local_Req_S => S_err_Local_Req_S,
S_err_Local_grant_S => S_err_Local_grant_S,
S_err_state_in_onehot => S_err_arbiter_state_in_onehot,
S_err_no_request_grants => S_err_no_request_grants,
S_err_request_no_grants => S_err_request_no_grants,
S_err_no_Req_N_grant_N => S_err_no_Req_N_grant_N,
S_err_no_Req_E_grant_E => S_err_no_Req_E_grant_E,
S_err_no_Req_W_grant_W => S_err_no_Req_W_grant_W,
S_err_no_Req_S_grant_S => S_err_no_Req_S_grant_S,
S_err_no_Req_L_grant_L => S_err_no_Req_L_grant_L,
-- Local Arbiter_in Checker outputs
L_err_Requests_state_in_state_not_equal => L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N => L_err_IDLE_Req_N,
L_err_IDLE_grant_N => L_err_IDLE_grant_N,
L_err_North_Req_N => L_err_North_Req_N,
L_err_North_grant_N => L_err_North_grant_N,
L_err_East_Req_E => L_err_East_Req_E,
L_err_East_grant_E => L_err_East_grant_E,
L_err_West_Req_W => L_err_West_Req_W,
L_err_West_grant_W => L_err_West_grant_W,
L_err_South_Req_S => L_err_South_Req_S,
L_err_South_grant_S => L_err_South_grant_S,
L_err_Local_Req_L => L_err_Local_Req_L,
L_err_Local_grant_L => L_err_Local_grant_L,
L_err_IDLE_Req_E => L_err_IDLE_Req_E,
L_err_IDLE_grant_E => L_err_IDLE_grant_E,
L_err_North_Req_E => L_err_North_Req_E,
L_err_North_grant_E => L_err_North_grant_E,
L_err_East_Req_W => L_err_East_Req_W,
L_err_East_grant_W => L_err_East_grant_W,
L_err_West_Req_S => L_err_West_Req_S,
L_err_West_grant_S => L_err_West_grant_S,
L_err_South_Req_L => L_err_South_Req_L,
L_err_South_grant_L => L_err_South_grant_L,
L_err_Local_Req_N => L_err_Local_Req_N,
L_err_Local_grant_N => L_err_Local_grant_N,
L_err_IDLE_Req_W => L_err_IDLE_Req_W,
L_err_IDLE_grant_W => L_err_IDLE_grant_W,
L_err_North_Req_W => L_err_North_Req_W,
L_err_North_grant_W => L_err_North_grant_W,
L_err_East_Req_S => L_err_East_Req_S,
L_err_East_grant_S => L_err_East_grant_S,
L_err_West_Req_L => L_err_West_Req_L,
L_err_West_grant_L => L_err_West_grant_L,
L_err_South_Req_N => L_err_South_Req_N,
L_err_South_grant_N => L_err_South_grant_N,
L_err_Local_Req_E => L_err_Local_Req_E,
L_err_Local_grant_E => L_err_Local_grant_E,
L_err_IDLE_Req_S => L_err_IDLE_Req_S,
L_err_IDLE_grant_S => L_err_IDLE_grant_S,
L_err_North_Req_S => L_err_North_Req_S,
L_err_North_grant_S => L_err_North_grant_S,
L_err_East_Req_L => L_err_East_Req_L,
L_err_East_grant_L => L_err_East_grant_L,
L_err_West_Req_N => L_err_West_Req_N,
L_err_West_grant_N => L_err_West_grant_N,
L_err_South_Req_E => L_err_South_Req_E,
L_err_South_grant_E => L_err_South_grant_E,
L_err_Local_Req_W => L_err_Local_Req_W,
L_err_Local_grant_W => L_err_Local_grant_W,
L_err_IDLE_Req_L => L_err_IDLE_Req_L,
L_err_IDLE_grant_L => L_err_IDLE_grant_L,
L_err_North_Req_L => L_err_North_Req_L,
L_err_North_grant_L => L_err_North_grant_L,
L_err_East_Req_N => L_err_East_Req_N,
L_err_East_grant_N => L_err_East_grant_N,
L_err_West_Req_E => L_err_West_Req_E,
L_err_West_grant_E => L_err_West_grant_E,
L_err_South_Req_W => L_err_South_Req_W,
L_err_South_grant_W => L_err_South_grant_W,
L_err_Local_Req_S => L_err_Local_Req_S,
L_err_Local_grant_S => L_err_Local_grant_S,
L_err_state_in_onehot => L_err_arbiter_state_in_onehot,
L_err_no_request_grants => L_err_no_request_grants,
L_err_request_no_grants => L_err_request_no_grants,
L_err_no_Req_N_grant_N => L_err_no_Req_N_grant_N,
L_err_no_Req_E_grant_E => L_err_no_Req_E_grant_E,
L_err_no_Req_W_grant_W => L_err_no_Req_W_grant_W,
L_err_no_Req_S_grant_S => L_err_no_Req_S_grant_S,
L_err_no_Req_L_grant_L => L_err_no_Req_L_grant_L,
-- Arbiter_out checker outputs
-- North Arbiter_out checker outputs
N_arbiter_out_err_Requests_state_in_state_not_equal => N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N => N_err_IDLE_req_X_N,
N_err_North_req_X_N => N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N => N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N => N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E => N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E => N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E => N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W => N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W => N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W => N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S => N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S => N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S => N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L => N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L => N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L => N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E => N_err_IDLE_req_X_E,
N_err_North_req_X_E => N_err_North_req_X_E,
N_err_East_req_X_W => N_err_East_req_X_W,
N_err_West_req_X_S => N_err_West_req_X_S,
N_err_South_req_X_L => N_err_South_req_X_L,
N_err_Local_req_X_N => N_err_Local_req_X_N,
N_err_IDLE_req_X_W => N_err_IDLE_req_X_W,
N_err_North_req_X_W => N_err_North_req_X_W,
N_err_East_req_X_S => N_err_East_req_X_S,
N_err_West_req_X_L => N_err_West_req_X_L,
N_err_South_req_X_N => N_err_South_req_X_N,
N_err_Local_req_X_E => N_err_Local_req_X_E,
N_err_IDLE_req_X_S => N_err_IDLE_req_X_S,
N_err_North_req_X_S => N_err_North_req_X_S,
N_err_East_req_X_L => N_err_East_req_X_L,
N_err_West_req_X_N => N_err_West_req_X_N,
N_err_South_req_X_E => N_err_South_req_X_E,
N_err_Local_req_X_W => N_err_Local_req_X_W,
N_err_IDLE_req_X_L => N_err_IDLE_req_X_L,
N_err_North_req_X_L => N_err_North_req_X_L,
N_err_East_req_X_N => N_err_East_req_X_N,
N_err_West_req_X_E => N_err_West_req_X_E,
N_err_South_req_X_W => N_err_South_req_X_W,
N_err_Local_req_X_S => N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot => N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants => N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state => N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants => N_err_request_IDLE_not_Grants,
N_err_state_North_Invalid_Grant => N_err_state_North_Invalid_Grant,
N_err_state_East_Invalid_Grant => N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant => N_err_state_West_Invalid_Grant,
N_err_state_South_Invalid_Grant => N_err_state_South_Invalid_Grant,
N_err_state_Local_Invalid_Grant => N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero => N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal => E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N => E_err_IDLE_req_X_N,
E_err_North_req_X_N => E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N => E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N => E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E => E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E => E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E => E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W => E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W => E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W => E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S => E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S => E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S => E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L => E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L => E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L => E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E => E_err_IDLE_req_X_E,
E_err_North_req_X_E => E_err_North_req_X_E,
E_err_East_req_X_W => E_err_East_req_X_W,
E_err_West_req_X_S => E_err_West_req_X_S,
E_err_South_req_X_L => E_err_South_req_X_L,
E_err_Local_req_X_N => E_err_Local_req_X_N,
E_err_IDLE_req_X_W => E_err_IDLE_req_X_W,
E_err_North_req_X_W => E_err_North_req_X_W,
E_err_East_req_X_S => E_err_East_req_X_S,
E_err_West_req_X_L => E_err_West_req_X_L,
E_err_South_req_X_N => E_err_South_req_X_N,
E_err_Local_req_X_E => E_err_Local_req_X_E,
E_err_IDLE_req_X_S => E_err_IDLE_req_X_S,
E_err_North_req_X_S => E_err_North_req_X_S,
E_err_East_req_X_L => E_err_East_req_X_L,
E_err_West_req_X_N => E_err_West_req_X_N,
E_err_South_req_X_E => E_err_South_req_X_E,
E_err_Local_req_X_W => E_err_Local_req_X_W,
E_err_IDLE_req_X_L => E_err_IDLE_req_X_L,
E_err_North_req_X_L => E_err_North_req_X_L,
E_err_East_req_X_N => E_err_East_req_X_N,
E_err_West_req_X_E => E_err_West_req_X_E,
E_err_South_req_X_W => E_err_South_req_X_W,
E_err_Local_req_X_S => E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot => E_arbiter_out_err_state_in_onehot,
E_arbiter_out_err_no_request_grants => E_arbiter_out_err_no_request_grants,
E_err_request_IDLE_state => E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants => E_err_request_IDLE_not_Grants,
E_err_state_North_Invalid_Grant => E_err_state_North_Invalid_Grant,
E_err_state_East_Invalid_Grant => E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant => E_err_state_West_Invalid_Grant,
E_err_state_South_Invalid_Grant => E_err_state_South_Invalid_Grant,
E_err_state_Local_Invalid_Grant => E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero => E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal => W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N => W_err_IDLE_req_X_N,
W_err_North_req_X_N => W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N => W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N => W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E => W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E => W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E => W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W => W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W => W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W => W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S => W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S => W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S => W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L => W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L => W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L => W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E => W_err_IDLE_req_X_E,
W_err_North_req_X_E => W_err_North_req_X_E,
W_err_East_req_X_W => W_err_East_req_X_W,
W_err_West_req_X_S => W_err_West_req_X_S,
W_err_South_req_X_L => W_err_South_req_X_L,
W_err_Local_req_X_N => W_err_Local_req_X_N,
W_err_IDLE_req_X_W => W_err_IDLE_req_X_W,
W_err_North_req_X_W => W_err_North_req_X_W,
W_err_East_req_X_S => W_err_East_req_X_S,
W_err_West_req_X_L => W_err_West_req_X_L,
W_err_South_req_X_N => W_err_South_req_X_N,
W_err_Local_req_X_E => W_err_Local_req_X_E,
W_err_IDLE_req_X_S => W_err_IDLE_req_X_S,
W_err_North_req_X_S => W_err_North_req_X_S,
W_err_East_req_X_L => W_err_East_req_X_L,
W_err_West_req_X_N => W_err_West_req_X_N,
W_err_South_req_X_E => W_err_South_req_X_E,
W_err_Local_req_X_W => W_err_Local_req_X_W,
W_err_IDLE_req_X_L => W_err_IDLE_req_X_L,
W_err_North_req_X_L => W_err_North_req_X_L,
W_err_East_req_X_N => W_err_East_req_X_N,
W_err_West_req_X_E => W_err_West_req_X_E,
W_err_South_req_X_W => W_err_South_req_X_W,
W_err_Local_req_X_S => W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot => W_arbiter_out_err_state_in_onehot,
W_arbiter_out_err_no_request_grants => W_arbiter_out_err_no_request_grants,
W_err_request_IDLE_state => W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants => W_err_request_IDLE_not_Grants,
W_err_state_North_Invalid_Grant => W_err_state_North_Invalid_Grant,
W_err_state_East_Invalid_Grant => W_err_state_East_Invalid_Grant,
W_err_state_West_Invalid_Grant => W_err_state_West_Invalid_Grant,
W_err_state_South_Invalid_Grant => W_err_state_South_Invalid_Grant,
W_err_state_Local_Invalid_Grant => W_err_state_Local_Invalid_Grant,
W_err_Grants_onehot_or_all_zero => W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal => S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N => S_err_IDLE_req_X_N,
S_err_North_req_X_N => S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N => S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N => S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E => S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E => S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E => S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W => S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W => S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W => S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S => S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S => S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S => S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L => S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L => S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L => S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E => S_err_IDLE_req_X_E,
S_err_North_req_X_E => S_err_North_req_X_E,
S_err_East_req_X_W => S_err_East_req_X_W,
S_err_West_req_X_S => S_err_West_req_X_S,
S_err_South_req_X_L => S_err_South_req_X_L,
S_err_Local_req_X_N => S_err_Local_req_X_N,
S_err_IDLE_req_X_W => S_err_IDLE_req_X_W,
S_err_North_req_X_W => S_err_North_req_X_W,
S_err_East_req_X_S => S_err_East_req_X_S,
S_err_West_req_X_L => S_err_West_req_X_L,
S_err_South_req_X_N => S_err_South_req_X_N,
S_err_Local_req_X_E => S_err_Local_req_X_E,
S_err_IDLE_req_X_S => S_err_IDLE_req_X_S,
S_err_North_req_X_S => S_err_North_req_X_S,
S_err_East_req_X_L => S_err_East_req_X_L,
S_err_West_req_X_N => S_err_West_req_X_N,
S_err_South_req_X_E => S_err_South_req_X_E,
S_err_Local_req_X_W => S_err_Local_req_X_W,
S_err_IDLE_req_X_L => S_err_IDLE_req_X_L,
S_err_North_req_X_L => S_err_North_req_X_L,
S_err_East_req_X_N => S_err_East_req_X_N,
S_err_West_req_X_E => S_err_West_req_X_E,
S_err_South_req_X_W => S_err_South_req_X_W,
S_err_Local_req_X_S => S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot => S_arbiter_out_err_state_in_onehot,
S_arbiter_out_err_no_request_grants => S_arbiter_out_err_no_request_grants,
S_err_request_IDLE_state => S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants => S_err_request_IDLE_not_Grants,
S_err_state_North_Invalid_Grant => S_err_state_North_Invalid_Grant,
S_err_state_East_Invalid_Grant => S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant => S_err_state_West_Invalid_Grant,
S_err_state_South_Invalid_Grant => S_err_state_South_Invalid_Grant,
S_err_state_Local_Invalid_Grant => S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero => S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal => L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N => L_err_IDLE_req_X_N,
L_err_North_req_X_N => L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N => L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N => L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E => L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E => L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E => L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W => L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W => L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W => L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S => L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S => L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S => L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L => L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L => L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L => L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E => L_err_IDLE_req_X_E,
L_err_North_req_X_E => L_err_North_req_X_E,
L_err_East_req_X_W => L_err_East_req_X_W,
L_err_West_req_X_S => L_err_West_req_X_S,
L_err_South_req_X_L => L_err_South_req_X_L,
L_err_Local_req_X_N => L_err_Local_req_X_N,
L_err_IDLE_req_X_W => L_err_IDLE_req_X_W,
L_err_North_req_X_W => L_err_North_req_X_W,
L_err_East_req_X_S => L_err_East_req_X_S,
L_err_West_req_X_L => L_err_West_req_X_L,
L_err_South_req_X_N => L_err_South_req_X_N,
L_err_Local_req_X_E => L_err_Local_req_X_E,
L_err_IDLE_req_X_S => L_err_IDLE_req_X_S,
L_err_North_req_X_S => L_err_North_req_X_S,
L_err_East_req_X_L => L_err_East_req_X_L,
L_err_West_req_X_N => L_err_West_req_X_N,
L_err_South_req_X_E => L_err_South_req_X_E,
L_err_Local_req_X_W => L_err_Local_req_X_W,
L_err_IDLE_req_X_L => L_err_IDLE_req_X_L,
L_err_North_req_X_L => L_err_North_req_X_L,
L_err_East_req_X_N => L_err_East_req_X_N,
L_err_West_req_X_E => L_err_West_req_X_E,
L_err_South_req_X_W => L_err_South_req_X_W,
L_err_Local_req_X_S => L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot => L_arbiter_out_err_state_in_onehot,
L_arbiter_out_err_no_request_grants => L_arbiter_out_err_no_request_grants,
L_err_request_IDLE_state => L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants => L_err_request_IDLE_not_Grants,
L_err_state_North_Invalid_Grant => L_err_state_North_Invalid_Grant,
L_err_state_East_Invalid_Grant => L_err_state_East_Invalid_Grant,
L_err_state_West_Invalid_Grant => L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant => L_err_state_South_Invalid_Grant,
L_err_state_Local_Invalid_Grant => L_err_state_Local_Invalid_Grant,
L_err_Grants_onehot_or_all_zero => L_err_Grants_onehot_or_all_zero
);
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
-- all the Xbar select_signals
Xbar_sel_N <= '0' & Grant_NE & Grant_NW & Grant_NS & Grant_NL;
Xbar_sel_E <= Grant_EN & '0' & Grant_EW & Grant_ES & Grant_EL;
Xbar_sel_W <= Grant_WN & Grant_WE & '0' & Grant_WS & Grant_WL;
Xbar_sel_S <= Grant_SN & Grant_SE & Grant_SW & '0' & Grant_SL;
Xbar_sel_L <= Grant_LN & Grant_LE & Grant_LW & Grant_LS & '0';
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
-- all the Xbars
GEN_XABR: for i in range (0 to ) generate
XBAR_X: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_N, Data_out=> TX_N);
end generate GEN_XABR;
XBAR_N: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_N, Data_out=> TX_N);
XBAR_E: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_E, Data_out=> TX_E);
XBAR_W: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_W, Data_out=> TX_W);
XBAR_S: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_S, Data_out=> TX_S);
XBAR_L: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_L, Data_out=> TX_L);
end;
|
--Copyright (C) 2016 Siavoosh Payandeh Azad
library ieee;
use ieee.std_logic_1164.all;
--use IEEE.STD_LOGIC_ARITH.ALL;
--use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity router_credit_based_PD_C is --fault classifier plus packet-dropping
generic (
DATA_WIDTH: integer := 32;
current_address : integer := 0;
Cx_rst : integer := 10;
healthy_counter_threshold : integer := 8;
faulty_counter_threshold: integer := 2;
counter_depth: integer := 4;
NoC_size: integer := 4
);
port (
reset, clk: in std_logic;
Rxy_reconf: in std_logic_vector(7 downto 0);
Reconfig : in std_logic;
RX_N, RX_E, RX_W, RX_S, RX_L : in std_logic_vector (DATA_WIDTH-1 downto 0);
credit_in_N, credit_in_E, credit_in_W, credit_in_S, credit_in_L: in std_logic;
valid_in_N, valid_in_E, valid_in_W, valid_in_S, valid_in_L : in std_logic;
valid_out_N, valid_out_E, valid_out_W, valid_out_S, valid_out_L : out std_logic;
credit_out_N, credit_out_E, credit_out_W, credit_out_S, credit_out_L: out std_logic;
TX_N, TX_E, TX_W, TX_S, TX_L: out std_logic_vector (DATA_WIDTH-1 downto 0);
Faulty_N_in, Faulty_E_in, Faulty_W_in, Faulty_S_in: in std_logic;
Faulty_N_out, Faulty_E_out, Faulty_W_out, Faulty_S_out: out std_logic
);
end router_credit_based_PD_C;
architecture behavior of router_credit_based_PD_C is
COMPONENT FIFO_credit_based is
generic (
DATA_WIDTH: integer := 32
);
port (reset: in std_logic;
clk: in std_logic;
RX: in std_logic_vector(DATA_WIDTH-1 downto 0);
valid_in: in std_logic;
read_en_N : in std_logic;
read_en_E : in std_logic;
read_en_W : in std_logic;
read_en_S : in std_logic;
read_en_L : in std_logic;
credit_out: out std_logic;
empty_out: out std_logic;
Data_out: out std_logic_vector(DATA_WIDTH-1 downto 0);
fault_info, health_info: out std_logic;
-- Checker outputs
-- Functional checkers
err_empty_full, err_empty_read_en, err_full_write_en, err_state_in_onehot, err_read_pointer_in_onehot, err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer, err_not_write_en_write_pointer, err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty, err_read_pointer_write_pointer_not_full, err_read_pointer_write_pointer_full,
err_read_pointer_increment, err_read_pointer_not_increment, err_write_en, err_not_write_en,
err_not_write_en1, err_not_write_en2, err_read_en_mismatch, err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : out std_logic
);
end COMPONENT;
COMPONENT counter_threshold_classifier is
generic (
counter_depth: integer := 8;
healthy_counter_threshold: integer := 4;
faulty_counter_threshold: integer := 4
);
port ( reset: in std_logic;
clk: in std_logic;
faulty_packet, Healthy_packet: in std_logic;
Healthy, intermittent, Faulty:out std_logic
);
end COMPONENT;
COMPONENT allocator is
port ( reset: in std_logic;
clk: in std_logic;
-- flow control
credit_in_N, credit_in_E, credit_in_W, credit_in_S, credit_in_L: in std_logic;
req_N_N, req_N_E, req_N_W, req_N_S, req_N_L: in std_logic;
req_E_N, req_E_E, req_E_W, req_E_S, req_E_L: in std_logic;
req_W_N, req_W_E, req_W_W, req_W_S, req_W_L: in std_logic;
req_S_N, req_S_E, req_S_W, req_S_S, req_S_L: in std_logic;
req_L_N, req_L_E, req_L_W, req_L_S, req_L_L: in std_logic;
empty_N, empty_E, empty_W, empty_S, empty_L: in std_logic;
-- grant_X_Y means the grant for X output port towards Y input port
-- this means for any X in [N, E, W, S, L] then set grant_X_Y is one hot!
valid_N, valid_E, valid_W, valid_S, valid_L : out std_logic;
grant_N_N, grant_N_E, grant_N_W, grant_N_S, grant_N_L: out std_logic;
grant_E_N, grant_E_E, grant_E_W, grant_E_S, grant_E_L: out std_logic;
grant_W_N, grant_W_E, grant_W_W, grant_W_S, grant_W_L: out std_logic;
grant_S_N, grant_S_E, grant_S_W, grant_S_S, grant_S_L: out std_logic;
grant_L_N, grant_L_E, grant_L_W, grant_L_S, grant_L_L: out std_logic;
-- Allocator logic checker outputs
err_grant_N_N_sig_not_empty_N_grant_N_N,
err_not_grant_N_N_sig_or_empty_N_not_grant_N_N,
err_grant_N_E_sig_not_empty_E_grant_N_E,
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E,
err_grant_N_W_sig_not_empty_W_grant_N_W,
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W,
err_grant_N_S_sig_not_empty_S_grant_N_S,
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S,
err_grant_N_L_sig_not_empty_L_grant_N_L,
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L,
err_grant_E_N_sig_not_empty_N_grant_E_N,
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N,
err_grant_E_E_sig_not_empty_E_grant_E_E,
err_not_grant_E_E_sig_or_empty_E_not_grant_E_E,
err_grant_E_W_sig_not_empty_W_grant_E_W,
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W,
err_grant_E_S_sig_not_empty_S_grant_E_S,
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S,
err_grant_E_L_sig_not_empty_L_grant_E_L,
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L,
err_grant_W_N_sig_not_empty_N_grant_W_N,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N,
err_grant_W_E_sig_not_empty_E_grant_W_E,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E,
err_grant_W_W_sig_not_empty_W_grant_W_W,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W,
err_grant_W_S_sig_not_empty_S_grant_W_S,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S,
err_grant_W_L_sig_not_empty_L_grant_W_L,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L,
err_grant_S_N_sig_not_empty_N_grant_S_N,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N,
err_grant_S_E_sig_not_empty_E_grant_S_E,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E,
err_grant_S_W_sig_not_empty_W_grant_S_W,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W,
err_grant_S_S_sig_not_empty_S_grant_S_S,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S,
err_grant_S_L_sig_not_empty_L_grant_S_L,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L,
err_grant_L_N_sig_not_empty_N_grant_L_N,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N,
err_grant_L_E_sig_not_empty_E_grant_L_E,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E,
err_grant_L_W_sig_not_empty_W_grant_L_W,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W,
err_grant_L_S_sig_not_empty_S_grant_L_S,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S,
err_grant_L_L_sig_not_empty_L_grant_L_L,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L,
err_grant_signals_not_empty_grant_N,
err_not_grant_signals_empty_not_grant_N,
err_grant_signals_not_empty_grant_E,
err_not_grant_signals_empty_not_grant_E,
err_grant_signals_not_empty_grant_W,
err_not_grant_signals_empty_not_grant_W,
err_grant_signals_not_empty_grant_S,
err_not_grant_signals_empty_not_grant_S,
err_grant_signals_not_empty_grant_L,
err_not_grant_signals_empty_not_grant_L,
err_grants_valid_not_match,
-- Allocator credit counter logic checker outputs
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_N_credit_counter_N_out_increment,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change,
err_grant_N_credit_counter_N_out_decrement,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_E_credit_counter_E_out_increment,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change,
err_grant_E_credit_counter_E_out_decrement,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_W_credit_counter_W_out_increment,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change,
err_grant_W_credit_counter_W_out_decrement,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_S_credit_counter_S_out_increment,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change,
err_grant_S_credit_counter_S_out_decrement,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
err_credit_in_L_credit_counter_L_out_increment,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change,
err_grant_L_credit_counter_L_out_decrement,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
-- Arbiter_in checker outputs
-- North Arbiter_in checker outputs
N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N, N_err_IDLE_grant_N,N_err_North_Req_N, N_err_North_grant_N, N_err_East_Req_E, N_err_East_grant_E,
N_err_West_Req_W, N_err_West_grant_W, N_err_South_Req_S,N_err_South_grant_S,N_err_Local_Req_L, N_err_Local_grant_L,
N_err_IDLE_Req_E, N_err_IDLE_grant_E, N_err_North_Req_E, N_err_North_grant_E, N_err_East_Req_W, N_err_East_grant_W,
N_err_West_Req_S, N_err_West_grant_S, N_err_South_Req_L, N_err_South_grant_L, N_err_Local_Req_N, N_err_Local_grant_N,
N_err_IDLE_Req_W, N_err_IDLE_grant_W, N_err_North_Req_W, N_err_North_grant_W, N_err_East_Req_S, N_err_East_grant_S,
N_err_West_Req_L, N_err_West_grant_L, N_err_South_Req_N, N_err_South_grant_N, N_err_Local_Req_E, N_err_Local_grant_E,
N_err_IDLE_Req_S, N_err_IDLE_grant_S, N_err_North_Req_S, N_err_North_grant_S, N_err_East_Req_L, N_err_East_grant_L,
N_err_West_Req_N, N_err_West_grant_N, N_err_South_Req_E, N_err_South_grant_E, N_err_Local_Req_W, N_err_Local_grant_W,
N_err_IDLE_Req_L, N_err_IDLE_grant_L, N_err_North_Req_L, N_err_North_grant_L, N_err_East_Req_N, N_err_East_grant_N,
N_err_West_Req_E, N_err_West_grant_E, N_err_South_Req_W, N_err_South_grant_W, N_err_Local_Req_S, N_err_Local_grant_S,
N_err_state_in_onehot, N_err_no_request_grants, N_err_request_no_grants,
N_err_no_Req_N_grant_N, N_err_no_Req_E_grant_E, N_err_no_Req_W_grant_W, N_err_no_Req_S_grant_S, N_err_no_Req_L_grant_L,
-- East Arbiter_in checker outputs
E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N, E_err_IDLE_grant_N,E_err_North_Req_N, E_err_North_grant_N, E_err_East_Req_E, E_err_East_grant_E,
E_err_West_Req_W, E_err_West_grant_W, E_err_South_Req_S,E_err_South_grant_S,E_err_Local_Req_L, E_err_Local_grant_L,
E_err_IDLE_Req_E, E_err_IDLE_grant_E, E_err_North_Req_E, E_err_North_grant_E, E_err_East_Req_W, E_err_East_grant_W,
E_err_West_Req_S, E_err_West_grant_S, E_err_South_Req_L, E_err_South_grant_L, E_err_Local_Req_N, E_err_Local_grant_N,
E_err_IDLE_Req_W, E_err_IDLE_grant_W, E_err_North_Req_W, E_err_North_grant_W, E_err_East_Req_S, E_err_East_grant_S,
E_err_West_Req_L, E_err_West_grant_L, E_err_South_Req_N, E_err_South_grant_N, E_err_Local_Req_E, E_err_Local_grant_E,
E_err_IDLE_Req_S, E_err_IDLE_grant_S, E_err_North_Req_S, E_err_North_grant_S, E_err_East_Req_L, E_err_East_grant_L,
E_err_West_Req_N, E_err_West_grant_N, E_err_South_Req_E, E_err_South_grant_E, E_err_Local_Req_W, E_err_Local_grant_W,
E_err_IDLE_Req_L, E_err_IDLE_grant_L, E_err_North_Req_L, E_err_North_grant_L, E_err_East_Req_N, E_err_East_grant_N,
E_err_West_Req_E, E_err_West_grant_E, E_err_South_Req_W, E_err_South_grant_W, E_err_Local_Req_S, E_err_Local_grant_S,
E_err_state_in_onehot, E_err_no_request_grants, E_err_request_no_grants,
E_err_no_Req_N_grant_N, E_err_no_Req_E_grant_E, E_err_no_Req_W_grant_W, E_err_no_Req_S_grant_S, E_err_no_Req_L_grant_L,
-- West Arbiter_in checker outputs
W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N, W_err_IDLE_grant_N,W_err_North_Req_N, W_err_North_grant_N, W_err_East_Req_E, W_err_East_grant_E,
W_err_West_Req_W, W_err_West_grant_W, W_err_South_Req_S,W_err_South_grant_S,W_err_Local_Req_L, W_err_Local_grant_L,
W_err_IDLE_Req_E, W_err_IDLE_grant_E, W_err_North_Req_E, W_err_North_grant_E, W_err_East_Req_W, W_err_East_grant_W,
W_err_West_Req_S, W_err_West_grant_S, W_err_South_Req_L, W_err_South_grant_L, W_err_Local_Req_N, W_err_Local_grant_N,
W_err_IDLE_Req_W, W_err_IDLE_grant_W, W_err_North_Req_W, W_err_North_grant_W, W_err_East_Req_S, W_err_East_grant_S,
W_err_West_Req_L, W_err_West_grant_L, W_err_South_Req_N, W_err_South_grant_N, W_err_Local_Req_E, W_err_Local_grant_E,
W_err_IDLE_Req_S, W_err_IDLE_grant_S, W_err_North_Req_S, W_err_North_grant_S, W_err_East_Req_L, W_err_East_grant_L,
W_err_West_Req_N, W_err_West_grant_N, W_err_South_Req_E, W_err_South_grant_E, W_err_Local_Req_W, W_err_Local_grant_W,
W_err_IDLE_Req_L, W_err_IDLE_grant_L, W_err_North_Req_L, W_err_North_grant_L, W_err_East_Req_N, W_err_East_grant_N,
W_err_West_Req_E, W_err_West_grant_E, W_err_South_Req_W, W_err_South_grant_W, W_err_Local_Req_S, W_err_Local_grant_S,
W_err_state_in_onehot, W_err_no_request_grants, W_err_request_no_grants,
W_err_no_Req_N_grant_N, W_err_no_Req_E_grant_E, W_err_no_Req_W_grant_W, W_err_no_Req_S_grant_S, W_err_no_Req_L_grant_L,
-- South Arbiter_in checker outputs
S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N, S_err_IDLE_grant_N,S_err_North_Req_N, S_err_North_grant_N, S_err_East_Req_E, S_err_East_grant_E,
S_err_West_Req_W, S_err_West_grant_W, S_err_South_Req_S,S_err_South_grant_S,S_err_Local_Req_L, S_err_Local_grant_L,
S_err_IDLE_Req_E, S_err_IDLE_grant_E, S_err_North_Req_E, S_err_North_grant_E, S_err_East_Req_W, S_err_East_grant_W,
S_err_West_Req_S, S_err_West_grant_S, S_err_South_Req_L, S_err_South_grant_L, S_err_Local_Req_N, S_err_Local_grant_N,
S_err_IDLE_Req_W, S_err_IDLE_grant_W, S_err_North_Req_W, S_err_North_grant_W, S_err_East_Req_S, S_err_East_grant_S,
S_err_West_Req_L, S_err_West_grant_L, S_err_South_Req_N, S_err_South_grant_N, S_err_Local_Req_E, S_err_Local_grant_E,
S_err_IDLE_Req_S, S_err_IDLE_grant_S, S_err_North_Req_S, S_err_North_grant_S, S_err_East_Req_L, S_err_East_grant_L,
S_err_West_Req_N, S_err_West_grant_N, S_err_South_Req_E, S_err_South_grant_E, S_err_Local_Req_W, S_err_Local_grant_W,
S_err_IDLE_Req_L, S_err_IDLE_grant_L, S_err_North_Req_L, S_err_North_grant_L, S_err_East_Req_N, S_err_East_grant_N,
S_err_West_Req_E, S_err_West_grant_E, S_err_South_Req_W, S_err_South_grant_W, S_err_Local_Req_S, S_err_Local_grant_S,
S_err_state_in_onehot, S_err_no_request_grants, S_err_request_no_grants,
S_err_no_Req_N_grant_N, S_err_no_Req_E_grant_E, S_err_no_Req_W_grant_W, S_err_no_Req_S_grant_S, S_err_no_Req_L_grant_L,
-- Local Arbiter_in checker outputs
L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N, L_err_IDLE_grant_N,L_err_North_Req_N, L_err_North_grant_N, L_err_East_Req_E, L_err_East_grant_E,
L_err_West_Req_W, L_err_West_grant_W, L_err_South_Req_S,L_err_South_grant_S,L_err_Local_Req_L, L_err_Local_grant_L,
L_err_IDLE_Req_E, L_err_IDLE_grant_E, L_err_North_Req_E, L_err_North_grant_E, L_err_East_Req_W, L_err_East_grant_W,
L_err_West_Req_S, L_err_West_grant_S, L_err_South_Req_L, L_err_South_grant_L, L_err_Local_Req_N, L_err_Local_grant_N,
L_err_IDLE_Req_W, L_err_IDLE_grant_W, L_err_North_Req_W, L_err_North_grant_W, L_err_East_Req_S, L_err_East_grant_S,
L_err_West_Req_L, L_err_West_grant_L, L_err_South_Req_N, L_err_South_grant_N, L_err_Local_Req_E, L_err_Local_grant_E,
L_err_IDLE_Req_S, L_err_IDLE_grant_S, L_err_North_Req_S, L_err_North_grant_S, L_err_East_Req_L, L_err_East_grant_L,
L_err_West_Req_N, L_err_West_grant_N, L_err_South_Req_E, L_err_South_grant_E, L_err_Local_Req_W, L_err_Local_grant_W,
L_err_IDLE_Req_L, L_err_IDLE_grant_L, L_err_North_Req_L, L_err_North_grant_L, L_err_East_Req_N, L_err_East_grant_N,
L_err_West_Req_E, L_err_West_grant_E, L_err_South_Req_W, L_err_South_grant_W, L_err_Local_Req_S, L_err_Local_grant_S,
L_err_state_in_onehot, L_err_no_request_grants, L_err_request_no_grants,
L_err_no_Req_N_grant_N, L_err_no_Req_E_grant_E, L_err_no_Req_W_grant_W, L_err_no_Req_S_grant_S, L_err_no_Req_L_grant_L,
-- Arbiter_out checker outputs
-- North Arbiter_out checker outputs
N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N,
N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E, N_err_North_req_X_E, N_err_East_req_X_W, N_err_West_req_X_S, N_err_South_req_X_L, N_err_Local_req_X_N,
N_err_IDLE_req_X_W, N_err_North_req_X_W, N_err_East_req_X_S, N_err_West_req_X_L, N_err_South_req_X_N, N_err_Local_req_X_E,
N_err_IDLE_req_X_S, N_err_North_req_X_S, N_err_East_req_X_L, N_err_West_req_X_N, N_err_South_req_X_E, N_err_Local_req_X_W,
N_err_IDLE_req_X_L, N_err_North_req_X_L, N_err_East_req_X_N, N_err_West_req_X_E, N_err_South_req_X_W, N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants, N_err_state_North_Invalid_Grant,N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant, N_err_state_South_Invalid_Grant,N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N,
E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E, E_err_North_req_X_E, E_err_East_req_X_W, E_err_West_req_X_S, E_err_South_req_X_L, E_err_Local_req_X_N,
E_err_IDLE_req_X_W, E_err_North_req_X_W, E_err_East_req_X_S, E_err_West_req_X_L, E_err_South_req_X_N, E_err_Local_req_X_E,
E_err_IDLE_req_X_S, E_err_North_req_X_S, E_err_East_req_X_L, E_err_West_req_X_N, E_err_South_req_X_E, E_err_Local_req_X_W,
E_err_IDLE_req_X_L, E_err_North_req_X_L, E_err_East_req_X_N, E_err_West_req_X_E, E_err_South_req_X_W, E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot, E_arbiter_out_err_no_request_grants, E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants, E_err_state_North_Invalid_Grant, E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant, E_err_state_South_Invalid_Grant, E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N,
W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E, W_err_North_req_X_E, W_err_East_req_X_W, W_err_West_req_X_S, W_err_South_req_X_L, W_err_Local_req_X_N,
W_err_IDLE_req_X_W, W_err_North_req_X_W, W_err_East_req_X_S, W_err_West_req_X_L, W_err_South_req_X_N, W_err_Local_req_X_E,
W_err_IDLE_req_X_S, W_err_North_req_X_S, W_err_East_req_X_L, W_err_West_req_X_N, W_err_South_req_X_E, W_err_Local_req_X_W,
W_err_IDLE_req_X_L, W_err_North_req_X_L, W_err_East_req_X_N, W_err_West_req_X_E, W_err_South_req_X_W, W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot, W_arbiter_out_err_no_request_grants, W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants, W_err_state_North_Invalid_Grant,W_err_state_East_Invalid_Grant, W_err_state_West_Invalid_Grant,
W_err_state_South_Invalid_Grant,W_err_state_Local_Invalid_Grant,W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N,
S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E, S_err_North_req_X_E, S_err_East_req_X_W, S_err_West_req_X_S, S_err_South_req_X_L, S_err_Local_req_X_N,
S_err_IDLE_req_X_W, S_err_North_req_X_W, S_err_East_req_X_S, S_err_West_req_X_L, S_err_South_req_X_N, S_err_Local_req_X_E,
S_err_IDLE_req_X_S, S_err_North_req_X_S, S_err_East_req_X_L, S_err_West_req_X_N, S_err_South_req_X_E, S_err_Local_req_X_W,
S_err_IDLE_req_X_L, S_err_North_req_X_L, S_err_East_req_X_N, S_err_West_req_X_E, S_err_South_req_X_W, S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot, S_arbiter_out_err_no_request_grants, S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants, S_err_state_North_Invalid_Grant,S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant, S_err_state_South_Invalid_Grant,S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N,
L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E, L_err_North_req_X_E, L_err_East_req_X_W, L_err_West_req_X_S, L_err_South_req_X_L, L_err_Local_req_X_N,
L_err_IDLE_req_X_W, L_err_North_req_X_W, L_err_East_req_X_S, L_err_West_req_X_L, L_err_South_req_X_N, L_err_Local_req_X_E,
L_err_IDLE_req_X_S, L_err_North_req_X_S, L_err_East_req_X_L, L_err_West_req_X_N, L_err_South_req_X_E, L_err_Local_req_X_W,
L_err_IDLE_req_X_L, L_err_North_req_X_L, L_err_East_req_X_N, L_err_West_req_X_E, L_err_South_req_X_W, L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot, L_arbiter_out_err_no_request_grants, L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants,
L_err_state_North_Invalid_Grant,
L_err_state_East_Invalid_Grant,
L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant,
L_err_state_Local_Invalid_Grant,
L_err_Grants_onehot_or_all_zero : out std_logic
);
end COMPONENT;
COMPONENT LBDR_packet_drop is
generic (
cur_addr_rst: integer := 8;
Cx_rst: integer := 8;
NoC_size: integer := 4
);
port ( reset: in std_logic;
clk: in std_logic;
Rxy_reconf: in std_logic_vector(7 downto 0);
Reconfig : in std_logic;
Faulty_C_N, Faulty_C_E, Faulty_C_W, Faulty_C_S: in std_logic;
empty: in std_logic;
flit_type: in std_logic_vector(2 downto 0);
dst_addr: in std_logic_vector(NoC_size-1 downto 0);
packet_drop_order: out std_logic;
grant_N, grant_E, grant_W, grant_S, grant_L: in std_logic;
Req_N, Req_E, Req_W, Req_S, Req_L:out std_logic;
-- Checker outputs
-- Routing part checkers
err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot,
err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order,
-- Cx_Reconf checkers
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
-- Rxy_Reconf checkers
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal : out std_logic
);
end COMPONENT;
COMPONENT XBAR is
generic (
DATA_WIDTH: integer := 32
);
port (
North_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
East_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
West_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
South_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
Local_in: in std_logic_vector(DATA_WIDTH-1 downto 0);
sel: in std_logic_vector (4 downto 0);
Data_out: out std_logic_vector(DATA_WIDTH-1 downto 0)
);
end COMPONENT;
signal FIFO_D_out_N, FIFO_D_out_E, FIFO_D_out_W, FIFO_D_out_S, FIFO_D_out_L: std_logic_vector(DATA_WIDTH-1 downto 0);
-- Grant_XY : Grant signal generated from Arbiter for output X connected to FIFO of input Y
signal Grant_NN, Grant_NE, Grant_NW, Grant_NS, Grant_NL: std_logic;
signal Grant_EN, Grant_EE, Grant_EW, Grant_ES, Grant_EL: std_logic;
signal Grant_WN, Grant_WE, Grant_WW, Grant_WS, Grant_WL: std_logic;
signal Grant_SN, Grant_SE, Grant_SW, Grant_SS, Grant_SL: std_logic;
signal Grant_LN, Grant_LE, Grant_LW, Grant_LS, Grant_LL: std_logic;
signal Req_NN, Req_EN, Req_WN, Req_SN, Req_LN: std_logic;
signal Req_NE, Req_EE, Req_WE, Req_SE, Req_LE: std_logic;
signal Req_NW, Req_EW, Req_WW, Req_SW, Req_LW: std_logic;
signal Req_NS, Req_ES, Req_WS, Req_SS, Req_LS: std_logic;
signal Req_NL, Req_EL, Req_WL, Req_SL, Req_LL: std_logic;
signal empty_N, empty_E, empty_W, empty_S, empty_L: std_logic;
signal Xbar_sel: array (4 downto 0) of std_logic_vector(4 downto 0);
signal Xbar_sel_N, Xbar_sel_E, Xbar_sel_W, Xbar_sel_S, Xbar_sel_L: std_logic_vector(4 downto 0);
signal faulty_packet_N, faulty_packet_E, faulty_packet_W, faulty_packet_S, faulty_packet_L: std_logic;
signal healthy_packet_N, healthy_packet_E, healthy_packet_W, healthy_packet_S, healthy_packet_L: std_logic;
signal packet_drop_order_N, packet_drop_order_E, packet_drop_order_W, packet_drop_order_S, packet_drop_order_L: std_logic;
signal healthy_link_N, healthy_link_E, healthy_link_W, healthy_link_S, healthy_link_L: std_logic;
signal sig_Faulty_N_out, sig_Faulty_E_out, sig_Faulty_W_out, sig_Faulty_S_out, faulty_link_L: std_logic;
signal intermittent_link_N, intermittent_link_E, intermittent_link_W, intermittent_link_S, intermittent_link_L: std_logic;
-- Signals needed for control part checkers
-- Signals needed for LBDR packet drop checkers
-- North
signal N_err_header_empty_Requests_FF_Requests_in,
N_err_tail_Requests_in_all_zero,
N_err_tail_empty_Requests_FF_Requests_in,
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
N_err_grants_onehot,
N_err_grants_mismatch,
N_err_header_tail_Requests_FF_Requests_in,
N_err_dst_addr_cur_addr_N1,
N_err_dst_addr_cur_addr_not_N1,
N_err_dst_addr_cur_addr_E1,
N_err_dst_addr_cur_addr_not_E1,
N_err_dst_addr_cur_addr_W1,
N_err_dst_addr_cur_addr_not_W1,
N_err_dst_addr_cur_addr_S1,
N_err_dst_addr_cur_addr_not_S1,
N_err_dst_addr_cur_addr_not_Req_L_in,
N_err_dst_addr_cur_addr_Req_L_in,
N_err_header_not_empty_Req_N_in,
N_err_header_not_empty_Req_E_in,
N_err_header_not_empty_Req_W_in,
N_err_header_not_empty_Req_S_in,
N_err_header_not_empty_packet_drop_in,
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
N_err_header_empty_packet_drop_in_packet_drop_equal,
N_err_tail_not_empty_packet_drop_not_packet_drop_in,
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
N_err_packet_drop_order,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- East
signal E_err_header_empty_Requests_FF_Requests_in,
E_err_tail_Requests_in_all_zero,
E_err_tail_empty_Requests_FF_Requests_in,
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
E_err_grants_onehot,
E_err_grants_mismatch,
E_err_header_tail_Requests_FF_Requests_in,
E_err_dst_addr_cur_addr_N1,
E_err_dst_addr_cur_addr_not_N1,
E_err_dst_addr_cur_addr_E1,
E_err_dst_addr_cur_addr_not_E1,
E_err_dst_addr_cur_addr_W1,
E_err_dst_addr_cur_addr_not_W1,
E_err_dst_addr_cur_addr_S1,
E_err_dst_addr_cur_addr_not_S1,
E_err_dst_addr_cur_addr_not_Req_L_in,
E_err_dst_addr_cur_addr_Req_L_in,
E_err_header_not_empty_Req_N_in,
E_err_header_not_empty_Req_E_in,
E_err_header_not_empty_Req_W_in,
E_err_header_not_empty_Req_S_in,
E_err_header_not_empty_packet_drop_in,
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
E_err_header_empty_packet_drop_in_packet_drop_equal,
E_err_tail_not_empty_packet_drop_not_packet_drop_in,
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
E_err_packet_drop_order,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- West
signal W_err_header_empty_Requests_FF_Requests_in,
W_err_tail_Requests_in_all_zero,
W_err_tail_empty_Requests_FF_Requests_in,
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
W_err_grants_onehot,
W_err_grants_mismatch,
W_err_header_tail_Requests_FF_Requests_in,
W_err_dst_addr_cur_addr_N1,
W_err_dst_addr_cur_addr_not_N1,
W_err_dst_addr_cur_addr_E1,
W_err_dst_addr_cur_addr_not_E1,
W_err_dst_addr_cur_addr_W1,
W_err_dst_addr_cur_addr_not_W1,
W_err_dst_addr_cur_addr_S1,
W_err_dst_addr_cur_addr_not_S1,
W_err_dst_addr_cur_addr_not_Req_L_in,
W_err_dst_addr_cur_addr_Req_L_in,
W_err_header_not_empty_Req_N_in,
W_err_header_not_empty_Req_E_in,
W_err_header_not_empty_Req_W_in,
W_err_header_not_empty_Req_S_in,
W_err_header_not_empty_packet_drop_in,
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
W_err_header_empty_packet_drop_in_packet_drop_equal,
W_err_tail_not_empty_packet_drop_not_packet_drop_in,
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
W_err_packet_drop_order,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- South
signal S_err_header_empty_Requests_FF_Requests_in,
S_err_tail_Requests_in_all_zero,
S_err_tail_empty_Requests_FF_Requests_in,
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
S_err_grants_onehot,
S_err_grants_mismatch,
S_err_header_tail_Requests_FF_Requests_in,
S_err_dst_addr_cur_addr_N1,
S_err_dst_addr_cur_addr_not_N1,
S_err_dst_addr_cur_addr_E1,
S_err_dst_addr_cur_addr_not_E1,
S_err_dst_addr_cur_addr_W1,
S_err_dst_addr_cur_addr_not_W1,
S_err_dst_addr_cur_addr_S1,
S_err_dst_addr_cur_addr_not_S1,
S_err_dst_addr_cur_addr_not_Req_L_in,
S_err_dst_addr_cur_addr_Req_L_in,
S_err_header_not_empty_Req_N_in,
S_err_header_not_empty_Req_E_in,
S_err_header_not_empty_Req_W_in,
S_err_header_not_empty_Req_S_in,
S_err_header_not_empty_packet_drop_in,
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
S_err_header_empty_packet_drop_in_packet_drop_equal,
S_err_tail_not_empty_packet_drop_not_packet_drop_in,
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
S_err_packet_drop_order,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
-- Local
signal L_err_header_empty_Requests_FF_Requests_in,
L_err_tail_Requests_in_all_zero,
L_err_tail_empty_Requests_FF_Requests_in,
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
L_err_grants_onehot,
L_err_grants_mismatch,
L_err_header_tail_Requests_FF_Requests_in,
L_err_dst_addr_cur_addr_N1,
L_err_dst_addr_cur_addr_not_N1,
L_err_dst_addr_cur_addr_E1,
L_err_dst_addr_cur_addr_not_E1,
L_err_dst_addr_cur_addr_W1,
L_err_dst_addr_cur_addr_not_W1,
L_err_dst_addr_cur_addr_S1,
L_err_dst_addr_cur_addr_not_S1,
L_err_dst_addr_cur_addr_not_Req_L_in,
L_err_dst_addr_cur_addr_Req_L_in,
L_err_header_not_empty_Req_N_in,
L_err_header_not_empty_Req_E_in,
L_err_header_not_empty_Req_W_in,
L_err_header_not_empty_Req_S_in,
L_err_header_not_empty_packet_drop_in,
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
L_err_header_empty_packet_drop_in_packet_drop_equal,
L_err_tail_not_empty_packet_drop_not_packet_drop_in,
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
L_err_packet_drop_order,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal: std_logic;
------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------
-- Signals needed for FIFO packet drop with fault classifier support checkers
-- North
-- Functional checkers
signal N_err_empty_full,
N_err_empty_read_en,
N_err_full_write_en,
N_err_state_in_onehot,
N_err_read_pointer_in_onehot,
N_err_write_pointer_in_onehot,
-- Structural checkers
N_err_write_en_write_pointer,
N_err_not_write_en_write_pointer,
N_err_read_pointer_write_pointer_not_empty,
N_err_read_pointer_write_pointer_empty,
N_err_read_pointer_write_pointer_not_full,
N_err_read_pointer_write_pointer_full,
N_err_read_pointer_increment,
N_err_read_pointer_not_increment,
N_err_write_en,
N_err_not_write_en,
N_err_not_write_en1,
N_err_not_write_en2,
N_err_read_en_mismatch,
N_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
N_err_fake_credit_read_en_fake_credit_counter_in_increment,
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
N_err_fake_credit_read_en_credit_out,
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
N_err_state_out_Idle_not_fault_out_not_fake_credit,
N_err_state_out_Idle_not_fault_out_not_fault_info,
N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
N_err_state_out_Idle_fault_out_fake_credit,
N_err_state_out_Idle_fault_out_state_in_Packet_drop,
N_err_state_out_Idle_fault_out_fault_info,
N_err_state_out_Idle_fault_out_faulty_packet_in,
N_err_state_out_Idle_not_health_info,
N_err_state_out_Idle_not_write_fake_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Header_flit_valid_in_fault_out_fault_info,
N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Header_flit_not_valid_in_not_fault_info,
N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
N_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
N_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Body_flit_valid_in_fault_out_fault_info,
N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Body_flit_not_valid_in_not_fault_info,
N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
N_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
N_err_state_out_Body_flit_valid_in_not_health_info,
N_err_state_out_Body_flit_not_fake_credit,
N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
N_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
N_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
N_err_state_out_Tail_flit_not_valid_in_not_fault_info,
N_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
N_err_state_out_Tail_flit_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
N_err_state_out_Packet_drop_not_fault_info,
N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- East
-- Functional checkers
signal E_err_empty_full,
E_err_empty_read_en,
E_err_full_write_en,
E_err_state_in_onehot,
E_err_read_pointer_in_onehot,
E_err_write_pointer_in_onehot,
-- Structural checkers
E_err_write_en_write_pointer,
E_err_not_write_en_write_pointer,
E_err_read_pointer_write_pointer_not_empty,
E_err_read_pointer_write_pointer_empty,
E_err_read_pointer_write_pointer_not_full,
E_err_read_pointer_write_pointer_full,
E_err_read_pointer_increment,
E_err_read_pointer_not_increment,
E_err_write_en,
E_err_not_write_en,
E_err_not_write_en1,
E_err_not_write_en2,
E_err_read_en_mismatch,
E_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
E_err_fake_credit_read_en_fake_credit_counter_in_increment,
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
E_err_fake_credit_read_en_credit_out,
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
E_err_state_out_Idle_not_fault_out_not_fake_credit,
E_err_state_out_Idle_not_fault_out_not_fault_info,
E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
E_err_state_out_Idle_fault_out_fake_credit,
E_err_state_out_Idle_fault_out_state_in_Packet_drop,
E_err_state_out_Idle_fault_out_fault_info,
E_err_state_out_Idle_fault_out_faulty_packet_in,
E_err_state_out_Idle_not_health_info,
E_err_state_out_Idle_not_write_fake_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Header_flit_valid_in_fault_out_fault_info,
E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Header_flit_not_valid_in_not_fault_info,
E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
E_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
E_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Body_flit_valid_in_fault_out_fault_info,
E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Body_flit_not_valid_in_not_fault_info,
E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
E_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
E_err_state_out_Body_flit_valid_in_not_health_info,
E_err_state_out_Body_flit_not_fake_credit,
E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
E_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
E_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
E_err_state_out_Tail_flit_not_valid_in_not_fault_info,
E_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
E_err_state_out_Tail_flit_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
E_err_state_out_Packet_drop_not_fault_info,
E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- West
-- Functional checkers
signal W_err_empty_full, W_err_empty_read_en, W_err_full_write_en, W_err_state_in_onehot,
W_err_read_pointer_in_onehot, W_err_write_pointer_in_onehot,
-- Structural checkers
W_err_write_en_write_pointer,
W_err_not_write_en_write_pointer,
W_err_read_pointer_write_pointer_not_empty,
W_err_read_pointer_write_pointer_empty,
W_err_read_pointer_write_pointer_not_full,
W_err_read_pointer_write_pointer_full,
W_err_read_pointer_increment,
W_err_read_pointer_not_increment,
W_err_write_en,
W_err_not_write_en,
W_err_not_write_en1,
W_err_not_write_en2,
W_err_read_en_mismatch,
W_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
W_err_fake_credit_read_en_fake_credit_counter_in_increment,
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
W_err_fake_credit_read_en_credit_out,
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
W_err_state_out_Idle_not_fault_out_not_fake_credit,
W_err_state_out_Idle_not_fault_out_not_fault_info,
W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
W_err_state_out_Idle_fault_out_fake_credit,
W_err_state_out_Idle_fault_out_state_in_Packet_drop,
W_err_state_out_Idle_fault_out_fault_info,
W_err_state_out_Idle_fault_out_faulty_packet_in,
W_err_state_out_Idle_not_health_info,
W_err_state_out_Idle_not_write_fake_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Header_flit_valid_in_fault_out_fault_info,
W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Header_flit_not_valid_in_not_fault_info,
W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
W_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
W_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Body_flit_valid_in_fault_out_fault_info,
W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Body_flit_not_valid_in_not_fault_info,
W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
W_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
W_err_state_out_Body_flit_valid_in_not_health_info,
W_err_state_out_Body_flit_not_fake_credit,
W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
W_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
W_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
W_err_state_out_Tail_flit_not_valid_in_not_fault_info,
W_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
W_err_state_out_Tail_flit_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
W_err_state_out_Packet_drop_not_fault_info,
W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- South
-- Functional checkers
signal S_err_empty_full, S_err_empty_read_en, S_err_full_write_en,
S_err_state_in_onehot, S_err_read_pointer_in_onehot, S_err_write_pointer_in_onehot,
-- Structural checkers
S_err_write_en_write_pointer,
S_err_not_write_en_write_pointer,
S_err_read_pointer_write_pointer_not_empty,
S_err_read_pointer_write_pointer_empty,
S_err_read_pointer_write_pointer_not_full,
S_err_read_pointer_write_pointer_full,
S_err_read_pointer_increment,
S_err_read_pointer_not_increment,
S_err_write_en,
S_err_not_write_en,
S_err_not_write_en1,
S_err_not_write_en2,
S_err_read_en_mismatch,
S_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
S_err_fake_credit_read_en_fake_credit_counter_in_increment,
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
S_err_fake_credit_read_en_credit_out,
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
S_err_state_out_Idle_not_fault_out_not_fake_credit,
S_err_state_out_Idle_not_fault_out_not_fault_info,
S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
S_err_state_out_Idle_fault_out_fake_credit,
S_err_state_out_Idle_fault_out_state_in_Packet_drop,
S_err_state_out_Idle_fault_out_fault_info,
S_err_state_out_Idle_fault_out_faulty_packet_in,
S_err_state_out_Idle_not_health_info,
S_err_state_out_Idle_not_write_fake_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Header_flit_valid_in_fault_out_fault_info,
S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Header_flit_not_valid_in_not_fault_info,
S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
S_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
S_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Body_flit_valid_in_fault_out_fault_info,
S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Body_flit_not_valid_in_not_fault_info,
S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
S_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
S_err_state_out_Body_flit_valid_in_not_health_info,
S_err_state_out_Body_flit_not_fake_credit,
S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
S_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
S_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
S_err_state_out_Tail_flit_not_valid_in_not_fault_info,
S_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
S_err_state_out_Tail_flit_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
S_err_state_out_Packet_drop_not_fault_info,
S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
-- Local
-- Functional checkers
signal L_err_empty_full,
L_err_empty_read_en,
L_err_full_write_en,
L_err_state_in_onehot,
L_err_read_pointer_in_onehot,
L_err_write_pointer_in_onehot,
-- Structural checkers
L_err_write_en_write_pointer,
L_err_not_write_en_write_pointer,
L_err_read_pointer_write_pointer_not_empty,
L_err_read_pointer_write_pointer_empty,
L_err_read_pointer_write_pointer_not_full,
L_err_read_pointer_write_pointer_full,
L_err_read_pointer_increment,
L_err_read_pointer_not_increment,
L_err_write_en,
L_err_not_write_en,
L_err_not_write_en1,
L_err_not_write_en2,
L_err_read_en_mismatch,
L_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
L_err_fake_credit_read_en_fake_credit_counter_in_increment,
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
L_err_fake_credit_read_en_credit_out,
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
L_err_state_out_Idle_not_fault_out_not_fake_credit,
L_err_state_out_Idle_not_fault_out_not_fault_info,
L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
L_err_state_out_Idle_fault_out_fake_credit,
L_err_state_out_Idle_fault_out_state_in_Packet_drop,
L_err_state_out_Idle_fault_out_fault_info,
L_err_state_out_Idle_fault_out_faulty_packet_in,
L_err_state_out_Idle_not_health_info,
L_err_state_out_Idle_not_write_fake_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Header_flit_valid_in_fault_out_fault_info,
L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Header_flit_not_valid_in_not_fault_info,
L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
L_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
L_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Body_flit_valid_in_fault_out_fault_info,
L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Body_flit_not_valid_in_not_fault_info,
L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
L_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
L_err_state_out_Body_flit_valid_in_not_health_info,
L_err_state_out_Body_flit_not_fake_credit,
L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
L_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
L_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
L_err_state_out_Tail_flit_not_valid_in_not_fault_info,
L_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
L_err_state_out_Tail_flit_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
L_err_state_out_Packet_drop_not_fault_info,
L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change : std_logic;
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------------------------------------------------------------------------------------------------------------------------
-- Signals needed for Allocator unit
-- Allocator logic checker outputs
signal err_grant_N_N_sig_not_empty_N_grant_N_N, err_not_grant_N_N_sig_or_empty_N_not_grant_N_N,
err_grant_N_E_sig_not_empty_E_grant_N_E, err_not_grant_N_E_sig_or_empty_E_not_grant_N_E,
err_grant_N_W_sig_not_empty_W_grant_N_W, err_not_grant_N_W_sig_or_empty_W_not_grant_N_W,
err_grant_N_S_sig_not_empty_S_grant_N_S, err_not_grant_N_S_sig_or_empty_S_not_grant_N_S,
err_grant_N_L_sig_not_empty_L_grant_N_L, err_not_grant_N_L_sig_or_empty_L_not_grant_N_L,
err_grant_E_N_sig_not_empty_N_grant_E_N, err_not_grant_E_N_sig_or_empty_N_not_grant_E_N,
err_grant_E_E_sig_not_empty_E_grant_E_E, err_not_grant_E_E_sig_or_empty_E_not_grant_E_E,
err_grant_E_W_sig_not_empty_W_grant_E_W, err_not_grant_E_W_sig_or_empty_W_not_grant_E_W,
err_grant_E_S_sig_not_empty_S_grant_E_S, err_not_grant_E_S_sig_or_empty_S_not_grant_E_S,
err_grant_E_L_sig_not_empty_L_grant_E_L, err_not_grant_E_L_sig_or_empty_L_not_grant_E_L,
err_grant_W_N_sig_not_empty_N_grant_W_N,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N,
err_grant_W_E_sig_not_empty_E_grant_W_E,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E,
err_grant_W_W_sig_not_empty_W_grant_W_W,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W,
err_grant_W_S_sig_not_empty_S_grant_W_S,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S,
err_grant_W_L_sig_not_empty_L_grant_W_L,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L,
err_grant_S_N_sig_not_empty_N_grant_S_N,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N,
err_grant_S_E_sig_not_empty_E_grant_S_E,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E,
err_grant_S_W_sig_not_empty_W_grant_S_W,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W,
err_grant_S_S_sig_not_empty_S_grant_S_S,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S,
err_grant_S_L_sig_not_empty_L_grant_S_L,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L,
err_grant_L_N_sig_not_empty_N_grant_L_N,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N,
err_grant_L_E_sig_not_empty_E_grant_L_E,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E,
err_grant_L_W_sig_not_empty_W_grant_L_W,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W,
err_grant_L_S_sig_not_empty_S_grant_L_S,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S,
err_grant_L_L_sig_not_empty_L_grant_L_L,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L,
err_grant_signals_not_empty_grant_N,
err_not_grant_signals_empty_not_grant_N,
err_grant_signals_not_empty_grant_E,
err_not_grant_signals_empty_not_grant_E,
err_grant_signals_not_empty_grant_W,
err_not_grant_signals_empty_not_grant_W,
err_grant_signals_not_empty_grant_S,
err_not_grant_signals_empty_not_grant_S,
err_grant_signals_not_empty_grant_L,
err_not_grant_signals_empty_not_grant_L,
err_grants_valid_not_match: std_logic;
-- Allocator credit_counter logic checker outputs
signal err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_N_credit_counter_N_out_increment,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change,
err_grant_N_credit_counter_N_out_decrement,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_E_credit_counter_E_out_increment,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change,
err_grant_E_credit_counter_E_out_decrement,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_W_credit_counter_W_out_increment,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change,
err_grant_W_credit_counter_W_out_decrement,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_S_credit_counter_S_out_increment,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change,
err_grant_S_credit_counter_S_out_decrement,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal,
err_credit_in_L_credit_counter_L_out_increment,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change,
err_grant_L_credit_counter_L_out_decrement,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal : std_logic;
---------------------------------------------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------
-- Arbiter_in Checker signals (part of allocator unit)
-- North Arbiter_in checker outputs
signal N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N, N_err_IDLE_grant_N,N_err_North_Req_N, N_err_North_grant_N, N_err_East_Req_E, N_err_East_grant_E,
N_err_West_Req_W, N_err_West_grant_W, N_err_South_Req_S,N_err_South_grant_S,N_err_Local_Req_L, N_err_Local_grant_L,
N_err_IDLE_Req_E, N_err_IDLE_grant_E, N_err_North_Req_E, N_err_North_grant_E, N_err_East_Req_W, N_err_East_grant_W,
N_err_West_Req_S, N_err_West_grant_S, N_err_South_Req_L, N_err_South_grant_L, N_err_Local_Req_N, N_err_Local_grant_N,
N_err_IDLE_Req_W, N_err_IDLE_grant_W, N_err_North_Req_W, N_err_North_grant_W, N_err_East_Req_S, N_err_East_grant_S,
N_err_West_Req_L, N_err_West_grant_L, N_err_South_Req_N, N_err_South_grant_N, N_err_Local_Req_E, N_err_Local_grant_E,
N_err_IDLE_Req_S, N_err_IDLE_grant_S, N_err_North_Req_S, N_err_North_grant_S, N_err_East_Req_L, N_err_East_grant_L,
N_err_West_Req_N, N_err_West_grant_N, N_err_South_Req_E, N_err_South_grant_E, N_err_Local_Req_W, N_err_Local_grant_W,
N_err_IDLE_Req_L, N_err_IDLE_grant_L, N_err_North_Req_L, N_err_North_grant_L, N_err_East_Req_N, N_err_East_grant_N,
N_err_West_Req_E, N_err_West_grant_E, N_err_South_Req_W, N_err_South_grant_W, N_err_Local_Req_S, N_err_Local_grant_S,
N_err_arbiter_state_in_onehot, N_err_no_request_grants, N_err_request_no_grants,
N_err_no_Req_N_grant_N, N_err_no_Req_E_grant_E, N_err_no_Req_W_grant_W, N_err_no_Req_S_grant_S, N_err_no_Req_L_grant_L,
-- East Arbiter_in checker outputs
E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N, E_err_IDLE_grant_N,E_err_North_Req_N, E_err_North_grant_N, E_err_East_Req_E, E_err_East_grant_E,
E_err_West_Req_W, E_err_West_grant_W, E_err_South_Req_S,E_err_South_grant_S,E_err_Local_Req_L, E_err_Local_grant_L,
E_err_IDLE_Req_E, E_err_IDLE_grant_E, E_err_North_Req_E, E_err_North_grant_E, E_err_East_Req_W, E_err_East_grant_W,
E_err_West_Req_S, E_err_West_grant_S, E_err_South_Req_L, E_err_South_grant_L, E_err_Local_Req_N, E_err_Local_grant_N,
E_err_IDLE_Req_W, E_err_IDLE_grant_W, E_err_North_Req_W, E_err_North_grant_W, E_err_East_Req_S, E_err_East_grant_S,
E_err_West_Req_L, E_err_West_grant_L, E_err_South_Req_N, E_err_South_grant_N, E_err_Local_Req_E, E_err_Local_grant_E,
E_err_IDLE_Req_S, E_err_IDLE_grant_S, E_err_North_Req_S, E_err_North_grant_S, E_err_East_Req_L, E_err_East_grant_L,
E_err_West_Req_N, E_err_West_grant_N, E_err_South_Req_E, E_err_South_grant_E, E_err_Local_Req_W, E_err_Local_grant_W,
E_err_IDLE_Req_L, E_err_IDLE_grant_L, E_err_North_Req_L, E_err_North_grant_L, E_err_East_Req_N, E_err_East_grant_N,
E_err_West_Req_E, E_err_West_grant_E, E_err_South_Req_W, E_err_South_grant_W, E_err_Local_Req_S, E_err_Local_grant_S,
E_err_arbiter_state_in_onehot, E_err_no_request_grants, E_err_request_no_grants,
E_err_no_Req_N_grant_N,E_err_no_Req_E_grant_E, E_err_no_Req_W_grant_W, E_err_no_Req_S_grant_S, E_err_no_Req_L_grant_L,
-- West Arbiter_in checker outputs
W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N, W_err_IDLE_grant_N,W_err_North_Req_N, W_err_North_grant_N, W_err_East_Req_E, W_err_East_grant_E,
W_err_West_Req_W, W_err_West_grant_W, W_err_South_Req_S,W_err_South_grant_S,W_err_Local_Req_L, W_err_Local_grant_L,
W_err_IDLE_Req_E, W_err_IDLE_grant_E, W_err_North_Req_E, W_err_North_grant_E, W_err_East_Req_W, W_err_East_grant_W,
W_err_West_Req_S, W_err_West_grant_S, W_err_South_Req_L, W_err_South_grant_L, W_err_Local_Req_N, W_err_Local_grant_N,
W_err_IDLE_Req_W, W_err_IDLE_grant_W, W_err_North_Req_W, W_err_North_grant_W, W_err_East_Req_S, W_err_East_grant_S,
W_err_West_Req_L, W_err_West_grant_L, W_err_South_Req_N, W_err_South_grant_N, W_err_Local_Req_E, W_err_Local_grant_E,
W_err_IDLE_Req_S, W_err_IDLE_grant_S, W_err_North_Req_S, W_err_North_grant_S, W_err_East_Req_L, W_err_East_grant_L,
W_err_West_Req_N, W_err_West_grant_N, W_err_South_Req_E, W_err_South_grant_E, W_err_Local_Req_W, W_err_Local_grant_W,
W_err_IDLE_Req_L, W_err_IDLE_grant_L, W_err_North_Req_L, W_err_North_grant_L, W_err_East_Req_N, W_err_East_grant_N,
W_err_West_Req_E, W_err_West_grant_E, W_err_South_Req_W, W_err_South_grant_W, W_err_Local_Req_S, W_err_Local_grant_S,
W_err_arbiter_state_in_onehot, W_err_no_request_grants, W_err_request_no_grants,
W_err_no_Req_N_grant_N, W_err_no_Req_E_grant_E, W_err_no_Req_W_grant_W, W_err_no_Req_S_grant_S, W_err_no_Req_L_grant_L,
-- South Arbiter_in checker outputs
S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N, S_err_IDLE_grant_N,S_err_North_Req_N, S_err_North_grant_N, S_err_East_Req_E, S_err_East_grant_E,
S_err_West_Req_W, S_err_West_grant_W, S_err_South_Req_S,S_err_South_grant_S,S_err_Local_Req_L, S_err_Local_grant_L,
S_err_IDLE_Req_E, S_err_IDLE_grant_E, S_err_North_Req_E, S_err_North_grant_E, S_err_East_Req_W, S_err_East_grant_W,
S_err_West_Req_S, S_err_West_grant_S, S_err_South_Req_L, S_err_South_grant_L, S_err_Local_Req_N, S_err_Local_grant_N,
S_err_IDLE_Req_W, S_err_IDLE_grant_W, S_err_North_Req_W, S_err_North_grant_W, S_err_East_Req_S, S_err_East_grant_S,
S_err_West_Req_L, S_err_West_grant_L, S_err_South_Req_N, S_err_South_grant_N, S_err_Local_Req_E, S_err_Local_grant_E,
S_err_IDLE_Req_S, S_err_IDLE_grant_S, S_err_North_Req_S, S_err_North_grant_S, S_err_East_Req_L, S_err_East_grant_L,
S_err_West_Req_N, S_err_West_grant_N, S_err_South_Req_E, S_err_South_grant_E, S_err_Local_Req_W, S_err_Local_grant_W,
S_err_IDLE_Req_L, S_err_IDLE_grant_L, S_err_North_Req_L, S_err_North_grant_L, S_err_East_Req_N, S_err_East_grant_N,
S_err_West_Req_E, S_err_West_grant_E, S_err_South_Req_W, S_err_South_grant_W, S_err_Local_Req_S, S_err_Local_grant_S,
S_err_arbiter_state_in_onehot, S_err_no_request_grants, S_err_request_no_grants,
S_err_no_Req_N_grant_N, S_err_no_Req_E_grant_E, S_err_no_Req_W_grant_W, S_err_no_Req_S_grant_S, S_err_no_Req_L_grant_L,
-- Local Arbiter_in checker outputs
L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N, L_err_IDLE_grant_N,L_err_North_Req_N, L_err_North_grant_N, L_err_East_Req_E, L_err_East_grant_E,
L_err_West_Req_W, L_err_West_grant_W, L_err_South_Req_S,L_err_South_grant_S,L_err_Local_Req_L, L_err_Local_grant_L,
L_err_IDLE_Req_E, L_err_IDLE_grant_E, L_err_North_Req_E, L_err_North_grant_E, L_err_East_Req_W, L_err_East_grant_W,
L_err_West_Req_S, L_err_West_grant_S, L_err_South_Req_L, L_err_South_grant_L, L_err_Local_Req_N, L_err_Local_grant_N,
L_err_IDLE_Req_W, L_err_IDLE_grant_W, L_err_North_Req_W, L_err_North_grant_W, L_err_East_Req_S, L_err_East_grant_S,
L_err_West_Req_L, L_err_West_grant_L, L_err_South_Req_N, L_err_South_grant_N, L_err_Local_Req_E, L_err_Local_grant_E,
L_err_IDLE_Req_S, L_err_IDLE_grant_S, L_err_North_Req_S, L_err_North_grant_S, L_err_East_Req_L, L_err_East_grant_L,
L_err_West_Req_N, L_err_West_grant_N, L_err_South_Req_E, L_err_South_grant_E, L_err_Local_Req_W, L_err_Local_grant_W,
L_err_IDLE_Req_L, L_err_IDLE_grant_L, L_err_North_Req_L, L_err_North_grant_L, L_err_East_Req_N, L_err_East_grant_N,
L_err_West_Req_E, L_err_West_grant_E, L_err_South_Req_W, L_err_South_grant_W, L_err_Local_Req_S, L_err_Local_grant_S,
L_err_arbiter_state_in_onehot,
L_err_no_request_grants,
L_err_request_no_grants,
L_err_no_Req_N_grant_N,
L_err_no_Req_E_grant_E,
L_err_no_Req_W_grant_W,
L_err_no_Req_S_grant_S,
L_err_no_Req_L_grant_L : std_logic;
---------------------------------------------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------
-- Arbiter_out Checker signals (part of allocator unit)
-- North Arbiter_out checker outputs
signal N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N,
N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E, N_err_North_req_X_E, N_err_East_req_X_W, N_err_West_req_X_S, N_err_South_req_X_L, N_err_Local_req_X_N,
N_err_IDLE_req_X_W, N_err_North_req_X_W, N_err_East_req_X_S, N_err_West_req_X_L, N_err_South_req_X_N, N_err_Local_req_X_E,
N_err_IDLE_req_X_S, N_err_North_req_X_S, N_err_East_req_X_L, N_err_West_req_X_N, N_err_South_req_X_E, N_err_Local_req_X_W,
N_err_IDLE_req_X_L, N_err_North_req_X_L, N_err_East_req_X_N, N_err_West_req_X_E, N_err_South_req_X_W, N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants, N_err_state_North_Invalid_Grant,N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant, N_err_state_South_Invalid_Grant,N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N,
E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E, E_err_North_req_X_E, E_err_East_req_X_W, E_err_West_req_X_S, E_err_South_req_X_L, E_err_Local_req_X_N,
E_err_IDLE_req_X_W, E_err_North_req_X_W, E_err_East_req_X_S, E_err_West_req_X_L, E_err_South_req_X_N, E_err_Local_req_X_E,
E_err_IDLE_req_X_S, E_err_North_req_X_S, E_err_East_req_X_L, E_err_West_req_X_N, E_err_South_req_X_E, E_err_Local_req_X_W,
E_err_IDLE_req_X_L, E_err_North_req_X_L, E_err_East_req_X_N, E_err_West_req_X_E, E_err_South_req_X_W, E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot, E_arbiter_out_err_no_request_grants, E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants, E_err_state_North_Invalid_Grant,E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant, E_err_state_South_Invalid_Grant,E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N,
W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E, W_err_North_req_X_E, W_err_East_req_X_W, W_err_West_req_X_S, W_err_South_req_X_L, W_err_Local_req_X_N,
W_err_IDLE_req_X_W, W_err_North_req_X_W, W_err_East_req_X_S, W_err_West_req_X_L, W_err_South_req_X_N, W_err_Local_req_X_E,
W_err_IDLE_req_X_S, W_err_North_req_X_S, W_err_East_req_X_L, W_err_West_req_X_N, W_err_South_req_X_E, W_err_Local_req_X_W,
W_err_IDLE_req_X_L, W_err_North_req_X_L, W_err_East_req_X_N, W_err_West_req_X_E, W_err_South_req_X_W, W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot, W_arbiter_out_err_no_request_grants, W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants, W_err_state_North_Invalid_Grant,W_err_state_East_Invalid_Grant, W_err_state_West_Invalid_Grant, W_err_state_South_Invalid_Grant,W_err_state_Local_Invalid_Grant,W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N,
S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E, S_err_North_req_X_E, S_err_East_req_X_W, S_err_West_req_X_S, S_err_South_req_X_L, S_err_Local_req_X_N,
S_err_IDLE_req_X_W, S_err_North_req_X_W, S_err_East_req_X_S, S_err_West_req_X_L, S_err_South_req_X_N, S_err_Local_req_X_E,
S_err_IDLE_req_X_S, S_err_North_req_X_S, S_err_East_req_X_L, S_err_West_req_X_N, S_err_South_req_X_E, S_err_Local_req_X_W,
S_err_IDLE_req_X_L, S_err_North_req_X_L, S_err_East_req_X_N, S_err_West_req_X_E, S_err_South_req_X_W, S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot,
S_arbiter_out_err_no_request_grants,
S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants,
S_err_state_North_Invalid_Grant,
S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant,
S_err_state_South_Invalid_Grant,
S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N,
L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E, L_err_North_req_X_E, L_err_East_req_X_W, L_err_West_req_X_S, L_err_South_req_X_L, L_err_Local_req_X_N,
L_err_IDLE_req_X_W, L_err_North_req_X_W, L_err_East_req_X_S, L_err_West_req_X_L, L_err_South_req_X_N, L_err_Local_req_X_E,
L_err_IDLE_req_X_S, L_err_North_req_X_S, L_err_East_req_X_L, L_err_West_req_X_N, L_err_South_req_X_E, L_err_Local_req_X_W,
L_err_IDLE_req_X_L, L_err_North_req_X_L, L_err_East_req_X_N, L_err_West_req_X_E, L_err_South_req_X_W, L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot, L_arbiter_out_err_no_request_grants, L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants, L_err_state_North_Invalid_Grant,L_err_state_East_Invalid_Grant, L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant,L_err_state_Local_Invalid_Grant,L_err_Grants_onehot_or_all_zero : std_logic;
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-- Signals needed for grouping checkers to model turn/path faults
signal N_FIFO_checkers_ORed, E_FIFO_checkers_ORed, W_FIFO_checkers_ORed, S_FIFO_checkers_ORed, L_FIFO_checkers_ORed : std_logic;
signal N2E_turn_fault, N2W_turn_fault, E2N_turn_fault, E2S_turn_fault, W2N_turn_fault, W2S_turn_fault, S2E_turn_fault, S2W_turn_fault : std_logic;
signal N2S_path_fault, S2N_path_fault, E2W_path_fault, W2E_path_fault : std_logic;
signal L2N_fault, L2E_fault, L2W_fault, L2S_fault, N2L_fault, E2L_fault, W2L_fault, S2L_fault : std_logic;
begin
-- FIFO contributes to all turns and paths, therefore, for each turn or path (for the input direction), all the outputs of FIFO checkers
-- corresponding to that input are ORed together.
-- Functional checkers
N_FIFO_checkers_ORed <= N_err_empty_full or
N_err_empty_read_en or
N_err_full_write_en or
N_err_state_in_onehot or
N_err_read_pointer_in_onehot or
N_err_write_pointer_in_onehot or
-- Structural checkers
N_err_write_en_write_pointer or
N_err_not_write_en_write_pointer or
N_err_read_pointer_write_pointer_not_empty or
N_err_read_pointer_write_pointer_empty or
N_err_read_pointer_write_pointer_not_full or
N_err_read_pointer_write_pointer_full or
N_err_read_pointer_increment or
N_err_read_pointer_not_increment or
N_err_write_en or
N_err_not_write_en or
N_err_not_write_en1 or
N_err_not_write_en2 or
N_err_read_en_mismatch or
N_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
N_err_fake_credit_read_en_fake_credit_counter_in_increment or
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
N_err_fake_credit_read_en_credit_out or
N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
N_err_state_out_Idle_not_fault_out_not_fake_credit or
N_err_state_out_Idle_not_fault_out_not_fault_info or
N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
N_err_state_out_Idle_fault_out_fake_credit or
N_err_state_out_Idle_fault_out_state_in_Packet_drop or
N_err_state_out_Idle_fault_out_fault_info or
N_err_state_out_Idle_fault_out_faulty_packet_in or
N_err_state_out_Idle_not_health_info or
N_err_state_out_Idle_not_write_fake_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Header_flit_valid_in_fault_out_fault_info or
N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Header_flit_not_valid_in_not_fault_info or
N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
N_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
N_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Body_flit_valid_in_fault_out_fault_info or
N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Body_flit_not_valid_in_not_fault_info or
N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
N_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
N_err_state_out_Body_flit_valid_in_not_health_info or
N_err_state_out_Body_flit_not_fake_credit or
N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
N_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
N_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
N_err_state_out_Tail_flit_not_valid_in_not_fault_info or
N_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
N_err_state_out_Tail_flit_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
N_err_state_out_Packet_drop_not_fault_info or
N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
E_FIFO_checkers_ORed <= E_err_empty_full or
E_err_empty_read_en or
E_err_full_write_en or
E_err_state_in_onehot or
E_err_read_pointer_in_onehot or
E_err_write_pointer_in_onehot or
-- Structural checkers
E_err_write_en_write_pointer or
E_err_not_write_en_write_pointer or
E_err_read_pointer_write_pointer_not_empty or
E_err_read_pointer_write_pointer_empty or
E_err_read_pointer_write_pointer_not_full or
E_err_read_pointer_write_pointer_full or
E_err_read_pointer_increment or
E_err_read_pointer_not_increment or
E_err_write_en or
E_err_not_write_en or
E_err_not_write_en1 or
E_err_not_write_en2 or
E_err_read_en_mismatch or
E_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
E_err_fake_credit_read_en_fake_credit_counter_in_increment or
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
E_err_fake_credit_read_en_credit_out or
E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
E_err_state_out_Idle_not_fault_out_not_fake_credit or
E_err_state_out_Idle_not_fault_out_not_fault_info or
E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
E_err_state_out_Idle_fault_out_fake_credit or
E_err_state_out_Idle_fault_out_state_in_Packet_drop or
E_err_state_out_Idle_fault_out_fault_info or
E_err_state_out_Idle_fault_out_faulty_packet_in or
E_err_state_out_Idle_not_health_info or
E_err_state_out_Idle_not_write_fake_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Header_flit_valid_in_fault_out_fault_info or
E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Header_flit_not_valid_in_not_fault_info or
E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
E_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
E_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Body_flit_valid_in_fault_out_fault_info or
E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Body_flit_not_valid_in_not_fault_info or
E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
E_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
E_err_state_out_Body_flit_valid_in_not_health_info or
E_err_state_out_Body_flit_not_fake_credit or
E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
E_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
E_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
E_err_state_out_Tail_flit_not_valid_in_not_fault_info or
E_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
E_err_state_out_Tail_flit_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
E_err_state_out_Packet_drop_not_fault_info or
E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
W_FIFO_checkers_ORed <= W_err_empty_full or
W_err_empty_read_en or
W_err_full_write_en or
W_err_state_in_onehot or
W_err_read_pointer_in_onehot or
W_err_write_pointer_in_onehot or
-- Structural checkers
W_err_write_en_write_pointer or
W_err_not_write_en_write_pointer or
W_err_read_pointer_write_pointer_not_empty or
W_err_read_pointer_write_pointer_empty or
W_err_read_pointer_write_pointer_not_full or
W_err_read_pointer_write_pointer_full or
W_err_read_pointer_increment or
W_err_read_pointer_not_increment or
W_err_write_en or
W_err_not_write_en or
W_err_not_write_en1 or
W_err_not_write_en2 or
W_err_read_en_mismatch or
W_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
W_err_fake_credit_read_en_fake_credit_counter_in_increment or
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
W_err_fake_credit_read_en_credit_out or
W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
W_err_state_out_Idle_not_fault_out_not_fake_credit or
W_err_state_out_Idle_not_fault_out_not_fault_info or
W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
W_err_state_out_Idle_fault_out_fake_credit or
W_err_state_out_Idle_fault_out_state_in_Packet_drop or
W_err_state_out_Idle_fault_out_fault_info or
W_err_state_out_Idle_fault_out_faulty_packet_in or
W_err_state_out_Idle_not_health_info or
W_err_state_out_Idle_not_write_fake_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Header_flit_valid_in_fault_out_fault_info or
W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Header_flit_not_valid_in_not_fault_info or
W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
W_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
W_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Body_flit_valid_in_fault_out_fault_info or
W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Body_flit_not_valid_in_not_fault_info or
W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
W_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
W_err_state_out_Body_flit_valid_in_not_health_info or
W_err_state_out_Body_flit_not_fake_credit or
W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
W_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
W_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
W_err_state_out_Tail_flit_not_valid_in_not_fault_info or
W_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
W_err_state_out_Tail_flit_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
W_err_state_out_Packet_drop_not_fault_info or
W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
S_FIFO_checkers_ORed <= S_err_empty_full or
S_err_empty_read_en or
S_err_full_write_en or
S_err_state_in_onehot or
S_err_read_pointer_in_onehot or
S_err_write_pointer_in_onehot or
-- Structural checkers
S_err_write_en_write_pointer or
S_err_not_write_en_write_pointer or
S_err_read_pointer_write_pointer_not_empty or
S_err_read_pointer_write_pointer_empty or
S_err_read_pointer_write_pointer_not_full or
S_err_read_pointer_write_pointer_full or
S_err_read_pointer_increment or
S_err_read_pointer_not_increment or
S_err_write_en or
S_err_not_write_en or
S_err_not_write_en1 or
S_err_not_write_en2 or
S_err_read_en_mismatch or
S_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
S_err_fake_credit_read_en_fake_credit_counter_in_increment or
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
S_err_fake_credit_read_en_credit_out or
S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
S_err_state_out_Idle_not_fault_out_not_fake_credit or
S_err_state_out_Idle_not_fault_out_not_fault_info or
S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
S_err_state_out_Idle_fault_out_fake_credit or
S_err_state_out_Idle_fault_out_state_in_Packet_drop or
S_err_state_out_Idle_fault_out_fault_info or
S_err_state_out_Idle_fault_out_faulty_packet_in or
S_err_state_out_Idle_not_health_info or
S_err_state_out_Idle_not_write_fake_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Header_flit_valid_in_fault_out_fault_info or
S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Header_flit_not_valid_in_not_fault_info or
S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
S_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
S_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Body_flit_valid_in_fault_out_fault_info or
S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Body_flit_not_valid_in_not_fault_info or
S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
S_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
S_err_state_out_Body_flit_valid_in_not_health_info or
S_err_state_out_Body_flit_not_fake_credit or
S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
S_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
S_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
S_err_state_out_Tail_flit_not_valid_in_not_fault_info or
S_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
S_err_state_out_Tail_flit_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
S_err_state_out_Packet_drop_not_fault_info or
S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Functional checkers
L_FIFO_checkers_ORed <= L_err_empty_full or
L_err_empty_read_en or
L_err_full_write_en or
L_err_state_in_onehot or
L_err_read_pointer_in_onehot or
L_err_write_pointer_in_onehot or
-- Structural checkers
L_err_write_en_write_pointer or
L_err_not_write_en_write_pointer or
L_err_read_pointer_write_pointer_not_empty or
L_err_read_pointer_write_pointer_empty or
L_err_read_pointer_write_pointer_not_full or
L_err_read_pointer_write_pointer_full or
L_err_read_pointer_increment or
L_err_read_pointer_not_increment or
L_err_write_en or
L_err_not_write_en or
L_err_not_write_en1 or
L_err_not_write_en2 or
L_err_read_en_mismatch or
L_err_read_en_mismatch1 or
-- Newly added checkers for FIFO with packet drop and fault classifier support!
L_err_fake_credit_read_en_fake_credit_counter_in_increment or
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement or
L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change or
L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change or
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change or
L_err_fake_credit_read_en_credit_out or
L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out or
L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out or
-- Checkers for Packet Dropping FSM of FIFO
L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit or
L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change or
L_err_state_out_Idle_not_fault_out_not_fake_credit or
L_err_state_out_Idle_not_fault_out_not_fault_info or
L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal or
L_err_state_out_Idle_fault_out_fake_credit or
L_err_state_out_Idle_fault_out_state_in_Packet_drop or
L_err_state_out_Idle_fault_out_fault_info or
L_err_state_out_Idle_fault_out_faulty_packet_in or
L_err_state_out_Idle_not_health_info or
L_err_state_out_Idle_not_write_fake_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit or
L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info or
L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit or
L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Header_flit_valid_in_fault_out_fault_info or
L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Header_flit_not_valid_in_not_fault_info or
L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit or
L_err_state_out_Header_flit_or_Body_flit_not_fake_credit or
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change or
L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit or
L_err_state_out_Body_flit_valid_in_not_fault_out_health_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit or
L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit or
L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Body_flit_valid_in_fault_out_fault_info or
L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Body_flit_not_valid_in_not_fault_info or
L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info or
L_err_state_out_Body_flit_valid_in_fault_out_not_health_info or
L_err_state_out_Body_flit_valid_in_not_health_info or
L_err_state_out_Body_flit_not_fake_credit or
L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit or
L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info or
L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit or
L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop or
L_err_state_out_Tail_flit_valid_in_fault_out_fault_info or
L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in or
L_err_state_out_Tail_flit_not_valid_in_state_in_Idle or
L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change or
L_err_state_out_Tail_flit_not_valid_in_not_fault_info or
L_err_state_out_Tail_flit_not_valid_in_not_fake_credit or
L_err_state_out_Tail_flit_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit or
L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change or
L_err_state_out_Packet_drop_not_fault_info or
L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit or
L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit or
L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change or
L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change;
-- Turn fault checkers
-- FIFO
N2E_turn_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_E1 or
N_err_dst_addr_cur_addr_not_E1 or
N_err_header_not_empty_Req_E_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_East_Req_E or
N_err_East_grant_E or
N_err_IDLE_Req_E or
N_err_IDLE_grant_E or
N_err_North_Req_E or
N_err_North_grant_E or
N_err_Local_Req_E or
N_err_Local_grant_E or
N_err_South_Req_E or
N_err_South_grant_E or
N_err_West_Req_E or
N_err_West_grant_E or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_IDLE_req_X_N or
E_err_North_req_X_N or
E_err_North_credit_not_zero_req_X_N_grant_N or
E_err_North_credit_zero_or_not_req_X_N_not_grant_N or
E_err_Local_req_X_N or
E_err_South_req_X_N or
E_err_West_req_X_N or
E_err_East_req_X_N or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
W_err_South_req_X_N or
W_err_West_req_X_N or
W_err_East_req_X_N or
err_grant_E_N_sig_not_empty_N_grant_E_N or
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
N2W_turn_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_W1 or
N_err_dst_addr_cur_addr_not_W1 or
N_err_header_not_empty_Req_W_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_West_Req_W or
N_err_West_grant_W or
N_err_East_Req_W or
N_err_East_grant_W or
N_err_IDLE_Req_W or
N_err_IDLE_grant_W or
N_err_North_Req_W or
N_err_North_grant_W or
N_err_Local_Req_W or
N_err_Local_grant_W or
N_err_South_Req_W or
N_err_South_grant_W or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_IDLE_req_X_N or
W_err_North_req_X_N or
W_err_North_credit_not_zero_req_X_N_grant_N or
W_err_North_credit_zero_or_not_req_X_N_not_grant_N or
W_err_Local_req_X_N or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_N_sig_not_empty_N_grant_W_N or
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
E2N_turn_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_N1 or
E_err_dst_addr_cur_addr_not_N1 or
E_err_header_not_empty_Req_N_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_IDLE_Req_N or
E_err_IDLE_grant_N or
E_err_North_Req_N or
E_err_North_grant_N or
E_err_Local_Req_N or
E_err_Local_grant_N or
E_err_South_Req_N or
E_err_South_grant_N or
E_err_West_Req_N or
E_err_West_grant_N or
E_err_East_Req_N or
E_err_East_grant_N or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_East_req_X_E or
N_err_East_credit_not_zero_req_X_E_grant_E or
N_err_East_credit_zero_or_not_req_X_E_not_grant_E or
N_err_IDLE_req_X_E or
N_err_North_req_X_E or
N_err_Local_req_X_E or
N_err_South_req_X_E or
N_err_West_req_X_E or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_Grants_onehot_or_all_zero or
err_grant_N_E_sig_not_empty_E_grant_N_E or
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
E2S_turn_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_S1 or
E_err_dst_addr_cur_addr_not_S1 or
E_err_header_not_empty_Req_S_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_South_Req_S or
E_err_South_grant_S or
E_err_West_Req_S or
E_err_West_grant_S or
E_err_East_Req_S or
E_err_East_grant_S or
E_err_IDLE_Req_S or
E_err_IDLE_grant_S or
E_err_North_Req_S or
E_err_North_grant_S or
E_err_Local_Req_S or
E_err_Local_grant_S or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_East_req_X_E or
S_err_East_credit_not_zero_req_X_E_grant_E or
S_err_East_credit_zero_or_not_req_X_E_not_grant_E or
S_err_IDLE_req_X_E or
S_err_North_req_X_E or
S_err_Local_req_X_E or
S_err_South_req_X_E or
S_err_West_req_X_E or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_E_sig_not_empty_E_grant_S_E or
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
W2N_turn_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_N1 or
W_err_dst_addr_cur_addr_not_N1 or
W_err_header_not_empty_Req_N_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_IDLE_Req_N or
W_err_IDLE_grant_N or
W_err_North_Req_N or
W_err_North_grant_N or
W_err_Local_Req_N or
W_err_Local_grant_N or
W_err_South_Req_N or
W_err_South_grant_N or
W_err_West_Req_N or
W_err_West_grant_N or
W_err_East_Req_N or
W_err_East_grant_N or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_West_req_X_W or
N_err_West_credit_not_zero_req_X_W_grant_W or
N_err_West_credit_zero_or_not_req_X_W_not_grant_W or
N_err_East_req_X_W or
N_err_IDLE_req_X_W or
N_err_North_req_X_W or
N_err_Local_req_X_W or
N_err_South_req_X_W or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_W_sig_not_empty_W_grant_N_W or
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
W2S_turn_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_S1 or
W_err_dst_addr_cur_addr_not_S1 or
W_err_header_not_empty_Req_S_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_South_Req_S or
W_err_South_grant_S or
W_err_West_Req_S or
W_err_West_grant_S or
W_err_East_Req_S or
W_err_East_grant_S or
W_err_IDLE_Req_S or
W_err_IDLE_grant_S or
W_err_North_Req_S or
W_err_North_grant_S or
W_err_Local_Req_S or
W_err_Local_grant_S or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_West_req_X_W or
S_err_West_credit_not_zero_req_X_W_grant_W or
S_err_West_credit_zero_or_not_req_X_W_not_grant_W or
S_err_East_req_X_W or
S_err_IDLE_req_X_W or
S_err_North_req_X_W or
S_err_Local_req_X_W or
S_err_South_req_X_W or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_W_sig_not_empty_W_grant_S_W or
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
S2E_turn_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_E1 or
S_err_dst_addr_cur_addr_not_E1 or
S_err_header_not_empty_Req_E_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_East_Req_E or
S_err_East_grant_E or
S_err_IDLE_Req_E or
S_err_IDLE_grant_E or
S_err_North_Req_E or
S_err_North_grant_E or
S_err_Local_Req_E or
S_err_Local_grant_E or
S_err_South_Req_E or
S_err_South_grant_E or
S_err_West_Req_E or
S_err_West_grant_E or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_South_req_X_S or
E_err_South_credit_not_zero_req_X_S_grant_S or
E_err_South_credit_zero_or_not_req_X_S_not_grant_S or
E_err_West_req_X_S or
E_err_East_req_X_S or
E_err_IDLE_req_X_S or
E_err_North_req_X_S or
E_err_Local_req_X_S or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_S_sig_not_empty_S_grant_E_S or
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_grants_valid_not_match or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
S2W_turn_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_W1 or
S_err_dst_addr_cur_addr_not_W1 or
S_err_header_not_empty_Req_W_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_West_Req_W or
S_err_West_grant_W or
S_err_East_Req_W or
S_err_East_grant_W or
S_err_IDLE_Req_W or
S_err_IDLE_grant_W or
S_err_North_Req_W or
S_err_North_grant_W or
S_err_Local_Req_W or
S_err_Local_grant_W or
S_err_South_Req_W or
S_err_South_grant_W or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_South_req_X_S or
W_err_South_credit_not_zero_req_X_S_grant_S or
W_err_South_credit_zero_or_not_req_X_S_not_grant_S or
W_err_West_req_X_S or
W_err_East_req_X_S or
W_err_IDLE_req_X_S or
W_err_North_req_X_S or
W_err_Local_req_X_S or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_S_sig_not_empty_S_grant_W_S or
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- Path faults
-- FIFO
N2S_path_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_S1 or
N_err_dst_addr_cur_addr_not_S1 or
N_err_header_not_empty_Req_S_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_South_Req_S or
N_err_South_grant_S or
N_err_West_Req_S or
N_err_West_grant_S or
N_err_East_Req_S or
N_err_East_grant_S or
N_err_IDLE_Req_S or
N_err_IDLE_grant_S or
N_err_North_Req_S or
N_err_North_grant_S or
N_err_Local_Req_S or
N_err_Local_grant_S or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_IDLE_req_X_N or
S_err_North_req_X_N or
S_err_North_credit_not_zero_req_X_N_grant_N or
S_err_North_credit_zero_or_not_req_X_N_not_grant_N or
S_err_Local_req_X_N or
S_err_South_req_X_N or
S_err_West_req_X_N or
S_err_East_req_X_N or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_N_sig_not_empty_N_grant_S_N or
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
S2N_path_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_N1 or
S_err_dst_addr_cur_addr_not_N1 or
S_err_header_not_empty_Req_N_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_IDLE_Req_N or
S_err_IDLE_grant_N or
S_err_North_Req_N or
S_err_North_grant_N or
S_err_Local_Req_N or
S_err_Local_grant_N or
S_err_South_Req_N or
S_err_South_grant_N or
S_err_West_Req_N or
S_err_West_grant_N or
S_err_East_Req_N or
S_err_East_grant_N or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_South_req_X_S or
N_err_South_credit_not_zero_req_X_S_grant_S or
N_err_South_credit_zero_or_not_req_X_S_not_grant_S or
N_err_West_req_X_S or
N_err_East_req_X_S or
N_err_IDLE_req_X_S or
N_err_North_req_X_S or
N_err_Local_req_X_S or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_S_sig_not_empty_S_grant_N_S or
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
E2W_path_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_W1 or
E_err_dst_addr_cur_addr_not_W1 or
E_err_header_not_empty_Req_W_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_West_Req_W or
E_err_West_grant_W or
E_err_East_Req_W or
E_err_East_grant_W or
E_err_IDLE_Req_W or
E_err_IDLE_grant_W or
E_err_North_Req_W or
E_err_North_grant_W or
E_err_Local_Req_W or
E_err_Local_grant_W or
E_err_South_Req_W or
E_err_South_grant_W or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_East_req_X_E or
W_err_East_credit_not_zero_req_X_E_grant_E or
W_err_East_credit_zero_or_not_req_X_E_not_grant_E or
W_err_IDLE_req_X_E or
W_err_North_req_X_E or
W_err_Local_req_X_E or
W_err_South_req_X_E or
W_err_West_req_X_E or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_E_sig_not_empty_E_grant_W_E or
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
W2E_path_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_E1 or
W_err_dst_addr_cur_addr_not_E1 or
W_err_header_not_empty_Req_E_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_East_Req_E or
W_err_East_grant_E or
W_err_IDLE_Req_E or
W_err_IDLE_grant_E or
W_err_North_Req_E or
W_err_North_grant_E or
W_err_Local_Req_E or
W_err_Local_grant_E or
W_err_South_Req_E or
W_err_South_grant_E or
W_err_West_Req_E or
W_err_West_grant_E or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_West_req_X_W or
E_err_West_credit_not_zero_req_X_W_grant_W or
E_err_West_credit_zero_or_not_req_X_W_not_grant_W or
E_err_East_req_X_W or
E_err_IDLE_req_X_W or
E_err_North_req_X_W or
E_err_Local_req_X_W or
E_err_South_req_X_W or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_W_sig_not_empty_W_grant_E_W or
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- Paths/turns from/to Local
-- FIFO
L2N_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_N1 or
L_err_dst_addr_cur_addr_not_N1 or
L_err_header_not_empty_Req_N_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_IDLE_Req_N or
L_err_IDLE_grant_N or
L_err_North_Req_N or
L_err_North_grant_N or
L_err_Local_Req_N or
L_err_Local_grant_N or
L_err_South_Req_N or
L_err_South_grant_N or
L_err_West_Req_N or
L_err_West_grant_N or
L_err_East_Req_N or
L_err_East_grant_N or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_N_grant_N or
N_arbiter_out_err_Requests_state_in_state_not_equal or
N_err_Local_req_X_L or
N_err_Local_credit_not_zero_req_X_L_grant_L or
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
N_err_South_req_X_L or
N_err_West_req_X_L or
N_err_East_req_X_L or
N_err_IDLE_req_X_L or
N_err_North_req_X_L or
N_arbiter_out_err_state_in_onehot or
N_arbiter_out_err_no_request_grants or
N_err_request_IDLE_state or
N_err_request_IDLE_not_Grants or
N_err_Grants_onehot_or_all_zero or
err_grant_N_L_sig_not_empty_L_grant_N_L or
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L or
err_grant_signals_not_empty_grant_N or
err_not_grant_signals_empty_not_grant_N or
err_grants_valid_not_match or
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal or
err_credit_in_N_credit_counter_N_out_increment or
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change or
err_grant_N_credit_counter_N_out_decrement or
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change or
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal;
-- FIFO
L2E_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_E1 or
L_err_dst_addr_cur_addr_not_E1 or
L_err_header_not_empty_Req_E_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_East_Req_E or
L_err_East_grant_E or
L_err_IDLE_Req_E or
L_err_IDLE_grant_E or
L_err_North_Req_E or
L_err_North_grant_E or
L_err_Local_Req_E or
L_err_Local_grant_E or
L_err_South_Req_E or
L_err_South_grant_E or
L_err_West_Req_E or
L_err_West_grant_E or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_E_grant_E or
E_arbiter_out_err_Requests_state_in_state_not_equal or
E_err_Local_req_X_L or
E_err_Local_credit_not_zero_req_X_L_grant_L or
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
E_err_South_req_X_L or
E_err_West_req_X_L or
E_err_East_req_X_L or
E_err_IDLE_req_X_L or
E_err_North_req_X_L or
E_arbiter_out_err_state_in_onehot or
E_arbiter_out_err_no_request_grants or
E_err_request_IDLE_state or
E_err_request_IDLE_not_Grants or
E_err_Grants_onehot_or_all_zero or
err_grant_E_L_sig_not_empty_L_grant_E_L or
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L or
err_grant_signals_not_empty_grant_E or
err_not_grant_signals_empty_not_grant_E or
err_grants_valid_not_match or
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal or
err_credit_in_E_credit_counter_E_out_increment or
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change or
err_grant_E_credit_counter_E_out_decrement or
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change or
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal;
-- FIFO
L2W_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_W1 or
L_err_dst_addr_cur_addr_not_W1 or
L_err_header_not_empty_Req_W_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_West_Req_W or
L_err_West_grant_W or
L_err_East_Req_W or
L_err_East_grant_W or
L_err_IDLE_Req_W or
L_err_IDLE_grant_W or
L_err_North_Req_W or
L_err_North_grant_W or
L_err_Local_Req_W or
L_err_Local_grant_W or
L_err_South_Req_W or
L_err_South_grant_W or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_W_grant_W or
W_arbiter_out_err_Requests_state_in_state_not_equal or
W_err_Local_req_X_L or
W_err_Local_credit_not_zero_req_X_L_grant_L or
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
W_err_South_req_X_L or
W_err_West_req_X_L or
W_err_East_req_X_L or
W_err_IDLE_req_X_L or
W_err_North_req_X_L or
W_arbiter_out_err_state_in_onehot or
W_arbiter_out_err_no_request_grants or
W_err_request_IDLE_state or
W_err_request_IDLE_not_Grants or
W_err_Grants_onehot_or_all_zero or
err_grant_W_L_sig_not_empty_L_grant_W_L or
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L or
err_grant_signals_not_empty_grant_W or
err_not_grant_signals_empty_not_grant_W or
err_grants_valid_not_match or
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal or
err_credit_in_W_credit_counter_W_out_increment or
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change or
err_grant_W_credit_counter_W_out_decrement or
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change or
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal;
-- FIFO
L2S_fault <= L_FIFO_checkers_ORed or
-- LBDR
L_err_header_empty_Requests_FF_Requests_in or
L_err_tail_Requests_in_all_zero or
L_err_tail_empty_Requests_FF_Requests_in or
L_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
L_err_grants_onehot or
L_err_grants_mismatch or
L_err_header_tail_Requests_FF_Requests_in or
L_err_dst_addr_cur_addr_S1 or
L_err_dst_addr_cur_addr_not_S1 or
L_err_header_not_empty_Req_S_in or
L_err_header_not_empty_packet_drop_in or
L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
L_err_header_empty_packet_drop_in_packet_drop_equal or
L_err_tail_not_empty_packet_drop_not_packet_drop_in or
L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
L_err_packet_drop_order or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
L_err_Requests_state_in_state_not_equal or
L_err_South_Req_S or
L_err_South_grant_S or
L_err_West_Req_S or
L_err_West_grant_S or
L_err_East_Req_S or
L_err_East_grant_S or
L_err_IDLE_Req_S or
L_err_IDLE_grant_S or
L_err_North_Req_S or
L_err_North_grant_S or
L_err_Local_Req_S or
L_err_Local_grant_S or
L_err_state_in_onehot or
L_err_no_request_grants or
L_err_request_no_grants or
L_err_no_Req_S_grant_S or
S_arbiter_out_err_Requests_state_in_state_not_equal or
S_err_Local_req_X_L or
S_err_Local_credit_not_zero_req_X_L_grant_L or
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L or
S_err_South_req_X_L or
S_err_West_req_X_L or
S_err_East_req_X_L or
S_err_IDLE_req_X_L or
S_err_North_req_X_L or
S_arbiter_out_err_state_in_onehot or
S_arbiter_out_err_no_request_grants or
S_err_request_IDLE_state or
S_err_request_IDLE_not_Grants or
S_err_Grants_onehot_or_all_zero or
err_grant_S_L_sig_not_empty_L_grant_S_L or
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L or
err_grant_signals_not_empty_grant_S or
err_not_grant_signals_empty_not_grant_S or
err_grants_valid_not_match or
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal or
err_credit_in_S_credit_counter_S_out_increment or
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change or
err_grant_S_credit_counter_S_out_decrement or
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change or
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal;
-- FIFO
N2L_fault <= N_FIFO_checkers_ORed or
-- LBDR
N_err_header_empty_Requests_FF_Requests_in or
N_err_tail_Requests_in_all_zero or
N_err_tail_empty_Requests_FF_Requests_in or
N_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
N_err_grants_onehot or
N_err_grants_mismatch or
N_err_header_tail_Requests_FF_Requests_in or
N_err_dst_addr_cur_addr_not_Req_L_in or
N_err_dst_addr_cur_addr_Req_L_in or
N_err_header_not_empty_packet_drop_in or
N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
N_err_header_empty_packet_drop_in_packet_drop_equal or
N_err_tail_not_empty_packet_drop_not_packet_drop_in or
N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
N_err_packet_drop_order or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
N_err_Requests_state_in_state_not_equal or
N_err_Local_Req_L or
N_err_Local_grant_L or
N_err_South_Req_L or
N_err_South_grant_L or
N_err_West_Req_L or
N_err_West_grant_L or
N_err_East_Req_L or
N_err_East_grant_L or
N_err_IDLE_Req_L or
N_err_IDLE_grant_L or
N_err_North_Req_L or
N_err_North_grant_L or
N_err_state_in_onehot or
N_err_no_request_grants or
N_err_request_no_grants or
N_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_IDLE_req_X_N or
L_err_North_req_X_N or
L_err_North_credit_not_zero_req_X_N_grant_N or
L_err_North_credit_zero_or_not_req_X_N_not_grant_N or
L_err_Local_req_X_N or
L_err_South_req_X_N or
L_err_West_req_X_N or
L_err_East_req_X_N or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_N_sig_not_empty_N_grant_L_N or
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
E2L_fault <= E_FIFO_checkers_ORed or
-- LBDR
E_err_header_empty_Requests_FF_Requests_in or
E_err_tail_Requests_in_all_zero or
E_err_tail_empty_Requests_FF_Requests_in or
E_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
E_err_grants_onehot or
E_err_grants_mismatch or
E_err_header_tail_Requests_FF_Requests_in or
E_err_dst_addr_cur_addr_not_Req_L_in or
E_err_dst_addr_cur_addr_Req_L_in or
E_err_header_not_empty_packet_drop_in or
E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
E_err_header_empty_packet_drop_in_packet_drop_equal or
E_err_tail_not_empty_packet_drop_not_packet_drop_in or
E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
E_err_packet_drop_order or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
E_err_Requests_state_in_state_not_equal or
E_err_Local_Req_L or
E_err_Local_grant_L or
E_err_South_Req_L or
E_err_South_grant_L or
E_err_West_Req_L or
E_err_West_grant_L or
E_err_East_Req_L or
E_err_East_grant_L or
E_err_IDLE_Req_L or
E_err_IDLE_grant_L or
E_err_North_Req_L or
E_err_North_grant_L or
E_err_state_in_onehot or
E_err_no_request_grants or
E_err_request_no_grants or
E_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_East_req_X_E or
L_err_East_credit_not_zero_req_X_E_grant_E or
L_err_East_credit_zero_or_not_req_X_E_not_grant_E or
L_err_IDLE_req_X_E or
L_err_North_req_X_E or
L_err_Local_req_X_E or
L_err_South_req_X_E or
L_err_West_req_X_E or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_E_sig_not_empty_E_grant_L_E or
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
W2L_fault <= W_FIFO_checkers_ORed or
-- LBDR
W_err_header_empty_Requests_FF_Requests_in or
W_err_tail_Requests_in_all_zero or
W_err_tail_empty_Requests_FF_Requests_in or
W_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
W_err_grants_onehot or
W_err_grants_mismatch or
W_err_header_tail_Requests_FF_Requests_in or
W_err_dst_addr_cur_addr_not_Req_L_in or
W_err_dst_addr_cur_addr_Req_L_in or
W_err_header_not_empty_packet_drop_in or
W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
W_err_header_empty_packet_drop_in_packet_drop_equal or
W_err_tail_not_empty_packet_drop_not_packet_drop_in or
W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
W_err_packet_drop_order or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
W_err_Requests_state_in_state_not_equal or
W_err_Local_Req_L or
W_err_Local_grant_L or
W_err_South_Req_L or
W_err_South_grant_L or
W_err_West_Req_L or
W_err_West_grant_L or
W_err_East_Req_L or
W_err_East_grant_L or
W_err_IDLE_Req_L or
W_err_IDLE_grant_L or
W_err_North_Req_L or
W_err_North_grant_L or
W_err_state_in_onehot or
W_err_no_request_grants or
W_err_request_no_grants or
W_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_West_req_X_W or
L_err_West_credit_not_zero_req_X_W_grant_W or
L_err_West_credit_zero_or_not_req_X_W_not_grant_W or
L_err_East_req_X_W or
L_err_IDLE_req_X_W or
L_err_North_req_X_W or
L_err_Local_req_X_W or
L_err_South_req_X_W or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_W_sig_not_empty_W_grant_L_W or
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
-- FIFO
S2L_fault <= S_FIFO_checkers_ORed or
-- LBDR
S_err_header_empty_Requests_FF_Requests_in or
S_err_tail_Requests_in_all_zero or
S_err_tail_empty_Requests_FF_Requests_in or
S_err_tail_not_empty_not_grants_Requests_FF_Requests_in or
S_err_grants_onehot or
S_err_grants_mismatch or
S_err_header_tail_Requests_FF_Requests_in or
S_err_dst_addr_cur_addr_not_Req_L_in or
S_err_dst_addr_cur_addr_Req_L_in or
S_err_header_not_empty_packet_drop_in or
S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal or
S_err_header_empty_packet_drop_in_packet_drop_equal or
S_err_tail_not_empty_packet_drop_not_packet_drop_in or
S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal or
S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal or
S_err_packet_drop_order or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal or
S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in or
S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal or
S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal or
S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal or
-- Allocator
S_err_Requests_state_in_state_not_equal or
S_err_Local_Req_L or
S_err_Local_grant_L or
S_err_South_Req_L or
S_err_South_grant_L or
S_err_West_Req_L or
S_err_West_grant_L or
S_err_East_Req_L or
S_err_East_grant_L or
S_err_IDLE_Req_L or
S_err_IDLE_grant_L or
S_err_North_Req_L or
S_err_North_grant_L or
S_err_state_in_onehot or
S_err_no_request_grants or
S_err_request_no_grants or
S_err_no_Req_L_grant_L or
L_arbiter_out_err_Requests_state_in_state_not_equal or
L_err_South_req_X_S or
L_err_South_credit_not_zero_req_X_S_grant_S or
L_err_South_credit_zero_or_not_req_X_S_not_grant_S or
L_err_West_req_X_S or
L_err_East_req_X_S or
L_err_IDLE_req_X_S or
L_err_North_req_X_S or
L_err_Local_req_X_S or
L_arbiter_out_err_state_in_onehot or
L_arbiter_out_err_no_request_grants or
L_err_request_IDLE_state or
L_err_request_IDLE_not_Grants or
L_err_Grants_onehot_or_all_zero or
err_grant_L_S_sig_not_empty_S_grant_L_S or
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S or
err_grant_signals_not_empty_grant_L or
err_not_grant_signals_empty_not_grant_L or
err_grants_valid_not_match or
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal or
err_credit_in_L_credit_counter_L_out_increment or
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change or
err_grant_L_credit_counter_L_out_decrement or
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change or
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal;
Faulty_N_out <= sig_Faulty_N_out;
Faulty_E_out <= sig_Faulty_E_out;
Faulty_W_out <= sig_Faulty_W_out;
Faulty_S_out <= sig_Faulty_S_out;
-- all the counter_threshold modules
CT_N: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_N, Healthy_packet => healthy_packet_N,
Healthy => healthy_link_N, intermittent=> intermittent_link_N, Faulty => sig_Faulty_N_out);
CT_E: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_E, Healthy_packet => healthy_packet_E,
Healthy => healthy_link_E, intermittent=> intermittent_link_E, Faulty => sig_Faulty_E_out);
CT_W: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_W, Healthy_packet => healthy_packet_W,
Healthy => healthy_link_W, intermittent=> intermittent_link_W, Faulty => sig_Faulty_W_out);
CT_S: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_S, Healthy_packet => healthy_packet_S,
Healthy => healthy_link_S, intermittent=> intermittent_link_S, Faulty => sig_Faulty_S_out);
CT_L: counter_threshold_classifier generic map(counter_depth => counter_depth, healthy_counter_threshold => healthy_counter_threshold, faulty_counter_threshold => faulty_counter_threshold)
port map(reset => reset, clk => clk, faulty_packet => faulty_packet_L, Healthy_packet => healthy_packet_L,
Healthy => healthy_link_L, intermittent=> intermittent_link_L, Faulty => faulty_link_L);
-- All the FIFOs
FIFO_N: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_N, valid_in => valid_in_N,
read_en_N => packet_drop_order_N, read_en_E =>Grant_EN, read_en_W =>Grant_WN, read_en_S =>Grant_SN, read_en_L =>Grant_LN,
credit_out => credit_out_N, empty_out => empty_N, Data_out => FIFO_D_out_N, fault_info=> faulty_packet_N, health_info=>healthy_packet_N,
-- Checker outputs
-- Functional checkers
err_empty_full => N_err_empty_full,
err_empty_read_en => N_err_empty_read_en,
err_full_write_en => N_err_full_write_en,
err_state_in_onehot => N_err_state_in_onehot,
err_read_pointer_in_onehot => N_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => N_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => N_err_write_en_write_pointer,
err_not_write_en_write_pointer => N_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => N_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => N_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => N_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => N_err_read_pointer_write_pointer_full,
err_read_pointer_increment => N_err_read_pointer_increment,
err_read_pointer_not_increment => N_err_read_pointer_not_increment,
err_write_en => N_err_write_en,
err_not_write_en => N_err_not_write_en,
err_not_write_en1 => N_err_not_write_en1,
err_not_write_en2 => N_err_not_write_en2,
err_read_en_mismatch => N_err_read_en_mismatch,
err_read_en_mismatch1 => N_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => N_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => N_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => N_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => N_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => N_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => N_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => N_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => N_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => N_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => N_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => N_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => N_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => N_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => N_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => N_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => N_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => N_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => N_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => N_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => N_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => N_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => N_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => N_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => N_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => N_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => N_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => N_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => N_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => N_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => N_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => N_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => N_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => N_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => N_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => N_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => N_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => N_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => N_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => N_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => N_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => N_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => N_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => N_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => N_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => N_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => N_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => N_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => N_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => N_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => N_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => N_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => N_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => N_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => N_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => N_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_E: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_E, valid_in => valid_in_E,
read_en_N => Grant_NE, read_en_E =>packet_drop_order_E, read_en_W =>Grant_WE, read_en_S =>Grant_SE, read_en_L =>Grant_LE,
credit_out => credit_out_E, empty_out => empty_E, Data_out => FIFO_D_out_E, fault_info=> faulty_packet_E, health_info=>healthy_packet_E,
-- Functional checkers
err_empty_full => E_err_empty_full,
err_empty_read_en => E_err_empty_read_en,
err_full_write_en => E_err_full_write_en,
err_state_in_onehot => E_err_state_in_onehot,
err_read_pointer_in_onehot => E_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => E_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => E_err_write_en_write_pointer,
err_not_write_en_write_pointer => E_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => E_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => E_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => E_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => E_err_read_pointer_write_pointer_full,
err_read_pointer_increment => E_err_read_pointer_increment,
err_read_pointer_not_increment => E_err_read_pointer_not_increment,
err_write_en => E_err_write_en,
err_not_write_en => E_err_not_write_en,
err_not_write_en1 => E_err_not_write_en1,
err_not_write_en2 => E_err_not_write_en2,
err_read_en_mismatch => E_err_read_en_mismatch,
err_read_en_mismatch1 => E_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => E_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => E_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => E_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => E_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => E_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => E_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => E_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => E_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => E_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => E_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => E_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => E_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => E_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => E_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => E_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => E_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => E_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => E_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => E_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => E_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => E_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => E_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => E_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => E_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => E_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => E_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => E_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => E_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => E_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => E_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => E_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => E_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => E_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => E_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => E_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => E_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => E_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => E_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => E_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => E_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => E_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => E_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => E_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => E_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => E_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => E_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => E_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => E_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => E_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => E_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => E_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => E_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => E_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => E_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => E_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_W: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_W, valid_in => valid_in_W,
read_en_N => Grant_NW, read_en_E =>Grant_EW, read_en_W =>packet_drop_order_W, read_en_S =>Grant_SW, read_en_L =>Grant_LW,
credit_out => credit_out_W, empty_out => empty_W, Data_out => FIFO_D_out_W, fault_info=> faulty_packet_W, health_info=>healthy_packet_W,
-- Functional checkers
err_empty_full => W_err_empty_full,
err_empty_read_en => W_err_empty_read_en,
err_full_write_en => W_err_full_write_en,
err_state_in_onehot => W_err_state_in_onehot,
err_read_pointer_in_onehot => W_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => W_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => W_err_write_en_write_pointer,
err_not_write_en_write_pointer => W_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => W_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => W_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => W_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => W_err_read_pointer_write_pointer_full,
err_read_pointer_increment => W_err_read_pointer_increment,
err_read_pointer_not_increment => W_err_read_pointer_not_increment,
err_write_en => W_err_write_en,
err_not_write_en => W_err_not_write_en,
err_not_write_en1 => W_err_not_write_en1,
err_not_write_en2 => W_err_not_write_en2,
err_read_en_mismatch => W_err_read_en_mismatch,
err_read_en_mismatch1 => W_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => W_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => W_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => W_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => W_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => W_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => W_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => W_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => W_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => W_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => W_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => W_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => W_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => W_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => W_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => W_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => W_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => W_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => W_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => W_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => W_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => W_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => W_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => W_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => W_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => W_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => W_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => W_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => W_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => W_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => W_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => W_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => W_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => W_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => W_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => W_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => W_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => W_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => W_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => W_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => W_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => W_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => W_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => W_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => W_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => W_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => W_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => W_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => W_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => W_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => W_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => W_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => W_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => W_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => W_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => W_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_S: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_S, valid_in => valid_in_S,
read_en_N => Grant_NS, read_en_E =>Grant_ES, read_en_W =>Grant_WS, read_en_S =>packet_drop_order_S, read_en_L =>Grant_LS,
credit_out => credit_out_S, empty_out => empty_S, Data_out => FIFO_D_out_S, fault_info=> faulty_packet_S, health_info=>healthy_packet_S,
-- Functional checkers
err_empty_full => S_err_empty_full,
err_empty_read_en => S_err_empty_read_en,
err_full_write_en => S_err_full_write_en,
err_state_in_onehot => S_err_state_in_onehot,
err_read_pointer_in_onehot => S_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => S_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => S_err_write_en_write_pointer,
err_not_write_en_write_pointer => S_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => S_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => S_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => S_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => S_err_read_pointer_write_pointer_full,
err_read_pointer_increment => S_err_read_pointer_increment,
err_read_pointer_not_increment => S_err_read_pointer_not_increment,
err_write_en => S_err_write_en,
err_not_write_en => S_err_not_write_en,
err_not_write_en1 => S_err_not_write_en1,
err_not_write_en2 => S_err_not_write_en2,
err_read_en_mismatch => S_err_read_en_mismatch,
err_read_en_mismatch1 => S_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => S_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => S_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => S_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => S_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => S_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => S_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => S_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => S_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => S_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => S_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => S_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => S_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => S_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => S_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => S_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => S_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => S_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => S_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => S_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => S_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => S_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => S_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => S_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => S_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => S_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => S_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => S_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => S_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => S_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => S_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => S_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => S_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => S_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => S_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => S_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => S_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => S_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => S_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => S_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => S_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => S_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => S_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => S_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => S_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => S_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => S_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => S_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => S_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => S_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => S_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => S_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => S_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => S_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => S_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => S_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
FIFO_L: FIFO_credit_based
generic map ( DATA_WIDTH => DATA_WIDTH)
port map ( reset => reset, clk => clk, RX => RX_L, valid_in => valid_in_L,
read_en_N => Grant_NL, read_en_E =>Grant_EL, read_en_W =>Grant_WL, read_en_S => Grant_SL, read_en_L =>packet_drop_order_L,
credit_out => credit_out_L, empty_out => empty_L, Data_out => FIFO_D_out_L, fault_info=> faulty_packet_L, health_info=>healthy_packet_L,
-- Functional checkers
err_empty_full => L_err_empty_full,
err_empty_read_en => L_err_empty_read_en,
err_full_write_en => L_err_full_write_en,
err_state_in_onehot => L_err_state_in_onehot,
err_read_pointer_in_onehot => L_err_read_pointer_in_onehot,
err_write_pointer_in_onehot => L_err_write_pointer_in_onehot,
-- Structural checkers
err_write_en_write_pointer => L_err_write_en_write_pointer,
err_not_write_en_write_pointer => L_err_not_write_en_write_pointer,
err_read_pointer_write_pointer_not_empty => L_err_read_pointer_write_pointer_not_empty,
err_read_pointer_write_pointer_empty => L_err_read_pointer_write_pointer_empty,
err_read_pointer_write_pointer_not_full => L_err_read_pointer_write_pointer_not_full,
err_read_pointer_write_pointer_full => L_err_read_pointer_write_pointer_full,
err_read_pointer_increment => L_err_read_pointer_increment,
err_read_pointer_not_increment => L_err_read_pointer_not_increment,
err_write_en => L_err_write_en,
err_not_write_en => L_err_not_write_en,
err_not_write_en1 => L_err_not_write_en1,
err_not_write_en2 => L_err_not_write_en2,
err_read_en_mismatch => L_err_read_en_mismatch,
err_read_en_mismatch1 => L_err_read_en_mismatch1,
-- Newly added checkers for FIFO with packet drop and fault classifier support!
err_fake_credit_read_en_fake_credit_counter_in_increment => L_err_fake_credit_read_en_fake_credit_counter_in_increment,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement => L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_fake_credit_counter_in_decrement,
err_not_fake_credit_read_en_fake_credit_counter_in_not_change => L_err_not_fake_credit_read_en_fake_credit_counter_in_not_change,
err_fake_credit_not_read_en_fake_credit_counter_in_not_change => L_err_fake_credit_not_read_en_fake_credit_counter_in_not_change,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change => L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_fake_credit_counter_in_not_change,
err_fake_credit_read_en_credit_out => L_err_fake_credit_read_en_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out => L_err_not_fake_credit_not_read_en_fake_credit_counter_not_zero_credit_out,
err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out => L_err_not_fake_credit_not_read_en_fake_credit_counter_zero_not_credit_out,
-- Checkers for Packet Dropping FSM of FIFO
err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit => L_err_state_out_Idle_not_fault_out_valid_in_state_in_Header_flit,
err_state_out_Idle_not_fault_out_valid_in_state_in_not_change => L_err_state_out_Idle_not_fault_out_valid_in_state_in_not_change,
err_state_out_Idle_not_fault_out_not_fake_credit => L_err_state_out_Idle_not_fault_out_not_fake_credit,
err_state_out_Idle_not_fault_out_not_fault_info => L_err_state_out_Idle_not_fault_out_not_fault_info,
err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal => L_err_state_out_Idle_not_fault_out_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Idle_fault_out_fake_credit => L_err_state_out_Idle_fault_out_fake_credit,
err_state_out_Idle_fault_out_state_in_Packet_drop => L_err_state_out_Idle_fault_out_state_in_Packet_drop,
err_state_out_Idle_fault_out_fault_info => L_err_state_out_Idle_fault_out_fault_info,
err_state_out_Idle_fault_out_faulty_packet_in => L_err_state_out_Idle_fault_out_faulty_packet_in,
err_state_out_Idle_not_health_info => L_err_state_out_Idle_not_health_info,
err_state_out_Idle_not_write_fake_flit => L_err_state_out_Idle_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Body_state_in_Body_flit,
err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_flit_type_Tail_state_in_Tail_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit => L_err_state_out_Header_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info => L_err_state_out_Header_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Header_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_valid_in_fault_out_write_fake_flit => L_err_state_out_Header_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Header_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Header_flit_valid_in_fault_out_fault_info => L_err_state_out_Header_flit_valid_in_fault_out_fault_info,
err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Header_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change => L_err_state_out_Header_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Header_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Header_flit_not_valid_in_not_fault_info => L_err_state_out_Header_flit_not_valid_in_not_fault_info,
err_state_out_Header_flit_not_valid_in_not_write_fake_flit => L_err_state_out_Header_flit_not_valid_in_not_write_fake_flit,
err_state_out_Header_flit_or_Body_flit_not_fake_credit => L_err_state_out_Header_flit_or_Body_flit_not_fake_credit,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change => L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_state_out_not_change,
err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit => L_err_state_out_Body_flit_valid_in_not_fault_out_state_in_Tail_flit,
err_state_out_Body_flit_valid_in_not_fault_out_health_info => L_err_state_out_Body_flit_valid_in_not_fault_out_health_info,
err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit => L_err_state_out_Body_flit_valid_in_not_fault_out_not_write_fake_flit,
err_state_out_Body_flit_valid_in_not_fault_out_fault_info => L_err_state_out_Body_flit_valid_in_not_fault_out_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Body_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_valid_in_fault_out_write_fake_flit => L_err_state_out_Body_flit_valid_in_fault_out_write_fake_flit,
err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Body_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Body_flit_valid_in_fault_out_fault_info => L_err_state_out_Body_flit_valid_in_fault_out_fault_info,
err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Body_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change => L_err_state_out_Body_flit_not_valid_in_state_in_state_out_not_change,
err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Body_flit_not_valid_in_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Body_flit_not_valid_in_not_fault_info => L_err_state_out_Body_flit_not_valid_in_not_fault_info,
err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info => L_err_state_out_Body_flit_valid_in_not_fault_out_flit_type_not_tail_not_health_info,
err_state_out_Body_flit_valid_in_fault_out_not_health_info => L_err_state_out_Body_flit_valid_in_fault_out_not_health_info,
err_state_out_Body_flit_valid_in_not_health_info => L_err_state_out_Body_flit_valid_in_not_health_info,
err_state_out_Body_flit_not_fake_credit => L_err_state_out_Body_flit_not_fake_credit,
err_state_out_Body_flit_not_valid_in_not_write_fake_flit => L_err_state_out_Body_flit_not_valid_in_not_write_fake_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit => L_err_state_out_Tail_flit_valid_in_not_fault_out_flit_type_Header_state_in_Header_flit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit => L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fake_credit,
err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info => L_err_state_out_Tail_flit_valid_in_not_fault_out_not_fault_info,
err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Tail_flit_valid_in_not_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Tail_flit_valid_in_fault_out_fake_credit => L_err_state_out_Tail_flit_valid_in_fault_out_fake_credit,
err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop => L_err_state_out_Tail_flit_valid_in_fault_out_state_in_Packet_drop,
err_state_out_Tail_flit_valid_in_fault_out_fault_info => L_err_state_out_Tail_flit_valid_in_fault_out_fault_info,
err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in => L_err_state_out_Tail_flit_valid_in_fault_out_faulty_packet_in,
err_state_out_Tail_flit_not_valid_in_state_in_Idle => L_err_state_out_Tail_flit_not_valid_in_state_in_Idle,
err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change => L_err_state_out_Tail_flit_not_valid_in_faulty_packet_in_faulty_packet_in_not_change,
err_state_out_Tail_flit_not_valid_in_not_fault_info => L_err_state_out_Tail_flit_not_valid_in_not_fault_info,
err_state_out_Tail_flit_not_valid_in_not_fake_credit => L_err_state_out_Tail_flit_not_valid_in_not_fake_credit,
err_state_out_Tail_flit_not_write_fake_flit => L_err_state_out_Tail_flit_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_state_in_Header_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_not_fault_out_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_faulty_packet_in,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_not_state_in_Idle,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_not_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_invalid_fault_out_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_flit_type_body_or_invalid_fault_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_flit_type_invalid_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_faulty_packet_in_faulty_packet_out_equal,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_not_fake_credit,
err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_not_faulty_packet_out_state_in_state_out_not_change,
err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change => L_err_state_out_Packet_drop_not_faulty_packet_out_faulty_packet_in_faulty_packet_out_not_change,
err_state_out_Packet_drop_not_fault_info => L_err_state_out_Packet_drop_not_fault_info,
err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit => L_err_state_out_Packet_drop_not_faulty_packet_out_not_fake_credit,
err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit => L_err_state_out_Packet_drop_faulty_packet_out_not_valid_in_or_flit_type_not_header_or_fault_out_not_write_fake_flit,
err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit => L_err_state_out_Packet_drop_not_faulty_packet_out_not_write_fake_flit,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Header_fault_out_state_in_state_out_not_change,
err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change => L_err_state_out_Packet_drop_faulty_packet_out_valid_in_flit_type_Tail_fault_out_state_in_state_out_not_change
);
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
--- all the LBDRs
LBDR_N: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_N, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_N(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_N(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_N,
grant_N => '0', grant_E =>Grant_EN, grant_W => Grant_WN, grant_S=>Grant_SN, grant_L =>Grant_LN,
Req_N=> Req_NN, Req_E=>Req_NE, Req_W=>Req_NW, Req_S=>Req_NS, Req_L=>Req_NL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => N_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => N_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => N_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => N_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => N_err_grants_onehot,
err_grants_mismatch => N_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => N_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => N_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => N_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => N_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => N_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => N_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => N_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => N_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => N_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => N_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => N_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => N_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => N_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => N_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => N_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => N_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => N_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => N_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => N_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => N_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => N_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => N_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => N_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => N_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => N_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => N_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_E: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_E, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_E(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_E(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_E,
grant_N => Grant_NE, grant_E =>'0', grant_W => Grant_WE, grant_S=>Grant_SE, grant_L =>Grant_LE,
Req_N=> Req_EN, Req_E=>Req_EE, Req_W=>Req_EW, Req_S=>Req_ES, Req_L=>Req_EL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => E_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => E_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => E_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => E_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => E_err_grants_onehot,
err_grants_mismatch => E_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => E_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => E_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => E_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => E_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => E_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => E_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => E_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => E_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => E_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => E_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => E_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => E_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => E_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => E_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => E_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => E_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => E_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => E_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => E_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => E_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => E_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => E_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => E_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => E_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => E_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => E_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_W: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_W, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_W(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_W(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_W,
grant_N => Grant_NW, grant_E =>Grant_EW, grant_W =>'0' ,grant_S=>Grant_SW, grant_L =>Grant_LW,
Req_N=> Req_WN, Req_E=>Req_WE, Req_W=>Req_WW, Req_S=>Req_WS, Req_L=>Req_WL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => W_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => W_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => W_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => W_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => W_err_grants_onehot,
err_grants_mismatch => W_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => W_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => W_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => W_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => W_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => W_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => W_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => W_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => W_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => W_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => W_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => W_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => W_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => W_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => W_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => W_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => W_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => W_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => W_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => W_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => W_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => W_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => W_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => W_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => W_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => W_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => W_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_S: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_S, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_S(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_S(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_S,
grant_N => Grant_NS, grant_E =>Grant_ES, grant_W =>Grant_WS ,grant_S=>'0', grant_L =>Grant_LS,
Req_N=> Req_SN, Req_E=>Req_SE, Req_W=>Req_SW, Req_S=>Req_SS, Req_L=>Req_SL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => S_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => S_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => S_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => S_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => S_err_grants_onehot,
err_grants_mismatch => S_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => S_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => S_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => S_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => S_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => S_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => S_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => S_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => S_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => S_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => S_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => S_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => S_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => S_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => S_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => S_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => S_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => S_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => S_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => S_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => S_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => S_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => S_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => S_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => S_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => S_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => S_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
LBDR_L: LBDR_packet_drop generic map (cur_addr_rst => current_address, Cx_rst => Cx_rst, NoC_size => NoC_size)
PORT MAP (reset => reset, clk => clk, empty => empty_L, Rxy_reconf => Rxy_reconf, Reconfig => Reconfig,
Faulty_C_N => Faulty_N_in, Faulty_C_E => Faulty_E_in, Faulty_C_W => Faulty_W_in, Faulty_C_S => Faulty_S_in,
flit_type => FIFO_D_out_L(DATA_WIDTH-1 downto DATA_WIDTH-3), dst_addr=> FIFO_D_out_L(NoC_size downto 1) ,
packet_drop_order => packet_drop_order_L,
grant_N => Grant_NL, grant_E =>Grant_EL, grant_W => Grant_WL,grant_S=>Grant_SL, grant_L =>'0',
Req_N=> Req_LN, Req_E=>Req_LE, Req_W=>Req_LW, Req_S=>Req_LS, Req_L=>Req_LL,
-- Checker outputs
err_header_empty_Requests_FF_Requests_in => L_err_header_empty_Requests_FF_Requests_in,
err_tail_Requests_in_all_zero => L_err_tail_Requests_in_all_zero,
err_tail_empty_Requests_FF_Requests_in => L_err_tail_empty_Requests_FF_Requests_in,
err_tail_not_empty_not_grants_Requests_FF_Requests_in => L_err_tail_not_empty_not_grants_Requests_FF_Requests_in,
err_grants_onehot => L_err_grants_onehot,
err_grants_mismatch => L_err_grants_mismatch,
err_header_tail_Requests_FF_Requests_in => L_err_header_tail_Requests_FF_Requests_in,
err_dst_addr_cur_addr_N1 => L_err_dst_addr_cur_addr_N1,
err_dst_addr_cur_addr_not_N1 => L_err_dst_addr_cur_addr_not_N1,
err_dst_addr_cur_addr_E1 => L_err_dst_addr_cur_addr_E1,
err_dst_addr_cur_addr_not_E1 => L_err_dst_addr_cur_addr_not_E1,
err_dst_addr_cur_addr_W1 => L_err_dst_addr_cur_addr_W1,
err_dst_addr_cur_addr_not_W1 => L_err_dst_addr_cur_addr_not_W1,
err_dst_addr_cur_addr_S1 => L_err_dst_addr_cur_addr_S1,
err_dst_addr_cur_addr_not_S1 => L_err_dst_addr_cur_addr_not_S1,
err_dst_addr_cur_addr_not_Req_L_in => L_err_dst_addr_cur_addr_not_Req_L_in,
err_dst_addr_cur_addr_Req_L_in => L_err_dst_addr_cur_addr_Req_L_in,
err_header_not_empty_Req_N_in => L_err_header_not_empty_Req_N_in,
err_header_not_empty_Req_E_in => L_err_header_not_empty_Req_E_in,
err_header_not_empty_Req_W_in => L_err_header_not_empty_Req_W_in,
err_header_not_empty_Req_S_in => L_err_header_not_empty_Req_S_in,
err_header_not_empty_packet_drop_in => L_err_header_not_empty_packet_drop_in,
err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal => L_err_header_not_empty_dst_addr_cur_addr_equal_packet_drop_in_packet_drop_equal,
err_header_empty_packet_drop_in_packet_drop_equal => L_err_header_empty_packet_drop_in_packet_drop_equal,
err_tail_not_empty_packet_drop_not_packet_drop_in => L_err_tail_not_empty_packet_drop_not_packet_drop_in,
err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal => L_err_tail_not_empty_not_packet_drop_packet_drop_in_packet_drop_equal,
err_invalid_or_body_flit_packet_drop_in_packet_drop_equal => L_err_invalid_or_body_flit_packet_drop_in_packet_drop_equal,
err_packet_drop_order => L_err_packet_drop_order,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Cx_in_Temp_Cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_not_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Cx_in_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_reconfig_cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_Faulty_C_Temp_Cx_in,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_reconfig_cx_in_reconfig_cx_equal,
err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal => L_err_reconfig_cx_flit_type_Tail_not_empty_grants_Temp_Cx_in_Temp_Cx_equal,
err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal => L_err_not_reconfig_cx_flit_type_not_Tail_empty_not_grants_not_Faulty_C_Temp_Cx_in_Temp_Cx_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal => L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_Rxy_in_Rxy_reconf_equal,
err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in => L_err_ReConf_FF_out_flit_type_Tail_not_empty_grants_not_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Rxy_in_Rxy_equal,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_Reconfig_ReConf_FF_in,
err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal => L_err_not_ReConf_FF_out_flit_type_not_Tail_empty_not_grants_not_Reconfig_ReConf_FF_in_ReConf_FF_out_equal
);
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-- switch allocator
allocator_unit: allocator port map ( reset => reset, clk => clk,
-- flow control
credit_in_N => credit_in_N, credit_in_E => credit_in_E, credit_in_W => credit_in_W, credit_in_S => credit_in_S, credit_in_L => credit_in_L,
-- requests from the LBDRS
req_N_N => '0', req_N_E => Req_NE, req_N_W => Req_NW, req_N_S => Req_NS, req_N_L => Req_NL,
req_E_N => Req_EN, req_E_E => '0', req_E_W => Req_EW, req_E_S => Req_ES, req_E_L => Req_EL,
req_W_N => Req_WN, req_W_E => Req_WE, req_W_W => '0', req_W_S => Req_WS, req_W_L => Req_WL,
req_S_N => Req_SN, req_S_E => Req_SE, req_S_W => Req_SW, req_S_S => '0', req_S_L => Req_SL,
req_L_N => Req_LN, req_L_E => Req_LE, req_L_W => Req_LW, req_L_S => Req_LS, req_L_L => '0',
empty_N => empty_N, empty_E => empty_E, empty_w => empty_W, empty_S => empty_S, empty_L => empty_L,
valid_N => valid_out_N, valid_E => valid_out_E, valid_W => valid_out_W, valid_S => valid_out_S, valid_L => valid_out_L,
-- grant_X_Y means the grant for X output port towards Y input port
-- this means for any X in [N, E, W, S, L] then set grant_X_Y is one hot!
grant_N_N => Grant_NN, grant_N_E => Grant_NE, grant_N_W => Grant_NW, grant_N_S => Grant_NS, grant_N_L => Grant_NL,
grant_E_N => Grant_EN, grant_E_E => Grant_EE, grant_E_W => Grant_EW, grant_E_S => Grant_ES, grant_E_L => Grant_EL,
grant_W_N => Grant_WN, grant_W_E => Grant_WE, grant_W_W => Grant_WW, grant_W_S => Grant_WS, grant_W_L => Grant_WL,
grant_S_N => Grant_SN, grant_S_E => Grant_SE, grant_S_W => Grant_SW, grant_S_S => Grant_SS, grant_S_L => Grant_SL,
grant_L_N => Grant_LN, grant_L_E => Grant_LE, grant_L_W => Grant_LW, grant_L_S => Grant_LS, grant_L_L => Grant_LL,
-- Checker outputs
-- Allocator logic checker outputs
err_grant_N_N_sig_not_empty_N_grant_N_N => err_grant_N_N_sig_not_empty_N_grant_N_N ,
err_not_grant_N_N_sig_or_empty_N_not_grant_N_N => err_not_grant_N_N_sig_or_empty_N_not_grant_N_N ,
err_grant_N_E_sig_not_empty_E_grant_N_E => err_grant_N_E_sig_not_empty_E_grant_N_E ,
err_not_grant_N_E_sig_or_empty_E_not_grant_N_E => err_not_grant_N_E_sig_or_empty_E_not_grant_N_E ,
err_grant_N_W_sig_not_empty_W_grant_N_W => err_grant_N_W_sig_not_empty_W_grant_N_W ,
err_not_grant_N_W_sig_or_empty_W_not_grant_N_W => err_not_grant_N_W_sig_or_empty_W_not_grant_N_W ,
err_grant_N_S_sig_not_empty_S_grant_N_S => err_grant_N_S_sig_not_empty_S_grant_N_S ,
err_not_grant_N_S_sig_or_empty_S_not_grant_N_S => err_not_grant_N_S_sig_or_empty_S_not_grant_N_S ,
err_grant_N_L_sig_not_empty_L_grant_N_L => err_grant_N_L_sig_not_empty_L_grant_N_L ,
err_not_grant_N_L_sig_or_empty_L_not_grant_N_L => err_not_grant_N_L_sig_or_empty_L_not_grant_N_L ,
err_grant_E_N_sig_not_empty_N_grant_E_N => err_grant_E_N_sig_not_empty_N_grant_E_N ,
err_not_grant_E_N_sig_or_empty_N_not_grant_E_N => err_not_grant_E_N_sig_or_empty_N_not_grant_E_N ,
err_grant_E_E_sig_not_empty_E_grant_E_E => err_grant_E_E_sig_not_empty_E_grant_E_E ,
err_not_grant_E_E_sig_or_empty_E_not_grant_E_E => err_not_grant_E_E_sig_or_empty_E_not_grant_E_E ,
err_grant_E_W_sig_not_empty_W_grant_E_W => err_grant_E_W_sig_not_empty_W_grant_E_W ,
err_not_grant_E_W_sig_or_empty_W_not_grant_E_W => err_not_grant_E_W_sig_or_empty_W_not_grant_E_W ,
err_grant_E_S_sig_not_empty_S_grant_E_S => err_grant_E_S_sig_not_empty_S_grant_E_S ,
err_not_grant_E_S_sig_or_empty_S_not_grant_E_S => err_not_grant_E_S_sig_or_empty_S_not_grant_E_S ,
err_grant_E_L_sig_not_empty_L_grant_E_L => err_grant_E_L_sig_not_empty_L_grant_E_L ,
err_not_grant_E_L_sig_or_empty_L_not_grant_E_L => err_not_grant_E_L_sig_or_empty_L_not_grant_E_L ,
err_grant_W_N_sig_not_empty_N_grant_W_N => err_grant_W_N_sig_not_empty_N_grant_W_N ,
err_not_grant_W_N_sig_or_empty_N_not_grant_W_N => err_not_grant_W_N_sig_or_empty_N_not_grant_W_N ,
err_grant_W_E_sig_not_empty_E_grant_W_E => err_grant_W_E_sig_not_empty_E_grant_W_E ,
err_not_grant_W_E_sig_or_empty_E_not_grant_W_E => err_not_grant_W_E_sig_or_empty_E_not_grant_W_E ,
err_grant_W_W_sig_not_empty_W_grant_W_W => err_grant_W_W_sig_not_empty_W_grant_W_W ,
err_not_grant_W_W_sig_or_empty_W_not_grant_W_W => err_not_grant_W_W_sig_or_empty_W_not_grant_W_W ,
err_grant_W_S_sig_not_empty_S_grant_W_S => err_grant_W_S_sig_not_empty_S_grant_W_S ,
err_not_grant_W_S_sig_or_empty_S_not_grant_W_S => err_not_grant_W_S_sig_or_empty_S_not_grant_W_S ,
err_grant_W_L_sig_not_empty_L_grant_W_L => err_grant_W_L_sig_not_empty_L_grant_W_L ,
err_not_grant_W_L_sig_or_empty_L_not_grant_W_L => err_not_grant_W_L_sig_or_empty_L_not_grant_W_L ,
err_grant_S_N_sig_not_empty_N_grant_S_N => err_grant_S_N_sig_not_empty_N_grant_S_N ,
err_not_grant_S_N_sig_or_empty_N_not_grant_S_N => err_not_grant_S_N_sig_or_empty_N_not_grant_S_N ,
err_grant_S_E_sig_not_empty_E_grant_S_E => err_grant_S_E_sig_not_empty_E_grant_S_E ,
err_not_grant_S_E_sig_or_empty_E_not_grant_S_E => err_not_grant_S_E_sig_or_empty_E_not_grant_S_E ,
err_grant_S_W_sig_not_empty_W_grant_S_W => err_grant_S_W_sig_not_empty_W_grant_S_W ,
err_not_grant_S_W_sig_or_empty_W_not_grant_S_W => err_not_grant_S_W_sig_or_empty_W_not_grant_S_W ,
err_grant_S_S_sig_not_empty_S_grant_S_S => err_grant_S_S_sig_not_empty_S_grant_S_S ,
err_not_grant_S_S_sig_or_empty_S_not_grant_S_S => err_not_grant_S_S_sig_or_empty_S_not_grant_S_S ,
err_grant_S_L_sig_not_empty_L_grant_S_L => err_grant_S_L_sig_not_empty_L_grant_S_L ,
err_not_grant_S_L_sig_or_empty_L_not_grant_S_L => err_not_grant_S_L_sig_or_empty_L_not_grant_S_L ,
err_grant_L_N_sig_not_empty_N_grant_L_N => err_grant_L_N_sig_not_empty_N_grant_L_N ,
err_not_grant_L_N_sig_or_empty_N_not_grant_L_N => err_not_grant_L_N_sig_or_empty_N_not_grant_L_N ,
err_grant_L_E_sig_not_empty_E_grant_L_E => err_grant_L_E_sig_not_empty_E_grant_L_E ,
err_not_grant_L_E_sig_or_empty_E_not_grant_L_E => err_not_grant_L_E_sig_or_empty_E_not_grant_L_E ,
err_grant_L_W_sig_not_empty_W_grant_L_W => err_grant_L_W_sig_not_empty_W_grant_L_W ,
err_not_grant_L_W_sig_or_empty_W_not_grant_L_W => err_not_grant_L_W_sig_or_empty_W_not_grant_L_W ,
err_grant_L_S_sig_not_empty_S_grant_L_S => err_grant_L_S_sig_not_empty_S_grant_L_S ,
err_not_grant_L_S_sig_or_empty_S_not_grant_L_S => err_not_grant_L_S_sig_or_empty_S_not_grant_L_S ,
err_grant_L_L_sig_not_empty_L_grant_L_L => err_grant_L_L_sig_not_empty_L_grant_L_L ,
err_not_grant_L_L_sig_or_empty_L_not_grant_L_L => err_not_grant_L_L_sig_or_empty_L_not_grant_L_L ,
err_grant_signals_not_empty_grant_N => err_grant_signals_not_empty_grant_N ,
err_not_grant_signals_empty_not_grant_N => err_not_grant_signals_empty_not_grant_N ,
err_grant_signals_not_empty_grant_E => err_grant_signals_not_empty_grant_E ,
err_not_grant_signals_empty_not_grant_E => err_not_grant_signals_empty_not_grant_E ,
err_grant_signals_not_empty_grant_W => err_grant_signals_not_empty_grant_W ,
err_not_grant_signals_empty_not_grant_W => err_not_grant_signals_empty_not_grant_W ,
err_grant_signals_not_empty_grant_S => err_grant_signals_not_empty_grant_S ,
err_not_grant_signals_empty_not_grant_S => err_not_grant_signals_empty_not_grant_S ,
err_grant_signals_not_empty_grant_L => err_grant_signals_not_empty_grant_L ,
err_not_grant_signals_empty_not_grant_L => err_not_grant_signals_empty_not_grant_L ,
err_grants_valid_not_match => err_grants_valid_not_match ,
-- Allocator credit counter logic checker outputs
err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal => err_credit_in_N_grant_N_credit_counter_N_in_credit_counter_N_out_equal ,
err_credit_in_N_credit_counter_N_out_increment => err_credit_in_N_credit_counter_N_out_increment ,
err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change => err_not_credit_in_N_credit_counter_N_out_max_credit_counter_N_in_not_change ,
err_grant_N_credit_counter_N_out_decrement => err_grant_N_credit_counter_N_out_decrement ,
err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change => err_not_grant_N_or_credit_counter_N_out_zero_credit_counter_N_in_not_change ,
err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal => err_not_credit_in_N_not_grant_N_credit_counter_N_in_credit_counter_N_out_equal ,
err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal => err_credit_in_E_grant_E_credit_counter_E_in_credit_counter_E_out_equal ,
err_credit_in_E_credit_counter_E_out_increment => err_credit_in_E_credit_counter_E_out_increment ,
err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change => err_not_credit_in_E_credit_counter_E_out_max_credit_counter_E_in_not_change ,
err_grant_E_credit_counter_E_out_decrement => err_grant_E_credit_counter_E_out_decrement ,
err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change => err_not_grant_E_or_credit_counter_E_out_zero_credit_counter_E_in_not_change ,
err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal => err_not_credit_in_E_not_grant_E_credit_counter_E_in_credit_counter_E_out_equal ,
err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal => err_credit_in_W_grant_W_credit_counter_W_in_credit_counter_W_out_equal ,
err_credit_in_W_credit_counter_W_out_increment => err_credit_in_W_credit_counter_W_out_increment ,
err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change => err_not_credit_in_W_credit_counter_W_out_max_credit_counter_W_in_not_change ,
err_grant_W_credit_counter_W_out_decrement => err_grant_W_credit_counter_W_out_decrement ,
err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change => err_not_grant_W_or_credit_counter_W_out_zero_credit_counter_W_in_not_change ,
err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal => err_not_credit_in_W_not_grant_W_credit_counter_W_in_credit_counter_W_out_equal ,
err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal => err_credit_in_S_grant_S_credit_counter_S_in_credit_counter_S_out_equal ,
err_credit_in_S_credit_counter_S_out_increment => err_credit_in_S_credit_counter_S_out_increment ,
err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change => err_not_credit_in_S_credit_counter_S_out_max_credit_counter_S_in_not_change ,
err_grant_S_credit_counter_S_out_decrement => err_grant_S_credit_counter_S_out_decrement ,
err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change => err_not_grant_S_or_credit_counter_S_out_zero_credit_counter_S_in_not_change ,
err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal => err_not_credit_in_S_not_grant_S_credit_counter_S_in_credit_counter_S_out_equal ,
err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal => err_credit_in_L_grant_L_credit_counter_L_in_credit_counter_L_out_equal ,
err_credit_in_L_credit_counter_L_out_increment => err_credit_in_L_credit_counter_L_out_increment ,
err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change => err_not_credit_in_L_credit_counter_L_out_max_credit_counter_L_in_not_change ,
err_grant_L_credit_counter_L_out_decrement => err_grant_L_credit_counter_L_out_decrement ,
err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change => err_not_grant_L_or_credit_counter_L_out_zero_credit_counter_L_in_not_change ,
err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal => err_not_credit_in_L_not_grant_L_credit_counter_L_in_credit_counter_L_out_equal ,
-- North Arbiter_in Checker outputs
N_err_Requests_state_in_state_not_equal => N_err_Requests_state_in_state_not_equal,
N_err_IDLE_Req_N => N_err_IDLE_Req_N,
N_err_IDLE_grant_N => N_err_IDLE_grant_N,
N_err_North_Req_N => N_err_North_Req_N,
N_err_North_grant_N => N_err_North_grant_N,
N_err_East_Req_E => N_err_East_Req_E,
N_err_East_grant_E => N_err_East_grant_E,
N_err_West_Req_W => N_err_West_Req_W,
N_err_West_grant_W => N_err_West_grant_W,
N_err_South_Req_S => N_err_South_Req_S,
N_err_South_grant_S => N_err_South_grant_S,
N_err_Local_Req_L => N_err_Local_Req_L,
N_err_Local_grant_L => N_err_Local_grant_L,
N_err_IDLE_Req_E => N_err_IDLE_Req_E,
N_err_IDLE_grant_E => N_err_IDLE_grant_E,
N_err_North_Req_E => N_err_North_Req_E,
N_err_North_grant_E => N_err_North_grant_E,
N_err_East_Req_W => N_err_East_Req_W,
N_err_East_grant_W => N_err_East_grant_W,
N_err_West_Req_S => N_err_West_Req_S,
N_err_West_grant_S => N_err_West_grant_S,
N_err_South_Req_L => N_err_South_Req_L,
N_err_South_grant_L => N_err_South_grant_L,
N_err_Local_Req_N => N_err_Local_Req_N,
N_err_Local_grant_N => N_err_Local_grant_N,
N_err_IDLE_Req_W => N_err_IDLE_Req_W,
N_err_IDLE_grant_W => N_err_IDLE_grant_W,
N_err_North_Req_W => N_err_North_Req_W,
N_err_North_grant_W => N_err_North_grant_W,
N_err_East_Req_S => N_err_East_Req_S,
N_err_East_grant_S => N_err_East_grant_S,
N_err_West_Req_L => N_err_West_Req_L,
N_err_West_grant_L => N_err_West_grant_L,
N_err_South_Req_N => N_err_South_Req_N,
N_err_South_grant_N => N_err_South_grant_N,
N_err_Local_Req_E => N_err_Local_Req_E,
N_err_Local_grant_E => N_err_Local_grant_E,
N_err_IDLE_Req_S => N_err_IDLE_Req_S,
N_err_IDLE_grant_S => N_err_IDLE_grant_S,
N_err_North_Req_S => N_err_North_Req_S,
N_err_North_grant_S => N_err_North_grant_S,
N_err_East_Req_L => N_err_East_Req_L,
N_err_East_grant_L => N_err_East_grant_L,
N_err_West_Req_N => N_err_West_Req_N,
N_err_West_grant_N => N_err_West_grant_N,
N_err_South_Req_E => N_err_South_Req_E,
N_err_South_grant_E => N_err_South_grant_E,
N_err_Local_Req_W => N_err_Local_Req_W,
N_err_Local_grant_W => N_err_Local_grant_W,
N_err_IDLE_Req_L => N_err_IDLE_Req_L,
N_err_IDLE_grant_L => N_err_IDLE_grant_L,
N_err_North_Req_L => N_err_North_Req_L,
N_err_North_grant_L => N_err_North_grant_L,
N_err_East_Req_N => N_err_East_Req_N,
N_err_East_grant_N => N_err_East_grant_N,
N_err_West_Req_E => N_err_West_Req_E,
N_err_West_grant_E => N_err_West_grant_E,
N_err_South_Req_W => N_err_South_Req_W,
N_err_South_grant_W => N_err_South_grant_W,
N_err_Local_Req_S => N_err_Local_Req_S,
N_err_Local_grant_S => N_err_Local_grant_S,
N_err_state_in_onehot => N_err_arbiter_state_in_onehot,
N_err_no_request_grants => N_err_no_request_grants,
N_err_request_no_grants => N_err_request_no_grants,
N_err_no_Req_N_grant_N => N_err_no_Req_N_grant_N,
N_err_no_Req_E_grant_E => N_err_no_Req_E_grant_E,
N_err_no_Req_W_grant_W => N_err_no_Req_W_grant_W,
N_err_no_Req_S_grant_S => N_err_no_Req_S_grant_S,
N_err_no_Req_L_grant_L => N_err_no_Req_L_grant_L,
-- East Arbiter_in Checker outputs
E_err_Requests_state_in_state_not_equal => E_err_Requests_state_in_state_not_equal,
E_err_IDLE_Req_N => E_err_IDLE_Req_N,
E_err_IDLE_grant_N => E_err_IDLE_grant_N,
E_err_North_Req_N => E_err_North_Req_N,
E_err_North_grant_N => E_err_North_grant_N,
E_err_East_Req_E => E_err_East_Req_E,
E_err_East_grant_E => E_err_East_grant_E,
E_err_West_Req_W => E_err_West_Req_W,
E_err_West_grant_W => E_err_West_grant_W,
E_err_South_Req_S => E_err_South_Req_S,
E_err_South_grant_S => E_err_South_grant_S,
E_err_Local_Req_L => E_err_Local_Req_L,
E_err_Local_grant_L => E_err_Local_grant_L,
E_err_IDLE_Req_E => E_err_IDLE_Req_E,
E_err_IDLE_grant_E => E_err_IDLE_grant_E,
E_err_North_Req_E => E_err_North_Req_E,
E_err_North_grant_E => E_err_North_grant_E,
E_err_East_Req_W => E_err_East_Req_W,
E_err_East_grant_W => E_err_East_grant_W,
E_err_West_Req_S => E_err_West_Req_S,
E_err_West_grant_S => E_err_West_grant_S,
E_err_South_Req_L => E_err_South_Req_L,
E_err_South_grant_L => E_err_South_grant_L,
E_err_Local_Req_N => E_err_Local_Req_N,
E_err_Local_grant_N => E_err_Local_grant_N,
E_err_IDLE_Req_W => E_err_IDLE_Req_W,
E_err_IDLE_grant_W => E_err_IDLE_grant_W,
E_err_North_Req_W => E_err_North_Req_W,
E_err_North_grant_W => E_err_North_grant_W,
E_err_East_Req_S => E_err_East_Req_S,
E_err_East_grant_S => E_err_East_grant_S,
E_err_West_Req_L => E_err_West_Req_L,
E_err_West_grant_L => E_err_West_grant_L,
E_err_South_Req_N => E_err_South_Req_N,
E_err_South_grant_N => E_err_South_grant_N,
E_err_Local_Req_E => E_err_Local_Req_E,
E_err_Local_grant_E => E_err_Local_grant_E,
E_err_IDLE_Req_S => E_err_IDLE_Req_S,
E_err_IDLE_grant_S => E_err_IDLE_grant_S,
E_err_North_Req_S => E_err_North_Req_S,
E_err_North_grant_S => E_err_North_grant_S,
E_err_East_Req_L => E_err_East_Req_L,
E_err_East_grant_L => E_err_East_grant_L,
E_err_West_Req_N => E_err_West_Req_N,
E_err_West_grant_N => E_err_West_grant_N,
E_err_South_Req_E => E_err_South_Req_E,
E_err_South_grant_E => E_err_South_grant_E,
E_err_Local_Req_W => E_err_Local_Req_W,
E_err_Local_grant_W => E_err_Local_grant_W,
E_err_IDLE_Req_L => E_err_IDLE_Req_L,
E_err_IDLE_grant_L => E_err_IDLE_grant_L,
E_err_North_Req_L => E_err_North_Req_L,
E_err_North_grant_L => E_err_North_grant_L,
E_err_East_Req_N => E_err_East_Req_N,
E_err_East_grant_N => E_err_East_grant_N,
E_err_West_Req_E => E_err_West_Req_E,
E_err_West_grant_E => E_err_West_grant_E,
E_err_South_Req_W => E_err_South_Req_W,
E_err_South_grant_W => E_err_South_grant_W,
E_err_Local_Req_S => E_err_Local_Req_S,
E_err_Local_grant_S => E_err_Local_grant_S,
E_err_state_in_onehot => E_err_arbiter_state_in_onehot,
E_err_no_request_grants => E_err_no_request_grants,
E_err_request_no_grants => E_err_request_no_grants,
E_err_no_Req_N_grant_N => E_err_no_Req_N_grant_N,
E_err_no_Req_E_grant_E => E_err_no_Req_E_grant_E,
E_err_no_Req_W_grant_W => E_err_no_Req_W_grant_W,
E_err_no_Req_S_grant_S => E_err_no_Req_S_grant_S,
E_err_no_Req_L_grant_L => E_err_no_Req_L_grant_L,
-- West Arbiter_in Checker outputs
W_err_Requests_state_in_state_not_equal => W_err_Requests_state_in_state_not_equal,
W_err_IDLE_Req_N => W_err_IDLE_Req_N,
W_err_IDLE_grant_N => W_err_IDLE_grant_N,
W_err_North_Req_N => W_err_North_Req_N,
W_err_North_grant_N => W_err_North_grant_N,
W_err_East_Req_E => W_err_East_Req_E,
W_err_East_grant_E => W_err_East_grant_E,
W_err_West_Req_W => W_err_West_Req_W,
W_err_West_grant_W => W_err_West_grant_W,
W_err_South_Req_S => W_err_South_Req_S,
W_err_South_grant_S => W_err_South_grant_S,
W_err_Local_Req_L => W_err_Local_Req_L,
W_err_Local_grant_L => W_err_Local_grant_L,
W_err_IDLE_Req_E => W_err_IDLE_Req_E,
W_err_IDLE_grant_E => W_err_IDLE_grant_E,
W_err_North_Req_E => W_err_North_Req_E,
W_err_North_grant_E => W_err_North_grant_E,
W_err_East_Req_W => W_err_East_Req_W,
W_err_East_grant_W => W_err_East_grant_W,
W_err_West_Req_S => W_err_West_Req_S,
W_err_West_grant_S => W_err_West_grant_S,
W_err_South_Req_L => W_err_South_Req_L,
W_err_South_grant_L => W_err_South_grant_L,
W_err_Local_Req_N => W_err_Local_Req_N,
W_err_Local_grant_N => W_err_Local_grant_N,
W_err_IDLE_Req_W => W_err_IDLE_Req_W,
W_err_IDLE_grant_W => W_err_IDLE_grant_W,
W_err_North_Req_W => W_err_North_Req_W,
W_err_North_grant_W => W_err_North_grant_W,
W_err_East_Req_S => W_err_East_Req_S,
W_err_East_grant_S => W_err_East_grant_S,
W_err_West_Req_L => W_err_West_Req_L,
W_err_West_grant_L => W_err_West_grant_L,
W_err_South_Req_N => W_err_South_Req_N,
W_err_South_grant_N => W_err_South_grant_N,
W_err_Local_Req_E => W_err_Local_Req_E,
W_err_Local_grant_E => W_err_Local_grant_E,
W_err_IDLE_Req_S => W_err_IDLE_Req_S,
W_err_IDLE_grant_S => W_err_IDLE_grant_S,
W_err_North_Req_S => W_err_North_Req_S,
W_err_North_grant_S => W_err_North_grant_S,
W_err_East_Req_L => W_err_East_Req_L,
W_err_East_grant_L => W_err_East_grant_L,
W_err_West_Req_N => W_err_West_Req_N,
W_err_West_grant_N => W_err_West_grant_N,
W_err_South_Req_E => W_err_South_Req_E,
W_err_South_grant_E => W_err_South_grant_E,
W_err_Local_Req_W => W_err_Local_Req_W,
W_err_Local_grant_W => W_err_Local_grant_W,
W_err_IDLE_Req_L => W_err_IDLE_Req_L,
W_err_IDLE_grant_L => W_err_IDLE_grant_L,
W_err_North_Req_L => W_err_North_Req_L,
W_err_North_grant_L => W_err_North_grant_L,
W_err_East_Req_N => W_err_East_Req_N,
W_err_East_grant_N => W_err_East_grant_N,
W_err_West_Req_E => W_err_West_Req_E,
W_err_West_grant_E => W_err_West_grant_E,
W_err_South_Req_W => W_err_South_Req_W,
W_err_South_grant_W => W_err_South_grant_W,
W_err_Local_Req_S => W_err_Local_Req_S,
W_err_Local_grant_S => W_err_Local_grant_S,
W_err_state_in_onehot => W_err_arbiter_state_in_onehot,
W_err_no_request_grants => W_err_no_request_grants,
W_err_request_no_grants => W_err_request_no_grants,
W_err_no_Req_N_grant_N => W_err_no_Req_N_grant_N,
W_err_no_Req_E_grant_E => W_err_no_Req_E_grant_E,
W_err_no_Req_W_grant_W => W_err_no_Req_W_grant_W,
W_err_no_Req_S_grant_S => W_err_no_Req_S_grant_S,
W_err_no_Req_L_grant_L => W_err_no_Req_L_grant_L,
-- South Arbiter_in Checker outputs
S_err_Requests_state_in_state_not_equal => S_err_Requests_state_in_state_not_equal,
S_err_IDLE_Req_N => S_err_IDLE_Req_N,
S_err_IDLE_grant_N => S_err_IDLE_grant_N,
S_err_North_Req_N => S_err_North_Req_N,
S_err_North_grant_N => S_err_North_grant_N,
S_err_East_Req_E => S_err_East_Req_E,
S_err_East_grant_E => S_err_East_grant_E,
S_err_West_Req_W => S_err_West_Req_W,
S_err_West_grant_W => S_err_West_grant_W,
S_err_South_Req_S => S_err_South_Req_S,
S_err_South_grant_S => S_err_South_grant_S,
S_err_Local_Req_L => S_err_Local_Req_L,
S_err_Local_grant_L => S_err_Local_grant_L,
S_err_IDLE_Req_E => S_err_IDLE_Req_E,
S_err_IDLE_grant_E => S_err_IDLE_grant_E,
S_err_North_Req_E => S_err_North_Req_E,
S_err_North_grant_E => S_err_North_grant_E,
S_err_East_Req_W => S_err_East_Req_W,
S_err_East_grant_W => S_err_East_grant_W,
S_err_West_Req_S => S_err_West_Req_S,
S_err_West_grant_S => S_err_West_grant_S,
S_err_South_Req_L => S_err_South_Req_L,
S_err_South_grant_L => S_err_South_grant_L,
S_err_Local_Req_N => S_err_Local_Req_N,
S_err_Local_grant_N => S_err_Local_grant_N,
S_err_IDLE_Req_W => S_err_IDLE_Req_W,
S_err_IDLE_grant_W => S_err_IDLE_grant_W,
S_err_North_Req_W => S_err_North_Req_W,
S_err_North_grant_W => S_err_North_grant_W,
S_err_East_Req_S => S_err_East_Req_S,
S_err_East_grant_S => S_err_East_grant_S,
S_err_West_Req_L => S_err_West_Req_L,
S_err_West_grant_L => S_err_West_grant_L,
S_err_South_Req_N => S_err_South_Req_N,
S_err_South_grant_N => S_err_South_grant_N,
S_err_Local_Req_E => S_err_Local_Req_E,
S_err_Local_grant_E => S_err_Local_grant_E,
S_err_IDLE_Req_S => S_err_IDLE_Req_S,
S_err_IDLE_grant_S => S_err_IDLE_grant_S,
S_err_North_Req_S => S_err_North_Req_S,
S_err_North_grant_S => S_err_North_grant_S,
S_err_East_Req_L => S_err_East_Req_L,
S_err_East_grant_L => S_err_East_grant_L,
S_err_West_Req_N => S_err_West_Req_N,
S_err_West_grant_N => S_err_West_grant_N,
S_err_South_Req_E => S_err_South_Req_E,
S_err_South_grant_E => S_err_South_grant_E,
S_err_Local_Req_W => S_err_Local_Req_W,
S_err_Local_grant_W => S_err_Local_grant_W,
S_err_IDLE_Req_L => S_err_IDLE_Req_L,
S_err_IDLE_grant_L => S_err_IDLE_grant_L,
S_err_North_Req_L => S_err_North_Req_L,
S_err_North_grant_L => S_err_North_grant_L,
S_err_East_Req_N => S_err_East_Req_N,
S_err_East_grant_N => S_err_East_grant_N,
S_err_West_Req_E => S_err_West_Req_E,
S_err_West_grant_E => S_err_West_grant_E,
S_err_South_Req_W => S_err_South_Req_W,
S_err_South_grant_W => S_err_South_grant_W,
S_err_Local_Req_S => S_err_Local_Req_S,
S_err_Local_grant_S => S_err_Local_grant_S,
S_err_state_in_onehot => S_err_arbiter_state_in_onehot,
S_err_no_request_grants => S_err_no_request_grants,
S_err_request_no_grants => S_err_request_no_grants,
S_err_no_Req_N_grant_N => S_err_no_Req_N_grant_N,
S_err_no_Req_E_grant_E => S_err_no_Req_E_grant_E,
S_err_no_Req_W_grant_W => S_err_no_Req_W_grant_W,
S_err_no_Req_S_grant_S => S_err_no_Req_S_grant_S,
S_err_no_Req_L_grant_L => S_err_no_Req_L_grant_L,
-- Local Arbiter_in Checker outputs
L_err_Requests_state_in_state_not_equal => L_err_Requests_state_in_state_not_equal,
L_err_IDLE_Req_N => L_err_IDLE_Req_N,
L_err_IDLE_grant_N => L_err_IDLE_grant_N,
L_err_North_Req_N => L_err_North_Req_N,
L_err_North_grant_N => L_err_North_grant_N,
L_err_East_Req_E => L_err_East_Req_E,
L_err_East_grant_E => L_err_East_grant_E,
L_err_West_Req_W => L_err_West_Req_W,
L_err_West_grant_W => L_err_West_grant_W,
L_err_South_Req_S => L_err_South_Req_S,
L_err_South_grant_S => L_err_South_grant_S,
L_err_Local_Req_L => L_err_Local_Req_L,
L_err_Local_grant_L => L_err_Local_grant_L,
L_err_IDLE_Req_E => L_err_IDLE_Req_E,
L_err_IDLE_grant_E => L_err_IDLE_grant_E,
L_err_North_Req_E => L_err_North_Req_E,
L_err_North_grant_E => L_err_North_grant_E,
L_err_East_Req_W => L_err_East_Req_W,
L_err_East_grant_W => L_err_East_grant_W,
L_err_West_Req_S => L_err_West_Req_S,
L_err_West_grant_S => L_err_West_grant_S,
L_err_South_Req_L => L_err_South_Req_L,
L_err_South_grant_L => L_err_South_grant_L,
L_err_Local_Req_N => L_err_Local_Req_N,
L_err_Local_grant_N => L_err_Local_grant_N,
L_err_IDLE_Req_W => L_err_IDLE_Req_W,
L_err_IDLE_grant_W => L_err_IDLE_grant_W,
L_err_North_Req_W => L_err_North_Req_W,
L_err_North_grant_W => L_err_North_grant_W,
L_err_East_Req_S => L_err_East_Req_S,
L_err_East_grant_S => L_err_East_grant_S,
L_err_West_Req_L => L_err_West_Req_L,
L_err_West_grant_L => L_err_West_grant_L,
L_err_South_Req_N => L_err_South_Req_N,
L_err_South_grant_N => L_err_South_grant_N,
L_err_Local_Req_E => L_err_Local_Req_E,
L_err_Local_grant_E => L_err_Local_grant_E,
L_err_IDLE_Req_S => L_err_IDLE_Req_S,
L_err_IDLE_grant_S => L_err_IDLE_grant_S,
L_err_North_Req_S => L_err_North_Req_S,
L_err_North_grant_S => L_err_North_grant_S,
L_err_East_Req_L => L_err_East_Req_L,
L_err_East_grant_L => L_err_East_grant_L,
L_err_West_Req_N => L_err_West_Req_N,
L_err_West_grant_N => L_err_West_grant_N,
L_err_South_Req_E => L_err_South_Req_E,
L_err_South_grant_E => L_err_South_grant_E,
L_err_Local_Req_W => L_err_Local_Req_W,
L_err_Local_grant_W => L_err_Local_grant_W,
L_err_IDLE_Req_L => L_err_IDLE_Req_L,
L_err_IDLE_grant_L => L_err_IDLE_grant_L,
L_err_North_Req_L => L_err_North_Req_L,
L_err_North_grant_L => L_err_North_grant_L,
L_err_East_Req_N => L_err_East_Req_N,
L_err_East_grant_N => L_err_East_grant_N,
L_err_West_Req_E => L_err_West_Req_E,
L_err_West_grant_E => L_err_West_grant_E,
L_err_South_Req_W => L_err_South_Req_W,
L_err_South_grant_W => L_err_South_grant_W,
L_err_Local_Req_S => L_err_Local_Req_S,
L_err_Local_grant_S => L_err_Local_grant_S,
L_err_state_in_onehot => L_err_arbiter_state_in_onehot,
L_err_no_request_grants => L_err_no_request_grants,
L_err_request_no_grants => L_err_request_no_grants,
L_err_no_Req_N_grant_N => L_err_no_Req_N_grant_N,
L_err_no_Req_E_grant_E => L_err_no_Req_E_grant_E,
L_err_no_Req_W_grant_W => L_err_no_Req_W_grant_W,
L_err_no_Req_S_grant_S => L_err_no_Req_S_grant_S,
L_err_no_Req_L_grant_L => L_err_no_Req_L_grant_L,
-- Arbiter_out checker outputs
-- North Arbiter_out checker outputs
N_arbiter_out_err_Requests_state_in_state_not_equal => N_arbiter_out_err_Requests_state_in_state_not_equal,
N_err_IDLE_req_X_N => N_err_IDLE_req_X_N,
N_err_North_req_X_N => N_err_North_req_X_N,
N_err_North_credit_not_zero_req_X_N_grant_N => N_err_North_credit_not_zero_req_X_N_grant_N,
N_err_North_credit_zero_or_not_req_X_N_not_grant_N => N_err_North_credit_zero_or_not_req_X_N_not_grant_N,
N_err_East_req_X_E => N_err_East_req_X_E,
N_err_East_credit_not_zero_req_X_E_grant_E => N_err_East_credit_not_zero_req_X_E_grant_E,
N_err_East_credit_zero_or_not_req_X_E_not_grant_E => N_err_East_credit_zero_or_not_req_X_E_not_grant_E,
N_err_West_req_X_W => N_err_West_req_X_W,
N_err_West_credit_not_zero_req_X_W_grant_W => N_err_West_credit_not_zero_req_X_W_grant_W,
N_err_West_credit_zero_or_not_req_X_W_not_grant_W => N_err_West_credit_zero_or_not_req_X_W_not_grant_W,
N_err_South_req_X_S => N_err_South_req_X_S,
N_err_South_credit_not_zero_req_X_S_grant_S => N_err_South_credit_not_zero_req_X_S_grant_S,
N_err_South_credit_zero_or_not_req_X_S_not_grant_S => N_err_South_credit_zero_or_not_req_X_S_not_grant_S,
N_err_Local_req_X_L => N_err_Local_req_X_L,
N_err_Local_credit_not_zero_req_X_L_grant_L => N_err_Local_credit_not_zero_req_X_L_grant_L,
N_err_Local_credit_zero_or_not_req_X_L_not_grant_L => N_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
N_err_IDLE_req_X_E => N_err_IDLE_req_X_E,
N_err_North_req_X_E => N_err_North_req_X_E,
N_err_East_req_X_W => N_err_East_req_X_W,
N_err_West_req_X_S => N_err_West_req_X_S,
N_err_South_req_X_L => N_err_South_req_X_L,
N_err_Local_req_X_N => N_err_Local_req_X_N,
N_err_IDLE_req_X_W => N_err_IDLE_req_X_W,
N_err_North_req_X_W => N_err_North_req_X_W,
N_err_East_req_X_S => N_err_East_req_X_S,
N_err_West_req_X_L => N_err_West_req_X_L,
N_err_South_req_X_N => N_err_South_req_X_N,
N_err_Local_req_X_E => N_err_Local_req_X_E,
N_err_IDLE_req_X_S => N_err_IDLE_req_X_S,
N_err_North_req_X_S => N_err_North_req_X_S,
N_err_East_req_X_L => N_err_East_req_X_L,
N_err_West_req_X_N => N_err_West_req_X_N,
N_err_South_req_X_E => N_err_South_req_X_E,
N_err_Local_req_X_W => N_err_Local_req_X_W,
N_err_IDLE_req_X_L => N_err_IDLE_req_X_L,
N_err_North_req_X_L => N_err_North_req_X_L,
N_err_East_req_X_N => N_err_East_req_X_N,
N_err_West_req_X_E => N_err_West_req_X_E,
N_err_South_req_X_W => N_err_South_req_X_W,
N_err_Local_req_X_S => N_err_Local_req_X_S,
N_arbiter_out_err_state_in_onehot => N_arbiter_out_err_state_in_onehot,
N_arbiter_out_err_no_request_grants => N_arbiter_out_err_no_request_grants,
N_err_request_IDLE_state => N_err_request_IDLE_state,
N_err_request_IDLE_not_Grants => N_err_request_IDLE_not_Grants,
N_err_state_North_Invalid_Grant => N_err_state_North_Invalid_Grant,
N_err_state_East_Invalid_Grant => N_err_state_East_Invalid_Grant,
N_err_state_West_Invalid_Grant => N_err_state_West_Invalid_Grant,
N_err_state_South_Invalid_Grant => N_err_state_South_Invalid_Grant,
N_err_state_Local_Invalid_Grant => N_err_state_Local_Invalid_Grant,
N_err_Grants_onehot_or_all_zero => N_err_Grants_onehot_or_all_zero,
-- East Arbiter_out checker outputs
E_arbiter_out_err_Requests_state_in_state_not_equal => E_arbiter_out_err_Requests_state_in_state_not_equal,
E_err_IDLE_req_X_N => E_err_IDLE_req_X_N,
E_err_North_req_X_N => E_err_North_req_X_N,
E_err_North_credit_not_zero_req_X_N_grant_N => E_err_North_credit_not_zero_req_X_N_grant_N,
E_err_North_credit_zero_or_not_req_X_N_not_grant_N => E_err_North_credit_zero_or_not_req_X_N_not_grant_N,
E_err_East_req_X_E => E_err_East_req_X_E,
E_err_East_credit_not_zero_req_X_E_grant_E => E_err_East_credit_not_zero_req_X_E_grant_E,
E_err_East_credit_zero_or_not_req_X_E_not_grant_E => E_err_East_credit_zero_or_not_req_X_E_not_grant_E,
E_err_West_req_X_W => E_err_West_req_X_W,
E_err_West_credit_not_zero_req_X_W_grant_W => E_err_West_credit_not_zero_req_X_W_grant_W,
E_err_West_credit_zero_or_not_req_X_W_not_grant_W => E_err_West_credit_zero_or_not_req_X_W_not_grant_W,
E_err_South_req_X_S => E_err_South_req_X_S,
E_err_South_credit_not_zero_req_X_S_grant_S => E_err_South_credit_not_zero_req_X_S_grant_S,
E_err_South_credit_zero_or_not_req_X_S_not_grant_S => E_err_South_credit_zero_or_not_req_X_S_not_grant_S,
E_err_Local_req_X_L => E_err_Local_req_X_L,
E_err_Local_credit_not_zero_req_X_L_grant_L => E_err_Local_credit_not_zero_req_X_L_grant_L,
E_err_Local_credit_zero_or_not_req_X_L_not_grant_L => E_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
E_err_IDLE_req_X_E => E_err_IDLE_req_X_E,
E_err_North_req_X_E => E_err_North_req_X_E,
E_err_East_req_X_W => E_err_East_req_X_W,
E_err_West_req_X_S => E_err_West_req_X_S,
E_err_South_req_X_L => E_err_South_req_X_L,
E_err_Local_req_X_N => E_err_Local_req_X_N,
E_err_IDLE_req_X_W => E_err_IDLE_req_X_W,
E_err_North_req_X_W => E_err_North_req_X_W,
E_err_East_req_X_S => E_err_East_req_X_S,
E_err_West_req_X_L => E_err_West_req_X_L,
E_err_South_req_X_N => E_err_South_req_X_N,
E_err_Local_req_X_E => E_err_Local_req_X_E,
E_err_IDLE_req_X_S => E_err_IDLE_req_X_S,
E_err_North_req_X_S => E_err_North_req_X_S,
E_err_East_req_X_L => E_err_East_req_X_L,
E_err_West_req_X_N => E_err_West_req_X_N,
E_err_South_req_X_E => E_err_South_req_X_E,
E_err_Local_req_X_W => E_err_Local_req_X_W,
E_err_IDLE_req_X_L => E_err_IDLE_req_X_L,
E_err_North_req_X_L => E_err_North_req_X_L,
E_err_East_req_X_N => E_err_East_req_X_N,
E_err_West_req_X_E => E_err_West_req_X_E,
E_err_South_req_X_W => E_err_South_req_X_W,
E_err_Local_req_X_S => E_err_Local_req_X_S,
E_arbiter_out_err_state_in_onehot => E_arbiter_out_err_state_in_onehot,
E_arbiter_out_err_no_request_grants => E_arbiter_out_err_no_request_grants,
E_err_request_IDLE_state => E_err_request_IDLE_state,
E_err_request_IDLE_not_Grants => E_err_request_IDLE_not_Grants,
E_err_state_North_Invalid_Grant => E_err_state_North_Invalid_Grant,
E_err_state_East_Invalid_Grant => E_err_state_East_Invalid_Grant,
E_err_state_West_Invalid_Grant => E_err_state_West_Invalid_Grant,
E_err_state_South_Invalid_Grant => E_err_state_South_Invalid_Grant,
E_err_state_Local_Invalid_Grant => E_err_state_Local_Invalid_Grant,
E_err_Grants_onehot_or_all_zero => E_err_Grants_onehot_or_all_zero,
-- West Arbiter_out checker outputs
W_arbiter_out_err_Requests_state_in_state_not_equal => W_arbiter_out_err_Requests_state_in_state_not_equal,
W_err_IDLE_req_X_N => W_err_IDLE_req_X_N,
W_err_North_req_X_N => W_err_North_req_X_N,
W_err_North_credit_not_zero_req_X_N_grant_N => W_err_North_credit_not_zero_req_X_N_grant_N,
W_err_North_credit_zero_or_not_req_X_N_not_grant_N => W_err_North_credit_zero_or_not_req_X_N_not_grant_N,
W_err_East_req_X_E => W_err_East_req_X_E,
W_err_East_credit_not_zero_req_X_E_grant_E => W_err_East_credit_not_zero_req_X_E_grant_E,
W_err_East_credit_zero_or_not_req_X_E_not_grant_E => W_err_East_credit_zero_or_not_req_X_E_not_grant_E,
W_err_West_req_X_W => W_err_West_req_X_W,
W_err_West_credit_not_zero_req_X_W_grant_W => W_err_West_credit_not_zero_req_X_W_grant_W,
W_err_West_credit_zero_or_not_req_X_W_not_grant_W => W_err_West_credit_zero_or_not_req_X_W_not_grant_W,
W_err_South_req_X_S => W_err_South_req_X_S,
W_err_South_credit_not_zero_req_X_S_grant_S => W_err_South_credit_not_zero_req_X_S_grant_S,
W_err_South_credit_zero_or_not_req_X_S_not_grant_S => W_err_South_credit_zero_or_not_req_X_S_not_grant_S,
W_err_Local_req_X_L => W_err_Local_req_X_L,
W_err_Local_credit_not_zero_req_X_L_grant_L => W_err_Local_credit_not_zero_req_X_L_grant_L,
W_err_Local_credit_zero_or_not_req_X_L_not_grant_L => W_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
W_err_IDLE_req_X_E => W_err_IDLE_req_X_E,
W_err_North_req_X_E => W_err_North_req_X_E,
W_err_East_req_X_W => W_err_East_req_X_W,
W_err_West_req_X_S => W_err_West_req_X_S,
W_err_South_req_X_L => W_err_South_req_X_L,
W_err_Local_req_X_N => W_err_Local_req_X_N,
W_err_IDLE_req_X_W => W_err_IDLE_req_X_W,
W_err_North_req_X_W => W_err_North_req_X_W,
W_err_East_req_X_S => W_err_East_req_X_S,
W_err_West_req_X_L => W_err_West_req_X_L,
W_err_South_req_X_N => W_err_South_req_X_N,
W_err_Local_req_X_E => W_err_Local_req_X_E,
W_err_IDLE_req_X_S => W_err_IDLE_req_X_S,
W_err_North_req_X_S => W_err_North_req_X_S,
W_err_East_req_X_L => W_err_East_req_X_L,
W_err_West_req_X_N => W_err_West_req_X_N,
W_err_South_req_X_E => W_err_South_req_X_E,
W_err_Local_req_X_W => W_err_Local_req_X_W,
W_err_IDLE_req_X_L => W_err_IDLE_req_X_L,
W_err_North_req_X_L => W_err_North_req_X_L,
W_err_East_req_X_N => W_err_East_req_X_N,
W_err_West_req_X_E => W_err_West_req_X_E,
W_err_South_req_X_W => W_err_South_req_X_W,
W_err_Local_req_X_S => W_err_Local_req_X_S,
W_arbiter_out_err_state_in_onehot => W_arbiter_out_err_state_in_onehot,
W_arbiter_out_err_no_request_grants => W_arbiter_out_err_no_request_grants,
W_err_request_IDLE_state => W_err_request_IDLE_state,
W_err_request_IDLE_not_Grants => W_err_request_IDLE_not_Grants,
W_err_state_North_Invalid_Grant => W_err_state_North_Invalid_Grant,
W_err_state_East_Invalid_Grant => W_err_state_East_Invalid_Grant,
W_err_state_West_Invalid_Grant => W_err_state_West_Invalid_Grant,
W_err_state_South_Invalid_Grant => W_err_state_South_Invalid_Grant,
W_err_state_Local_Invalid_Grant => W_err_state_Local_Invalid_Grant,
W_err_Grants_onehot_or_all_zero => W_err_Grants_onehot_or_all_zero,
-- South Arbiter_out checker outputs
S_arbiter_out_err_Requests_state_in_state_not_equal => S_arbiter_out_err_Requests_state_in_state_not_equal,
S_err_IDLE_req_X_N => S_err_IDLE_req_X_N,
S_err_North_req_X_N => S_err_North_req_X_N,
S_err_North_credit_not_zero_req_X_N_grant_N => S_err_North_credit_not_zero_req_X_N_grant_N,
S_err_North_credit_zero_or_not_req_X_N_not_grant_N => S_err_North_credit_zero_or_not_req_X_N_not_grant_N,
S_err_East_req_X_E => S_err_East_req_X_E,
S_err_East_credit_not_zero_req_X_E_grant_E => S_err_East_credit_not_zero_req_X_E_grant_E,
S_err_East_credit_zero_or_not_req_X_E_not_grant_E => S_err_East_credit_zero_or_not_req_X_E_not_grant_E,
S_err_West_req_X_W => S_err_West_req_X_W,
S_err_West_credit_not_zero_req_X_W_grant_W => S_err_West_credit_not_zero_req_X_W_grant_W,
S_err_West_credit_zero_or_not_req_X_W_not_grant_W => S_err_West_credit_zero_or_not_req_X_W_not_grant_W,
S_err_South_req_X_S => S_err_South_req_X_S,
S_err_South_credit_not_zero_req_X_S_grant_S => S_err_South_credit_not_zero_req_X_S_grant_S,
S_err_South_credit_zero_or_not_req_X_S_not_grant_S => S_err_South_credit_zero_or_not_req_X_S_not_grant_S,
S_err_Local_req_X_L => S_err_Local_req_X_L,
S_err_Local_credit_not_zero_req_X_L_grant_L => S_err_Local_credit_not_zero_req_X_L_grant_L,
S_err_Local_credit_zero_or_not_req_X_L_not_grant_L => S_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
S_err_IDLE_req_X_E => S_err_IDLE_req_X_E,
S_err_North_req_X_E => S_err_North_req_X_E,
S_err_East_req_X_W => S_err_East_req_X_W,
S_err_West_req_X_S => S_err_West_req_X_S,
S_err_South_req_X_L => S_err_South_req_X_L,
S_err_Local_req_X_N => S_err_Local_req_X_N,
S_err_IDLE_req_X_W => S_err_IDLE_req_X_W,
S_err_North_req_X_W => S_err_North_req_X_W,
S_err_East_req_X_S => S_err_East_req_X_S,
S_err_West_req_X_L => S_err_West_req_X_L,
S_err_South_req_X_N => S_err_South_req_X_N,
S_err_Local_req_X_E => S_err_Local_req_X_E,
S_err_IDLE_req_X_S => S_err_IDLE_req_X_S,
S_err_North_req_X_S => S_err_North_req_X_S,
S_err_East_req_X_L => S_err_East_req_X_L,
S_err_West_req_X_N => S_err_West_req_X_N,
S_err_South_req_X_E => S_err_South_req_X_E,
S_err_Local_req_X_W => S_err_Local_req_X_W,
S_err_IDLE_req_X_L => S_err_IDLE_req_X_L,
S_err_North_req_X_L => S_err_North_req_X_L,
S_err_East_req_X_N => S_err_East_req_X_N,
S_err_West_req_X_E => S_err_West_req_X_E,
S_err_South_req_X_W => S_err_South_req_X_W,
S_err_Local_req_X_S => S_err_Local_req_X_S,
S_arbiter_out_err_state_in_onehot => S_arbiter_out_err_state_in_onehot,
S_arbiter_out_err_no_request_grants => S_arbiter_out_err_no_request_grants,
S_err_request_IDLE_state => S_err_request_IDLE_state,
S_err_request_IDLE_not_Grants => S_err_request_IDLE_not_Grants,
S_err_state_North_Invalid_Grant => S_err_state_North_Invalid_Grant,
S_err_state_East_Invalid_Grant => S_err_state_East_Invalid_Grant,
S_err_state_West_Invalid_Grant => S_err_state_West_Invalid_Grant,
S_err_state_South_Invalid_Grant => S_err_state_South_Invalid_Grant,
S_err_state_Local_Invalid_Grant => S_err_state_Local_Invalid_Grant,
S_err_Grants_onehot_or_all_zero => S_err_Grants_onehot_or_all_zero,
-- Local Arbiter_out checker outputs
L_arbiter_out_err_Requests_state_in_state_not_equal => L_arbiter_out_err_Requests_state_in_state_not_equal,
L_err_IDLE_req_X_N => L_err_IDLE_req_X_N,
L_err_North_req_X_N => L_err_North_req_X_N,
L_err_North_credit_not_zero_req_X_N_grant_N => L_err_North_credit_not_zero_req_X_N_grant_N,
L_err_North_credit_zero_or_not_req_X_N_not_grant_N => L_err_North_credit_zero_or_not_req_X_N_not_grant_N,
L_err_East_req_X_E => L_err_East_req_X_E,
L_err_East_credit_not_zero_req_X_E_grant_E => L_err_East_credit_not_zero_req_X_E_grant_E,
L_err_East_credit_zero_or_not_req_X_E_not_grant_E => L_err_East_credit_zero_or_not_req_X_E_not_grant_E,
L_err_West_req_X_W => L_err_West_req_X_W,
L_err_West_credit_not_zero_req_X_W_grant_W => L_err_West_credit_not_zero_req_X_W_grant_W,
L_err_West_credit_zero_or_not_req_X_W_not_grant_W => L_err_West_credit_zero_or_not_req_X_W_not_grant_W,
L_err_South_req_X_S => L_err_South_req_X_S,
L_err_South_credit_not_zero_req_X_S_grant_S => L_err_South_credit_not_zero_req_X_S_grant_S,
L_err_South_credit_zero_or_not_req_X_S_not_grant_S => L_err_South_credit_zero_or_not_req_X_S_not_grant_S,
L_err_Local_req_X_L => L_err_Local_req_X_L,
L_err_Local_credit_not_zero_req_X_L_grant_L => L_err_Local_credit_not_zero_req_X_L_grant_L,
L_err_Local_credit_zero_or_not_req_X_L_not_grant_L => L_err_Local_credit_zero_or_not_req_X_L_not_grant_L,
L_err_IDLE_req_X_E => L_err_IDLE_req_X_E,
L_err_North_req_X_E => L_err_North_req_X_E,
L_err_East_req_X_W => L_err_East_req_X_W,
L_err_West_req_X_S => L_err_West_req_X_S,
L_err_South_req_X_L => L_err_South_req_X_L,
L_err_Local_req_X_N => L_err_Local_req_X_N,
L_err_IDLE_req_X_W => L_err_IDLE_req_X_W,
L_err_North_req_X_W => L_err_North_req_X_W,
L_err_East_req_X_S => L_err_East_req_X_S,
L_err_West_req_X_L => L_err_West_req_X_L,
L_err_South_req_X_N => L_err_South_req_X_N,
L_err_Local_req_X_E => L_err_Local_req_X_E,
L_err_IDLE_req_X_S => L_err_IDLE_req_X_S,
L_err_North_req_X_S => L_err_North_req_X_S,
L_err_East_req_X_L => L_err_East_req_X_L,
L_err_West_req_X_N => L_err_West_req_X_N,
L_err_South_req_X_E => L_err_South_req_X_E,
L_err_Local_req_X_W => L_err_Local_req_X_W,
L_err_IDLE_req_X_L => L_err_IDLE_req_X_L,
L_err_North_req_X_L => L_err_North_req_X_L,
L_err_East_req_X_N => L_err_East_req_X_N,
L_err_West_req_X_E => L_err_West_req_X_E,
L_err_South_req_X_W => L_err_South_req_X_W,
L_err_Local_req_X_S => L_err_Local_req_X_S,
L_arbiter_out_err_state_in_onehot => L_arbiter_out_err_state_in_onehot,
L_arbiter_out_err_no_request_grants => L_arbiter_out_err_no_request_grants,
L_err_request_IDLE_state => L_err_request_IDLE_state,
L_err_request_IDLE_not_Grants => L_err_request_IDLE_not_Grants,
L_err_state_North_Invalid_Grant => L_err_state_North_Invalid_Grant,
L_err_state_East_Invalid_Grant => L_err_state_East_Invalid_Grant,
L_err_state_West_Invalid_Grant => L_err_state_West_Invalid_Grant,
L_err_state_South_Invalid_Grant => L_err_state_South_Invalid_Grant,
L_err_state_Local_Invalid_Grant => L_err_state_Local_Invalid_Grant,
L_err_Grants_onehot_or_all_zero => L_err_Grants_onehot_or_all_zero
);
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
-- all the Xbar select_signals
Xbar_sel_N <= '0' & Grant_NE & Grant_NW & Grant_NS & Grant_NL;
Xbar_sel_E <= Grant_EN & '0' & Grant_EW & Grant_ES & Grant_EL;
Xbar_sel_W <= Grant_WN & Grant_WE & '0' & Grant_WS & Grant_WL;
Xbar_sel_S <= Grant_SN & Grant_SE & Grant_SW & '0' & Grant_SL;
Xbar_sel_L <= Grant_LN & Grant_LE & Grant_LW & Grant_LS & '0';
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------
-- all the Xbars
GEN_XABR: for i in range (0 to ) generate
XBAR_X: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_N, Data_out=> TX_N);
end generate GEN_XABR;
XBAR_N: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_N, Data_out=> TX_N);
XBAR_E: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_E, Data_out=> TX_E);
XBAR_W: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_W, Data_out=> TX_W);
XBAR_S: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_S, Data_out=> TX_S);
XBAR_L: XBAR generic map (DATA_WIDTH => DATA_WIDTH)
PORT MAP (North_in => FIFO_D_out_N, East_in => FIFO_D_out_E, West_in => FIFO_D_out_W, South_in => FIFO_D_out_S, Local_in => FIFO_D_out_L,
sel => Xbar_sel_L, Data_out=> TX_L);
end;
|
-- SHA256 Hashing Module - Functions
-- Kristian Klomsten Skordal <[email protected]>
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.sha256_types.all;
use work.sha256_constants.all;
package sha256_functions is
-- Function used to index arrays using std_logic_vector:
function index(input : in std_logic_vector) return integer;
-- Resets the intermediate hash values to their initial values:
procedure reset_intermediate(signal a, b, c, d, e, f, g, h : out std_logic_vector);
-- Calculates the j'th word of the message schedule:
function schedule(constant input : in std_logic_vector(31 downto 0);
constant W : in expanded_message_block_array;
constant iteration : in std_logic_vector(5 downto 0))
return std_logic_vector;
-- The SHA256 compression function for iteration j:
procedure compress(
-- Intermediate hash values from the previous iteration:
signal h0, h1, h2, h3, h4, h5, h6, h7 : inout std_logic_vector(31 downto 0);
-- The expanded message block value for this iteration:
constant W : in std_logic_vector(31 downto 0);
constant K : in std_logic_vector(31 downto 0));
-- Random mathematical functions used in SHA256:
function Ch(x, y, z : std_logic_vector) return std_logic_vector;
function Maj(x, y, z : std_logic_vector) return std_logic_vector;
-- Big sigma functions, using S because of lacking Unicode support:
function s0(x : std_logic_vector) return std_logic_vector;
function s1(x : std_logic_vector) return std_logic_vector;
-- Small sigma functions; using o which looks fairly similar:
function o0(x : std_logic_vector) return std_logic_vector;
function o1(x : std_logic_vector) return std_logic_vector;
end package sha256_functions;
package body sha256_functions is
function index(input : in std_logic_vector) return integer is
begin
return to_integer(unsigned(input));
end function index;
procedure reset_intermediate(signal a, b, c, d, e, f, g, h : out std_logic_vector) is
begin
a <= INITIAL_A;
b <= INITIAL_B;
c <= INITIAL_C;
d <= INITIAL_D;
e <= INITIAL_E;
f <= INITIAL_F;
g <= INITIAL_G;
h <= INITIAL_H;
end procedure reset_intermediate;
function schedule(constant input : in std_logic_vector(31 downto 0);
constant W : in expanded_message_block_array;
constant iteration : in std_logic_vector(5 downto 0))
return std_logic_vector
is
variable j : integer := index(iteration);
begin
if j < 16 then -- If j < 16 then W_j = M_j
return input;
else -- Else, W_j = o1(W_j-2) + W_j-7 + o0(W_j-15) + W_j-16
return std_logic_vector(unsigned(o1(W(j - 2))) +
unsigned(W(j - 7)) + unsigned(o0(W(j - 15))) + unsigned(W(j - 16)));
end if;
end function schedule;
procedure compress(
-- Intermediate hash values from the previous iteration:
signal h0, h1, h2, h3, h4, h5, h6, h7 : inout std_logic_vector(31 downto 0);
-- The expanded message block value for this iteration:
constant W : in std_logic_vector(31 downto 0);
-- The constant for this iteration:
constant K : in std_logic_vector(31 downto 0))
is
variable t1, t2 : std_logic_vector(31 downto 0);
variable a, b, c, d, e, f, g, h : std_logic_vector(31 downto 0);
begin
-- Assign intermediate hash values to working variables:
a := h0;
b := h1;
c := h2;
d := h3;
e := h4;
f := h5;
g := h6;
h := h7;
-- Calculate temporary values:
t1 := std_logic_vector(unsigned(h) + unsigned(s1(e))
+ unsigned(Ch(e, f, g)) + unsigned(K) + unsigned(W));
t2 := std_logic_vector(unsigned(s0(a)) + unsigned(Maj(a, b, c)));
-- Assign new values to working variables:
h := g;
g := f;
f := e;
e := std_logic_vector(unsigned(d) + unsigned(t1));
d := c;
c := b;
b := a;
a := std_logic_vector(unsigned(t1) + unsigned(t2));
-- Assign new values to the intermediate hash values:
h0 <= a;
h1 <= b;
h2 <= c;
h3 <= d;
h4 <= e;
h5 <= f;
h6 <= g;
h7 <= h;
end procedure compress;
function Ch(x, y, z : std_logic_vector) return std_logic_vector is
begin
return (x and y) xor ((not x) and z);
end function ch;
function Maj(x, y, z : std_logic_vector) return std_logic_vector is
begin
return (x and y) xor (x and z) xor (y and z);
end function maj;
function s0(x : std_logic_vector) return std_logic_vector is
begin
return std_logic_vector(rotate_right(unsigned(x), 2) xor rotate_right(unsigned(x), 13) xor rotate_right(unsigned(x), 22));
end function s0;
function s1(x : std_logic_vector) return std_logic_vector is
begin
return std_logic_vector(rotate_right(unsigned(x), 6) xor rotate_right(unsigned(x), 11) xor rotate_right(unsigned(x), 25));
end function s1;
function o0(x : std_logic_vector) return std_logic_vector is
begin
return std_logic_vector(rotate_right(unsigned(x), 7) xor rotate_right(unsigned(x), 18) xor shift_right(unsigned(x), 3));
end function o0;
function o1(x : std_logic_vector) return std_logic_vector is
begin
return std_logic_vector(rotate_right(unsigned(x), 17) xor rotate_right(unsigned(x), 19) xor shift_right(unsigned(x), 10));
end function o1;
end package body sha256_functions;
|
-- VHDL do controlador de impressao do tabuleiro
library ieee;
use ieee.std_logic_1164.all;
entity controlador_impressao is
port(
clock : in std_logic;
reset : in std_logic;
comeca_impressao : in std_logic;
uart_livre : in std_logic;
posicao_leitura : out std_logic_vector(6 downto 0);
leitura_memoria : out std_logic;
transmite_dado : out std_logic;
pronto : out std_logic
);
end controlador_impressao;
architecture exemplo of controlador_impressao is
component unidade_controle_tabuleiro is
port(
clock : in std_logic;
reset : in std_logic;
start : in std_logic;
fim_contagem : in std_logic;
uart_livre : in std_logic;
transmite_dado : out std_logic;
atualiza_caractere : out std_logic;
pronto : out std_logic
);
end component;
component contador_tabuleiro is
port(
clock : in std_logic;
zera : in std_logic;
conta : in std_logic;
contagem : out std_logic_vector(6 downto 0);
fim : out std_logic
);
end component;
signal sinal_pronto, sinal_atualiza_caractere, sinal_fim_contagem: std_logic;
begin
unidade_controle: unidade_controle_tabuleiro port map (clock, reset, comeca_impressao, sinal_fim_contagem, uart_livre, transmite_dado, sinal_atualiza_caractere, sinal_pronto);
fluxo_dados: contador_tabuleiro port map (clock, sinal_pronto, sinal_atualiza_caractere, posicao_leitura, sinal_fim_contagem);
pronto <= sinal_pronto;
leitura_memoria <= sinal_atualiza_caractere;
end exemplo;
|
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library work;
use work.functions.all;
use work.psl.all;
package wed is
type wed_type is record
status : std_logic_vector(7 downto 0); -- 7 downto 0
wed00_a : std_logic_vector(7 downto 0); -- 15 downto 8
wed00_b : std_logic_vector(15 downto 0); -- 31 downto 16
size : unsigned(31 downto 0); -- 63 downto 32
source : unsigned(63 downto 0); -- 127 downto 64
destination : unsigned(63 downto 0); -- 191 downto 128
wed03 : std_logic_vector(63 downto 0); -- 255 downto 192
wed04 : std_logic_vector(63 downto 0); -- 319 downto 256
wed05 : std_logic_vector(63 downto 0); -- 383 downto 320
wed06 : std_logic_vector(63 downto 0); -- 447 downto 384
wed07 : std_logic_vector(63 downto 0); -- 511 downto 448
wed08 : std_logic_vector(63 downto 0); -- 575 downto 512
wed09 : std_logic_vector(63 downto 0); -- 639 downto 576
wed10 : std_logic_vector(63 downto 0); -- 703 downto 640
wed11 : std_logic_vector(63 downto 0); -- 767 downto 704
wed12 : std_logic_vector(63 downto 0); -- 831 downto 768
wed13 : std_logic_vector(63 downto 0); -- 895 downto 832
wed14 : std_logic_vector(63 downto 0); -- 959 downto 896
wed15 : std_logic_vector(63 downto 0); -- 1023 downto 960
end record;
procedure wed_parse (signal data : in std_logic_vector(1023 downto 0); variable wed : out wed_type);
end package wed;
package body wed is
procedure wed_parse (signal data : in std_logic_vector(1023 downto 0); variable wed : out wed_type) is
begin
wed.status := data(7 downto 0);
wed.wed00_a := data(15 downto 8);
wed.wed00_b := data(31 downto 16);
wed.size := u(data(63 downto 32));
wed.source := u(data(127 downto 64));
wed.destination := u(data(191 downto 128));
wed.wed03 := data(255 downto 192);
wed.wed04 := data(319 downto 256);
wed.wed05 := data(383 downto 320);
wed.wed06 := data(447 downto 384);
wed.wed07 := data(511 downto 448);
wed.wed08 := data(575 downto 512);
wed.wed09 := data(639 downto 576);
wed.wed10 := data(703 downto 640);
wed.wed11 := data(767 downto 704);
wed.wed12 := data(831 downto 768);
wed.wed13 := data(895 downto 832);
wed.wed14 := data(959 downto 896);
wed.wed15 := data(1023 downto 960);
end procedure wed_parse;
end package body wed;
|
library ieee;
use ieee.std_logic_1164.all;
entity dut is
port (
sig_i : in std_logic_vector;
sig_o : out std_logic_vector
);
end entity;
architecture arch of dut is
begin
sig_o <= (sig_o'range => 'X') after 1 ns, sig_i after 2 ns;
end architecture;
library ieee;
use ieee.std_logic_1164.all;
entity tb is
end entity;
architecture bench of tb is
signal sin : std_ulogic_vector(1 downto 0);
signal sout : std_ulogic_vector(31 downto 0);
begin
stim : process
begin
wait for 3 ns;
report to_string(sin);
report to_string(sout);
std.env.finish;
end process;
dut_inst: entity work.dut port map (
sig_i => sin,
sig_o => sout
);
end architecture;
|
library ieee;
use ieee.std_logic_1164.all;
library ieee;
use ieee.numeric_std.all;
entity shr_141 is
port (
output : out std_logic_vector(31 downto 0);
input : in std_logic_vector(31 downto 0);
shift : in std_logic_vector(5 downto 0);
padding : in std_logic
);
end shr_141;
architecture augh of shr_141 is
signal tmp_padding : std_logic;
signal tmp_result : std_logic_vector(32 downto 0);
-- Little utility functions to make VHDL syntactically correct
-- with the syntax to_integer(unsigned(vector)) when 'vector' is a std_logic.
-- This happens when accessing arrays with <= 2 cells, for example.
function to_integer(B: std_logic) return integer is
variable V: std_logic_vector(0 to 0);
begin
V(0) := B;
return to_integer(unsigned(V));
end;
function to_integer(V: std_logic_vector) return integer is
begin
return to_integer(unsigned(V));
end;
begin
-- Temporary signals
tmp_padding <= padding;
tmp_result <= std_logic_vector(shift_right( unsigned(padding & input), to_integer(shift) ));
-- The output
output <= tmp_result(31 downto 0);
end architecture;
|
library ieee;
use ieee.std_logic_1164.all;
library ieee;
use ieee.numeric_std.all;
entity shr_141 is
port (
output : out std_logic_vector(31 downto 0);
input : in std_logic_vector(31 downto 0);
shift : in std_logic_vector(5 downto 0);
padding : in std_logic
);
end shr_141;
architecture augh of shr_141 is
signal tmp_padding : std_logic;
signal tmp_result : std_logic_vector(32 downto 0);
-- Little utility functions to make VHDL syntactically correct
-- with the syntax to_integer(unsigned(vector)) when 'vector' is a std_logic.
-- This happens when accessing arrays with <= 2 cells, for example.
function to_integer(B: std_logic) return integer is
variable V: std_logic_vector(0 to 0);
begin
V(0) := B;
return to_integer(unsigned(V));
end;
function to_integer(V: std_logic_vector) return integer is
begin
return to_integer(unsigned(V));
end;
begin
-- Temporary signals
tmp_padding <= padding;
tmp_result <= std_logic_vector(shift_right( unsigned(padding & input), to_integer(shift) ));
-- The output
output <= tmp_result(31 downto 0);
end architecture;
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